* [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
@ 2020-08-31 10:45 Nirmoy Das
2020-08-31 11:39 ` Christian König
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Nirmoy Das @ 2020-08-31 10:45 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Nirmoy Das, Tianci.Yin, Leo.Liu, christian.koenig
UVD dependent jobs should run on the same udv instance.
This patch disables gpu scheduler's load balancer for
a context which binds jobs from same the context to a udv
instance.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 59032c26fc82..7cd398d25498 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
- if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
+ if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
+ hw_ip == AMDGPU_HW_IP_VCN_DEC ||
+ hw_ip == AMDGPU_HW_IP_UVD) {
sched = drm_sched_pick_best(scheds, num_scheds);
scheds = &sched;
num_scheds = 1;
--
2.28.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 10:45 [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd Nirmoy Das
@ 2020-08-31 11:39 ` Christian König
2020-08-31 14:17 ` Alex Deucher
2020-09-01 7:07 ` Paul Menzel
2 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-08-31 11:39 UTC (permalink / raw)
To: Nirmoy Das, amd-gfx; +Cc: alexander.deucher, Tianci.Yin, Leo.Liu
Am 31.08.20 um 12:45 schrieb Nirmoy Das:
> UVD dependent jobs should run on the same udv instance.
> This patch disables gpu scheduler's load balancer for
> a context which binds jobs from same the context to a udv
> instance.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> index 59032c26fc82..7cd398d25498 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>
> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
> + hw_ip == AMDGPU_HW_IP_UVD) {
> sched = drm_sched_pick_best(scheds, num_scheds);
> scheds = &sched;
> num_scheds = 1;
> --
> 2.28.0
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 10:45 [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd Nirmoy Das
2020-08-31 11:39 ` Christian König
@ 2020-08-31 14:17 ` Alex Deucher
2020-08-31 14:59 ` Nirmoy
2020-09-01 7:07 ` Paul Menzel
2 siblings, 1 reply; 10+ messages in thread
From: Alex Deucher @ 2020-08-31 14:17 UTC (permalink / raw)
To: Nirmoy Das
Cc: Deucher, Alexander, tiancyin, Leo Liu, Christian Koenig, amd-gfx list
On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
>
> UVD dependent jobs should run on the same udv instance.
> This patch disables gpu scheduler's load balancer for
> a context which binds jobs from same the context to a udv
> instance.
typos: udv -> uvd
With that fixed:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Does VCE need a similar fix? What about UVD_ENC?
Alex
>
> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> index 59032c26fc82..7cd398d25498 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>
> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
> + hw_ip == AMDGPU_HW_IP_UVD) {
> sched = drm_sched_pick_best(scheds, num_scheds);
> scheds = &sched;
> num_scheds = 1;
> --
> 2.28.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 14:17 ` Alex Deucher
@ 2020-08-31 14:59 ` Nirmoy
2020-08-31 17:39 ` Alex Deucher
0 siblings, 1 reply; 10+ messages in thread
From: Nirmoy @ 2020-08-31 14:59 UTC (permalink / raw)
To: Alex Deucher, Nirmoy Das
Cc: Deucher, Alexander, tiancyin, Leo Liu, Christian Koenig, amd-gfx list
Hi Alex,
On 8/31/20 4:17 PM, Alex Deucher wrote:
> On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
>> UVD dependent jobs should run on the same udv instance.
>> This patch disables gpu scheduler's load balancer for
>> a context which binds jobs from same the context to a udv
>> instance.
> typos: udv -> uvd
> With that fixed:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> Does VCE need a similar fix? What about UVD_ENC?
I am not sure, can you please confirm this.
Nirmoy
>
> Alex
>
>
>> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> index 59032c26fc82..7cd398d25498 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
>> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
>> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>>
>> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
>> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
>> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
>> + hw_ip == AMDGPU_HW_IP_UVD) {
>> sched = drm_sched_pick_best(scheds, num_scheds);
>> scheds = &sched;
>> num_scheds = 1;
>> --
>> 2.28.0
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cnirmoy.das%40amd.com%7C6a3e9061d2f043783ea408d84db8a04e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637344802648079859&sdata=C7lkg97j7F6Kq1Vz7L79TbEDvfQm8QS3PUhdHfQ3Rcs%3D&reserved=0
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 14:59 ` Nirmoy
@ 2020-08-31 17:39 ` Alex Deucher
2020-08-31 21:50 ` Leo Liu
0 siblings, 1 reply; 10+ messages in thread
From: Alex Deucher @ 2020-08-31 17:39 UTC (permalink / raw)
To: Nirmoy, Leo Liu
Cc: Deucher, Alexander, Nirmoy Das, tiancyin, Christian Koenig, amd-gfx list
On Mon, Aug 31, 2020 at 10:55 AM Nirmoy <nirmodas@amd.com> wrote:
>
> Hi Alex,
>
> On 8/31/20 4:17 PM, Alex Deucher wrote:
> > On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
> >> UVD dependent jobs should run on the same udv instance.
> >> This patch disables gpu scheduler's load balancer for
> >> a context which binds jobs from same the context to a udv
> >> instance.
> > typos: udv -> uvd
> > With that fixed:
> > Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> >
> > Does VCE need a similar fix? What about UVD_ENC?
>
>
> I am not sure, can you please confirm this.
@Leo Liu can you confirm?
Alex
>
>
> Nirmoy
>
>
>
> >
> > Alex
> >
> >
> >> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
> >> ---
> >> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
> >> 1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >> index 59032c26fc82..7cd398d25498 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
> >> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
> >> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
> >>
> >> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
> >> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
> >> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
> >> + hw_ip == AMDGPU_HW_IP_UVD) {
> >> sched = drm_sched_pick_best(scheds, num_scheds);
> >> scheds = &sched;
> >> num_scheds = 1;
> >> --
> >> 2.28.0
> >>
> >> _______________________________________________
> >> amd-gfx mailing list
> >> amd-gfx@lists.freedesktop.org
> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cnirmoy.das%40amd.com%7C6a3e9061d2f043783ea408d84db8a04e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637344802648079859&sdata=C7lkg97j7F6Kq1Vz7L79TbEDvfQm8QS3PUhdHfQ3Rcs%3D&reserved=0
_______________________________________________
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 17:39 ` Alex Deucher
@ 2020-08-31 21:50 ` Leo Liu
2020-08-31 21:53 ` Alex Deucher
0 siblings, 1 reply; 10+ messages in thread
From: Leo Liu @ 2020-08-31 21:50 UTC (permalink / raw)
To: Alex Deucher, Nirmoy
Cc: Deucher, Alexander, Nirmoy Das, tiancyin, Christian Koenig, amd-gfx list
On 2020-08-31 1:39 p.m., Alex Deucher wrote:
> On Mon, Aug 31, 2020 at 10:55 AM Nirmoy <nirmodas@amd.com> wrote:
>> Hi Alex,
>>
>> On 8/31/20 4:17 PM, Alex Deucher wrote:
>>> On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
>>>> UVD dependent jobs should run on the same udv instance.
>>>> This patch disables gpu scheduler's load balancer for
>>>> a context which binds jobs from same the context to a udv
>>>> instance.
>>> typos: udv -> uvd
>>> With that fixed:
>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>
>>> Does VCE need a similar fix? What about UVD_ENC?
>>
>> I am not sure, can you please confirm this.
> @Leo Liu can you confirm?
Vega20 have 2 UVDs and 1 VCE, so UVD_ENC(AMDGPU_HW_IP_UVD_ENC) should
need the same fix.
Regards,
Leo
>
> Alex
>
>>
>> Nirmoy
>>
>>
>>
>>> Alex
>>>
>>>
>>>> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
>>>> ---
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
>>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>>>> index 59032c26fc82..7cd398d25498 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>>>> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
>>>> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
>>>> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>>>>
>>>> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
>>>> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
>>>> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
>>>> + hw_ip == AMDGPU_HW_IP_UVD) {
>>>> sched = drm_sched_pick_best(scheds, num_scheds);
>>>> scheds = &sched;
>>>> num_scheds = 1;
>>>> --
>>>> 2.28.0
>>>>
>>>> _______________________________________________
>>>> amd-gfx mailing list
>>>> amd-gfx@lists.freedesktop.org
>>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cleo.liu%40amd.com%7Caaf07c8faa4d46f0b35f08d84dd4e875%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637344924116323889&sdata=kvny71irAythb60XTzLHokUD7ZifHAKkTND8zSNs3T0%3D&reserved=0
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 21:50 ` Leo Liu
@ 2020-08-31 21:53 ` Alex Deucher
2020-08-31 22:17 ` Leo Liu
0 siblings, 1 reply; 10+ messages in thread
From: Alex Deucher @ 2020-08-31 21:53 UTC (permalink / raw)
To: Leo Liu
Cc: Nirmoy, tiancyin, amd-gfx list, Nirmoy Das, Deucher, Alexander,
Christian Koenig
On Mon, Aug 31, 2020 at 5:50 PM Leo Liu <leo.liu@amd.com> wrote:
>
>
> On 2020-08-31 1:39 p.m., Alex Deucher wrote:
> > On Mon, Aug 31, 2020 at 10:55 AM Nirmoy <nirmodas@amd.com> wrote:
> >> Hi Alex,
> >>
> >> On 8/31/20 4:17 PM, Alex Deucher wrote:
> >>> On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
> >>>> UVD dependent jobs should run on the same udv instance.
> >>>> This patch disables gpu scheduler's load balancer for
> >>>> a context which binds jobs from same the context to a udv
> >>>> instance.
> >>> typos: udv -> uvd
> >>> With that fixed:
> >>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> >>>
> >>> Does VCE need a similar fix? What about UVD_ENC?
> >>
> >> I am not sure, can you please confirm this.
> > @Leo Liu can you confirm?
>
> Vega20 have 2 UVDs and 1 VCE, so UVD_ENC(AMDGPU_HW_IP_UVD_ENC) should
> need the same fix.
What about other chips? Didn't CZ and tonga have two VCE instances?
I guess any engine with hw contexts needs this.
Alex
>
> Regards,
>
> Leo
>
>
>
> >
> > Alex
> >
> >>
> >> Nirmoy
> >>
> >>
> >>
> >>> Alex
> >>>
> >>>
> >>>> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
> >>>> ---
> >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
> >>>> 1 file changed, 3 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >>>> index 59032c26fc82..7cd398d25498 100644
> >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> >>>> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
> >>>> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
> >>>> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
> >>>>
> >>>> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
> >>>> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
> >>>> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
> >>>> + hw_ip == AMDGPU_HW_IP_UVD) {
> >>>> sched = drm_sched_pick_best(scheds, num_scheds);
> >>>> scheds = &sched;
> >>>> num_scheds = 1;
> >>>> --
> >>>> 2.28.0
> >>>>
> >>>> _______________________________________________
> >>>> amd-gfx mailing list
> >>>> amd-gfx@lists.freedesktop.org
> >>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cleo.liu%40amd.com%7Caaf07c8faa4d46f0b35f08d84dd4e875%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637344924116323889&sdata=kvny71irAythb60XTzLHokUD7ZifHAKkTND8zSNs3T0%3D&reserved=0
_______________________________________________
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 21:53 ` Alex Deucher
@ 2020-08-31 22:17 ` Leo Liu
0 siblings, 0 replies; 10+ messages in thread
From: Leo Liu @ 2020-08-31 22:17 UTC (permalink / raw)
To: Alex Deucher
Cc: Nirmoy, tiancyin, amd-gfx list, Nirmoy Das, Deucher, Alexander,
Christian Koenig
On 2020-08-31 5:53 p.m., Alex Deucher wrote:
> On Mon, Aug 31, 2020 at 5:50 PM Leo Liu <leo.liu@amd.com> wrote:
>>
>> On 2020-08-31 1:39 p.m., Alex Deucher wrote:
>>> On Mon, Aug 31, 2020 at 10:55 AM Nirmoy <nirmodas@amd.com> wrote:
>>>> Hi Alex,
>>>>
>>>> On 8/31/20 4:17 PM, Alex Deucher wrote:
>>>>> On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
>>>>>> UVD dependent jobs should run on the same udv instance.
>>>>>> This patch disables gpu scheduler's load balancer for
>>>>>> a context which binds jobs from same the context to a udv
>>>>>> instance.
>>>>> typos: udv -> uvd
>>>>> With that fixed:
>>>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>>>
>>>>> Does VCE need a similar fix? What about UVD_ENC?
>>>> I am not sure, can you please confirm this.
>>> @Leo Liu can you confirm?
>> Vega20 have 2 UVDs and 1 VCE, so UVD_ENC(AMDGPU_HW_IP_UVD_ENC) should
>> need the same fix.
> What about other chips? Didn't CZ and tonga have two VCE instances?
> I guess any engine with hw contexts needs this.
Vega20 2 UVDs are identical and separated, exposed separated own set of
rings to driver, and have their own scheduler.
For CZ and Tonga, it got 2 VCE instances internally, and just expose one
set of rings to driver. i.e the instances will receive the IB thru the
same ring, and different IB structures will decide that one instance or
two instances will be used.
Regards,
Leo
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-08-31 10:45 [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd Nirmoy Das
2020-08-31 11:39 ` Christian König
2020-08-31 14:17 ` Alex Deucher
@ 2020-09-01 7:07 ` Paul Menzel
2020-09-01 7:50 ` Nirmoy
2 siblings, 1 reply; 10+ messages in thread
From: Paul Menzel @ 2020-09-01 7:07 UTC (permalink / raw)
To: Nirmoy Das, amd-gfx
Cc: Alexander Deucher, Tianci Yin, Leo Liu, Christian König
Dear Nirmoy,
Am 31.08.20 um 12:45 schrieb Nirmoy Das:
> UVD dependent jobs should run on the same udv instance.
Why? Datasheet? Performance reasons? What happens if they do not run on
the UVD instance? Are there bug reports?
It’d be great if you extended the commit message.
> This patch disables gpu scheduler's load balancer for
> a context which binds jobs from same the context to a udv
> instance.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> index 59032c26fc82..7cd398d25498 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>
> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
> + hw_ip == AMDGPU_HW_IP_UVD) {
> sched = drm_sched_pick_best(scheds, num_scheds);
> scheds = &sched;
> num_scheds = 1;
Kind regards,
Paul
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
2020-09-01 7:07 ` Paul Menzel
@ 2020-09-01 7:50 ` Nirmoy
0 siblings, 0 replies; 10+ messages in thread
From: Nirmoy @ 2020-09-01 7:50 UTC (permalink / raw)
To: Paul Menzel, Nirmoy Das, amd-gfx
Cc: Alexander Deucher, Tianci Yin, Leo Liu, Christian König
On 9/1/20 9:07 AM, Paul Menzel wrote:
> Dear Nirmoy,
>
>
> Am 31.08.20 um 12:45 schrieb Nirmoy Das:
>> UVD dependent jobs should run on the same udv instance.
>
> Why? Datasheet? Performance reasons? What happens if they do not run
> on the UVD instance? Are there bug reports?
Sorry about that, I should've elaborated more. I will take care of that
in my next patch.
Nirmoy
>
> It’d be great if you extended the commit message.
>
>> This patch disables gpu scheduler's load balancer for
>> a context which binds jobs from same the context to a udv
>> instance.
>>
>> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> index 59032c26fc82..7cd398d25498 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct
>> amdgpu_ctx *ctx, u32 hw_ip,
>> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
>> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>>
>> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip ==
>> AMDGPU_HW_IP_VCN_DEC) {
>> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
>> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
>> + hw_ip == AMDGPU_HW_IP_UVD) {
>> sched = drm_sched_pick_best(scheds, num_scheds);
>> scheds = &sched;
>> num_scheds = 1;
>
>
> Kind regards,
>
> Paul
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-09-01 7:46 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-31 10:45 [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd Nirmoy Das
2020-08-31 11:39 ` Christian König
2020-08-31 14:17 ` Alex Deucher
2020-08-31 14:59 ` Nirmoy
2020-08-31 17:39 ` Alex Deucher
2020-08-31 21:50 ` Leo Liu
2020-08-31 21:53 ` Alex Deucher
2020-08-31 22:17 ` Leo Liu
2020-09-01 7:07 ` Paul Menzel
2020-09-01 7:50 ` Nirmoy
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