[PATCH] drm/amd/display: Create and Destroy PSR resources for DCN302

[PATCH] drm/amd/display: Create and Destroy PSR resources for DCN302

[Bhawanpreet Lakha]

From: Joshua Aberback <joshua.aberback@amd.com>

We need these to support PSR on DCN302

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
---
 .../gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index 808c4dcdb3ac..8d24cd5e484e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
@@ -53,6 +53,7 @@
 #include "dce/dce_i2c_hw.h"
 #include "dce/dce_panel_cntl.h"
 #include "dce/dmub_abm.h"
+#include "dce/dmub_psr.h"
 
 #include "hw_sequencer_private.h"
 #include "reg_helper.h"
@@ -238,6 +239,7 @@ static const struct dc_debug_options debug_defaults_diags = {
 		.dwb_fi_phase = -1, // -1 = disable
 		.dmub_command_table = true,
 		.enable_tri_buf = true,
+		.disable_psr = true,
 };
 
 enum dcn302_clk_src_array_id {
@@ -1213,6 +1215,9 @@ static void dcn302_resource_destruct(struct resource_pool *pool)
 			dce_abm_destroy(&pool->multiple_abms[i]);
 	}
 
+	if (pool->psr != NULL)
+		dmub_psr_destroy(&pool->psr);
+
 	if (pool->dccg != NULL)
 		dcn_dccg_destroy(&pool->dccg);
 }
@@ -1469,6 +1474,14 @@ static bool dcn302_resource_construct(
 	}
 	pool->timing_generator_count = i;
 
+	/* PSR */
+	pool->psr = dmub_psr_create(ctx);
+	if (pool->psr == NULL) {
+		dm_error("DC: failed to create psr!\n");
+		BREAK_TO_DEBUGGER();
+		goto create_fail;
+	}
+
 	/* ABMs */
 	for (i = 0; i < pool->res_cap->num_timing_generator; i++) {
 		pool->multiple_abms[i] = dmub_abm_create(ctx, &abm_regs[i], &abm_shift, &abm_mask);
-- 
2.25.1

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Re: [PATCH] drm/amd/display: Create and Destroy PSR resources for DCN302

[Alex Deucher]

On Fri, Dec 18, 2020 at 5:16 PM Bhawanpreet Lakha
<Bhawanpreet.Lakha@amd.com> wrote:
>
> From: Joshua Aberback <joshua.aberback@amd.com>
>
> We need these to support PSR on DCN302
>
> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  .../gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> index 808c4dcdb3ac..8d24cd5e484e 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> @@ -53,6 +53,7 @@
>  #include "dce/dce_i2c_hw.h"
>  #include "dce/dce_panel_cntl.h"
>  #include "dce/dmub_abm.h"
> +#include "dce/dmub_psr.h"
>
>  #include "hw_sequencer_private.h"
>  #include "reg_helper.h"
> @@ -238,6 +239,7 @@ static const struct dc_debug_options debug_defaults_diags = {
>                 .dwb_fi_phase = -1, // -1 = disable
>                 .dmub_command_table = true,
>                 .enable_tri_buf = true,
> +               .disable_psr = true,
>  };
>
>  enum dcn302_clk_src_array_id {
> @@ -1213,6 +1215,9 @@ static void dcn302_resource_destruct(struct resource_pool *pool)
>                         dce_abm_destroy(&pool->multiple_abms[i]);
>         }
>
> +       if (pool->psr != NULL)
> +               dmub_psr_destroy(&pool->psr);
> +
>         if (pool->dccg != NULL)
>                 dcn_dccg_destroy(&pool->dccg);
>  }
> @@ -1469,6 +1474,14 @@ static bool dcn302_resource_construct(
>         }
>         pool->timing_generator_count = i;
>
> +       /* PSR */
> +       pool->psr = dmub_psr_create(ctx);
> +       if (pool->psr == NULL) {
> +               dm_error("DC: failed to create psr!\n");
> +               BREAK_TO_DEBUGGER();
> +               goto create_fail;
> +       }
> +
>         /* ABMs */
>         for (i = 0; i < pool->res_cap->num_timing_generator; i++) {
>                 pool->multiple_abms[i] = dmub_abm_create(ctx, &abm_regs[i], &abm_shift, &abm_mask);
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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