* [PATCH 00/13] Re-design doorbell framework for usermode queues
@ 2023-02-03 19:08 Shashank Sharma
2023-02-03 19:08 ` [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory Shashank Sharma
` (18 more replies)
0 siblings, 19 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Shashank Sharma, christian.koenig, shashank.sharma
From: Shashank Sharma <contactshashanksharma@gmail.com>
This patch series re-designs the current doorbell handling of the AMDGPU
driver and prepares it for Usermode queues. The fundamental changes are:
- Introduce and accommodate a new GEM domain for doorbells.
- Prepare the AMDGPU ttm backend for handling doorbell memory.
- Rename, move and re-arrange some existing structures to differentiate
between doorbell handling and VRAM handling.
The idea is that a usermode app can directly allocate a page from
the doorbell bar and use it's offsets for different usermode queues.
Corresponding libdrm changes:
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/286
Alex Deucher (11):
drm/amdgpu: add UAPI for allocating doorbell memory
drm/amdgpu: rename vram_mgr functions to bar_mgr
drm/amdgpu: rename amdgpu_vram_mgr.c/h to amdgpu_bar_mgr.c/h
drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr
drm/amdgpu: add doorbell support to amdgpu_bar_mgr
drm/amdgpu: rename gmc.aper_base/size
drm/amdgpu: store doorbell info in gmc structure
drm/amdgpu: move doorbell ptr into mman structure
drm/amdgpu: accommodate DOMAIN/PL_DOORBELL
drm/amdgpu: doorbell support in get_memory functions
drm/amdgpu: introduce doorbell bo in kernel
Shashank Sharma (2):
drm/amdgpu: initialize doorbell memory pool
drm/amdgpu: add domain info in bo_create_kernel_at
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 13 +-
.../{amdgpu_vram_mgr.c => amdgpu_bar_mgr.c} | 300 +++++++++++-------
.../{amdgpu_vram_mgr.h => amdgpu_bar_mgr.h} | 19 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 68 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 9 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 8 -
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 11 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 53 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +-
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 16 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 71 ++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 50 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 15 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 10 +-
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 10 +-
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 6 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 12 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 10 +-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 +-
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 4 +-
drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c | 4 +-
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 4 +-
drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | 4 +-
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 4 +-
drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c | 4 +-
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 10 +-
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 10 +-
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 4 +-
include/uapi/drm/amdgpu_drm.h | 7 +-
41 files changed, 482 insertions(+), 303 deletions(-)
rename drivers/gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.c => amdgpu_bar_mgr.c} (70%)
rename drivers/gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.h => amdgpu_bar_mgr.h} (79%)
--
2.34.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:19 ` Christian König
2023-02-03 19:08 ` [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr Shashank Sharma
` (17 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
include/uapi/drm/amdgpu_drm.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 4038abe8505a..fd1c65d78ded 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -94,6 +94,9 @@ extern "C" {
*
* %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute engines
* for appending data.
+ *
+ * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell memory. It is an MMIO region for
+ * signalling user mode queues.
*/
#define AMDGPU_GEM_DOMAIN_CPU 0x1
#define AMDGPU_GEM_DOMAIN_GTT 0x2
@@ -101,12 +104,14 @@ extern "C" {
#define AMDGPU_GEM_DOMAIN_GDS 0x8
#define AMDGPU_GEM_DOMAIN_GWS 0x10
#define AMDGPU_GEM_DOMAIN_OA 0x20
+#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
#define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \
AMDGPU_GEM_DOMAIN_GTT | \
AMDGPU_GEM_DOMAIN_VRAM | \
AMDGPU_GEM_DOMAIN_GDS | \
AMDGPU_GEM_DOMAIN_GWS | \
- AMDGPU_GEM_DOMAIN_OA)
+ AMDGPU_GEM_DOMAIN_OA | \
+ AMDGPU_GEM_DOMAIN_DOORBELL)
/* Flag that CPU access will be required for the case of VRAM domain */
#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
2023-02-03 19:08 ` [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:20 ` Christian König
2023-02-03 19:08 ` [PATCH 03/13] drm/amdgpu: rename amdgpu_vram_mgr.c/h to amdgpu_bar_mgr.c/h Shashank Sharma
` (16 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
Rename the VRAM manager functions so they can be resused to manage
doorbell BAR as well.
Cc: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 8 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +-
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 14 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 36 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 200 ++++++++++--------
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 18 +-
12 files changed, 157 insertions(+), 143 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 7b5ce00f0602..e34eae8d64cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -723,7 +723,7 @@ static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev,
if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) {
u64 total_vis_vram = adev->gmc.visible_vram_size;
u64 used_vis_vram =
- amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
+ amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
if (used_vis_vram < total_vis_vram) {
u64 free_vis_vram = total_vis_vram - used_vis_vram;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index 271e30e34d93..c48ccde281c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -179,9 +179,9 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
break;
case TTM_PL_VRAM:
- r = amdgpu_vram_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
- bo->tbo.base.size, attach->dev,
- dir, &sgt);
+ r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
+ bo->tbo.base.size, attach->dev,
+ dir, &sgt);
if (r)
return ERR_PTR(r);
break;
@@ -215,7 +215,7 @@ static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,
sg_free_table(sgt);
kfree(sgt);
} else {
- amdgpu_vram_mgr_free_sgt(attach->dev, dir, sgt);
+ amdgpu_bar_mgr_free_sgt(attach->dev, dir, sgt);
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index cd4caaa29528..9f148ea7ca66 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2807,12 +2807,12 @@ static struct pci_error_handlers amdgpu_pci_err_handler = {
.resume = amdgpu_pci_resume,
};
-extern const struct attribute_group amdgpu_vram_mgr_attr_group;
+extern const struct attribute_group amdgpu_bar_mgr_attr_group;
extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
extern const struct attribute_group amdgpu_vbios_version_attr_group;
static const struct attribute_group *amdgpu_sysfs_groups[] = {
- &amdgpu_vram_mgr_attr_group,
+ &amdgpu_bar_mgr_attr_group,
&amdgpu_gtt_mgr_attr_group,
&amdgpu_vbios_version_attr_group,
NULL,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 7aa7e52ca784..2ce11434fb22 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -650,7 +650,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
ui64 = ttm_resource_manager_usage(&adev->mman.vram_mgr.manager);
return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
case AMDGPU_INFO_VIS_VRAM_USAGE:
- ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
+ ui64 = amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
case AMDGPU_INFO_GTT_USAGE:
ui64 = ttm_resource_manager_usage(&adev->mman.gtt_mgr.manager);
@@ -704,7 +704,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
atomic64_read(&adev->visible_pin_size),
mem.vram.usable_heap_size);
mem.cpu_accessible_vram.heap_usage =
- amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
+ amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
mem.cpu_accessible_vram.max_allocation =
mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 25a68d8888e0..ca85d64a72c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -958,7 +958,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
- atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
+ atomic64_add(amdgpu_bar_mgr_bo_visible_size(bo),
&adev->visible_pin_size);
} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
@@ -1009,7 +1009,7 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {
atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
- atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
+ atomic64_sub(amdgpu_bar_mgr_bo_visible_size(bo),
&adev->visible_pin_size);
} else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index ad490c1e2f57..4e64a035d49d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -1899,7 +1899,7 @@ static int amdgpu_ras_badpages_read(struct amdgpu_device *adev,
.size = AMDGPU_GPU_PAGE_SIZE,
.flags = AMDGPU_RAS_RETIRE_PAGE_RESERVED,
};
- status = amdgpu_vram_mgr_query_page_status(&adev->mman.vram_mgr,
+ status = amdgpu_bar_mgr_query_page_status(&adev->mman.vram_mgr,
data->bps[i].retired_page);
if (status == -EBUSY)
(*bps)[i].flags = AMDGPU_RAS_RETIRE_PAGE_PENDING;
@@ -2012,7 +2012,7 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
goto out;
}
- amdgpu_vram_mgr_reserve_range(&adev->mman.vram_mgr,
+ amdgpu_bar_mgr_reserve_range(&adev->mman.vram_mgr,
bps[i].retired_page << AMDGPU_GPU_PAGE_SHIFT,
AMDGPU_GPU_PAGE_SIZE);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 5c4f93ee0c57..dd2b43acc600 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -68,7 +68,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
switch (cur->mem_type) {
case TTM_PL_VRAM:
- head = &to_amdgpu_vram_mgr_resource(res)->blocks;
+ head = &to_amdgpu_bar_mgr_resource(res)->blocks;
block = list_first_entry_or_null(head,
struct drm_buddy_block,
@@ -76,16 +76,16 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
if (!block)
goto fallback;
- while (start >= amdgpu_vram_mgr_block_size(block)) {
- start -= amdgpu_vram_mgr_block_size(block);
+ while (start >= amdgpu_bar_mgr_block_size(block)) {
+ start -= amdgpu_bar_mgr_block_size(block);
next = block->link.next;
if (next != head)
block = list_entry(next, struct drm_buddy_block, link);
}
- cur->start = amdgpu_vram_mgr_block_start(block) + start;
- cur->size = min(amdgpu_vram_mgr_block_size(block) - start, size);
+ cur->start = amdgpu_bar_mgr_block_start(block) + start;
+ cur->size = min(amdgpu_bar_mgr_block_size(block) - start, size);
cur->remaining = size;
cur->node = block;
break;
@@ -148,8 +148,8 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
block = list_entry(next, struct drm_buddy_block, link);
cur->node = block;
- cur->start = amdgpu_vram_mgr_block_start(block);
- cur->size = min(amdgpu_vram_mgr_block_size(block), cur->remaining);
+ cur->start = amdgpu_bar_mgr_block_start(block);
+ cur->size = min(amdgpu_bar_mgr_block_size(block), cur->remaining);
break;
case TTM_PL_TT:
node = cur->node;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 55e0284b2bdd..668826653591 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1735,7 +1735,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
adev->mman.initialized = true;
/* Initialize VRAM pool with all of VRAM divided into pages */
- r = amdgpu_vram_mgr_init(adev);
+ r = amdgpu_bar_mgr_init(adev, TTM_PL_VRAM);
if (r) {
DRM_ERROR("Failed initializing VRAM heap.\n");
return r;
@@ -1911,7 +1911,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
drm_dev_exit(idx);
}
- amdgpu_vram_mgr_fini(adev);
+ amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
amdgpu_gtt_mgr_fini(adev);
amdgpu_preempt_mgr_fini(adev);
ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index e2cd5894afc9..a918bbd67004 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -61,7 +61,7 @@ struct amdgpu_mman {
/* Scheduler entity for buffer moves */
struct drm_sched_entity entity;
- struct amdgpu_vram_mgr vram_mgr;
+ struct amdgpu_bar_mgr vram_mgr;
struct amdgpu_gtt_mgr gtt_mgr;
struct ttm_resource_manager preempt_mgr;
@@ -107,29 +107,29 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
-int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
-void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
+int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain);
+void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain);
bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
-u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
-int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
- struct ttm_resource *mem,
- u64 offset, u64 size,
- struct device *dev,
- enum dma_data_direction dir,
- struct sg_table **sgt);
-void amdgpu_vram_mgr_free_sgt(struct device *dev,
- enum dma_data_direction dir,
- struct sg_table *sgt);
-uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
-int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
- uint64_t start, uint64_t size);
-int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
- uint64_t start);
+u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo);
+int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
+ struct ttm_resource *mem,
+ u64 offset, u64 size,
+ struct device *dev,
+ enum dma_data_direction dir,
+ struct sg_table **sgt);
+void amdgpu_bar_mgr_free_sgt(struct device *dev,
+ enum dma_data_direction dir,
+ struct sg_table *sgt);
+uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr);
+int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
+ uint64_t start, uint64_t size);
+int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
+ uint64_t start);
int amdgpu_ttm_init(struct amdgpu_device *adev);
void amdgpu_ttm_fini(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 2994b9db196f..fc9edc3028b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -599,7 +599,7 @@ static int amdgpu_virt_write_vf2pf_data(struct amdgpu_device *adev)
vf2pf_info->fb_usage =
ttm_resource_manager_usage(&adev->mman.vram_mgr.manager) >> 20;
vf2pf_info->fb_vis_usage =
- amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
+ amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
vf2pf_info->fb_size = adev->gmc.real_vram_size >> 20;
vf2pf_info->fb_vis_size = adev->gmc.visible_vram_size >> 20;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 9fa1d814508a..30d68e3a2469 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -31,46 +31,46 @@
#include "amdgpu_atomfirmware.h"
#include "atom.h"
-struct amdgpu_vram_reservation {
+struct amdgpu_bar_reservation {
u64 start;
u64 size;
struct list_head allocated;
struct list_head blocks;
};
-static inline struct amdgpu_vram_mgr *
-to_vram_mgr(struct ttm_resource_manager *man)
+static inline struct amdgpu_bar_mgr *
+to_bar_mgr(struct ttm_resource_manager *man)
{
- return container_of(man, struct amdgpu_vram_mgr, manager);
+ return container_of(man, struct amdgpu_bar_mgr, manager);
}
static inline struct amdgpu_device *
-to_amdgpu_device(struct amdgpu_vram_mgr *mgr)
+to_amdgpu_device(struct amdgpu_bar_mgr *mgr)
{
return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
}
static inline struct drm_buddy_block *
-amdgpu_vram_mgr_first_block(struct list_head *list)
+amdgpu_bar_mgr_first_block(struct list_head *list)
{
return list_first_entry_or_null(list, struct drm_buddy_block, link);
}
-static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct list_head *head)
+static inline bool amdgpu_is_bar_mgr_blocks_contiguous(struct list_head *head)
{
struct drm_buddy_block *block;
u64 start, size;
- block = amdgpu_vram_mgr_first_block(head);
+ block = amdgpu_bar_mgr_first_block(head);
if (!block)
return false;
while (head != block->link.next) {
- start = amdgpu_vram_mgr_block_start(block);
- size = amdgpu_vram_mgr_block_size(block);
+ start = amdgpu_bar_mgr_block_start(block);
+ size = amdgpu_bar_mgr_block_size(block);
block = list_entry(block->link.next, struct drm_buddy_block, link);
- if (start + size != amdgpu_vram_mgr_block_start(block))
+ if (start + size != amdgpu_bar_mgr_block_start(block))
return false;
}
@@ -100,7 +100,7 @@ static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev,
* DOC: mem_info_vis_vram_total
*
* The amdgpu driver provides a sysfs API for reporting current total
- * visible VRAM available on the device
+ * visible BAR available on the device
* The file mem_info_vis_vram_total is used for this and returns the total
* amount of visible VRAM in bytes
*/
@@ -148,7 +148,7 @@ static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev,
struct amdgpu_device *adev = drm_to_adev(ddev);
return sysfs_emit(buf, "%llu\n",
- amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr));
+ amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr));
}
/**
@@ -203,7 +203,7 @@ static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
amdgpu_mem_info_vram_vendor, NULL);
-static struct attribute *amdgpu_vram_mgr_attributes[] = {
+static struct attribute *amdgpu_bar_mgr_attributes[] = {
&dev_attr_mem_info_vram_total.attr,
&dev_attr_mem_info_vis_vram_total.attr,
&dev_attr_mem_info_vram_used.attr,
@@ -212,23 +212,23 @@ static struct attribute *amdgpu_vram_mgr_attributes[] = {
NULL
};
-const struct attribute_group amdgpu_vram_mgr_attr_group = {
- .attrs = amdgpu_vram_mgr_attributes
+const struct attribute_group amdgpu_bar_mgr_attr_group = {
+ .attrs = amdgpu_bar_mgr_attributes
};
/**
- * amdgpu_vram_mgr_vis_size - Calculate visible block size
+ * amdgpu_bar_mgr_vis_size - Calculate visible block size
*
* @adev: amdgpu_device pointer
* @block: DRM BUDDY block structure
*
* Calculate how many bytes of the DRM BUDDY block are inside visible VRAM
*/
-static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
+static u64 amdgpu_bar_mgr_vis_size(struct amdgpu_device *adev,
struct drm_buddy_block *block)
{
- u64 start = amdgpu_vram_mgr_block_start(block);
- u64 end = start + amdgpu_vram_mgr_block_size(block);
+ u64 start = amdgpu_bar_mgr_block_start(block);
+ u64 end = start + amdgpu_bar_mgr_block_size(block);
if (start >= adev->gmc.visible_vram_size)
return 0;
@@ -238,18 +238,18 @@ static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
}
/**
- * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size
+ * amdgpu_bar_mgr_bo_visible_size - CPU visible BO size
*
* @bo: &amdgpu_bo buffer object (must be in VRAM)
*
* Returns:
* How much of the given &amdgpu_bo buffer object lies in CPU visible VRAM.
*/
-u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
+u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
struct ttm_resource *res = bo->tbo.resource;
- struct amdgpu_vram_mgr_resource *vres = to_amdgpu_vram_mgr_resource(res);
+ struct amdgpu_bar_mgr_resource *vres = to_amdgpu_bar_mgr_resource(res);
struct drm_buddy_block *block;
u64 usage = 0;
@@ -260,18 +260,18 @@ u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
return 0;
list_for_each_entry(block, &vres->blocks, link)
- usage += amdgpu_vram_mgr_vis_size(adev, block);
+ usage += amdgpu_bar_mgr_vis_size(adev, block);
return usage;
}
/* Commit the reservation of VRAM pages */
-static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
+static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager *man)
{
- struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
+ struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
struct amdgpu_device *adev = to_amdgpu_device(mgr);
struct drm_buddy *mm = &mgr->mm;
- struct amdgpu_vram_reservation *rsv, *temp;
+ struct amdgpu_bar_reservation *rsv, *temp;
struct drm_buddy_block *block;
uint64_t vis_usage;
@@ -281,14 +281,14 @@ static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
DRM_BUDDY_RANGE_ALLOCATION))
continue;
- block = amdgpu_vram_mgr_first_block(&rsv->allocated);
+ block = amdgpu_bar_mgr_first_block(&rsv->allocated);
if (!block)
continue;
dev_dbg(adev->dev, "Reservation 0x%llx - %lld, Succeeded\n",
rsv->start, rsv->size);
- vis_usage = amdgpu_vram_mgr_vis_size(adev, block);
+ vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
atomic64_add(vis_usage, &mgr->vis_usage);
spin_lock(&man->bdev->lru_lock);
man->usage += rsv->size;
@@ -298,18 +298,18 @@ static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
}
/**
- * amdgpu_vram_mgr_reserve_range - Reserve a range from VRAM
+ * amdgpu_bar_mgr_reserve_range - Reserve a range from VRAM
*
- * @mgr: amdgpu_vram_mgr pointer
+ * @mgr: amdgpu_bar_mgr pointer
* @start: start address of the range in VRAM
* @size: size of the range
*
* Reserve memory from start address with the specified size in VRAM
*/
-int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
+int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
uint64_t start, uint64_t size)
{
- struct amdgpu_vram_reservation *rsv;
+ struct amdgpu_bar_reservation *rsv;
rsv = kzalloc(sizeof(*rsv), GFP_KERNEL);
if (!rsv)
@@ -323,16 +323,16 @@ int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
mutex_lock(&mgr->lock);
list_add_tail(&rsv->blocks, &mgr->reservations_pending);
- amdgpu_vram_mgr_do_reserve(&mgr->manager);
+ amdgpu_bar_mgr_do_reserve(&mgr->manager);
mutex_unlock(&mgr->lock);
return 0;
}
/**
- * amdgpu_vram_mgr_query_page_status - query the reservation status
+ * amdgpu_bar_mgr_query_page_status - query the reservation status
*
- * @mgr: amdgpu_vram_mgr pointer
+ * @mgr: amdgpu_bar_mgr pointer
* @start: start address of a page in VRAM
*
* Returns:
@@ -340,10 +340,10 @@ int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
* 0: the page has been reserved
* -ENOENT: the input page is not a reservation
*/
-int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
+int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
uint64_t start)
{
- struct amdgpu_vram_reservation *rsv;
+ struct amdgpu_bar_reservation *rsv;
int ret;
mutex_lock(&mgr->lock);
@@ -371,7 +371,7 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
}
/**
- * amdgpu_vram_mgr_new - allocate new ranges
+ * amdgpu_bar_mgr_new - allocate new ranges
*
* @man: TTM memory type manager
* @tbo: TTM BO we need this range for
@@ -380,15 +380,15 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
*
* Allocate VRAM for the given BO.
*/
-static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
+static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
struct ttm_buffer_object *tbo,
const struct ttm_place *place,
struct ttm_resource **res)
{
u64 vis_usage = 0, max_bytes, cur_size, min_block_size;
- struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
+ struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
struct amdgpu_device *adev = to_amdgpu_device(mgr);
- struct amdgpu_vram_mgr_resource *vres;
+ struct amdgpu_bar_mgr_resource *vres;
u64 size, remaining_size, lpfn, fpfn;
struct drm_buddy *mm = &mgr->mm;
struct drm_buddy_block *block;
@@ -512,7 +512,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
* Compute the original_size value by subtracting the
* last block size with (aligned size - original size)
*/
- original_size = amdgpu_vram_mgr_block_size(block) - (size - cur_size);
+ original_size = amdgpu_bar_mgr_block_size(block) - (size - cur_size);
}
mutex_lock(&mgr->lock);
@@ -529,8 +529,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
list_for_each_entry(block, &vres->blocks, link) {
unsigned long start;
- start = amdgpu_vram_mgr_block_start(block) +
- amdgpu_vram_mgr_block_size(block);
+ start = amdgpu_bar_mgr_block_start(block) +
+ amdgpu_bar_mgr_block_size(block);
start >>= PAGE_SHIFT;
if (start > PFN_UP(vres->base.size))
@@ -539,10 +539,10 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
start = 0;
vres->base.start = max(vres->base.start, start);
- vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
+ vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
}
- if (amdgpu_is_vram_mgr_blocks_contiguous(&vres->blocks))
+ if (amdgpu_is_bar_mgr_blocks_contiguous(&vres->blocks))
vres->base.placement |= TTM_PL_FLAG_CONTIGUOUS;
if (adev->gmc.xgmi.connected_to_cpu)
@@ -565,18 +565,18 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
}
/**
- * amdgpu_vram_mgr_del - free ranges
+ * amdgpu_bar_mgr_del - free ranges
*
* @man: TTM memory type manager
* @res: TTM memory object
*
* Free the allocated VRAM again.
*/
-static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
+static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
struct ttm_resource *res)
{
- struct amdgpu_vram_mgr_resource *vres = to_amdgpu_vram_mgr_resource(res);
- struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
+ struct amdgpu_bar_mgr_resource *vres = to_amdgpu_bar_mgr_resource(res);
+ struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
struct amdgpu_device *adev = to_amdgpu_device(mgr);
struct drm_buddy *mm = &mgr->mm;
struct drm_buddy_block *block;
@@ -584,9 +584,9 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
mutex_lock(&mgr->lock);
list_for_each_entry(block, &vres->blocks, link)
- vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
+ vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
- amdgpu_vram_mgr_do_reserve(man);
+ amdgpu_bar_mgr_do_reserve(man);
drm_buddy_free_list(mm, &vres->blocks);
mutex_unlock(&mgr->lock);
@@ -598,7 +598,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
}
/**
- * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table
+ * amdgpu_bar_mgr_alloc_sgt - allocate and fill a sg table
*
* @adev: amdgpu device pointer
* @res: TTM memory object
@@ -610,7 +610,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
*
* Allocate and fill a sg table from a VRAM allocation.
*/
-int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
+int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
struct ttm_resource *res,
u64 offset, u64 length,
struct device *dev,
@@ -685,7 +685,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
}
/**
- * amdgpu_vram_mgr_free_sgt - allocate and fill a sg table
+ * amdgpu_bar_mgr_free_sgt - allocate and fill a sg table
*
* @dev: device pointer
* @dir: data direction of resource to unmap
@@ -693,7 +693,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
*
* Free a previously allocate sg table.
*/
-void amdgpu_vram_mgr_free_sgt(struct device *dev,
+void amdgpu_bar_mgr_free_sgt(struct device *dev,
enum dma_data_direction dir,
struct sg_table *sgt)
{
@@ -709,19 +709,19 @@ void amdgpu_vram_mgr_free_sgt(struct device *dev,
}
/**
- * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part
+ * amdgpu_bar_mgr_vis_usage - how many bytes are used in the visible part
*
- * @mgr: amdgpu_vram_mgr pointer
+ * @mgr: amdgpu_bar_mgr pointer
*
* Returns how many bytes are used in the visible part of VRAM
*/
-uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
+uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr)
{
return atomic64_read(&mgr->vis_usage);
}
/**
- * amdgpu_vram_mgr_intersects - test each drm buddy block for intersection
+ * amdgpu_bar_mgr_intersects - test each drm buddy block for intersection
*
* @man: TTM memory type manager
* @res: The resource to test
@@ -730,20 +730,20 @@ uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
*
* Test each drm buddy block for intersection for eviction decision.
*/
-static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
+static bool amdgpu_bar_mgr_intersects(struct ttm_resource_manager *man,
struct ttm_resource *res,
const struct ttm_place *place,
size_t size)
{
- struct amdgpu_vram_mgr_resource *mgr = to_amdgpu_vram_mgr_resource(res);
+ struct amdgpu_bar_mgr_resource *mgr = to_amdgpu_bar_mgr_resource(res);
struct drm_buddy_block *block;
/* Check each drm buddy block individually */
list_for_each_entry(block, &mgr->blocks, link) {
unsigned long fpfn =
- amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
+ amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
unsigned long lpfn = fpfn +
- (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
+ (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
if (place->fpfn < lpfn &&
(!place->lpfn || place->lpfn > fpfn))
@@ -754,7 +754,7 @@ static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
}
/**
- * amdgpu_vram_mgr_compatible - test each drm buddy block for compatibility
+ * amdgpu_bar_mgr_compatible - test each drm buddy block for compatibility
*
* @man: TTM memory type manager
* @res: The resource to test
@@ -763,20 +763,20 @@ static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
*
* Test each drm buddy block for placement compatibility.
*/
-static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager *man,
+static bool amdgpu_bar_mgr_compatible(struct ttm_resource_manager *man,
struct ttm_resource *res,
const struct ttm_place *place,
size_t size)
{
- struct amdgpu_vram_mgr_resource *mgr = to_amdgpu_vram_mgr_resource(res);
+ struct amdgpu_bar_mgr_resource *mgr = to_amdgpu_bar_mgr_resource(res);
struct drm_buddy_block *block;
/* Check each drm buddy block individually */
list_for_each_entry(block, &mgr->blocks, link) {
unsigned long fpfn =
- amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
+ amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
unsigned long lpfn = fpfn +
- (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
+ (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
if (fpfn < place->fpfn ||
(place->lpfn && lpfn > place->lpfn))
@@ -787,22 +787,22 @@ static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager *man,
}
/**
- * amdgpu_vram_mgr_debug - dump VRAM table
+ * amdgpu_bar_mgr_debug - dump VRAM table
*
* @man: TTM memory type manager
* @printer: DRM printer to use
*
* Dump the table content using printk.
*/
-static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
+static void amdgpu_bar_mgr_debug(struct ttm_resource_manager *man,
struct drm_printer *printer)
{
- struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
+ struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
struct drm_buddy *mm = &mgr->mm;
struct drm_buddy_block *block;
drm_printf(printer, " vis usage:%llu\n",
- amdgpu_vram_mgr_vis_usage(mgr));
+ amdgpu_bar_mgr_vis_usage(mgr));
mutex_lock(&mgr->lock);
drm_printf(printer, "default_page_size: %lluKiB\n",
@@ -816,31 +816,38 @@ static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
mutex_unlock(&mgr->lock);
}
-static const struct ttm_resource_manager_func amdgpu_vram_mgr_func = {
- .alloc = amdgpu_vram_mgr_new,
- .free = amdgpu_vram_mgr_del,
- .intersects = amdgpu_vram_mgr_intersects,
- .compatible = amdgpu_vram_mgr_compatible,
- .debug = amdgpu_vram_mgr_debug
+static const struct ttm_resource_manager_func amdgpu_bar_mgr_func = {
+ .alloc = amdgpu_bar_mgr_new,
+ .free = amdgpu_bar_mgr_del,
+ .intersects = amdgpu_bar_mgr_intersects,
+ .compatible = amdgpu_bar_mgr_compatible,
+ .debug = amdgpu_bar_mgr_debug
};
/**
- * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
+ * amdgpu_bar_mgr_init - init BAR manager and DRM MM
*
* @adev: amdgpu_device pointer
+ * @domain: memory domain to initialize
*
* Allocate and initialize the VRAM manager.
*/
-int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
+int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
{
- struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
- struct ttm_resource_manager *man = &mgr->manager;
+ struct amdgpu_bar_mgr *mgr;
+ struct ttm_resource_manager *man;
int err;
+ if (domain != TTM_PL_VRAM)
+ return -EINVAL;
+
+ mgr = &adev->mman.vram_mgr;
+ man = &mgr->manager;
+
ttm_resource_manager_init(man, &adev->mman.bdev,
adev->gmc.real_vram_size);
- man->func = &amdgpu_vram_mgr_func;
+ man->func = &amdgpu_bar_mgr_func;
err = drm_buddy_init(&mgr->mm, man->size, PAGE_SIZE);
if (err)
@@ -851,25 +858,32 @@ int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
INIT_LIST_HEAD(&mgr->reserved_pages);
mgr->default_page_size = PAGE_SIZE;
- ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, &mgr->manager);
+ ttm_set_driver_manager(&adev->mman.bdev, domain, &mgr->manager);
ttm_resource_manager_set_used(man, true);
return 0;
}
/**
- * amdgpu_vram_mgr_fini - free and destroy VRAM manager
+ * amdgpu_bar_mgr_fini - free and destroy VRAM manager
*
* @adev: amdgpu_device pointer
+ * @domain: memory domain to destroy
*
- * Destroy and free the VRAM manager, returns -EBUSY if ranges are still
+ * Destroy and free the BAR manager, returns -EBUSY if ranges are still
* allocated inside it.
*/
-void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
+void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain)
{
- struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
- struct ttm_resource_manager *man = &mgr->manager;
+ struct amdgpu_bar_mgr *mgr;
+ struct ttm_resource_manager *man;
int ret;
- struct amdgpu_vram_reservation *rsv, *temp;
+ struct amdgpu_bar_reservation *rsv, *temp;
+
+ if (domain != TTM_PL_VRAM)
+ return;
+
+ mgr = &adev->mman.vram_mgr;
+ man = &mgr->manager;
ttm_resource_manager_set_used(man, false);
@@ -889,5 +903,5 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
mutex_unlock(&mgr->lock);
ttm_resource_manager_cleanup(man);
- ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL);
+ ttm_set_driver_manager(&adev->mman.bdev, domain, NULL);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
index 0e04e42cf809..241faba5ae55 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
@@ -21,12 +21,12 @@
*
*/
-#ifndef __AMDGPU_VRAM_MGR_H__
-#define __AMDGPU_VRAM_MGR_H__
+#ifndef __AMDGPU_BAR_MGR_H__
+#define __AMDGPU_BAR_MGR_H__
#include <drm/drm_buddy.h>
-struct amdgpu_vram_mgr {
+struct amdgpu_bar_mgr {
struct ttm_resource_manager manager;
struct drm_buddy mm;
/* protects access to buffer objects */
@@ -37,26 +37,26 @@ struct amdgpu_vram_mgr {
u64 default_page_size;
};
-struct amdgpu_vram_mgr_resource {
+struct amdgpu_bar_mgr_resource {
struct ttm_resource base;
struct list_head blocks;
unsigned long flags;
};
-static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)
+static inline u64 amdgpu_bar_mgr_block_start(struct drm_buddy_block *block)
{
return drm_buddy_block_offset(block);
}
-static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)
+static inline u64 amdgpu_bar_mgr_block_size(struct drm_buddy_block *block)
{
return (u64)PAGE_SIZE << drm_buddy_block_order(block);
}
-static inline struct amdgpu_vram_mgr_resource *
-to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
+static inline struct amdgpu_bar_mgr_resource *
+to_amdgpu_bar_mgr_resource(struct ttm_resource *res)
{
- return container_of(res, struct amdgpu_vram_mgr_resource, base);
+ return container_of(res, struct amdgpu_bar_mgr_resource, base);
}
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 03/13] drm/amdgpu: rename amdgpu_vram_mgr.c/h to amdgpu_bar_mgr.c/h
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
2023-02-03 19:08 ` [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory Shashank Sharma
2023-02-03 19:08 ` [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 04/13] drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr Shashank Sharma
` (15 subsequent siblings)
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
Rename the files.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
.../gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.c => amdgpu_bar_mgr.c} | 0
.../gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.h => amdgpu_bar_mgr.h} | 0
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +-
5 files changed, 3 insertions(+), 3 deletions(-)
rename drivers/gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.c => amdgpu_bar_mgr.c} (100%)
rename drivers/gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.h => amdgpu_bar_mgr.h} (100%)
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index 798d0e9a60b7..6a83a24ce900 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -51,7 +51,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
atombios_encoders.o amdgpu_sa.o atombios_i2c.o \
amdgpu_dma_buf.o amdgpu_vm.o amdgpu_vm_pt.o amdgpu_ib.o amdgpu_pll.o \
amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
- amdgpu_gtt_mgr.o amdgpu_preempt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o \
+ amdgpu_gtt_mgr.o amdgpu_preempt_mgr.o amdgpu_bar_mgr.o amdgpu_virt.o \
amdgpu_atomfirmware.o amdgpu_vf_error.o amdgpu_sched.o \
amdgpu_debugfs.o amdgpu_ids.o amdgpu_gmc.o \
amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
similarity index 100%
rename from drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
rename to drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h
similarity index 100%
rename from drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
rename to drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index dd2b43acc600..d0a80b36d95c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -30,7 +30,7 @@
#include <drm/ttm/ttm_resource.h>
#include <drm/ttm/ttm_range_manager.h>
-#include "amdgpu_vram_mgr.h"
+#include "amdgpu_bar_mgr.h"
/* state back for walking over vram_mgr and gtt_mgr allocations */
struct amdgpu_res_cursor {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index a918bbd67004..1061447befc6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -26,7 +26,7 @@
#include <linux/dma-direction.h>
#include <drm/gpu_scheduler.h>
-#include "amdgpu_vram_mgr.h"
+#include "amdgpu_bar_mgr.h"
#include "amdgpu.h"
#define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 04/13] drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (2 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 03/13] drm/amdgpu: rename amdgpu_vram_mgr.c/h to amdgpu_bar_mgr.c/h Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:21 ` Christian König
2023-02-03 19:08 ` [PATCH 05/13] drm/amdgpu: add doorbell support to amdgpu_bar_mgr Shashank Sharma
` (14 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
To differentiate it from the doorbell BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 14 +++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +-
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 10 +++++-----
5 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 2f28a8c02f64..0b6a394e109b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -354,12 +354,12 @@ size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
size_t count = 0;
uint64_t last;
- if (!adev->mman.aper_base_kaddr)
+ if (!adev->mman.vram_aper_base_kaddr)
return 0;
last = min(pos + size, adev->gmc.visible_vram_size);
if (last > pos) {
- addr = adev->mman.aper_base_kaddr + pos;
+ addr = adev->mman.vram_aper_base_kaddr + pos;
count = last - pos;
if (write) {
@@ -3954,9 +3954,9 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
iounmap(adev->rmmio);
adev->rmmio = NULL;
- if (adev->mman.aper_base_kaddr)
- iounmap(adev->mman.aper_base_kaddr);
- adev->mman.aper_base_kaddr = NULL;
+ if (adev->mman.vram_aper_base_kaddr)
+ iounmap(adev->mman.vram_aper_base_kaddr);
+ adev->mman.vram_aper_base_kaddr = NULL;
/* Memory manager related */
if (!adev->gmc.xgmi.connected_to_cpu) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 668826653591..196ba62ef721 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -578,9 +578,9 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size)
return -EINVAL;
- if (adev->mman.aper_base_kaddr &&
+ if (adev->mman.vram_aper_base_kaddr &&
mem->placement & TTM_PL_FLAG_CONTIGUOUS)
- mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr +
+ mem->bus.addr = (u8 *)adev->mman.vram_aper_base_kaddr +
mem->bus.offset;
mem->bus.offset += adev->gmc.aper_base;
@@ -1752,12 +1752,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
#ifdef CONFIG_64BIT
#ifdef CONFIG_X86
if (adev->gmc.xgmi.connected_to_cpu)
- adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
+ adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
adev->gmc.visible_vram_size);
else
#endif
- adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
+ adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
adev->gmc.visible_vram_size);
#endif
@@ -1904,9 +1904,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
if (drm_dev_enter(adev_to_drm(adev), &idx)) {
- if (adev->mman.aper_base_kaddr)
- iounmap(adev->mman.aper_base_kaddr);
- adev->mman.aper_base_kaddr = NULL;
+ if (adev->mman.vram_aper_base_kaddr)
+ iounmap(adev->mman.vram_aper_base_kaddr);
+ adev->mman.vram_aper_base_kaddr = NULL;
drm_dev_exit(idx);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 1061447befc6..020ebba5a51a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -50,7 +50,7 @@ struct amdgpu_gtt_mgr {
struct amdgpu_mman {
struct ttm_device bdev;
bool initialized;
- void __iomem *aper_base_kaddr;
+ void __iomem *vram_aper_base_kaddr;
/* buffer handling */
const struct amdgpu_buffer_funcs *buffer_funcs;
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index bd3e3e23a939..f39d4f593a2f 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -611,10 +611,10 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
*/
sz = GDDR6_MEM_TRAINING_ENCROACHED_SIZE;
- if (adev->gmc.visible_vram_size < sz || !adev->mman.aper_base_kaddr) {
- DRM_ERROR("visible_vram_size %llx or aper_base_kaddr %p is not initialized.\n",
+ if (adev->gmc.visible_vram_size < sz || !adev->mman.vram_aper_base_kaddr) {
+ DRM_ERROR("visible_vram_size %llx or vram_aper_base_kaddr %p is not initialized.\n",
adev->gmc.visible_vram_size,
- adev->mman.aper_base_kaddr);
+ adev->mman.vram_aper_base_kaddr);
return -EINVAL;
}
@@ -625,7 +625,7 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
}
if (drm_dev_enter(adev_to_drm(adev), &idx)) {
- memcpy_fromio(buf, adev->mman.aper_base_kaddr, sz);
+ memcpy_fromio(buf, adev->mman.vram_aper_base_kaddr, sz);
ret = psp_v11_0_memory_training_send_msg(psp, PSP_BL__DRAM_LONG_TRAIN);
if (ret) {
DRM_ERROR("Send long training msg failed.\n");
@@ -634,7 +634,7 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
return ret;
}
- memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
+ memcpy_toio(adev->mman.vram_aper_base_kaddr, buf, sz);
adev->hdp.funcs->flush_hdp(adev, NULL);
vfree(buf);
drm_dev_exit(idx);
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
index e6a26a7e5e5e..9605c0971c11 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
@@ -510,10 +510,10 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
*/
sz = GDDR6_MEM_TRAINING_ENCROACHED_SIZE;
- if (adev->gmc.visible_vram_size < sz || !adev->mman.aper_base_kaddr) {
- dev_err(adev->dev, "visible_vram_size %llx or aper_base_kaddr %p is not initialized.\n",
+ if (adev->gmc.visible_vram_size < sz || !adev->mman.vram_aper_base_kaddr) {
+ dev_err(adev->dev, "visible_vram_size %llx or vram_aper_base_kaddr %p is not initialized.\n",
adev->gmc.visible_vram_size,
- adev->mman.aper_base_kaddr);
+ adev->mman.vram_aper_base_kaddr);
return -EINVAL;
}
@@ -524,7 +524,7 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
}
if (drm_dev_enter(adev_to_drm(adev), &idx)) {
- memcpy_fromio(buf, adev->mman.aper_base_kaddr, sz);
+ memcpy_fromio(buf, adev->mman.vram_aper_base_kaddr, sz);
ret = psp_v13_0_memory_training_send_msg(psp, PSP_BL__DRAM_LONG_TRAIN);
if (ret) {
DRM_ERROR("Send long training msg failed.\n");
@@ -533,7 +533,7 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
return ret;
}
- memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
+ memcpy_toio(adev->mman.vram_aper_base_kaddr, buf, sz);
adev->hdp.funcs->flush_hdp(adev, NULL);
vfree(buf);
drm_dev_exit(idx);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 05/13] drm/amdgpu: add doorbell support to amdgpu_bar_mgr
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (3 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 04/13] drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 06/13] drm/amdgpu: rename gmc.aper_base/size Shashank Sharma
` (13 subsequent siblings)
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
Adjust the code to handle doorbell BARs as well as VRAM.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 101 ++++++++++++++++----
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +
3 files changed, 85 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
index 30d68e3a2469..0e0f212bd71c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
@@ -47,7 +47,10 @@ to_bar_mgr(struct ttm_resource_manager *man)
static inline struct amdgpu_device *
to_amdgpu_device(struct amdgpu_bar_mgr *mgr)
{
- return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
+ if (mgr->domain == TTM_PL_VRAM)
+ return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
+ else
+ return container_of(mgr, struct amdgpu_device, mman.doorbell_mgr);
}
static inline struct drm_buddy_block *
@@ -100,7 +103,7 @@ static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev,
* DOC: mem_info_vis_vram_total
*
* The amdgpu driver provides a sysfs API for reporting current total
- * visible BAR available on the device
+ * visible VRAM available on the device
* The file mem_info_vis_vram_total is used for this and returns the total
* amount of visible VRAM in bytes
*/
@@ -192,16 +195,56 @@ static ssize_t amdgpu_mem_info_vram_vendor(struct device *dev,
}
}
+/**
+ * DOC: mem_info_doorbell_total
+ *
+ * The amdgpu driver provides a sysfs API for reporting current total DOORBELL
+ * available on the device
+ * The file mem_info_vram_total is used for this and returns the total
+ * amount of DOORBELL in bytes
+ */
+static ssize_t amdgpu_mem_info_doorbell_total_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct drm_device *ddev = dev_get_drvdata(dev);
+ struct amdgpu_device *adev = drm_to_adev(ddev);
+
+ return sysfs_emit(buf, "%llu\n", adev->doorbell.size);
+}
+
+/**
+ * DOC: mem_info_doorbell_used
+ *
+ * The amdgpu driver provides a sysfs API for reporting current total DOORBELL
+ * available on the device
+ * The file mem_info_vram_used is used for this and returns the total
+ * amount of currently used DOORBELL in bytes
+ */
+static ssize_t amdgpu_mem_info_doorbell_used_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct drm_device *ddev = dev_get_drvdata(dev);
+ struct amdgpu_device *adev = drm_to_adev(ddev);
+ struct ttm_resource_manager *man = &adev->mman.doorbell_mgr.manager;
+
+ return sysfs_emit(buf, "%llu\n", ttm_resource_manager_usage(man));
+}
+
static DEVICE_ATTR(mem_info_vram_total, S_IRUGO,
amdgpu_mem_info_vram_total_show, NULL);
static DEVICE_ATTR(mem_info_vis_vram_total, S_IRUGO,
- amdgpu_mem_info_vis_vram_total_show,NULL);
+ amdgpu_mem_info_vis_vram_total_show, NULL);
static DEVICE_ATTR(mem_info_vram_used, S_IRUGO,
amdgpu_mem_info_vram_used_show, NULL);
static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
amdgpu_mem_info_vis_vram_used_show, NULL);
static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
amdgpu_mem_info_vram_vendor, NULL);
+static DEVICE_ATTR(mem_info_doorbell_total, S_IRUGO,
+ amdgpu_mem_info_doorbell_total_show, NULL);
+static DEVICE_ATTR(mem_info_doorbell_used, S_IRUGO,
+ amdgpu_mem_info_doorbell_used_show, NULL);
static struct attribute *amdgpu_bar_mgr_attributes[] = {
&dev_attr_mem_info_vram_total.attr,
@@ -209,6 +252,8 @@ static struct attribute *amdgpu_bar_mgr_attributes[] = {
&dev_attr_mem_info_vram_used.attr,
&dev_attr_mem_info_vis_vram_used.attr,
&dev_attr_mem_info_vram_vendor.attr,
+ &dev_attr_mem_info_doorbell_total.attr,
+ &dev_attr_mem_info_doorbell_used.attr,
NULL
};
@@ -265,7 +310,7 @@ u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo)
return usage;
}
-/* Commit the reservation of VRAM pages */
+/* Commit the reservation of BAR pages */
static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager *man)
{
struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
@@ -288,8 +333,10 @@ static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager *man)
dev_dbg(adev->dev, "Reservation 0x%llx - %lld, Succeeded\n",
rsv->start, rsv->size);
- vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
- atomic64_add(vis_usage, &mgr->vis_usage);
+ if (mgr->domain == TTM_PL_VRAM) {
+ vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
+ atomic64_add(vis_usage, &mgr->vis_usage);
+ }
spin_lock(&man->bdev->lru_lock);
man->usage += rsv->size;
spin_unlock(&man->bdev->lru_lock);
@@ -539,7 +586,8 @@ static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
start = 0;
vres->base.start = max(vres->base.start, start);
- vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
+ if (mgr->domain == TTM_PL_VRAM)
+ vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
}
if (amdgpu_is_bar_mgr_blocks_contiguous(&vres->blocks))
@@ -550,7 +598,8 @@ static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
else
vres->base.bus.caching = ttm_write_combined;
- atomic64_add(vis_usage, &mgr->vis_usage);
+ if (mgr->domain == TTM_PL_VRAM)
+ atomic64_add(vis_usage, &mgr->vis_usage);
*res = &vres->base;
return 0;
@@ -583,15 +632,18 @@ static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
uint64_t vis_usage = 0;
mutex_lock(&mgr->lock);
- list_for_each_entry(block, &vres->blocks, link)
- vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
+ if (mgr->domain == TTM_PL_VRAM) {
+ list_for_each_entry(block, &vres->blocks, link)
+ vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
+ }
amdgpu_bar_mgr_do_reserve(man);
drm_buddy_free_list(mm, &vres->blocks);
mutex_unlock(&mgr->lock);
- atomic64_sub(vis_usage, &mgr->vis_usage);
+ if (mgr->domain == TTM_PL_VRAM)
+ atomic64_sub(vis_usage, &mgr->vis_usage);
ttm_resource_fini(man, res);
kfree(vres);
@@ -801,8 +853,9 @@ static void amdgpu_bar_mgr_debug(struct ttm_resource_manager *man,
struct drm_buddy *mm = &mgr->mm;
struct drm_buddy_block *block;
- drm_printf(printer, " vis usage:%llu\n",
- amdgpu_bar_mgr_vis_usage(mgr));
+ if (mgr->domain == TTM_PL_VRAM)
+ drm_printf(printer, " vis usage:%llu\n",
+ amdgpu_bar_mgr_vis_usage(mgr));
mutex_lock(&mgr->lock);
drm_printf(printer, "default_page_size: %lluKiB\n",
@@ -837,15 +890,22 @@ int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
struct amdgpu_bar_mgr *mgr;
struct ttm_resource_manager *man;
int err;
+ u64 size;
- if (domain != TTM_PL_VRAM)
+ if (domain == TTM_PL_VRAM) {
+ mgr = &adev->mman.vram_mgr;
+ size = adev->gmc.real_vram_size;
+ } else if (domain == AMDGPU_PL_DOORBELL) {
+ mgr = &adev->mman.doorbell_mgr;
+ size = adev->doorbell.size;
+ } else {
return -EINVAL;
+ }
- mgr = &adev->mman.vram_mgr;
+ mgr->domain = domain;
man = &mgr->manager;
- ttm_resource_manager_init(man, &adev->mman.bdev,
- adev->gmc.real_vram_size);
+ ttm_resource_manager_init(man, &adev->mman.bdev, size);
man->func = &amdgpu_bar_mgr_func;
@@ -879,10 +939,13 @@ void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain)
int ret;
struct amdgpu_bar_reservation *rsv, *temp;
- if (domain != TTM_PL_VRAM)
+ if (domain == TTM_PL_VRAM)
+ mgr = &adev->mman.vram_mgr;
+ else if (domain == AMDGPU_PL_DOORBELL)
+ mgr = &adev->mman.doorbell_mgr;
+ else
return;
- mgr = &adev->mman.vram_mgr;
man = &mgr->manager;
ttm_resource_manager_set_used(man, false);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h
index 241faba5ae55..f989a6b918d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h
@@ -35,6 +35,7 @@ struct amdgpu_bar_mgr {
struct list_head reserved_pages;
atomic64_t vis_usage;
u64 default_page_size;
+ u32 domain;
};
struct amdgpu_bar_mgr_resource {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 020ebba5a51a..ea53aae3ee0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -33,6 +33,7 @@
#define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
#define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
#define AMDGPU_PL_PREEMPT (TTM_PL_PRIV + 3)
+#define AMDGPU_PL_DOORBELL (TTM_PL_PRIV + 4)
#define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
#define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
@@ -64,6 +65,7 @@ struct amdgpu_mman {
struct amdgpu_bar_mgr vram_mgr;
struct amdgpu_gtt_mgr gtt_mgr;
struct ttm_resource_manager preempt_mgr;
+ struct amdgpu_bar_mgr doorbell_mgr;
uint64_t stolen_vga_size;
struct amdgpu_bo *stolen_vga_memory;
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 06/13] drm/amdgpu: rename gmc.aper_base/size
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (4 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 05/13] drm/amdgpu: add doorbell support to amdgpu_bar_mgr Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:22 ` Christian König
2023-02-03 19:08 ` [PATCH 07/13] drm/amdgpu: store doorbell info in gmc structure Shashank Sharma
` (12 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch renames aper_base and aper_size parameters (in adev->gmc),
to vram_aper_base and vram_aper_size, to differentiate it from the
doorbell BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 12 ++++++------
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 4 ++--
14 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index f99d4873bf22..58689b2a2d1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -438,7 +438,7 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
mem_info->vram_width = adev->gmc.vram_width;
pr_debug("Address base: %pap public 0x%llx private 0x%llx\n",
- &adev->gmc.aper_base,
+ &adev->gmc.vram_aper_base,
mem_info->local_mem_size_public,
mem_info->local_mem_size_private);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
index 0e0f212bd71c..3257da5c3a66 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
@@ -701,7 +701,7 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
*/
amdgpu_res_first(res, offset, length, &cursor);
for_each_sgtable_sg((*sgt), sg, i) {
- phys_addr_t phys = cursor.start + adev->gmc.aper_base;
+ phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
size_t size = cursor.size;
dma_addr_t addr;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 0b6a394e109b..45588b7919fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3961,7 +3961,7 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
/* Memory manager related */
if (!adev->gmc.xgmi.connected_to_cpu) {
arch_phys_wc_del(adev->gmc.vram_mtrr);
- arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
+ arch_io_free_memtype_wc(adev->gmc.vram_aper_base, adev->gmc.vram_aper_size);
}
}
@@ -5562,14 +5562,14 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
uint64_t address_mask = peer_adev->dev->dma_mask ?
~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1);
resource_size_t aper_limit =
- adev->gmc.aper_base + adev->gmc.aper_size - 1;
+ adev->gmc.vram_aper_base + adev->gmc.vram_aper_size - 1;
bool p2p_access =
!adev->gmc.xgmi.connected_to_cpu &&
!(pci_p2pdma_distance(adev->pdev, peer_adev->dev, false) < 0);
return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size &&
adev->gmc.real_vram_size == adev->gmc.visible_vram_size &&
- !(adev->gmc.aper_base & address_mask ||
+ !(adev->gmc.vram_aper_base & address_mask ||
aper_limit & address_mask));
#else
return false;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 02a4c93673ce..c7e64e234de6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -775,7 +775,7 @@ uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)
*/
uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)
{
- return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;
+ return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.vram_aper_base;
}
int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 0305b660cd17..bb7076ecbf01 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -167,8 +167,8 @@ struct amdgpu_gmc {
* gart/vram_start/end field as the later is from
* GPU's view and aper_base is from CPU's view.
*/
- resource_size_t aper_size;
- resource_size_t aper_base;
+ resource_size_t vram_aper_size;
+ resource_size_t vram_aper_base;
/* for some chips with <= 32MB we need to lie
* about vram size near mc fb location */
u64 mc_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index ca85d64a72c2..887fc53a7d16 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1046,8 +1046,8 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
/* On A+A platform, VRAM can be mapped as WB */
if (!adev->gmc.xgmi.connected_to_cpu) {
/* reserve PAT memory space to WC for VRAM */
- int r = arch_io_reserve_memtype_wc(adev->gmc.aper_base,
- adev->gmc.aper_size);
+ int r = arch_io_reserve_memtype_wc(adev->gmc.vram_aper_base,
+ adev->gmc.vram_aper_size);
if (r) {
DRM_ERROR("Unable to set WC memtype for the aperture base\n");
@@ -1055,13 +1055,13 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
}
/* Add an MTRR for the VRAM */
- adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base,
- adev->gmc.aper_size);
+ adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.vram_aper_base,
+ adev->gmc.vram_aper_size);
}
DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
adev->gmc.mc_vram_size >> 20,
- (unsigned long long)adev->gmc.aper_size >> 20);
+ (unsigned long long)adev->gmc.vram_aper_size >> 20);
DRM_INFO("RAM width %dbits %s\n",
adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]);
return amdgpu_ttm_init(adev);
@@ -1083,7 +1083,7 @@ void amdgpu_bo_fini(struct amdgpu_device *adev)
if (!adev->gmc.xgmi.connected_to_cpu) {
arch_phys_wc_del(adev->gmc.vram_mtrr);
- arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
+ arch_io_free_memtype_wc(adev->gmc.vram_aper_base, adev->gmc.vram_aper_size);
}
drm_dev_exit(idx);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 196ba62ef721..bb2230d14ea6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -583,7 +583,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
mem->bus.addr = (u8 *)adev->mman.vram_aper_base_kaddr +
mem->bus.offset;
- mem->bus.offset += adev->gmc.aper_base;
+ mem->bus.offset += adev->gmc.vram_aper_base;
mem->bus.is_iomem = true;
break;
default:
@@ -600,7 +600,7 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0,
&cursor);
- return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
+ return (adev->gmc.vram_aper_base + cursor.start) >> PAGE_SHIFT;
}
/**
@@ -1752,12 +1752,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
#ifdef CONFIG_64BIT
#ifdef CONFIG_X86
if (adev->gmc.xgmi.connected_to_cpu)
- adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
+ adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.vram_aper_base,
adev->gmc.visible_vram_size);
else
#endif
- adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
+ adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.vram_aper_base,
adev->gmc.visible_vram_size);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 21e46817d82d..b2e4f4f06bdb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -825,18 +825,18 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+ adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
- adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
- adev->gmc.aper_size = adev->gmc.real_vram_size;
+ adev->gmc.vram_aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
+ adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
}
#endif
/* In case the PCI BAR is larger than the actual amount of vram */
- adev->gmc.visible_vram_size = adev->gmc.aper_size;
+ adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 4326078689cd..f993ce264c3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -692,17 +692,17 @@ static int gmc_v11_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+ adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
- adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);
- adev->gmc.aper_size = adev->gmc.real_vram_size;
+ adev->gmc.vram_aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);
+ adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
}
#endif
/* In case the PCI BAR is larger than the actual amount of vram */
- adev->gmc.visible_vram_size = adev->gmc.aper_size;
+ adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index ec291d28edff..cd159309e9e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -324,9 +324,9 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
- adev->gmc.visible_vram_size = adev->gmc.aper_size;
+ adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+ adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
/* set the gart size */
if (amdgpu_gart_size == -1) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 979da6f510e8..8ee9731a0c8c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -377,20 +377,20 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+ adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) &&
- adev->gmc.real_vram_size > adev->gmc.aper_size &&
+ adev->gmc.real_vram_size > adev->gmc.vram_aper_size &&
!amdgpu_passthrough(adev)) {
- adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
- adev->gmc.aper_size = adev->gmc.real_vram_size;
+ adev->gmc.vram_aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
+ adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
}
#endif
/* In case the PCI BAR is larger than the actual amount of vram */
- adev->gmc.visible_vram_size = adev->gmc.aper_size;
+ adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 382dde1ce74c..259d797358f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -577,18 +577,18 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+ adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64
if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
- adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
- adev->gmc.aper_size = adev->gmc.real_vram_size;
+ adev->gmc.vram_aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
+ adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
}
#endif
/* In case the PCI BAR is larger than the actual amount of vram */
- adev->gmc.visible_vram_size = adev->gmc.aper_size;
+ adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 08d6cf79fb15..a7074995d97e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1509,8 +1509,8 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
if (r)
return r;
}
- adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
- adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+ adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+ adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64
/*
@@ -1528,16 +1528,16 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
(adev->gmc.xgmi.supported &&
adev->gmc.xgmi.connected_to_cpu)) {
- adev->gmc.aper_base =
+ adev->gmc.vram_aper_base =
adev->gfxhub.funcs->get_mc_fb_offset(adev) +
adev->gmc.xgmi.physical_node_id *
adev->gmc.xgmi.node_segment_size;
- adev->gmc.aper_size = adev->gmc.real_vram_size;
+ adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
}
#endif
/* In case the PCI BAR is larger than the actual amount of vram */
- adev->gmc.visible_vram_size = adev->gmc.aper_size;
+ adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index 10048ce16aea..c86c6705b470 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -1002,8 +1002,8 @@ int svm_migrate_init(struct amdgpu_device *adev)
*/
size = ALIGN(adev->gmc.real_vram_size, 2ULL << 20);
if (adev->gmc.xgmi.connected_to_cpu) {
- pgmap->range.start = adev->gmc.aper_base;
- pgmap->range.end = adev->gmc.aper_base + adev->gmc.aper_size - 1;
+ pgmap->range.start = adev->gmc.vram_aper_base;
+ pgmap->range.end = adev->gmc.vram_aper_base + adev->gmc.vram_aper_size - 1;
pgmap->type = MEMORY_DEVICE_COHERENT;
} else {
res = devm_request_free_mem_region(adev->dev, &iomem_resource, size);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 07/13] drm/amdgpu: store doorbell info in gmc structure
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (5 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 06/13] drm/amdgpu: rename gmc.aper_base/size Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:23 ` Christian König
2023-02-03 19:08 ` [PATCH 08/13] drm/amdgpu: move doorbell ptr into mman structure Shashank Sharma
` (11 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch moves doorbell info into adev->gmc structure, to align
with vram info. This will prepare structures for proper ttm management
of the doorbell BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 +++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 3 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 7 +++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c | 4 ++--
13 files changed, 34 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 58689b2a2d1c..28076da2258f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -106,13 +106,13 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
* not initialized as AMDGPU manages the whole
* doorbell space.
*/
- *aperture_base = adev->doorbell.base;
+ *aperture_base = adev->gmc.doorbell_aper_base;
*aperture_size = 0;
*start_offset = 0;
- } else if (adev->doorbell.size > adev->doorbell.num_doorbells *
+ } else if (adev->gmc.doorbell_aper_size > adev->doorbell.num_doorbells *
sizeof(u32)) {
- *aperture_base = adev->doorbell.base;
- *aperture_size = adev->doorbell.size;
+ *aperture_base = adev->gmc.doorbell_aper_base;
+ *aperture_size = adev->gmc.doorbell_aper_size;
*start_offset = adev->doorbell.num_doorbells * sizeof(u32);
} else {
*aperture_base = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
index 3257da5c3a66..0656e5bb4f05 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
@@ -209,7 +209,7 @@ static ssize_t amdgpu_mem_info_doorbell_total_show(struct device *dev,
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = drm_to_adev(ddev);
- return sysfs_emit(buf, "%llu\n", adev->doorbell.size);
+ return sysfs_emit(buf, "%llu\n", adev->gmc.doorbell_aper_size);
}
/**
@@ -897,7 +897,7 @@ int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
size = adev->gmc.real_vram_size;
} else if (domain == AMDGPU_PL_DOORBELL) {
mgr = &adev->mman.doorbell_mgr;
- size = adev->doorbell.size;
+ size = adev->gmc.doorbell_aper_size;
} else {
return -EINVAL;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 45588b7919fe..16580d9580d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1035,8 +1035,8 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
/* No doorbell on SI hardware generation */
if (adev->asic_type < CHIP_BONAIRE) {
- adev->doorbell.base = 0;
- adev->doorbell.size = 0;
+ adev->gmc.doorbell_aper_base = 0;
+ adev->gmc.doorbell_aper_size = 0;
adev->doorbell.num_doorbells = 0;
adev->doorbell.ptr = NULL;
return 0;
@@ -1048,15 +1048,15 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
amdgpu_asic_init_doorbell_index(adev);
/* doorbell bar mapping */
- adev->doorbell.base = pci_resource_start(adev->pdev, 2);
- adev->doorbell.size = pci_resource_len(adev->pdev, 2);
+ adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
+ adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
if (adev->enable_mes) {
adev->doorbell.num_doorbells =
- adev->doorbell.size / sizeof(u32);
+ adev->gmc.doorbell_aper_size / sizeof(u32);
} else {
adev->doorbell.num_doorbells =
- min_t(u32, adev->doorbell.size / sizeof(u32),
+ min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
adev->doorbell_index.max_assignment+1);
if (adev->doorbell.num_doorbells == 0)
return -EINVAL;
@@ -1071,7 +1071,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
adev->doorbell.num_doorbells += 0x400;
}
- adev->doorbell.ptr = ioremap(adev->doorbell.base,
+ adev->doorbell.ptr = ioremap(adev->gmc.doorbell_aper_base,
adev->doorbell.num_doorbells *
sizeof(u32));
if (adev->doorbell.ptr == NULL)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 7199b6b0be81..c6324970eb79 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -25,9 +25,6 @@
* GPU doorbell structures, functions & helpers
*/
struct amdgpu_doorbell {
- /* doorbell mmio */
- resource_size_t base;
- resource_size_t size;
u32 __iomem *ptr;
u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index bb7076ecbf01..2a6636a7f27b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -173,6 +173,13 @@ struct amdgpu_gmc {
* about vram size near mc fb location */
u64 mc_vram_size;
u64 visible_vram_size;
+ /* DOORBELL's physical address in MMIO space (for CPU to
+ * map DOORBELL). This is different compared to the agp/
+ * gart/vram_start/end field as the later is from
+ * GPU's view and aper_base is from CPU's view.
+ */
+ resource_size_t doorbell_aper_size;
+ resource_size_t doorbell_aper_base;
/* AGP aperture start and end in MC address space
* Driver find a hole in the MC address space
* to place AGP by setting MC_VM_AGP_BOT/TOP registers
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 0c546245793b..1e09c3267c8c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -126,7 +126,7 @@ static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)
roundup(doorbell_start_offset,
amdgpu_mes_doorbell_process_slice(adev));
- doorbell_aperture_size = adev->doorbell.size;
+ doorbell_aperture_size = adev->gmc.doorbell_aper_size;
doorbell_aperture_size =
rounddown(doorbell_aperture_size,
amdgpu_mes_doorbell_process_slice(adev));
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index f202b45c413c..ebc17884df1e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3526,7 +3526,7 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
*/
if (check_if_enlarge_doorbell_range(adev))
WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
- (adev->doorbell.size - 4));
+ (adev->gmc.doorbell_aper_size - 4));
else
WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
(adev->doorbell_index.userqueue_end * 2) << 2);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index aa761ff3a5fa..5969c159d7a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
@@ -173,9 +173,9 @@ static void nbio_v2_3_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
DOORBELL_SELFRING_GPA_APER_SIZE, 0);
WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
- lower_32_bits(adev->doorbell.base));
+ lower_32_bits(adev->gmc.doorbell_aper_base));
WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
- upper_32_bits(adev->doorbell.base));
+ upper_32_bits(adev->gmc.doorbell_aper_base));
}
WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL,
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
index 15eb3658d70e..5ff12887ffab 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
@@ -169,9 +169,9 @@ static void nbio_v4_3_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
DOORBELL_SELFRING_GPA_APER_SIZE, 0);
WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
- lower_32_bits(adev->doorbell.base));
+ lower_32_bits(adev->gmc.doorbell_aper_base));
WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
- upper_32_bits(adev->doorbell.base));
+ upper_32_bits(adev->gmc.doorbell_aper_base));
}
WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index 37615a77287b..1465e74e9122 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -121,9 +121,9 @@ static void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
REG_SET_FIELD(tmp, BIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_SIZE, 0);
WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
- lower_32_bits(adev->doorbell.base));
+ lower_32_bits(adev->gmc.doorbell_aper_base));
WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
- upper_32_bits(adev->doorbell.base));
+ upper_32_bits(adev->gmc.doorbell_aper_base));
}
WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, tmp);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
index 31776b12e4c4..33bc23564870 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
@@ -175,10 +175,10 @@ static void nbio_v7_2_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
WREG32_SOC15(NBIO, 0,
regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
- lower_32_bits(adev->doorbell.base));
+ lower_32_bits(adev->gmc.doorbell_aper_base));
WREG32_SOC15(NBIO, 0,
regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
- upper_32_bits(adev->doorbell.base));
+ upper_32_bits(adev->gmc.doorbell_aper_base));
}
WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 19455a725939..4ce9d78aee1a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -223,9 +223,9 @@ static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_SIZE, 0);
WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW,
- lower_32_bits(adev->doorbell.base));
+ lower_32_bits(adev->gmc.doorbell_aper_base));
WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH,
- upper_32_bits(adev->doorbell.base));
+ upper_32_bits(adev->gmc.doorbell_aper_base));
}
WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
index def89379b51a..1f1fa8cc4790 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
@@ -132,10 +132,10 @@ static void nbio_v7_7_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
WREG32_SOC15(NBIO, 0,
regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
- lower_32_bits(adev->doorbell.base));
+ lower_32_bits(adev->gmc.doorbell_aper_base));
WREG32_SOC15(NBIO, 0,
regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
- upper_32_bits(adev->doorbell.base));
+ upper_32_bits(adev->gmc.doorbell_aper_base));
}
WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 08/13] drm/amdgpu: move doorbell ptr into mman structure
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (6 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 07/13] drm/amdgpu: store doorbell info in gmc structure Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:24 ` Christian König
2023-02-03 19:08 ` [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
` (10 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch:
- moves the doorbell.ptr variable to mman structure
- renames it to doorbell_aper_base_kaddr for better readability;
This change is to make doorbell's ttm management similar to vram's.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 ++++++++++----------
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 +
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 16580d9580d4..cda5387aae50 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -597,7 +597,7 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
return 0;
if (index < adev->doorbell.num_doorbells) {
- return readl(adev->doorbell.ptr + index);
+ return readl(adev->mman.doorbell_aper_base_kaddr + index);
} else {
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
return 0;
@@ -620,7 +620,7 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
return;
if (index < adev->doorbell.num_doorbells) {
- writel(v, adev->doorbell.ptr + index);
+ writel(v, adev->mman.doorbell_aper_base_kaddr + index);
} else {
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
}
@@ -641,7 +641,7 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
return 0;
if (index < adev->doorbell.num_doorbells) {
- return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index));
+ return atomic64_read((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index));
} else {
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
return 0;
@@ -664,7 +664,7 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
return;
if (index < adev->doorbell.num_doorbells) {
- atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v);
+ atomic64_set((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index), v);
} else {
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
}
@@ -1038,7 +1038,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
adev->gmc.doorbell_aper_base = 0;
adev->gmc.doorbell_aper_size = 0;
adev->doorbell.num_doorbells = 0;
- adev->doorbell.ptr = NULL;
+ adev->mman.doorbell_aper_base_kaddr = NULL;
return 0;
}
@@ -1071,10 +1071,10 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
adev->doorbell.num_doorbells += 0x400;
}
- adev->doorbell.ptr = ioremap(adev->gmc.doorbell_aper_base,
- adev->doorbell.num_doorbells *
- sizeof(u32));
- if (adev->doorbell.ptr == NULL)
+ adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
+ adev->doorbell.num_doorbells *
+ sizeof(u32));
+ if (adev->mman.doorbell_aper_base_kaddr == NULL)
return -ENOMEM;
return 0;
@@ -1089,8 +1089,8 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
*/
static void amdgpu_device_doorbell_fini(struct amdgpu_device *adev)
{
- iounmap(adev->doorbell.ptr);
- adev->doorbell.ptr = NULL;
+ iounmap(adev->mman.doorbell_aper_base_kaddr);
+ adev->mman.doorbell_aper_base_kaddr = NULL;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index c6324970eb79..464be28da4fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -25,7 +25,6 @@
* GPU doorbell structures, functions & helpers
*/
struct amdgpu_doorbell {
- u32 __iomem *ptr;
u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index ea53aae3ee0b..243deb1ffc54 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -52,6 +52,7 @@ struct amdgpu_mman {
struct ttm_device bdev;
bool initialized;
void __iomem *vram_aper_base_kaddr;
+ u32 __iomem *doorbell_aper_base_kaddr;
/* buffer handling */
const struct amdgpu_buffer_funcs *buffer_funcs;
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (7 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 08/13] drm/amdgpu: move doorbell ptr into mman structure Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 11:30 ` Christian König
2023-02-03 19:08 ` [PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init Shashank Sharma
` (9 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch adds changes to accommodate the new GEM/TTM domain
for doorbell memory.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 19 ++++++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 24 ++++++++++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 17 ++++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
7 files changed, 58 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e3e2e6e3b485..e1c1a360614e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -974,6 +974,7 @@ struct amdgpu_device {
atomic64_t vram_pin_size;
atomic64_t visible_pin_size;
atomic64_t gart_pin_size;
+ atomic64_t doorbell_pin_size;
/* soc15 register offset based on ip, instance and segment */
uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
index 0656e5bb4f05..43a3137019b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
@@ -659,15 +659,17 @@ static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
* @dev: the other device
* @dir: dma direction
* @sgt: resulting sg table
+ * @mem_type: memory type
*
* Allocate and fill a sg table from a VRAM allocation.
*/
int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
- struct ttm_resource *res,
- u64 offset, u64 length,
- struct device *dev,
- enum dma_data_direction dir,
- struct sg_table **sgt)
+ struct ttm_resource *res,
+ u64 offset, u64 length,
+ struct device *dev,
+ enum dma_data_direction dir,
+ struct sg_table **sgt,
+ u32 mem_type)
{
struct amdgpu_res_cursor cursor;
struct scatterlist *sg;
@@ -701,10 +703,15 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
*/
amdgpu_res_first(res, offset, length, &cursor);
for_each_sgtable_sg((*sgt), sg, i) {
- phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
+ phys_addr_t phys = cursor.start;
size_t size = cursor.size;
dma_addr_t addr;
+ if (mem_type == TTM_PL_VRAM)
+ phys += adev->gmc.vram_aper_base;
+ else
+ phys += adev->gmc.doorbell_aper_base;
+
addr = dma_map_resource(dev, phys, size, dir,
DMA_ATTR_SKIP_CPU_SYNC);
r = dma_mapping_error(dev, addr);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index c48ccde281c3..c645bdc49f34 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -179,9 +179,10 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
break;
case TTM_PL_VRAM:
+ case AMDGPU_PL_DOORBELL:
r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
bo->tbo.base.size, attach->dev,
- dir, &sgt);
+ dir, &sgt, bo->tbo.resource->mem_type);
if (r)
return ERR_PTR(r);
break;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 887fc53a7d16..b2cfd46c459b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -147,6 +147,18 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
c++;
}
+ if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
+ places[c].fpfn = 0;
+ places[c].lpfn = 0;
+ places[c].mem_type = AMDGPU_PL_DOORBELL;
+ places[c].flags = 0;
+ places[c].flags |= TTM_PL_FLAG_TOPDOWN;
+
+ if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
+ places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;
+ c++;
+ }
+
if (domain & AMDGPU_GEM_DOMAIN_GTT) {
places[c].fpfn = 0;
places[c].lpfn = 0;
@@ -464,6 +476,13 @@ static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,
if (man && size < man->size)
return true;
goto fail;
+ } else if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
+ man = ttm_manager_type(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
+
+ if (size < man->size)
+ return true;
+ else
+ goto fail;
}
/* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */
@@ -962,8 +981,9 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
&adev->visible_pin_size);
} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
+ } else if (domain == AMDGPU_GEM_DOMAIN_DOORBELL) {
+ atomic64_add(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
}
-
error:
return r;
}
@@ -1013,6 +1033,8 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
&adev->visible_pin_size);
} else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
+ } else if (bo->tbo.resource->mem_type == AMDGPU_PL_DOORBELL) {
+ atomic64_sub(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 93207badf83f..082f451d26f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -326,7 +326,7 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem);
+ uint64_t *gtt_mem, uint64_t *cpu_mem);
void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
struct dma_fence **fence);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index bb2230d14ea6..71eff2f195a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -128,6 +128,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
case AMDGPU_PL_GDS:
case AMDGPU_PL_GWS:
case AMDGPU_PL_OA:
+ case AMDGPU_PL_DOORBELL:
placement->num_placement = 0;
placement->num_busy_placement = 0;
return;
@@ -500,9 +501,11 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
if (old_mem->mem_type == AMDGPU_PL_GDS ||
old_mem->mem_type == AMDGPU_PL_GWS ||
old_mem->mem_type == AMDGPU_PL_OA ||
+ old_mem->mem_type == AMDGPU_PL_DOORBELL ||
new_mem->mem_type == AMDGPU_PL_GDS ||
new_mem->mem_type == AMDGPU_PL_GWS ||
- new_mem->mem_type == AMDGPU_PL_OA) {
+ new_mem->mem_type == AMDGPU_PL_OA ||
+ new_mem->mem_type == AMDGPU_PL_DOORBELL) {
/* Nothing to save here */
ttm_bo_move_null(bo, new_mem);
goto out;
@@ -586,6 +589,17 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
mem->bus.offset += adev->gmc.vram_aper_base;
mem->bus.is_iomem = true;
break;
+ case AMDGPU_PL_DOORBELL:
+ mem->bus.offset = mem->start << PAGE_SHIFT;
+
+ if (adev->mman.doorbell_aper_base_kaddr &&
+ mem->placement & TTM_PL_FLAG_CONTIGUOUS)
+ mem->bus.addr = (u8 *)adev->mman.doorbell_aper_base_kaddr +
+ mem->bus.offset;
+
+ mem->bus.offset += adev->gmc.doorbell_aper_base;
+ mem->bus.is_iomem = true;
+ break;
default:
return -EINVAL;
}
@@ -1267,6 +1281,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
flags |= AMDGPU_PTE_VALID;
if (mem && (mem->mem_type == TTM_PL_TT ||
+ mem->mem_type == AMDGPU_PL_DOORBELL ||
mem->mem_type == AMDGPU_PL_PREEMPT)) {
flags |= AMDGPU_PTE_SYSTEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 243deb1ffc54..9971665d7d99 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -124,7 +124,8 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
u64 offset, u64 size,
struct device *dev,
enum dma_data_direction dir,
- struct sg_table **sgt);
+ struct sg_table **sgt,
+ u32 mem_type);
void amdgpu_bar_mgr_free_sgt(struct device *dev,
enum dma_data_direction dir,
struct sg_table *sgt);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (8 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 16:20 ` Christian König
2023-02-03 19:08 ` [PATCH 10/14] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
` (8 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
To consolidate it with vram handling.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 96 ++--------------------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 64 +++++++++++++++
2 files changed, 71 insertions(+), 89 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b07b7679bf9f..7c21ffe63ebc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1016,82 +1016,6 @@ int amdgpu_device_pci_reset(struct amdgpu_device *adev)
return pci_reset_function(adev->pdev);
}
-/*
- * GPU doorbell aperture helpers function.
- */
-/**
- * amdgpu_device_doorbell_init - Init doorbell driver information.
- *
- * @adev: amdgpu_device pointer
- *
- * Init doorbell driver information (CIK)
- * Returns 0 on success, error on failure.
- */
-static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
-{
-
- /* No doorbell on SI hardware generation */
- if (adev->asic_type < CHIP_BONAIRE) {
- adev->gmc.doorbell_aper_base = 0;
- adev->gmc.doorbell_aper_size = 0;
- adev->doorbell.num_doorbells = 0;
- adev->mman.doorbell_aper_base_kaddr = NULL;
- return 0;
- }
-
- if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
- return -EINVAL;
-
- amdgpu_asic_init_doorbell_index(adev);
-
- /* doorbell bar mapping */
- adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
- adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
-
- if (adev->enable_mes) {
- adev->doorbell.num_doorbells =
- adev->gmc.doorbell_aper_size / sizeof(u32);
- } else {
- adev->doorbell.num_doorbells =
- min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
- adev->doorbell_index.max_assignment+1);
- if (adev->doorbell.num_doorbells == 0)
- return -EINVAL;
-
- /* For Vega, reserve and map two pages on doorbell BAR since SDMA
- * paging queue doorbell use the second page. The
- * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
- * doorbells are in the first page. So with paging queue enabled,
- * the max num_doorbells should + 1 page (0x400 in dword)
- */
- if (adev->asic_type >= CHIP_VEGA10)
- adev->doorbell.num_doorbells += 0x400;
- }
-
- adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
- adev->doorbell.num_doorbells *
- sizeof(u32));
- if (adev->mman.doorbell_aper_base_kaddr == NULL)
- return -ENOMEM;
-
- return 0;
-}
-
-/**
- * amdgpu_device_doorbell_fini - Tear down doorbell driver information.
- *
- * @adev: amdgpu_device pointer
- *
- * Tear down doorbell driver information (CIK)
- */
-static void amdgpu_device_doorbell_fini(struct amdgpu_device *adev)
-{
- iounmap(adev->mman.doorbell_aper_base_kaddr);
- adev->mman.doorbell_aper_base_kaddr = NULL;
-}
-
-
-
/*
* amdgpu_device_wb_*()
* Writeback is the method by which the GPU updates special pages in memory
@@ -1239,7 +1163,6 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
cmd & ~PCI_COMMAND_MEMORY);
/* Free the VRAM and doorbell BAR, we most likely need to move both. */
- amdgpu_device_doorbell_fini(adev);
if (adev->asic_type >= CHIP_BONAIRE)
pci_release_resource(adev->pdev, 2);
@@ -1253,11 +1176,10 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
pci_assign_unassigned_bus_resources(adev->pdev->bus);
- /* When the doorbell or fb BAR isn't available we have no chance of
- * using the device.
- */
- r = amdgpu_device_doorbell_init(adev);
- if (r || (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET))
+ if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
+ return -ENODEV;
+
+ if (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET)
return -ENODEV;
pci_write_config_word(adev->pdev, PCI_COMMAND, cmd);
@@ -3711,9 +3633,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
if (!adev->have_atomics_support)
dev_info(adev->dev, "PCIE atomic ops is not supported\n");
- /* doorbell bar mapping and doorbell index init*/
- amdgpu_device_doorbell_init(adev);
-
if (amdgpu_emu_mode == 1) {
/* post the asic on emulation mode */
emu_soc_asic_init(adev);
@@ -3941,14 +3860,14 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
/* Clear all CPU mappings pointing to this device */
unmap_mapping_range(adev->ddev.anon_inode->i_mapping, 0, 0, 1);
- /* Unmap all mapped bars - Doorbell, registers and VRAM */
- amdgpu_device_doorbell_fini(adev);
-
iounmap(adev->rmmio);
adev->rmmio = NULL;
if (adev->mman.vram_aper_base_kaddr)
iounmap(adev->mman.vram_aper_base_kaddr);
adev->mman.vram_aper_base_kaddr = NULL;
+ if (adev->mman.doorbell_aper_base_kaddr)
+ iounmap(adev->mman.doorbell_aper_base_kaddr);
+ adev->mman.doorbell_aper_base_kaddr = NULL;
/* Memory manager related */
if (!adev->gmc.xgmi.connected_to_cpu) {
@@ -4051,7 +3970,6 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
iounmap(adev->rmmio);
adev->rmmio = NULL;
- amdgpu_device_doorbell_fini(adev);
drm_dev_exit(idx);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index bb2230d14ea6..983826ae7509 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1705,6 +1705,63 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
return 0;
}
+/*
+ * GPU doorbell aperture helpers function.
+ */
+/**
+ * amdgpu_ttm_doorbell_init - Init doorbell driver information.
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Init doorbell driver information (CIK)
+ * Returns 0 on success, error on failure.
+ */
+static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
+{
+
+ /* No doorbell on SI hardware generation */
+ if (adev->asic_type < CHIP_BONAIRE) {
+ adev->gmc.doorbell_aper_base = 0;
+ adev->gmc.doorbell_aper_size = 0;
+ adev->doorbell.num_doorbells = 0;
+ adev->mman.doorbell_aper_base_kaddr = NULL;
+ return 0;
+ }
+
+ if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
+ return -EINVAL;
+
+ amdgpu_asic_init_doorbell_index(adev);
+
+ /* doorbell bar mapping */
+ adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
+ adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
+ adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
+ adev->gmc.doorbell_aper_size);
+
+ if (adev->enable_mes) {
+ adev->doorbell.num_doorbells =
+ adev->gmc.doorbell_aper_size / sizeof(u32);
+ } else {
+ adev->doorbell.num_doorbells =
+ min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
+ adev->doorbell_index.max_assignment+1);
+ if (adev->doorbell.num_doorbells == 0)
+ return -EINVAL;
+
+ /* For Vega, reserve and map two pages on doorbell BAR since SDMA
+ * paging queue doorbell use the second page. The
+ * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
+ * doorbells are in the first page. So with paging queue enabled,
+ * the max num_doorbells should + 1 page (0x400 in dword)
+ */
+ if (adev->asic_type >= CHIP_VEGA10)
+ adev->doorbell.num_doorbells += 0x400;
+ }
+
+ return 0;
+}
+
/*
* amdgpu_ttm_init - Init the memory management (ttm) as well as various
* gtt/vram related fields.
@@ -1761,6 +1818,10 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
adev->gmc.visible_vram_size);
#endif
+ r = amdgpu_ttm_doorbell_init(adev);
+ if (r)
+ return r;
+
/*
*The reserved vram for firmware must be pinned to the specified
*place on the VRAM, so reserve it early.
@@ -1907,6 +1968,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
if (adev->mman.vram_aper_base_kaddr)
iounmap(adev->mman.vram_aper_base_kaddr);
adev->mman.vram_aper_base_kaddr = NULL;
+ if (adev->mman.doorbell_aper_base_kaddr)
+ iounmap(adev->mman.doorbell_aper_base_kaddr);
+ adev->mman.doorbell_aper_base_kaddr = NULL;
drm_dev_exit(idx);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 10/14] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (9 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 10/13] drm/amdgpu: doorbell support in get_memory functions Shashank Sharma
` (7 subsequent siblings)
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch adds changes to accommodate the new GEM/TTM domain
for doorbell memory.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 19 ++++++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 24 ++++++++++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 17 ++++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
7 files changed, 58 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e3e2e6e3b485..e1c1a360614e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -974,6 +974,7 @@ struct amdgpu_device {
atomic64_t vram_pin_size;
atomic64_t visible_pin_size;
atomic64_t gart_pin_size;
+ atomic64_t doorbell_pin_size;
/* soc15 register offset based on ip, instance and segment */
uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
index 5c8d63dec0ba..a3b4ee760542 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
@@ -659,15 +659,17 @@ static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
* @dev: the other device
* @dir: dma direction
* @sgt: resulting sg table
+ * @mem_type: memory type
*
* Allocate and fill a sg table from a VRAM allocation.
*/
int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
- struct ttm_resource *res,
- u64 offset, u64 length,
- struct device *dev,
- enum dma_data_direction dir,
- struct sg_table **sgt)
+ struct ttm_resource *res,
+ u64 offset, u64 length,
+ struct device *dev,
+ enum dma_data_direction dir,
+ struct sg_table **sgt,
+ u32 mem_type)
{
struct amdgpu_res_cursor cursor;
struct scatterlist *sg;
@@ -701,10 +703,15 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
*/
amdgpu_res_first(res, offset, length, &cursor);
for_each_sgtable_sg((*sgt), sg, i) {
- phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
+ phys_addr_t phys = cursor.start;
size_t size = cursor.size;
dma_addr_t addr;
+ if (mem_type == TTM_PL_VRAM)
+ phys += adev->gmc.vram_aper_base;
+ else
+ phys += adev->gmc.doorbell_aper_base;
+
addr = dma_map_resource(dev, phys, size, dir,
DMA_ATTR_SKIP_CPU_SYNC);
r = dma_mapping_error(dev, addr);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index c48ccde281c3..c645bdc49f34 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -179,9 +179,10 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
break;
case TTM_PL_VRAM:
+ case AMDGPU_PL_DOORBELL:
r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
bo->tbo.base.size, attach->dev,
- dir, &sgt);
+ dir, &sgt, bo->tbo.resource->mem_type);
if (r)
return ERR_PTR(r);
break;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index a6876de964b6..ab32dfe68c5f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -147,6 +147,18 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
c++;
}
+ if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
+ places[c].fpfn = 0;
+ places[c].lpfn = 0;
+ places[c].mem_type = AMDGPU_PL_DOORBELL;
+ places[c].flags = 0;
+ places[c].flags |= TTM_PL_FLAG_TOPDOWN;
+
+ if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
+ places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;
+ c++;
+ }
+
if (domain & AMDGPU_GEM_DOMAIN_GTT) {
places[c].fpfn = 0;
places[c].lpfn = 0;
@@ -464,6 +476,13 @@ static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,
if (man && size < man->size)
return true;
goto fail;
+ } else if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
+ man = ttm_manager_type(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
+
+ if (size < man->size)
+ return true;
+ else
+ goto fail;
}
/* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */
@@ -961,8 +980,9 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
&adev->visible_pin_size);
} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
+ } else if (domain == AMDGPU_GEM_DOMAIN_DOORBELL) {
+ atomic64_add(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
}
-
error:
return r;
}
@@ -1012,6 +1032,8 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
&adev->visible_pin_size);
} else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
+ } else if (bo->tbo.resource->mem_type == AMDGPU_PL_DOORBELL) {
+ atomic64_sub(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 93207badf83f..082f451d26f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -326,7 +326,7 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem);
+ uint64_t *gtt_mem, uint64_t *cpu_mem);
void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
struct dma_fence **fence);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 983826ae7509..e04409210415 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -128,6 +128,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
case AMDGPU_PL_GDS:
case AMDGPU_PL_GWS:
case AMDGPU_PL_OA:
+ case AMDGPU_PL_DOORBELL:
placement->num_placement = 0;
placement->num_busy_placement = 0;
return;
@@ -500,9 +501,11 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
if (old_mem->mem_type == AMDGPU_PL_GDS ||
old_mem->mem_type == AMDGPU_PL_GWS ||
old_mem->mem_type == AMDGPU_PL_OA ||
+ old_mem->mem_type == AMDGPU_PL_DOORBELL ||
new_mem->mem_type == AMDGPU_PL_GDS ||
new_mem->mem_type == AMDGPU_PL_GWS ||
- new_mem->mem_type == AMDGPU_PL_OA) {
+ new_mem->mem_type == AMDGPU_PL_OA ||
+ new_mem->mem_type == AMDGPU_PL_DOORBELL) {
/* Nothing to save here */
ttm_bo_move_null(bo, new_mem);
goto out;
@@ -586,6 +589,17 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
mem->bus.offset += adev->gmc.vram_aper_base;
mem->bus.is_iomem = true;
break;
+ case AMDGPU_PL_DOORBELL:
+ mem->bus.offset = mem->start << PAGE_SHIFT;
+
+ if (adev->mman.doorbell_aper_base_kaddr &&
+ mem->placement & TTM_PL_FLAG_CONTIGUOUS)
+ mem->bus.addr = (u8 *)adev->mman.doorbell_aper_base_kaddr +
+ mem->bus.offset;
+
+ mem->bus.offset += adev->gmc.doorbell_aper_base;
+ mem->bus.is_iomem = true;
+ break;
default:
return -EINVAL;
}
@@ -1267,6 +1281,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
flags |= AMDGPU_PTE_VALID;
if (mem && (mem->mem_type == TTM_PL_TT ||
+ mem->mem_type == AMDGPU_PL_DOORBELL ||
mem->mem_type == AMDGPU_PL_PREEMPT)) {
flags |= AMDGPU_PTE_SYSTEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 9d147740a643..a492de079c2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -124,7 +124,8 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
u64 offset, u64 size,
struct device *dev,
enum dma_data_direction dir,
- struct sg_table **sgt);
+ struct sg_table **sgt,
+ u32 mem_type);
void amdgpu_bar_mgr_free_sgt(struct device *dev,
enum dma_data_direction dir,
struct sg_table *sgt);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 10/13] drm/amdgpu: doorbell support in get_memory functions
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (10 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 10/14] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 16:30 ` Christian König
2023-02-03 19:08 ` [PATCH 11/14] " Shashank Sharma
` (6 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch adds section for doorbell memory in memory status
reporting functions like vm/bo_get_memory.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 ++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 15 ++++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++-
5 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index 99a7855ab1bc..202df09ba5de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -60,7 +60,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
struct amdgpu_fpriv *fpriv = file->driver_priv;
struct amdgpu_vm *vm = &fpriv->vm;
- uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
+ uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0, doorbell_mem = 0;
ktime_t usage[AMDGPU_HW_IP_NUM];
uint32_t bus, dev, fn, domain;
unsigned int hw_ip;
@@ -75,7 +75,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
if (ret)
return;
- amdgpu_vm_get_memory(vm, &vram_mem, >t_mem, &cpu_mem);
+ amdgpu_vm_get_memory(vm, &vram_mem, >t_mem, &cpu_mem, &doorbell_mem);
amdgpu_bo_unreserve(vm->root.bo);
amdgpu_ctx_mgr_usage(&fpriv->ctx_mgr, usage);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index b2cfd46c459b..ef1f3106bc69 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1288,7 +1288,8 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
}
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem)
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem)
{
unsigned int domain;
@@ -1300,6 +1301,9 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
case AMDGPU_GEM_DOMAIN_GTT:
*gtt_mem += amdgpu_bo_size(bo);
break;
+ case AMDGPU_GEM_DOMAIN_DOORBELL:
+ *doorbell_mem += amdgpu_bo_size(bo);
+ break;
case AMDGPU_GEM_DOMAIN_CPU:
default:
*cpu_mem += amdgpu_bo_size(bo);
@@ -1578,6 +1582,9 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
case AMDGPU_GEM_DOMAIN_GTT:
placement = " GTT";
break;
+ case AMDGPU_GEM_DOMAIN_DOORBELL:
+ placement = "DOOR";
+ break;
case AMDGPU_GEM_DOMAIN_CPU:
default:
placement = " CPU";
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 082f451d26f4..bf9759758f0d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -326,7 +326,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem);
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem);
void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
struct dma_fence **fence);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index dc379dc22c77..1561d138945b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -918,7 +918,8 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,
}
void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem)
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem)
{
struct amdgpu_bo_va *bo_va, *tmp;
@@ -927,37 +928,37 @@ void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
spin_unlock(&vm->status_lock);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 094bb4807303..b8ac7d311c8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -458,7 +458,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm);
void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
struct amdgpu_vm *vm);
void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem);
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem);
int amdgpu_vm_pt_clear(struct amdgpu_device *adev, struct amdgpu_vm *vm,
struct amdgpu_bo_vm *vmbo, bool immediate);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 11/14] drm/amdgpu: doorbell support in get_memory functions
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (11 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 10/13] drm/amdgpu: doorbell support in get_memory functions Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 11/13] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
` (5 subsequent siblings)
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch adds section for doorbell memory in memory status
reporting functions like vm/bo_get_memory.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 ++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 15 ++++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++-
5 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index 99a7855ab1bc..202df09ba5de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -60,7 +60,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
struct amdgpu_fpriv *fpriv = file->driver_priv;
struct amdgpu_vm *vm = &fpriv->vm;
- uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
+ uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0, doorbell_mem = 0;
ktime_t usage[AMDGPU_HW_IP_NUM];
uint32_t bus, dev, fn, domain;
unsigned int hw_ip;
@@ -75,7 +75,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
if (ret)
return;
- amdgpu_vm_get_memory(vm, &vram_mem, >t_mem, &cpu_mem);
+ amdgpu_vm_get_memory(vm, &vram_mem, >t_mem, &cpu_mem, &doorbell_mem);
amdgpu_bo_unreserve(vm->root.bo);
amdgpu_ctx_mgr_usage(&fpriv->ctx_mgr, usage);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index ab32dfe68c5f..d9608eee0672 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1287,7 +1287,8 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
}
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem)
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem)
{
unsigned int domain;
@@ -1299,6 +1300,9 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
case AMDGPU_GEM_DOMAIN_GTT:
*gtt_mem += amdgpu_bo_size(bo);
break;
+ case AMDGPU_GEM_DOMAIN_DOORBELL:
+ *doorbell_mem += amdgpu_bo_size(bo);
+ break;
case AMDGPU_GEM_DOMAIN_CPU:
default:
*cpu_mem += amdgpu_bo_size(bo);
@@ -1577,6 +1581,9 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
case AMDGPU_GEM_DOMAIN_GTT:
placement = " GTT";
break;
+ case AMDGPU_GEM_DOMAIN_DOORBELL:
+ placement = "DOOR";
+ break;
case AMDGPU_GEM_DOMAIN_CPU:
default:
placement = " CPU";
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 082f451d26f4..bf9759758f0d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -326,7 +326,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem);
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem);
void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
struct dma_fence **fence);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index dc379dc22c77..1561d138945b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -918,7 +918,8 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,
}
void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem)
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem)
{
struct amdgpu_bo_va *bo_va, *tmp;
@@ -927,37 +928,37 @@ void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) {
if (!bo_va->base.bo)
continue;
amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
- gtt_mem, cpu_mem);
+ gtt_mem, cpu_mem, doorbell_mem);
}
spin_unlock(&vm->status_lock);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 094bb4807303..b8ac7d311c8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -458,7 +458,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm);
void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
struct amdgpu_vm *vm);
void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
- uint64_t *gtt_mem, uint64_t *cpu_mem);
+ uint64_t *gtt_mem, uint64_t *cpu_mem,
+ uint64_t *doorbell_mem);
int amdgpu_vm_pt_clear(struct amdgpu_device *adev, struct amdgpu_vm *vm,
struct amdgpu_bo_vm *vmbo, bool immediate);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 11/13] drm/amdgpu: initialize doorbell memory pool
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (12 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 11/14] " Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
` (4 subsequent siblings)
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Shashank Sharma, christian.koenig, shashank.sharma
From: Shashank Sharma <contactshashanksharma@gmail.com>
This patch initializes doorbell pool with bar manager, which will
divide all the doorbell memory into pages.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 71eff2f195a7..08355f981313 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1793,6 +1793,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
if (r)
return r;
+ /* Initialize DOORBELL pool with all of DOORBELL divided into pages */
+ r = amdgpu_bar_mgr_init(adev, AMDGPU_PL_DOORBELL);
+ if (r) {
+ DRM_ERROR("Failed initializing DOORBELL heap.\n");
+ return r;
+ }
+
/*
* only NAVI10 and onwards ASIC support for IP discovery.
* If IP discovery enabled, a block of memory should be
@@ -1829,6 +1836,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
(unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
+ DRM_INFO("amdgpu: %uM of DOORBELL memory ready\n",
+ (unsigned) (adev->gmc.doorbell_aper_size / (1024 * 1024)));
+
/* Compute GTT size, either based on 1/2 the size of RAM size
* or whatever the user passed on module init */
if (amdgpu_gtt_size == -1) {
@@ -1927,6 +1937,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
}
amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
+ amdgpu_bar_mgr_fini(adev, AMDGPU_PL_DOORBELL);
amdgpu_gtt_mgr_fini(adev);
amdgpu_preempt_mgr_fini(adev);
ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (13 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 11/13] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 16:51 ` Christian König
2023-02-03 19:08 ` [PATCH 12/14] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
` (3 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Shashank Sharma, christian.koenig, shashank.sharma
From: Shashank Sharma <contactshashanksharma@gmail.com>
This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
so that it could be used for both VRAM and DOORBELL domains objects. It
also adds supporting code for existing callers.
Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
4 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index ef1f3106bc69..dec391fa42dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -367,7 +367,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
* 0 on success, negative error code otherwise.
*/
int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
- uint64_t offset, uint64_t size,
+ uint64_t offset, uint64_t size, uint32_t domain,
struct amdgpu_bo **bo_ptr, void **cpu_addr)
{
struct ttm_operation_ctx ctx = { false, false };
@@ -378,7 +378,7 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
size = ALIGN(size, PAGE_SIZE);
r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL,
+ domain, bo_ptr, NULL,
cpu_addr);
if (r)
return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index bf9759758f0d..b2b7e55ac486 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -284,7 +284,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
u32 domain, struct amdgpu_bo **bo_ptr,
u64 *gpu_addr, void **cpu_addr);
int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
- uint64_t offset, uint64_t size,
+ uint64_t offset, uint64_t size, uint32_t domain,
struct amdgpu_bo **bo_ptr, void **cpu_addr);
int amdgpu_bo_create_user(struct amdgpu_device *adev,
struct amdgpu_bo_param *bp,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 08355f981313..4cec90debe46 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1591,6 +1591,7 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
return amdgpu_bo_create_kernel_at(adev,
adev->mman.fw_vram_usage_start_offset,
adev->mman.fw_vram_usage_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.fw_vram_usage_reserved_bo,
&adev->mman.fw_vram_usage_va);
}
@@ -1616,6 +1617,7 @@ static int amdgpu_ttm_drv_reserve_vram_init(struct amdgpu_device *adev)
return amdgpu_bo_create_kernel_at(adev,
adev->mman.drv_vram_usage_start_offset,
adev->mman.drv_vram_usage_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.drv_vram_usage_reserved_bo,
&adev->mman.drv_vram_usage_va);
}
@@ -1696,6 +1698,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
ret = amdgpu_bo_create_kernel_at(adev,
ctx->c2p_train_data_offset,
ctx->train_data_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&ctx->c2p_bo,
NULL);
if (ret) {
@@ -1709,6 +1712,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
ret = amdgpu_bo_create_kernel_at(adev,
adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
adev->mman.discovery_tmr_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.discovery_memory,
NULL);
if (ret) {
@@ -1816,18 +1820,21 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
* avoid display artifacts while transitioning between pre-OS
* and driver. */
r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.stolen_vga_memory,
NULL);
if (r)
return r;
r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
adev->mman.stolen_extended_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.stolen_extended_memory,
NULL);
if (r)
return r;
r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_reserved_offset,
adev->mman.stolen_reserved_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.stolen_reserved_memory,
NULL);
if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index fc9edc3028b6..fd1f58158238 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -395,6 +395,7 @@ static void amdgpu_virt_ras_reserve_bps(struct amdgpu_device *adev)
*/
if (amdgpu_bo_create_kernel_at(adev, bp << AMDGPU_GPU_PAGE_SHIFT,
AMDGPU_GPU_PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
&bo, NULL))
DRM_DEBUG("RAS WARN: reserve vram for retired page %llx fail\n", bp);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 12/14] drm/amdgpu: initialize doorbell memory pool
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (14 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 16:54 ` Christian König
2023-02-03 19:08 ` [PATCH 13/14] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
` (2 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch initializes doorbell pool with bar manager, which will
divide all the doorbell memory into pages.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e04409210415..95017de6b23d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1837,6 +1837,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
if (r)
return r;
+ /* Initialize DOORBELL pool with all of DOORBELL divided into pages */
+ r = amdgpu_bar_mgr_init(adev, AMDGPU_PL_DOORBELL);
+ if (r) {
+ DRM_ERROR("Failed initializing DOORBELL heap.\n");
+ return r;
+ }
+
/*
*The reserved vram for firmware must be pinned to the specified
*place on the VRAM, so reserve it early.
@@ -1890,6 +1897,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
(unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
+ DRM_INFO("amdgpu: %uM of DOORBELL memory ready\n",
+ (unsigned) (adev->gmc.doorbell_aper_size / (1024 * 1024)));
+
/* Compute GTT size, either based on 1/2 the size of RAM size
* or whatever the user passed on module init */
if (amdgpu_gtt_size == -1) {
@@ -1991,6 +2001,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
}
amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
+ amdgpu_bar_mgr_fini(adev, AMDGPU_PL_DOORBELL);
amdgpu_gtt_mgr_fini(adev);
amdgpu_preempt_mgr_fini(adev);
ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 13/14] drm/amdgpu: add domain info in bo_create_kernel_at
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (15 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 12/14] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 13/13] drm/amdgpu: introduce doorbell bo in kernel Shashank Sharma
2023-02-03 19:08 ` [PATCH 14/14] " Shashank Sharma
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Shashank Sharma, christian.koenig, shashank.sharma
From: Shashank Sharma <contactshashanksharma@gmail.com>
This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
so that it could be used for both VRAM and DOORBELL domains objects. It
also adds supporting code for existing callers.
Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
4 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index d9608eee0672..51743f82ed26 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -367,7 +367,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
* 0 on success, negative error code otherwise.
*/
int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
- uint64_t offset, uint64_t size,
+ uint64_t offset, uint64_t size, uint32_t domain,
struct amdgpu_bo **bo_ptr, void **cpu_addr)
{
struct ttm_operation_ctx ctx = { false, false };
@@ -378,7 +378,7 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
size = ALIGN(size, PAGE_SIZE);
r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL,
+ domain, bo_ptr, NULL,
cpu_addr);
if (r)
return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index bf9759758f0d..b2b7e55ac486 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -284,7 +284,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
u32 domain, struct amdgpu_bo **bo_ptr,
u64 *gpu_addr, void **cpu_addr);
int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
- uint64_t offset, uint64_t size,
+ uint64_t offset, uint64_t size, uint32_t domain,
struct amdgpu_bo **bo_ptr, void **cpu_addr);
int amdgpu_bo_create_user(struct amdgpu_device *adev,
struct amdgpu_bo_param *bp,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 95017de6b23d..e38720b91958 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1591,6 +1591,7 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
return amdgpu_bo_create_kernel_at(adev,
adev->mman.fw_vram_usage_start_offset,
adev->mman.fw_vram_usage_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.fw_vram_usage_reserved_bo,
&adev->mman.fw_vram_usage_va);
}
@@ -1616,6 +1617,7 @@ static int amdgpu_ttm_drv_reserve_vram_init(struct amdgpu_device *adev)
return amdgpu_bo_create_kernel_at(adev,
adev->mman.drv_vram_usage_start_offset,
adev->mman.drv_vram_usage_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.drv_vram_usage_reserved_bo,
&adev->mman.drv_vram_usage_va);
}
@@ -1696,6 +1698,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
ret = amdgpu_bo_create_kernel_at(adev,
ctx->c2p_train_data_offset,
ctx->train_data_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&ctx->c2p_bo,
NULL);
if (ret) {
@@ -1709,6 +1712,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
ret = amdgpu_bo_create_kernel_at(adev,
adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
adev->mman.discovery_tmr_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.discovery_memory,
NULL);
if (ret) {
@@ -1877,18 +1881,21 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
* avoid display artifacts while transitioning between pre-OS
* and driver. */
r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.stolen_vga_memory,
NULL);
if (r)
return r;
r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
adev->mman.stolen_extended_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.stolen_extended_memory,
NULL);
if (r)
return r;
r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_reserved_offset,
adev->mman.stolen_reserved_size,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->mman.stolen_reserved_memory,
NULL);
if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index fc9edc3028b6..fd1f58158238 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -395,6 +395,7 @@ static void amdgpu_virt_ras_reserve_bps(struct amdgpu_device *adev)
*/
if (amdgpu_bo_create_kernel_at(adev, bp << AMDGPU_GPU_PAGE_SHIFT,
AMDGPU_GPU_PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
&bo, NULL))
DRM_DEBUG("RAS WARN: reserve vram for retired page %llx fail\n", bp);
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 13/13] drm/amdgpu: introduce doorbell bo in kernel
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (16 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 13/14] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 14/14] " Shashank Sharma
18 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch does the following:
- Removes doorbell ptr from adev.
- Moves doorbell.num_doorbells into mman.num_doorbells.
- Introduces a kernel bo for doorbell management in form of mman.doorbell_kernel_bo.
This bo holds the doorbell space now.
- Introduces mman.doorbell_bo_size: to save total doorbell memory size.
- Also introduces mman.doorbell_va to save CPU address of doorbell BO
mapping. This ptr will be used now for doorbell read/write from doorbell BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 ++++++++++----------
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 4 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 14 ++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 6 +++++
6 files changed, 36 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e1c1a360614e..dd3875ae1ad3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -834,7 +834,6 @@ struct amdgpu_device {
spinlock_t audio_endpt_idx_lock;
amdgpu_block_rreg_t audio_endpt_rreg;
amdgpu_block_wreg_t audio_endpt_wreg;
- struct amdgpu_doorbell doorbell;
/* clock/pll info */
struct amdgpu_clock clock;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 28076da2258f..aea943e337df 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -109,11 +109,10 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
*aperture_base = adev->gmc.doorbell_aper_base;
*aperture_size = 0;
*start_offset = 0;
- } else if (adev->gmc.doorbell_aper_size > adev->doorbell.num_doorbells *
- sizeof(u32)) {
+ } else if (adev->gmc.doorbell_aper_size > adev->mman.doorbell_kernel_bo_size) {
*aperture_base = adev->gmc.doorbell_aper_base;
*aperture_size = adev->gmc.doorbell_aper_size;
- *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
+ *start_offset = adev->mman.doorbell_kernel_bo_size;
} else {
*aperture_base = 0;
*aperture_size = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index cda5387aae50..85c353e4707a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -596,8 +596,8 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
if (amdgpu_device_skip_hw_access(adev))
return 0;
- if (index < adev->doorbell.num_doorbells) {
- return readl(adev->mman.doorbell_aper_base_kaddr + index);
+ if (index < adev->mman.num_doorbells) {
+ return readl(adev->mman.doorbell_va + index);
} else {
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
return 0;
@@ -619,8 +619,8 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
if (amdgpu_device_skip_hw_access(adev))
return;
- if (index < adev->doorbell.num_doorbells) {
- writel(v, adev->mman.doorbell_aper_base_kaddr + index);
+ if (index < adev->mman.num_doorbells) {
+ writel(v, adev->mman.doorbell_va + index);
} else {
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
}
@@ -640,8 +640,8 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
if (amdgpu_device_skip_hw_access(adev))
return 0;
- if (index < adev->doorbell.num_doorbells) {
- return atomic64_read((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index));
+ if (index < adev->mman.num_doorbells) {
+ return atomic64_read((atomic64_t *)(adev->mman.doorbell_va + index));
} else {
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
return 0;
@@ -663,8 +663,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
if (amdgpu_device_skip_hw_access(adev))
return;
- if (index < adev->doorbell.num_doorbells) {
- atomic64_set((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index), v);
+ if (index < adev->mman.num_doorbells) {
+ atomic64_set((atomic64_t *)(adev->mman.doorbell_va + index), v);
} else {
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
}
@@ -1037,7 +1037,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
if (adev->asic_type < CHIP_BONAIRE) {
adev->gmc.doorbell_aper_base = 0;
adev->gmc.doorbell_aper_size = 0;
- adev->doorbell.num_doorbells = 0;
+ adev->mman.num_doorbells = 0;
adev->mman.doorbell_aper_base_kaddr = NULL;
return 0;
}
@@ -1052,13 +1052,13 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
if (adev->enable_mes) {
- adev->doorbell.num_doorbells =
+ adev->mman.num_doorbells =
adev->gmc.doorbell_aper_size / sizeof(u32);
} else {
- adev->doorbell.num_doorbells =
+ adev->mman.num_doorbells =
min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
adev->doorbell_index.max_assignment+1);
- if (adev->doorbell.num_doorbells == 0)
+ if (adev->mman.num_doorbells == 0)
return -EINVAL;
/* For Vega, reserve and map two pages on doorbell BAR since SDMA
@@ -1068,11 +1068,11 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
* the max num_doorbells should + 1 page (0x400 in dword)
*/
if (adev->asic_type >= CHIP_VEGA10)
- adev->doorbell.num_doorbells += 0x400;
+ adev->mman.num_doorbells += 0x400;
}
adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
- adev->doorbell.num_doorbells *
+ adev->mman.num_doorbells *
sizeof(u32));
if (adev->mman.doorbell_aper_base_kaddr == NULL)
return -ENOMEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 464be28da4fb..97298a98561f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -24,10 +24,6 @@
/*
* GPU doorbell structures, functions & helpers
*/
-struct amdgpu_doorbell {
- u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
-};
-
/* Reserved doorbells for amdgpu (including multimedia).
* KFD can use all the rest in the 2M doorbell bar.
* For asic before vega10, doorbell is 32-bit, so the
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 4cec90debe46..5f16023a5991 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1840,6 +1840,18 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
if (r)
return r;
+ adev->mman.doorbell_kernel_bo_size = adev->mman.num_doorbells * sizeof(u32);
+ r = amdgpu_bo_create_kernel_at(adev,
+ 0,
+ adev->mman.doorbell_kernel_bo_size,
+ AMDGPU_GEM_DOMAIN_DOORBELL,
+ &adev->mman.doorbell_kernel_bo,
+ (void **)&adev->mman.doorbell_va);
+ if (r) {
+ DRM_ERROR("Failed to create doorbell BO\n");
+ return r;
+ }
+
DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
(unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
@@ -1931,6 +1943,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
NULL, NULL);
amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
&adev->mman.sdma_access_ptr);
+ amdgpu_bo_free_kernel(&adev->mman.doorbell_kernel_bo,
+ NULL, (void **)&adev->mman.doorbell_va);
amdgpu_ttm_fw_reserve_vram_fini(adev);
amdgpu_ttm_drv_reserve_vram_fini(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 9971665d7d99..3cada4b49ca2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -98,6 +98,12 @@ struct amdgpu_mman {
/* PAGE_SIZE'd BO for process memory r/w over SDMA. */
struct amdgpu_bo *sdma_access_bo;
void *sdma_access_ptr;
+
+ /* doorbells reserved for the kernel driver */
+ u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
+ uint64_t doorbell_kernel_bo_size;
+ struct amdgpu_bo *doorbell_kernel_bo;
+ u32 *doorbell_va;
};
struct amdgpu_copy_mem {
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* [PATCH 14/14] drm/amdgpu: introduce doorbell bo in kernel
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
` (17 preceding siblings ...)
2023-02-03 19:08 ` [PATCH 13/13] drm/amdgpu: introduce doorbell bo in kernel Shashank Sharma
@ 2023-02-03 19:08 ` Shashank Sharma
2023-02-06 16:57 ` Christian König
18 siblings, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-03 19:08 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, shashank.sharma
From: Alex Deucher <alexander.deucher@amd.com>
This patch does the following:
- Removes doorbell ptr from adev.
- Moves doorbell.num_doorbells into mman.num_doorbells.
- Introduces a kernel bo for doorbell management in form of mman.doorbell_kernel_bo.
This bo holds the doorbell space now.
- Introduces mman.doorbell_bo_size: to save total doorbell memory size.
- Also introduces mman.doorbell_va to save CPU address of doorbell BO
mapping. This ptr will be used now for doorbell read/write from doorbell BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 ++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 4 ----
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++++++++++----
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 6 +++++
6 files changed, 35 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e1c1a360614e..dd3875ae1ad3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -834,7 +834,6 @@ struct amdgpu_device {
spinlock_t audio_endpt_idx_lock;
amdgpu_block_rreg_t audio_endpt_rreg;
amdgpu_block_wreg_t audio_endpt_wreg;
- struct amdgpu_doorbell doorbell;
/* clock/pll info */
struct amdgpu_clock clock;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 28076da2258f..aea943e337df 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -109,11 +109,10 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
*aperture_base = adev->gmc.doorbell_aper_base;
*aperture_size = 0;
*start_offset = 0;
- } else if (adev->gmc.doorbell_aper_size > adev->doorbell.num_doorbells *
- sizeof(u32)) {
+ } else if (adev->gmc.doorbell_aper_size > adev->mman.doorbell_kernel_bo_size) {
*aperture_base = adev->gmc.doorbell_aper_base;
*aperture_size = adev->gmc.doorbell_aper_size;
- *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
+ *start_offset = adev->mman.doorbell_kernel_bo_size;
} else {
*aperture_base = 0;
*aperture_size = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 7c21ffe63ebc..9c3ce1ae66ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -593,8 +593,8 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
if (amdgpu_device_skip_hw_access(adev))
return 0;
- if (index < adev->doorbell.num_doorbells) {
- return readl(adev->mman.doorbell_aper_base_kaddr + index);
+ if (index < adev->mman.num_doorbells) {
+ return readl(adev->mman.doorbell_va + index);
} else {
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
return 0;
@@ -616,8 +616,8 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
if (amdgpu_device_skip_hw_access(adev))
return;
- if (index < adev->doorbell.num_doorbells) {
- writel(v, adev->mman.doorbell_aper_base_kaddr + index);
+ if (index < adev->mman.num_doorbells) {
+ writel(v, adev->mman.doorbell_va + index);
} else {
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
}
@@ -637,8 +637,8 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
if (amdgpu_device_skip_hw_access(adev))
return 0;
- if (index < adev->doorbell.num_doorbells) {
- return atomic64_read((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index));
+ if (index < adev->mman.num_doorbells) {
+ return atomic64_read((atomic64_t *)(adev->mman.doorbell_va + index));
} else {
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
return 0;
@@ -660,8 +660,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
if (amdgpu_device_skip_hw_access(adev))
return;
- if (index < adev->doorbell.num_doorbells) {
- atomic64_set((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index), v);
+ if (index < adev->mman.num_doorbells) {
+ atomic64_set((atomic64_t *)(adev->mman.doorbell_va + index), v);
} else {
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 464be28da4fb..97298a98561f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -24,10 +24,6 @@
/*
* GPU doorbell structures, functions & helpers
*/
-struct amdgpu_doorbell {
- u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
-};
-
/* Reserved doorbells for amdgpu (including multimedia).
* KFD can use all the rest in the 2M doorbell bar.
* For asic before vega10, doorbell is 32-bit, so the
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e38720b91958..8f0537f16cc8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1742,7 +1742,7 @@ static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
if (adev->asic_type < CHIP_BONAIRE) {
adev->gmc.doorbell_aper_base = 0;
adev->gmc.doorbell_aper_size = 0;
- adev->doorbell.num_doorbells = 0;
+ adev->mman.num_doorbells = 0;
adev->mman.doorbell_aper_base_kaddr = NULL;
return 0;
}
@@ -1759,13 +1759,13 @@ static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
adev->gmc.doorbell_aper_size);
if (adev->enable_mes) {
- adev->doorbell.num_doorbells =
+ adev->mman.num_doorbells =
adev->gmc.doorbell_aper_size / sizeof(u32);
} else {
- adev->doorbell.num_doorbells =
+ adev->mman.num_doorbells =
min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
adev->doorbell_index.max_assignment+1);
- if (adev->doorbell.num_doorbells == 0)
+ if (adev->mman.num_doorbells == 0)
return -EINVAL;
/* For Vega, reserve and map two pages on doorbell BAR since SDMA
@@ -1775,7 +1775,7 @@ static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
* the max num_doorbells should + 1 page (0x400 in dword)
*/
if (adev->asic_type >= CHIP_VEGA10)
- adev->doorbell.num_doorbells += 0x400;
+ adev->mman.num_doorbells += 0x400;
}
return 0;
@@ -1901,6 +1901,18 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
if (r)
return r;
+ adev->mman.doorbell_kernel_bo_size = adev->mman.num_doorbells * sizeof(u32);
+ r = amdgpu_bo_create_kernel_at(adev,
+ 0,
+ adev->mman.doorbell_kernel_bo_size,
+ AMDGPU_GEM_DOMAIN_DOORBELL,
+ &adev->mman.doorbell_kernel_bo,
+ &adev->mman.doorbell_va);
+ if (r) {
+ DRM_ERROR("Failed to create doorbell BO\n");
+ return r;
+ }
+
DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
(unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
@@ -1992,6 +2004,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
NULL, NULL);
amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
&adev->mman.sdma_access_ptr);
+ amdgpu_bo_free_kernel(&adev->mman.doorbell_kernel_bo,
+ NULL, &adev->mman.doorbell_va);
amdgpu_ttm_fw_reserve_vram_fini(adev);
amdgpu_ttm_drv_reserve_vram_fini(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index a492de079c2e..405294ca9834 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -98,6 +98,12 @@ struct amdgpu_mman {
/* PAGE_SIZE'd BO for process memory r/w over SDMA. */
struct amdgpu_bo *sdma_access_bo;
void *sdma_access_ptr;
+
+ /* doorbells reserved for the kernel driver */
+ u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
+ uint64_t doorbell_kernel_bo_size;
+ struct amdgpu_bo *doorbell_kernel_bo;
+ void *doorbell_va;
};
struct amdgpu_copy_mem {
--
2.34.1
^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory
2023-02-03 19:08 ` [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory Shashank Sharma
@ 2023-02-06 11:19 ` Christian König
2023-02-06 15:31 ` Shashank Sharma
0 siblings, 1 reply; 40+ messages in thread
From: Christian König @ 2023-02-06 11:19 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> include/uapi/drm/amdgpu_drm.h | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 4038abe8505a..fd1c65d78ded 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -94,6 +94,9 @@ extern "C" {
> *
> * %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute engines
> * for appending data.
> + *
> + * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell memory. It is an MMIO region for
> + * signalling user mode queues.
Drop "memory" from the sentence. The key point of doorbells is that they
are *not* memory :)
Apart from that looks good to me,
Christian.
> */
> #define AMDGPU_GEM_DOMAIN_CPU 0x1
> #define AMDGPU_GEM_DOMAIN_GTT 0x2
> @@ -101,12 +104,14 @@ extern "C" {
> #define AMDGPU_GEM_DOMAIN_GDS 0x8
> #define AMDGPU_GEM_DOMAIN_GWS 0x10
> #define AMDGPU_GEM_DOMAIN_OA 0x20
> +#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
> #define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \
> AMDGPU_GEM_DOMAIN_GTT | \
> AMDGPU_GEM_DOMAIN_VRAM | \
> AMDGPU_GEM_DOMAIN_GDS | \
> AMDGPU_GEM_DOMAIN_GWS | \
> - AMDGPU_GEM_DOMAIN_OA)
> + AMDGPU_GEM_DOMAIN_OA | \
> + AMDGPU_GEM_DOMAIN_DOORBELL)
>
> /* Flag that CPU access will be required for the case of VRAM domain */
> #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr
2023-02-03 19:08 ` [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr Shashank Sharma
@ 2023-02-06 11:20 ` Christian König
2023-02-06 15:34 ` Shashank Sharma
2023-02-06 16:17 ` Alex Deucher
0 siblings, 2 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 11:20 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> Rename the VRAM manager functions so they can be resused to manage
> doorbell BAR as well.
Yeah, as said before Alex did this before we had the buddy allocator.
This doesn't makes sense any more and should probably be dropped completely.
Christian.
>
> Cc: Christian Koenig <christian.koenig@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 8 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +-
> .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 14 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 36 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 200 ++++++++++--------
> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 18 +-
> 12 files changed, 157 insertions(+), 143 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 7b5ce00f0602..e34eae8d64cf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -723,7 +723,7 @@ static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev,
> if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) {
> u64 total_vis_vram = adev->gmc.visible_vram_size;
> u64 used_vis_vram =
> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>
> if (used_vis_vram < total_vis_vram) {
> u64 free_vis_vram = total_vis_vram - used_vis_vram;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> index 271e30e34d93..c48ccde281c3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> @@ -179,9 +179,9 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
> break;
>
> case TTM_PL_VRAM:
> - r = amdgpu_vram_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
> - bo->tbo.base.size, attach->dev,
> - dir, &sgt);
> + r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
> + bo->tbo.base.size, attach->dev,
> + dir, &sgt);
> if (r)
> return ERR_PTR(r);
> break;
> @@ -215,7 +215,7 @@ static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,
> sg_free_table(sgt);
> kfree(sgt);
> } else {
> - amdgpu_vram_mgr_free_sgt(attach->dev, dir, sgt);
> + amdgpu_bar_mgr_free_sgt(attach->dev, dir, sgt);
> }
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index cd4caaa29528..9f148ea7ca66 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -2807,12 +2807,12 @@ static struct pci_error_handlers amdgpu_pci_err_handler = {
> .resume = amdgpu_pci_resume,
> };
>
> -extern const struct attribute_group amdgpu_vram_mgr_attr_group;
> +extern const struct attribute_group amdgpu_bar_mgr_attr_group;
> extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
> extern const struct attribute_group amdgpu_vbios_version_attr_group;
>
> static const struct attribute_group *amdgpu_sysfs_groups[] = {
> - &amdgpu_vram_mgr_attr_group,
> + &amdgpu_bar_mgr_attr_group,
> &amdgpu_gtt_mgr_attr_group,
> &amdgpu_vbios_version_attr_group,
> NULL,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 7aa7e52ca784..2ce11434fb22 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -650,7 +650,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
> ui64 = ttm_resource_manager_usage(&adev->mman.vram_mgr.manager);
> return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
> case AMDGPU_INFO_VIS_VRAM_USAGE:
> - ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
> + ui64 = amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
> return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
> case AMDGPU_INFO_GTT_USAGE:
> ui64 = ttm_resource_manager_usage(&adev->mman.gtt_mgr.manager);
> @@ -704,7 +704,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
> atomic64_read(&adev->visible_pin_size),
> mem.vram.usable_heap_size);
> mem.cpu_accessible_vram.heap_usage =
> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
> mem.cpu_accessible_vram.max_allocation =
> mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 25a68d8888e0..ca85d64a72c2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -958,7 +958,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
> domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
> if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
> atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
> - atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
> + atomic64_add(amdgpu_bar_mgr_bo_visible_size(bo),
> &adev->visible_pin_size);
> } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
> atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
> @@ -1009,7 +1009,7 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
>
> if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {
> atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
> - atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
> + atomic64_sub(amdgpu_bar_mgr_bo_visible_size(bo),
> &adev->visible_pin_size);
> } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
> atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index ad490c1e2f57..4e64a035d49d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -1899,7 +1899,7 @@ static int amdgpu_ras_badpages_read(struct amdgpu_device *adev,
> .size = AMDGPU_GPU_PAGE_SIZE,
> .flags = AMDGPU_RAS_RETIRE_PAGE_RESERVED,
> };
> - status = amdgpu_vram_mgr_query_page_status(&adev->mman.vram_mgr,
> + status = amdgpu_bar_mgr_query_page_status(&adev->mman.vram_mgr,
> data->bps[i].retired_page);
> if (status == -EBUSY)
> (*bps)[i].flags = AMDGPU_RAS_RETIRE_PAGE_PENDING;
> @@ -2012,7 +2012,7 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
> goto out;
> }
>
> - amdgpu_vram_mgr_reserve_range(&adev->mman.vram_mgr,
> + amdgpu_bar_mgr_reserve_range(&adev->mman.vram_mgr,
> bps[i].retired_page << AMDGPU_GPU_PAGE_SHIFT,
> AMDGPU_GPU_PAGE_SIZE);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
> index 5c4f93ee0c57..dd2b43acc600 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
> @@ -68,7 +68,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
>
> switch (cur->mem_type) {
> case TTM_PL_VRAM:
> - head = &to_amdgpu_vram_mgr_resource(res)->blocks;
> + head = &to_amdgpu_bar_mgr_resource(res)->blocks;
>
> block = list_first_entry_or_null(head,
> struct drm_buddy_block,
> @@ -76,16 +76,16 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
> if (!block)
> goto fallback;
>
> - while (start >= amdgpu_vram_mgr_block_size(block)) {
> - start -= amdgpu_vram_mgr_block_size(block);
> + while (start >= amdgpu_bar_mgr_block_size(block)) {
> + start -= amdgpu_bar_mgr_block_size(block);
>
> next = block->link.next;
> if (next != head)
> block = list_entry(next, struct drm_buddy_block, link);
> }
>
> - cur->start = amdgpu_vram_mgr_block_start(block) + start;
> - cur->size = min(amdgpu_vram_mgr_block_size(block) - start, size);
> + cur->start = amdgpu_bar_mgr_block_start(block) + start;
> + cur->size = min(amdgpu_bar_mgr_block_size(block) - start, size);
> cur->remaining = size;
> cur->node = block;
> break;
> @@ -148,8 +148,8 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
> block = list_entry(next, struct drm_buddy_block, link);
>
> cur->node = block;
> - cur->start = amdgpu_vram_mgr_block_start(block);
> - cur->size = min(amdgpu_vram_mgr_block_size(block), cur->remaining);
> + cur->start = amdgpu_bar_mgr_block_start(block);
> + cur->size = min(amdgpu_bar_mgr_block_size(block), cur->remaining);
> break;
> case TTM_PL_TT:
> node = cur->node;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 55e0284b2bdd..668826653591 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1735,7 +1735,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> adev->mman.initialized = true;
>
> /* Initialize VRAM pool with all of VRAM divided into pages */
> - r = amdgpu_vram_mgr_init(adev);
> + r = amdgpu_bar_mgr_init(adev, TTM_PL_VRAM);
> if (r) {
> DRM_ERROR("Failed initializing VRAM heap.\n");
> return r;
> @@ -1911,7 +1911,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
> drm_dev_exit(idx);
> }
>
> - amdgpu_vram_mgr_fini(adev);
> + amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
> amdgpu_gtt_mgr_fini(adev);
> amdgpu_preempt_mgr_fini(adev);
> ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index e2cd5894afc9..a918bbd67004 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -61,7 +61,7 @@ struct amdgpu_mman {
> /* Scheduler entity for buffer moves */
> struct drm_sched_entity entity;
>
> - struct amdgpu_vram_mgr vram_mgr;
> + struct amdgpu_bar_mgr vram_mgr;
> struct amdgpu_gtt_mgr gtt_mgr;
> struct ttm_resource_manager preempt_mgr;
>
> @@ -107,29 +107,29 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
> void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
> int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
> void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
> -int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
> -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
> +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain);
> +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain);
>
> bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
> void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
>
> uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
>
> -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
> -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> - struct ttm_resource *mem,
> - u64 offset, u64 size,
> - struct device *dev,
> - enum dma_data_direction dir,
> - struct sg_table **sgt);
> -void amdgpu_vram_mgr_free_sgt(struct device *dev,
> - enum dma_data_direction dir,
> - struct sg_table *sgt);
> -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
> -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> - uint64_t start, uint64_t size);
> -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> - uint64_t start);
> +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo);
> +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> + struct ttm_resource *mem,
> + u64 offset, u64 size,
> + struct device *dev,
> + enum dma_data_direction dir,
> + struct sg_table **sgt);
> +void amdgpu_bar_mgr_free_sgt(struct device *dev,
> + enum dma_data_direction dir,
> + struct sg_table *sgt);
> +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr);
> +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
> + uint64_t start, uint64_t size);
> +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
> + uint64_t start);
>
> int amdgpu_ttm_init(struct amdgpu_device *adev);
> void amdgpu_ttm_fini(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> index 2994b9db196f..fc9edc3028b6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> @@ -599,7 +599,7 @@ static int amdgpu_virt_write_vf2pf_data(struct amdgpu_device *adev)
> vf2pf_info->fb_usage =
> ttm_resource_manager_usage(&adev->mman.vram_mgr.manager) >> 20;
> vf2pf_info->fb_vis_usage =
> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
> vf2pf_info->fb_size = adev->gmc.real_vram_size >> 20;
> vf2pf_info->fb_vis_size = adev->gmc.visible_vram_size >> 20;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> index 9fa1d814508a..30d68e3a2469 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> @@ -31,46 +31,46 @@
> #include "amdgpu_atomfirmware.h"
> #include "atom.h"
>
> -struct amdgpu_vram_reservation {
> +struct amdgpu_bar_reservation {
> u64 start;
> u64 size;
> struct list_head allocated;
> struct list_head blocks;
> };
>
> -static inline struct amdgpu_vram_mgr *
> -to_vram_mgr(struct ttm_resource_manager *man)
> +static inline struct amdgpu_bar_mgr *
> +to_bar_mgr(struct ttm_resource_manager *man)
> {
> - return container_of(man, struct amdgpu_vram_mgr, manager);
> + return container_of(man, struct amdgpu_bar_mgr, manager);
> }
>
> static inline struct amdgpu_device *
> -to_amdgpu_device(struct amdgpu_vram_mgr *mgr)
> +to_amdgpu_device(struct amdgpu_bar_mgr *mgr)
> {
> return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
> }
>
> static inline struct drm_buddy_block *
> -amdgpu_vram_mgr_first_block(struct list_head *list)
> +amdgpu_bar_mgr_first_block(struct list_head *list)
> {
> return list_first_entry_or_null(list, struct drm_buddy_block, link);
> }
>
> -static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct list_head *head)
> +static inline bool amdgpu_is_bar_mgr_blocks_contiguous(struct list_head *head)
> {
> struct drm_buddy_block *block;
> u64 start, size;
>
> - block = amdgpu_vram_mgr_first_block(head);
> + block = amdgpu_bar_mgr_first_block(head);
> if (!block)
> return false;
>
> while (head != block->link.next) {
> - start = amdgpu_vram_mgr_block_start(block);
> - size = amdgpu_vram_mgr_block_size(block);
> + start = amdgpu_bar_mgr_block_start(block);
> + size = amdgpu_bar_mgr_block_size(block);
>
> block = list_entry(block->link.next, struct drm_buddy_block, link);
> - if (start + size != amdgpu_vram_mgr_block_start(block))
> + if (start + size != amdgpu_bar_mgr_block_start(block))
> return false;
> }
>
> @@ -100,7 +100,7 @@ static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev,
> * DOC: mem_info_vis_vram_total
> *
> * The amdgpu driver provides a sysfs API for reporting current total
> - * visible VRAM available on the device
> + * visible BAR available on the device
> * The file mem_info_vis_vram_total is used for this and returns the total
> * amount of visible VRAM in bytes
> */
> @@ -148,7 +148,7 @@ static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev,
> struct amdgpu_device *adev = drm_to_adev(ddev);
>
> return sysfs_emit(buf, "%llu\n",
> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr));
> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr));
> }
>
> /**
> @@ -203,7 +203,7 @@ static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
> static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
> amdgpu_mem_info_vram_vendor, NULL);
>
> -static struct attribute *amdgpu_vram_mgr_attributes[] = {
> +static struct attribute *amdgpu_bar_mgr_attributes[] = {
> &dev_attr_mem_info_vram_total.attr,
> &dev_attr_mem_info_vis_vram_total.attr,
> &dev_attr_mem_info_vram_used.attr,
> @@ -212,23 +212,23 @@ static struct attribute *amdgpu_vram_mgr_attributes[] = {
> NULL
> };
>
> -const struct attribute_group amdgpu_vram_mgr_attr_group = {
> - .attrs = amdgpu_vram_mgr_attributes
> +const struct attribute_group amdgpu_bar_mgr_attr_group = {
> + .attrs = amdgpu_bar_mgr_attributes
> };
>
> /**
> - * amdgpu_vram_mgr_vis_size - Calculate visible block size
> + * amdgpu_bar_mgr_vis_size - Calculate visible block size
> *
> * @adev: amdgpu_device pointer
> * @block: DRM BUDDY block structure
> *
> * Calculate how many bytes of the DRM BUDDY block are inside visible VRAM
> */
> -static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
> +static u64 amdgpu_bar_mgr_vis_size(struct amdgpu_device *adev,
> struct drm_buddy_block *block)
> {
> - u64 start = amdgpu_vram_mgr_block_start(block);
> - u64 end = start + amdgpu_vram_mgr_block_size(block);
> + u64 start = amdgpu_bar_mgr_block_start(block);
> + u64 end = start + amdgpu_bar_mgr_block_size(block);
>
> if (start >= adev->gmc.visible_vram_size)
> return 0;
> @@ -238,18 +238,18 @@ static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
> }
>
> /**
> - * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size
> + * amdgpu_bar_mgr_bo_visible_size - CPU visible BO size
> *
> * @bo: &amdgpu_bo buffer object (must be in VRAM)
> *
> * Returns:
> * How much of the given &amdgpu_bo buffer object lies in CPU visible VRAM.
> */
> -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
> +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo)
> {
> struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
> struct ttm_resource *res = bo->tbo.resource;
> - struct amdgpu_vram_mgr_resource *vres = to_amdgpu_vram_mgr_resource(res);
> + struct amdgpu_bar_mgr_resource *vres = to_amdgpu_bar_mgr_resource(res);
> struct drm_buddy_block *block;
> u64 usage = 0;
>
> @@ -260,18 +260,18 @@ u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
> return 0;
>
> list_for_each_entry(block, &vres->blocks, link)
> - usage += amdgpu_vram_mgr_vis_size(adev, block);
> + usage += amdgpu_bar_mgr_vis_size(adev, block);
>
> return usage;
> }
>
> /* Commit the reservation of VRAM pages */
> -static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
> +static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager *man)
> {
> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> struct amdgpu_device *adev = to_amdgpu_device(mgr);
> struct drm_buddy *mm = &mgr->mm;
> - struct amdgpu_vram_reservation *rsv, *temp;
> + struct amdgpu_bar_reservation *rsv, *temp;
> struct drm_buddy_block *block;
> uint64_t vis_usage;
>
> @@ -281,14 +281,14 @@ static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
> DRM_BUDDY_RANGE_ALLOCATION))
> continue;
>
> - block = amdgpu_vram_mgr_first_block(&rsv->allocated);
> + block = amdgpu_bar_mgr_first_block(&rsv->allocated);
> if (!block)
> continue;
>
> dev_dbg(adev->dev, "Reservation 0x%llx - %lld, Succeeded\n",
> rsv->start, rsv->size);
>
> - vis_usage = amdgpu_vram_mgr_vis_size(adev, block);
> + vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
> atomic64_add(vis_usage, &mgr->vis_usage);
> spin_lock(&man->bdev->lru_lock);
> man->usage += rsv->size;
> @@ -298,18 +298,18 @@ static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
> }
>
> /**
> - * amdgpu_vram_mgr_reserve_range - Reserve a range from VRAM
> + * amdgpu_bar_mgr_reserve_range - Reserve a range from VRAM
> *
> - * @mgr: amdgpu_vram_mgr pointer
> + * @mgr: amdgpu_bar_mgr pointer
> * @start: start address of the range in VRAM
> * @size: size of the range
> *
> * Reserve memory from start address with the specified size in VRAM
> */
> -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
> uint64_t start, uint64_t size)
> {
> - struct amdgpu_vram_reservation *rsv;
> + struct amdgpu_bar_reservation *rsv;
>
> rsv = kzalloc(sizeof(*rsv), GFP_KERNEL);
> if (!rsv)
> @@ -323,16 +323,16 @@ int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
>
> mutex_lock(&mgr->lock);
> list_add_tail(&rsv->blocks, &mgr->reservations_pending);
> - amdgpu_vram_mgr_do_reserve(&mgr->manager);
> + amdgpu_bar_mgr_do_reserve(&mgr->manager);
> mutex_unlock(&mgr->lock);
>
> return 0;
> }
>
> /**
> - * amdgpu_vram_mgr_query_page_status - query the reservation status
> + * amdgpu_bar_mgr_query_page_status - query the reservation status
> *
> - * @mgr: amdgpu_vram_mgr pointer
> + * @mgr: amdgpu_bar_mgr pointer
> * @start: start address of a page in VRAM
> *
> * Returns:
> @@ -340,10 +340,10 @@ int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> * 0: the page has been reserved
> * -ENOENT: the input page is not a reservation
> */
> -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
> uint64_t start)
> {
> - struct amdgpu_vram_reservation *rsv;
> + struct amdgpu_bar_reservation *rsv;
> int ret;
>
> mutex_lock(&mgr->lock);
> @@ -371,7 +371,7 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> }
>
> /**
> - * amdgpu_vram_mgr_new - allocate new ranges
> + * amdgpu_bar_mgr_new - allocate new ranges
> *
> * @man: TTM memory type manager
> * @tbo: TTM BO we need this range for
> @@ -380,15 +380,15 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> *
> * Allocate VRAM for the given BO.
> */
> -static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> +static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
> struct ttm_buffer_object *tbo,
> const struct ttm_place *place,
> struct ttm_resource **res)
> {
> u64 vis_usage = 0, max_bytes, cur_size, min_block_size;
> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> struct amdgpu_device *adev = to_amdgpu_device(mgr);
> - struct amdgpu_vram_mgr_resource *vres;
> + struct amdgpu_bar_mgr_resource *vres;
> u64 size, remaining_size, lpfn, fpfn;
> struct drm_buddy *mm = &mgr->mm;
> struct drm_buddy_block *block;
> @@ -512,7 +512,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> * Compute the original_size value by subtracting the
> * last block size with (aligned size - original size)
> */
> - original_size = amdgpu_vram_mgr_block_size(block) - (size - cur_size);
> + original_size = amdgpu_bar_mgr_block_size(block) - (size - cur_size);
> }
>
> mutex_lock(&mgr->lock);
> @@ -529,8 +529,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> list_for_each_entry(block, &vres->blocks, link) {
> unsigned long start;
>
> - start = amdgpu_vram_mgr_block_start(block) +
> - amdgpu_vram_mgr_block_size(block);
> + start = amdgpu_bar_mgr_block_start(block) +
> + amdgpu_bar_mgr_block_size(block);
> start >>= PAGE_SHIFT;
>
> if (start > PFN_UP(vres->base.size))
> @@ -539,10 +539,10 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> start = 0;
> vres->base.start = max(vres->base.start, start);
>
> - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
> + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
> }
>
> - if (amdgpu_is_vram_mgr_blocks_contiguous(&vres->blocks))
> + if (amdgpu_is_bar_mgr_blocks_contiguous(&vres->blocks))
> vres->base.placement |= TTM_PL_FLAG_CONTIGUOUS;
>
> if (adev->gmc.xgmi.connected_to_cpu)
> @@ -565,18 +565,18 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> }
>
> /**
> - * amdgpu_vram_mgr_del - free ranges
> + * amdgpu_bar_mgr_del - free ranges
> *
> * @man: TTM memory type manager
> * @res: TTM memory object
> *
> * Free the allocated VRAM again.
> */
> -static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> +static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
> struct ttm_resource *res)
> {
> - struct amdgpu_vram_mgr_resource *vres = to_amdgpu_vram_mgr_resource(res);
> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> + struct amdgpu_bar_mgr_resource *vres = to_amdgpu_bar_mgr_resource(res);
> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> struct amdgpu_device *adev = to_amdgpu_device(mgr);
> struct drm_buddy *mm = &mgr->mm;
> struct drm_buddy_block *block;
> @@ -584,9 +584,9 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
>
> mutex_lock(&mgr->lock);
> list_for_each_entry(block, &vres->blocks, link)
> - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
> + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
>
> - amdgpu_vram_mgr_do_reserve(man);
> + amdgpu_bar_mgr_do_reserve(man);
>
> drm_buddy_free_list(mm, &vres->blocks);
> mutex_unlock(&mgr->lock);
> @@ -598,7 +598,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> }
>
> /**
> - * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table
> + * amdgpu_bar_mgr_alloc_sgt - allocate and fill a sg table
> *
> * @adev: amdgpu device pointer
> * @res: TTM memory object
> @@ -610,7 +610,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> *
> * Allocate and fill a sg table from a VRAM allocation.
> */
> -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> struct ttm_resource *res,
> u64 offset, u64 length,
> struct device *dev,
> @@ -685,7 +685,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> }
>
> /**
> - * amdgpu_vram_mgr_free_sgt - allocate and fill a sg table
> + * amdgpu_bar_mgr_free_sgt - allocate and fill a sg table
> *
> * @dev: device pointer
> * @dir: data direction of resource to unmap
> @@ -693,7 +693,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> *
> * Free a previously allocate sg table.
> */
> -void amdgpu_vram_mgr_free_sgt(struct device *dev,
> +void amdgpu_bar_mgr_free_sgt(struct device *dev,
> enum dma_data_direction dir,
> struct sg_table *sgt)
> {
> @@ -709,19 +709,19 @@ void amdgpu_vram_mgr_free_sgt(struct device *dev,
> }
>
> /**
> - * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part
> + * amdgpu_bar_mgr_vis_usage - how many bytes are used in the visible part
> *
> - * @mgr: amdgpu_vram_mgr pointer
> + * @mgr: amdgpu_bar_mgr pointer
> *
> * Returns how many bytes are used in the visible part of VRAM
> */
> -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
> +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr)
> {
> return atomic64_read(&mgr->vis_usage);
> }
>
> /**
> - * amdgpu_vram_mgr_intersects - test each drm buddy block for intersection
> + * amdgpu_bar_mgr_intersects - test each drm buddy block for intersection
> *
> * @man: TTM memory type manager
> * @res: The resource to test
> @@ -730,20 +730,20 @@ uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
> *
> * Test each drm buddy block for intersection for eviction decision.
> */
> -static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
> +static bool amdgpu_bar_mgr_intersects(struct ttm_resource_manager *man,
> struct ttm_resource *res,
> const struct ttm_place *place,
> size_t size)
> {
> - struct amdgpu_vram_mgr_resource *mgr = to_amdgpu_vram_mgr_resource(res);
> + struct amdgpu_bar_mgr_resource *mgr = to_amdgpu_bar_mgr_resource(res);
> struct drm_buddy_block *block;
>
> /* Check each drm buddy block individually */
> list_for_each_entry(block, &mgr->blocks, link) {
> unsigned long fpfn =
> - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
> + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
> unsigned long lpfn = fpfn +
> - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
> + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
>
> if (place->fpfn < lpfn &&
> (!place->lpfn || place->lpfn > fpfn))
> @@ -754,7 +754,7 @@ static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
> }
>
> /**
> - * amdgpu_vram_mgr_compatible - test each drm buddy block for compatibility
> + * amdgpu_bar_mgr_compatible - test each drm buddy block for compatibility
> *
> * @man: TTM memory type manager
> * @res: The resource to test
> @@ -763,20 +763,20 @@ static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
> *
> * Test each drm buddy block for placement compatibility.
> */
> -static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager *man,
> +static bool amdgpu_bar_mgr_compatible(struct ttm_resource_manager *man,
> struct ttm_resource *res,
> const struct ttm_place *place,
> size_t size)
> {
> - struct amdgpu_vram_mgr_resource *mgr = to_amdgpu_vram_mgr_resource(res);
> + struct amdgpu_bar_mgr_resource *mgr = to_amdgpu_bar_mgr_resource(res);
> struct drm_buddy_block *block;
>
> /* Check each drm buddy block individually */
> list_for_each_entry(block, &mgr->blocks, link) {
> unsigned long fpfn =
> - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
> + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
> unsigned long lpfn = fpfn +
> - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
> + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
>
> if (fpfn < place->fpfn ||
> (place->lpfn && lpfn > place->lpfn))
> @@ -787,22 +787,22 @@ static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager *man,
> }
>
> /**
> - * amdgpu_vram_mgr_debug - dump VRAM table
> + * amdgpu_bar_mgr_debug - dump VRAM table
> *
> * @man: TTM memory type manager
> * @printer: DRM printer to use
> *
> * Dump the table content using printk.
> */
> -static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
> +static void amdgpu_bar_mgr_debug(struct ttm_resource_manager *man,
> struct drm_printer *printer)
> {
> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> struct drm_buddy *mm = &mgr->mm;
> struct drm_buddy_block *block;
>
> drm_printf(printer, " vis usage:%llu\n",
> - amdgpu_vram_mgr_vis_usage(mgr));
> + amdgpu_bar_mgr_vis_usage(mgr));
>
> mutex_lock(&mgr->lock);
> drm_printf(printer, "default_page_size: %lluKiB\n",
> @@ -816,31 +816,38 @@ static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
> mutex_unlock(&mgr->lock);
> }
>
> -static const struct ttm_resource_manager_func amdgpu_vram_mgr_func = {
> - .alloc = amdgpu_vram_mgr_new,
> - .free = amdgpu_vram_mgr_del,
> - .intersects = amdgpu_vram_mgr_intersects,
> - .compatible = amdgpu_vram_mgr_compatible,
> - .debug = amdgpu_vram_mgr_debug
> +static const struct ttm_resource_manager_func amdgpu_bar_mgr_func = {
> + .alloc = amdgpu_bar_mgr_new,
> + .free = amdgpu_bar_mgr_del,
> + .intersects = amdgpu_bar_mgr_intersects,
> + .compatible = amdgpu_bar_mgr_compatible,
> + .debug = amdgpu_bar_mgr_debug
> };
>
> /**
> - * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
> + * amdgpu_bar_mgr_init - init BAR manager and DRM MM
> *
> * @adev: amdgpu_device pointer
> + * @domain: memory domain to initialize
> *
> * Allocate and initialize the VRAM manager.
> */
> -int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
> +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
> {
> - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
> - struct ttm_resource_manager *man = &mgr->manager;
> + struct amdgpu_bar_mgr *mgr;
> + struct ttm_resource_manager *man;
> int err;
>
> + if (domain != TTM_PL_VRAM)
> + return -EINVAL;
> +
> + mgr = &adev->mman.vram_mgr;
> + man = &mgr->manager;
> +
> ttm_resource_manager_init(man, &adev->mman.bdev,
> adev->gmc.real_vram_size);
>
> - man->func = &amdgpu_vram_mgr_func;
> + man->func = &amdgpu_bar_mgr_func;
>
> err = drm_buddy_init(&mgr->mm, man->size, PAGE_SIZE);
> if (err)
> @@ -851,25 +858,32 @@ int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
> INIT_LIST_HEAD(&mgr->reserved_pages);
> mgr->default_page_size = PAGE_SIZE;
>
> - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, &mgr->manager);
> + ttm_set_driver_manager(&adev->mman.bdev, domain, &mgr->manager);
> ttm_resource_manager_set_used(man, true);
> return 0;
> }
>
> /**
> - * amdgpu_vram_mgr_fini - free and destroy VRAM manager
> + * amdgpu_bar_mgr_fini - free and destroy VRAM manager
> *
> * @adev: amdgpu_device pointer
> + * @domain: memory domain to destroy
> *
> - * Destroy and free the VRAM manager, returns -EBUSY if ranges are still
> + * Destroy and free the BAR manager, returns -EBUSY if ranges are still
> * allocated inside it.
> */
> -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
> +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain)
> {
> - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
> - struct ttm_resource_manager *man = &mgr->manager;
> + struct amdgpu_bar_mgr *mgr;
> + struct ttm_resource_manager *man;
> int ret;
> - struct amdgpu_vram_reservation *rsv, *temp;
> + struct amdgpu_bar_reservation *rsv, *temp;
> +
> + if (domain != TTM_PL_VRAM)
> + return;
> +
> + mgr = &adev->mman.vram_mgr;
> + man = &mgr->manager;
>
> ttm_resource_manager_set_used(man, false);
>
> @@ -889,5 +903,5 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
> mutex_unlock(&mgr->lock);
>
> ttm_resource_manager_cleanup(man);
> - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL);
> + ttm_set_driver_manager(&adev->mman.bdev, domain, NULL);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
> index 0e04e42cf809..241faba5ae55 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
> @@ -21,12 +21,12 @@
> *
> */
>
> -#ifndef __AMDGPU_VRAM_MGR_H__
> -#define __AMDGPU_VRAM_MGR_H__
> +#ifndef __AMDGPU_BAR_MGR_H__
> +#define __AMDGPU_BAR_MGR_H__
>
> #include <drm/drm_buddy.h>
>
> -struct amdgpu_vram_mgr {
> +struct amdgpu_bar_mgr {
> struct ttm_resource_manager manager;
> struct drm_buddy mm;
> /* protects access to buffer objects */
> @@ -37,26 +37,26 @@ struct amdgpu_vram_mgr {
> u64 default_page_size;
> };
>
> -struct amdgpu_vram_mgr_resource {
> +struct amdgpu_bar_mgr_resource {
> struct ttm_resource base;
> struct list_head blocks;
> unsigned long flags;
> };
>
> -static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)
> +static inline u64 amdgpu_bar_mgr_block_start(struct drm_buddy_block *block)
> {
> return drm_buddy_block_offset(block);
> }
>
> -static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)
> +static inline u64 amdgpu_bar_mgr_block_size(struct drm_buddy_block *block)
> {
> return (u64)PAGE_SIZE << drm_buddy_block_order(block);
> }
>
> -static inline struct amdgpu_vram_mgr_resource *
> -to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
> +static inline struct amdgpu_bar_mgr_resource *
> +to_amdgpu_bar_mgr_resource(struct ttm_resource *res)
> {
> - return container_of(res, struct amdgpu_vram_mgr_resource, base);
> + return container_of(res, struct amdgpu_bar_mgr_resource, base);
> }
>
> #endif
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 04/13] drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr
2023-02-03 19:08 ` [PATCH 04/13] drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr Shashank Sharma
@ 2023-02-06 11:21 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 11:21 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> To differentiate it from the doorbell BAR.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +++++-----
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 14 +++++++-------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 10 +++++-----
> drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 10 +++++-----
> 5 files changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 2f28a8c02f64..0b6a394e109b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -354,12 +354,12 @@ size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
> size_t count = 0;
> uint64_t last;
>
> - if (!adev->mman.aper_base_kaddr)
> + if (!adev->mman.vram_aper_base_kaddr)
> return 0;
>
> last = min(pos + size, adev->gmc.visible_vram_size);
> if (last > pos) {
> - addr = adev->mman.aper_base_kaddr + pos;
> + addr = adev->mman.vram_aper_base_kaddr + pos;
> count = last - pos;
>
> if (write) {
> @@ -3954,9 +3954,9 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
>
> iounmap(adev->rmmio);
> adev->rmmio = NULL;
> - if (adev->mman.aper_base_kaddr)
> - iounmap(adev->mman.aper_base_kaddr);
> - adev->mman.aper_base_kaddr = NULL;
> + if (adev->mman.vram_aper_base_kaddr)
> + iounmap(adev->mman.vram_aper_base_kaddr);
> + adev->mman.vram_aper_base_kaddr = NULL;
>
> /* Memory manager related */
> if (!adev->gmc.xgmi.connected_to_cpu) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 668826653591..196ba62ef721 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -578,9 +578,9 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
> if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size)
> return -EINVAL;
>
> - if (adev->mman.aper_base_kaddr &&
> + if (adev->mman.vram_aper_base_kaddr &&
> mem->placement & TTM_PL_FLAG_CONTIGUOUS)
> - mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr +
> + mem->bus.addr = (u8 *)adev->mman.vram_aper_base_kaddr +
> mem->bus.offset;
>
> mem->bus.offset += adev->gmc.aper_base;
> @@ -1752,12 +1752,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> #ifdef CONFIG_64BIT
> #ifdef CONFIG_X86
> if (adev->gmc.xgmi.connected_to_cpu)
> - adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
> + adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
> adev->gmc.visible_vram_size);
>
> else
> #endif
> - adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
> + adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
> adev->gmc.visible_vram_size);
> #endif
>
> @@ -1904,9 +1904,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>
> if (drm_dev_enter(adev_to_drm(adev), &idx)) {
>
> - if (adev->mman.aper_base_kaddr)
> - iounmap(adev->mman.aper_base_kaddr);
> - adev->mman.aper_base_kaddr = NULL;
> + if (adev->mman.vram_aper_base_kaddr)
> + iounmap(adev->mman.vram_aper_base_kaddr);
> + adev->mman.vram_aper_base_kaddr = NULL;
>
> drm_dev_exit(idx);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index 1061447befc6..020ebba5a51a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -50,7 +50,7 @@ struct amdgpu_gtt_mgr {
> struct amdgpu_mman {
> struct ttm_device bdev;
> bool initialized;
> - void __iomem *aper_base_kaddr;
> + void __iomem *vram_aper_base_kaddr;
>
> /* buffer handling */
> const struct amdgpu_buffer_funcs *buffer_funcs;
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index bd3e3e23a939..f39d4f593a2f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -611,10 +611,10 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
> */
> sz = GDDR6_MEM_TRAINING_ENCROACHED_SIZE;
>
> - if (adev->gmc.visible_vram_size < sz || !adev->mman.aper_base_kaddr) {
> - DRM_ERROR("visible_vram_size %llx or aper_base_kaddr %p is not initialized.\n",
> + if (adev->gmc.visible_vram_size < sz || !adev->mman.vram_aper_base_kaddr) {
> + DRM_ERROR("visible_vram_size %llx or vram_aper_base_kaddr %p is not initialized.\n",
> adev->gmc.visible_vram_size,
> - adev->mman.aper_base_kaddr);
> + adev->mman.vram_aper_base_kaddr);
> return -EINVAL;
> }
>
> @@ -625,7 +625,7 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
> }
>
> if (drm_dev_enter(adev_to_drm(adev), &idx)) {
> - memcpy_fromio(buf, adev->mman.aper_base_kaddr, sz);
> + memcpy_fromio(buf, adev->mman.vram_aper_base_kaddr, sz);
> ret = psp_v11_0_memory_training_send_msg(psp, PSP_BL__DRAM_LONG_TRAIN);
> if (ret) {
> DRM_ERROR("Send long training msg failed.\n");
> @@ -634,7 +634,7 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
> return ret;
> }
>
> - memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
> + memcpy_toio(adev->mman.vram_aper_base_kaddr, buf, sz);
> adev->hdp.funcs->flush_hdp(adev, NULL);
> vfree(buf);
> drm_dev_exit(idx);
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> index e6a26a7e5e5e..9605c0971c11 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> @@ -510,10 +510,10 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
> */
> sz = GDDR6_MEM_TRAINING_ENCROACHED_SIZE;
>
> - if (adev->gmc.visible_vram_size < sz || !adev->mman.aper_base_kaddr) {
> - dev_err(adev->dev, "visible_vram_size %llx or aper_base_kaddr %p is not initialized.\n",
> + if (adev->gmc.visible_vram_size < sz || !adev->mman.vram_aper_base_kaddr) {
> + dev_err(adev->dev, "visible_vram_size %llx or vram_aper_base_kaddr %p is not initialized.\n",
> adev->gmc.visible_vram_size,
> - adev->mman.aper_base_kaddr);
> + adev->mman.vram_aper_base_kaddr);
> return -EINVAL;
> }
>
> @@ -524,7 +524,7 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
> }
>
> if (drm_dev_enter(adev_to_drm(adev), &idx)) {
> - memcpy_fromio(buf, adev->mman.aper_base_kaddr, sz);
> + memcpy_fromio(buf, adev->mman.vram_aper_base_kaddr, sz);
> ret = psp_v13_0_memory_training_send_msg(psp, PSP_BL__DRAM_LONG_TRAIN);
> if (ret) {
> DRM_ERROR("Send long training msg failed.\n");
> @@ -533,7 +533,7 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
> return ret;
> }
>
> - memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
> + memcpy_toio(adev->mman.vram_aper_base_kaddr, buf, sz);
> adev->hdp.funcs->flush_hdp(adev, NULL);
> vfree(buf);
> drm_dev_exit(idx);
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 06/13] drm/amdgpu: rename gmc.aper_base/size
2023-02-03 19:08 ` [PATCH 06/13] drm/amdgpu: rename gmc.aper_base/size Shashank Sharma
@ 2023-02-06 11:22 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 11:22 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch renames aper_base and aper_size parameters (in adev->gmc),
> to vram_aper_base and vram_aper_size, to differentiate it from the
> doorbell BAR.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 10 +++++-----
> drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 10 +++++-----
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 6 +++---
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 12 ++++++------
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 10 +++++-----
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 +++++-----
> drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 4 ++--
> 14 files changed, 49 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index f99d4873bf22..58689b2a2d1c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -438,7 +438,7 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
> mem_info->vram_width = adev->gmc.vram_width;
>
> pr_debug("Address base: %pap public 0x%llx private 0x%llx\n",
> - &adev->gmc.aper_base,
> + &adev->gmc.vram_aper_base,
> mem_info->local_mem_size_public,
> mem_info->local_mem_size_private);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> index 0e0f212bd71c..3257da5c3a66 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> @@ -701,7 +701,7 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> */
> amdgpu_res_first(res, offset, length, &cursor);
> for_each_sgtable_sg((*sgt), sg, i) {
> - phys_addr_t phys = cursor.start + adev->gmc.aper_base;
> + phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
> size_t size = cursor.size;
> dma_addr_t addr;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 0b6a394e109b..45588b7919fe 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3961,7 +3961,7 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
> /* Memory manager related */
> if (!adev->gmc.xgmi.connected_to_cpu) {
> arch_phys_wc_del(adev->gmc.vram_mtrr);
> - arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
> + arch_io_free_memtype_wc(adev->gmc.vram_aper_base, adev->gmc.vram_aper_size);
> }
> }
>
> @@ -5562,14 +5562,14 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
> uint64_t address_mask = peer_adev->dev->dma_mask ?
> ~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1);
> resource_size_t aper_limit =
> - adev->gmc.aper_base + adev->gmc.aper_size - 1;
> + adev->gmc.vram_aper_base + adev->gmc.vram_aper_size - 1;
> bool p2p_access =
> !adev->gmc.xgmi.connected_to_cpu &&
> !(pci_p2pdma_distance(adev->pdev, peer_adev->dev, false) < 0);
>
> return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size &&
> adev->gmc.real_vram_size == adev->gmc.visible_vram_size &&
> - !(adev->gmc.aper_base & address_mask ||
> + !(adev->gmc.vram_aper_base & address_mask ||
> aper_limit & address_mask));
> #else
> return false;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 02a4c93673ce..c7e64e234de6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -775,7 +775,7 @@ uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)
> */
> uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)
> {
> - return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;
> + return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.vram_aper_base;
> }
>
> int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 0305b660cd17..bb7076ecbf01 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -167,8 +167,8 @@ struct amdgpu_gmc {
> * gart/vram_start/end field as the later is from
> * GPU's view and aper_base is from CPU's view.
> */
> - resource_size_t aper_size;
> - resource_size_t aper_base;
> + resource_size_t vram_aper_size;
> + resource_size_t vram_aper_base;
> /* for some chips with <= 32MB we need to lie
> * about vram size near mc fb location */
> u64 mc_vram_size;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index ca85d64a72c2..887fc53a7d16 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -1046,8 +1046,8 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
> /* On A+A platform, VRAM can be mapped as WB */
> if (!adev->gmc.xgmi.connected_to_cpu) {
> /* reserve PAT memory space to WC for VRAM */
> - int r = arch_io_reserve_memtype_wc(adev->gmc.aper_base,
> - adev->gmc.aper_size);
> + int r = arch_io_reserve_memtype_wc(adev->gmc.vram_aper_base,
> + adev->gmc.vram_aper_size);
>
> if (r) {
> DRM_ERROR("Unable to set WC memtype for the aperture base\n");
> @@ -1055,13 +1055,13 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
> }
>
> /* Add an MTRR for the VRAM */
> - adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base,
> - adev->gmc.aper_size);
> + adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.vram_aper_base,
> + adev->gmc.vram_aper_size);
> }
>
> DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
> adev->gmc.mc_vram_size >> 20,
> - (unsigned long long)adev->gmc.aper_size >> 20);
> + (unsigned long long)adev->gmc.vram_aper_size >> 20);
> DRM_INFO("RAM width %dbits %s\n",
> adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]);
> return amdgpu_ttm_init(adev);
> @@ -1083,7 +1083,7 @@ void amdgpu_bo_fini(struct amdgpu_device *adev)
>
> if (!adev->gmc.xgmi.connected_to_cpu) {
> arch_phys_wc_del(adev->gmc.vram_mtrr);
> - arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
> + arch_io_free_memtype_wc(adev->gmc.vram_aper_base, adev->gmc.vram_aper_size);
> }
> drm_dev_exit(idx);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 196ba62ef721..bb2230d14ea6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -583,7 +583,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
> mem->bus.addr = (u8 *)adev->mman.vram_aper_base_kaddr +
> mem->bus.offset;
>
> - mem->bus.offset += adev->gmc.aper_base;
> + mem->bus.offset += adev->gmc.vram_aper_base;
> mem->bus.is_iomem = true;
> break;
> default:
> @@ -600,7 +600,7 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
>
> amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0,
> &cursor);
> - return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
> + return (adev->gmc.vram_aper_base + cursor.start) >> PAGE_SHIFT;
> }
>
> /**
> @@ -1752,12 +1752,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> #ifdef CONFIG_64BIT
> #ifdef CONFIG_X86
> if (adev->gmc.xgmi.connected_to_cpu)
> - adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
> + adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.vram_aper_base,
> adev->gmc.visible_vram_size);
>
> else
> #endif
> - adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
> + adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.vram_aper_base,
> adev->gmc.visible_vram_size);
> #endif
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 21e46817d82d..b2e4f4f06bdb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -825,18 +825,18 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
> if (r)
> return r;
> }
> - adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> - adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> + adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
> + adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
>
> #ifdef CONFIG_X86_64
> if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
> - adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
> - adev->gmc.aper_size = adev->gmc.real_vram_size;
> + adev->gmc.vram_aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
> + adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
> }
> #endif
>
> /* In case the PCI BAR is larger than the actual amount of vram */
> - adev->gmc.visible_vram_size = adev->gmc.aper_size;
> + adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
> if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
> adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> index 4326078689cd..f993ce264c3f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> @@ -692,17 +692,17 @@ static int gmc_v11_0_mc_init(struct amdgpu_device *adev)
> if (r)
> return r;
> }
> - adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> - adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> + adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
> + adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
>
> #ifdef CONFIG_X86_64
> if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
> - adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);
> - adev->gmc.aper_size = adev->gmc.real_vram_size;
> + adev->gmc.vram_aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);
> + adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
> }
> #endif
> /* In case the PCI BAR is larger than the actual amount of vram */
> - adev->gmc.visible_vram_size = adev->gmc.aper_size;
> + adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
> if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
> adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index ec291d28edff..cd159309e9e5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -324,9 +324,9 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
> if (r)
> return r;
> }
> - adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> - adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> - adev->gmc.visible_vram_size = adev->gmc.aper_size;
> + adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
> + adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
> + adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
>
> /* set the gart size */
> if (amdgpu_gart_size == -1) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 979da6f510e8..8ee9731a0c8c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -377,20 +377,20 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
> if (r)
> return r;
> }
> - adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> - adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> + adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
> + adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
>
> #ifdef CONFIG_X86_64
> if ((adev->flags & AMD_IS_APU) &&
> - adev->gmc.real_vram_size > adev->gmc.aper_size &&
> + adev->gmc.real_vram_size > adev->gmc.vram_aper_size &&
> !amdgpu_passthrough(adev)) {
> - adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
> - adev->gmc.aper_size = adev->gmc.real_vram_size;
> + adev->gmc.vram_aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
> + adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
> }
> #endif
>
> /* In case the PCI BAR is larger than the actual amount of vram */
> - adev->gmc.visible_vram_size = adev->gmc.aper_size;
> + adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
> if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
> adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 382dde1ce74c..259d797358f1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -577,18 +577,18 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
> if (r)
> return r;
> }
> - adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> - adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> + adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
> + adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
>
> #ifdef CONFIG_X86_64
> if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
> - adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
> - adev->gmc.aper_size = adev->gmc.real_vram_size;
> + adev->gmc.vram_aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
> + adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
> }
> #endif
>
> /* In case the PCI BAR is larger than the actual amount of vram */
> - adev->gmc.visible_vram_size = adev->gmc.aper_size;
> + adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
> if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
> adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 08d6cf79fb15..a7074995d97e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1509,8 +1509,8 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> if (r)
> return r;
> }
> - adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
> - adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
> + adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
> + adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
>
> #ifdef CONFIG_X86_64
> /*
> @@ -1528,16 +1528,16 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
> (adev->gmc.xgmi.supported &&
> adev->gmc.xgmi.connected_to_cpu)) {
> - adev->gmc.aper_base =
> + adev->gmc.vram_aper_base =
> adev->gfxhub.funcs->get_mc_fb_offset(adev) +
> adev->gmc.xgmi.physical_node_id *
> adev->gmc.xgmi.node_segment_size;
> - adev->gmc.aper_size = adev->gmc.real_vram_size;
> + adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
> }
>
> #endif
> /* In case the PCI BAR is larger than the actual amount of vram */
> - adev->gmc.visible_vram_size = adev->gmc.aper_size;
> + adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
> if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
> adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> index 10048ce16aea..c86c6705b470 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> @@ -1002,8 +1002,8 @@ int svm_migrate_init(struct amdgpu_device *adev)
> */
> size = ALIGN(adev->gmc.real_vram_size, 2ULL << 20);
> if (adev->gmc.xgmi.connected_to_cpu) {
> - pgmap->range.start = adev->gmc.aper_base;
> - pgmap->range.end = adev->gmc.aper_base + adev->gmc.aper_size - 1;
> + pgmap->range.start = adev->gmc.vram_aper_base;
> + pgmap->range.end = adev->gmc.vram_aper_base + adev->gmc.vram_aper_size - 1;
> pgmap->type = MEMORY_DEVICE_COHERENT;
> } else {
> res = devm_request_free_mem_region(adev->dev, &iomem_resource, size);
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 07/13] drm/amdgpu: store doorbell info in gmc structure
2023-02-03 19:08 ` [PATCH 07/13] drm/amdgpu: store doorbell info in gmc structure Shashank Sharma
@ 2023-02-06 11:23 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 11:23 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch moves doorbell info into adev->gmc structure, to align
> with vram info. This will prepare structures for proper ttm management
> of the doorbell BAR.
Mhm, this is most likely not a good idea either.
The doorbell isn't managed by the GMC in any way. That are two
completely different things in hw if I'm not completely mistaken.
Christian.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 +++++++-------
> drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 3 ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 7 +++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c | 4 ++--
> 13 files changed, 34 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index 58689b2a2d1c..28076da2258f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -106,13 +106,13 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
> * not initialized as AMDGPU manages the whole
> * doorbell space.
> */
> - *aperture_base = adev->doorbell.base;
> + *aperture_base = adev->gmc.doorbell_aper_base;
> *aperture_size = 0;
> *start_offset = 0;
> - } else if (adev->doorbell.size > adev->doorbell.num_doorbells *
> + } else if (adev->gmc.doorbell_aper_size > adev->doorbell.num_doorbells *
> sizeof(u32)) {
> - *aperture_base = adev->doorbell.base;
> - *aperture_size = adev->doorbell.size;
> + *aperture_base = adev->gmc.doorbell_aper_base;
> + *aperture_size = adev->gmc.doorbell_aper_size;
> *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
> } else {
> *aperture_base = 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> index 3257da5c3a66..0656e5bb4f05 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> @@ -209,7 +209,7 @@ static ssize_t amdgpu_mem_info_doorbell_total_show(struct device *dev,
> struct drm_device *ddev = dev_get_drvdata(dev);
> struct amdgpu_device *adev = drm_to_adev(ddev);
>
> - return sysfs_emit(buf, "%llu\n", adev->doorbell.size);
> + return sysfs_emit(buf, "%llu\n", adev->gmc.doorbell_aper_size);
> }
>
> /**
> @@ -897,7 +897,7 @@ int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
> size = adev->gmc.real_vram_size;
> } else if (domain == AMDGPU_PL_DOORBELL) {
> mgr = &adev->mman.doorbell_mgr;
> - size = adev->doorbell.size;
> + size = adev->gmc.doorbell_aper_size;
> } else {
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 45588b7919fe..16580d9580d4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1035,8 +1035,8 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
>
> /* No doorbell on SI hardware generation */
> if (adev->asic_type < CHIP_BONAIRE) {
> - adev->doorbell.base = 0;
> - adev->doorbell.size = 0;
> + adev->gmc.doorbell_aper_base = 0;
> + adev->gmc.doorbell_aper_size = 0;
> adev->doorbell.num_doorbells = 0;
> adev->doorbell.ptr = NULL;
> return 0;
> @@ -1048,15 +1048,15 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> amdgpu_asic_init_doorbell_index(adev);
>
> /* doorbell bar mapping */
> - adev->doorbell.base = pci_resource_start(adev->pdev, 2);
> - adev->doorbell.size = pci_resource_len(adev->pdev, 2);
> + adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
> + adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
>
> if (adev->enable_mes) {
> adev->doorbell.num_doorbells =
> - adev->doorbell.size / sizeof(u32);
> + adev->gmc.doorbell_aper_size / sizeof(u32);
> } else {
> adev->doorbell.num_doorbells =
> - min_t(u32, adev->doorbell.size / sizeof(u32),
> + min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
> adev->doorbell_index.max_assignment+1);
> if (adev->doorbell.num_doorbells == 0)
> return -EINVAL;
> @@ -1071,7 +1071,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> adev->doorbell.num_doorbells += 0x400;
> }
>
> - adev->doorbell.ptr = ioremap(adev->doorbell.base,
> + adev->doorbell.ptr = ioremap(adev->gmc.doorbell_aper_base,
> adev->doorbell.num_doorbells *
> sizeof(u32));
> if (adev->doorbell.ptr == NULL)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 7199b6b0be81..c6324970eb79 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -25,9 +25,6 @@
> * GPU doorbell structures, functions & helpers
> */
> struct amdgpu_doorbell {
> - /* doorbell mmio */
> - resource_size_t base;
> - resource_size_t size;
> u32 __iomem *ptr;
> u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
> };
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index bb7076ecbf01..2a6636a7f27b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -173,6 +173,13 @@ struct amdgpu_gmc {
> * about vram size near mc fb location */
> u64 mc_vram_size;
> u64 visible_vram_size;
> + /* DOORBELL's physical address in MMIO space (for CPU to
> + * map DOORBELL). This is different compared to the agp/
> + * gart/vram_start/end field as the later is from
> + * GPU's view and aper_base is from CPU's view.
> + */
> + resource_size_t doorbell_aper_size;
> + resource_size_t doorbell_aper_base;
> /* AGP aperture start and end in MC address space
> * Driver find a hole in the MC address space
> * to place AGP by setting MC_VM_AGP_BOT/TOP registers
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index 0c546245793b..1e09c3267c8c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -126,7 +126,7 @@ static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)
> roundup(doorbell_start_offset,
> amdgpu_mes_doorbell_process_slice(adev));
>
> - doorbell_aperture_size = adev->doorbell.size;
> + doorbell_aperture_size = adev->gmc.doorbell_aper_size;
> doorbell_aperture_size =
> rounddown(doorbell_aperture_size,
> amdgpu_mes_doorbell_process_slice(adev));
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index f202b45c413c..ebc17884df1e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3526,7 +3526,7 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
> */
> if (check_if_enlarge_doorbell_range(adev))
> WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> - (adev->doorbell.size - 4));
> + (adev->gmc.doorbell_aper_size - 4));
> else
> WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> (adev->doorbell_index.userqueue_end * 2) << 2);
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> index aa761ff3a5fa..5969c159d7a0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> @@ -173,9 +173,9 @@ static void nbio_v2_3_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
> DOORBELL_SELFRING_GPA_APER_SIZE, 0);
>
> WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
> - lower_32_bits(adev->doorbell.base));
> + lower_32_bits(adev->gmc.doorbell_aper_base));
> WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
> - upper_32_bits(adev->doorbell.base));
> + upper_32_bits(adev->gmc.doorbell_aper_base));
> }
>
> WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL,
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> index 15eb3658d70e..5ff12887ffab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
> @@ -169,9 +169,9 @@ static void nbio_v4_3_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
> DOORBELL_SELFRING_GPA_APER_SIZE, 0);
>
> WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
> - lower_32_bits(adev->doorbell.base));
> + lower_32_bits(adev->gmc.doorbell_aper_base));
> WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
> - upper_32_bits(adev->doorbell.base));
> + upper_32_bits(adev->gmc.doorbell_aper_base));
> }
>
> WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
> index 37615a77287b..1465e74e9122 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
> @@ -121,9 +121,9 @@ static void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
> REG_SET_FIELD(tmp, BIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_SIZE, 0);
>
> WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
> - lower_32_bits(adev->doorbell.base));
> + lower_32_bits(adev->gmc.doorbell_aper_base));
> WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
> - upper_32_bits(adev->doorbell.base));
> + upper_32_bits(adev->gmc.doorbell_aper_base));
> }
>
> WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, tmp);
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
> index 31776b12e4c4..33bc23564870 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
> @@ -175,10 +175,10 @@ static void nbio_v7_2_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
>
> WREG32_SOC15(NBIO, 0,
> regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
> - lower_32_bits(adev->doorbell.base));
> + lower_32_bits(adev->gmc.doorbell_aper_base));
> WREG32_SOC15(NBIO, 0,
> regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
> - upper_32_bits(adev->doorbell.base));
> + upper_32_bits(adev->gmc.doorbell_aper_base));
> }
>
> WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
> index 19455a725939..4ce9d78aee1a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
> @@ -223,9 +223,9 @@ static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
> REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_SIZE, 0);
>
> WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW,
> - lower_32_bits(adev->doorbell.base));
> + lower_32_bits(adev->gmc.doorbell_aper_base));
> WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH,
> - upper_32_bits(adev->doorbell.base));
> + upper_32_bits(adev->gmc.doorbell_aper_base));
> }
>
> WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp);
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
> index def89379b51a..1f1fa8cc4790 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
> @@ -132,10 +132,10 @@ static void nbio_v7_7_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
>
> WREG32_SOC15(NBIO, 0,
> regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,
> - lower_32_bits(adev->doorbell.base));
> + lower_32_bits(adev->gmc.doorbell_aper_base));
> WREG32_SOC15(NBIO, 0,
> regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
> - upper_32_bits(adev->doorbell.base));
> + upper_32_bits(adev->gmc.doorbell_aper_base));
> }
>
> WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 08/13] drm/amdgpu: move doorbell ptr into mman structure
2023-02-03 19:08 ` [PATCH 08/13] drm/amdgpu: move doorbell ptr into mman structure Shashank Sharma
@ 2023-02-06 11:24 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 11:24 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch:
> - moves the doorbell.ptr variable to mman structure
> - renames it to doorbell_aper_base_kaddr for better readability;
>
> This change is to make doorbell's ttm management similar to vram's.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Yeah, that seems to make sense. Acked-by: Christian König
<christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 ++++++++++----------
> drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 +
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 16580d9580d4..cda5387aae50 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -597,7 +597,7 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
> return 0;
>
> if (index < adev->doorbell.num_doorbells) {
> - return readl(adev->doorbell.ptr + index);
> + return readl(adev->mman.doorbell_aper_base_kaddr + index);
> } else {
> DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
> return 0;
> @@ -620,7 +620,7 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
> return;
>
> if (index < adev->doorbell.num_doorbells) {
> - writel(v, adev->doorbell.ptr + index);
> + writel(v, adev->mman.doorbell_aper_base_kaddr + index);
> } else {
> DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
> }
> @@ -641,7 +641,7 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
> return 0;
>
> if (index < adev->doorbell.num_doorbells) {
> - return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index));
> + return atomic64_read((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index));
> } else {
> DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
> return 0;
> @@ -664,7 +664,7 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
> return;
>
> if (index < adev->doorbell.num_doorbells) {
> - atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v);
> + atomic64_set((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index), v);
> } else {
> DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
> }
> @@ -1038,7 +1038,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> adev->gmc.doorbell_aper_base = 0;
> adev->gmc.doorbell_aper_size = 0;
> adev->doorbell.num_doorbells = 0;
> - adev->doorbell.ptr = NULL;
> + adev->mman.doorbell_aper_base_kaddr = NULL;
> return 0;
> }
>
> @@ -1071,10 +1071,10 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> adev->doorbell.num_doorbells += 0x400;
> }
>
> - adev->doorbell.ptr = ioremap(adev->gmc.doorbell_aper_base,
> - adev->doorbell.num_doorbells *
> - sizeof(u32));
> - if (adev->doorbell.ptr == NULL)
> + adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
> + adev->doorbell.num_doorbells *
> + sizeof(u32));
> + if (adev->mman.doorbell_aper_base_kaddr == NULL)
> return -ENOMEM;
>
> return 0;
> @@ -1089,8 +1089,8 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> */
> static void amdgpu_device_doorbell_fini(struct amdgpu_device *adev)
> {
> - iounmap(adev->doorbell.ptr);
> - adev->doorbell.ptr = NULL;
> + iounmap(adev->mman.doorbell_aper_base_kaddr);
> + adev->mman.doorbell_aper_base_kaddr = NULL;
> }
>
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index c6324970eb79..464be28da4fb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -25,7 +25,6 @@
> * GPU doorbell structures, functions & helpers
> */
> struct amdgpu_doorbell {
> - u32 __iomem *ptr;
> u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
> };
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index ea53aae3ee0b..243deb1ffc54 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -52,6 +52,7 @@ struct amdgpu_mman {
> struct ttm_device bdev;
> bool initialized;
> void __iomem *vram_aper_base_kaddr;
> + u32 __iomem *doorbell_aper_base_kaddr;
>
> /* buffer handling */
> const struct amdgpu_buffer_funcs *buffer_funcs;
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL
2023-02-03 19:08 ` [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
@ 2023-02-06 11:30 ` Christian König
2023-02-06 16:30 ` Alex Deucher
0 siblings, 1 reply; 40+ messages in thread
From: Christian König @ 2023-02-06 11:30 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch adds changes to accommodate the new GEM/TTM domain
> for doorbell memory.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 19 ++++++++++------
> drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 24 ++++++++++++++++++++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 17 ++++++++++++++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
> 7 files changed, 58 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index e3e2e6e3b485..e1c1a360614e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -974,6 +974,7 @@ struct amdgpu_device {
> atomic64_t vram_pin_size;
> atomic64_t visible_pin_size;
> atomic64_t gart_pin_size;
> + atomic64_t doorbell_pin_size;
Please drop that, the amount of pinned doorbells is not needed as far as
I can see.
>
> /* soc15 register offset based on ip, instance and segment */
> uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> index 0656e5bb4f05..43a3137019b1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> @@ -659,15 +659,17 @@ static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
> * @dev: the other device
> * @dir: dma direction
> * @sgt: resulting sg table
> + * @mem_type: memory type
> *
> * Allocate and fill a sg table from a VRAM allocation.
> */
> int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> - struct ttm_resource *res,
> - u64 offset, u64 length,
> - struct device *dev,
> - enum dma_data_direction dir,
> - struct sg_table **sgt)
> + struct ttm_resource *res,
> + u64 offset, u64 length,
> + struct device *dev,
> + enum dma_data_direction dir,
> + struct sg_table **sgt,
> + u32 mem_type)
And again that doesn't make any sense at all.
For now we don't want to export doorbells through DMA-buf.
> {
> struct amdgpu_res_cursor cursor;
> struct scatterlist *sg;
> @@ -701,10 +703,15 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> */
> amdgpu_res_first(res, offset, length, &cursor);
> for_each_sgtable_sg((*sgt), sg, i) {
> - phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
> + phys_addr_t phys = cursor.start;
> size_t size = cursor.size;
> dma_addr_t addr;
>
> + if (mem_type == TTM_PL_VRAM)
> + phys += adev->gmc.vram_aper_base;
> + else
> + phys += adev->gmc.doorbell_aper_base;
> +
> addr = dma_map_resource(dev, phys, size, dir,
> DMA_ATTR_SKIP_CPU_SYNC);
> r = dma_mapping_error(dev, addr);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> index c48ccde281c3..c645bdc49f34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> @@ -179,9 +179,10 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
> break;
>
> case TTM_PL_VRAM:
> + case AMDGPU_PL_DOORBELL:
> r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
> bo->tbo.base.size, attach->dev,
> - dir, &sgt);
> + dir, &sgt, bo->tbo.resource->mem_type);
> if (r)
> return ERR_PTR(r);
> break;
That stuff can be dropped as well as far as I can see.
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 887fc53a7d16..b2cfd46c459b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -147,6 +147,18 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
> c++;
> }
>
> + if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
> + places[c].fpfn = 0;
> + places[c].lpfn = 0;
> + places[c].mem_type = AMDGPU_PL_DOORBELL;
> + places[c].flags = 0;
> + places[c].flags |= TTM_PL_FLAG_TOPDOWN;
> +
> + if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
> + places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;
> + c++;
> + }
> +
> if (domain & AMDGPU_GEM_DOMAIN_GTT) {
> places[c].fpfn = 0;
> places[c].lpfn = 0;
> @@ -464,6 +476,13 @@ static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,
> if (man && size < man->size)
> return true;
> goto fail;
> + } else if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
> + man = ttm_manager_type(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
> +
> + if (size < man->size)
> + return true;
> + else
> + goto fail;
Do we ever want userspace to allocate more than one doorbell page at a time?
> }
>
> /* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */
> @@ -962,8 +981,9 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
> &adev->visible_pin_size);
> } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
> atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
> + } else if (domain == AMDGPU_GEM_DOMAIN_DOORBELL) {
> + atomic64_add(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
Can be dropped.
> }
> -
> error:
> return r;
> }
> @@ -1013,6 +1033,8 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
> &adev->visible_pin_size);
> } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
> atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
> + } else if (bo->tbo.resource->mem_type == AMDGPU_PL_DOORBELL) {
> + atomic64_sub(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
Dito.
> }
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index 93207badf83f..082f451d26f4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -326,7 +326,7 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
> u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
> u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
> void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
> - uint64_t *gtt_mem, uint64_t *cpu_mem);
> + uint64_t *gtt_mem, uint64_t *cpu_mem);
> void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
> int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
> struct dma_fence **fence);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index bb2230d14ea6..71eff2f195a7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -128,6 +128,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
> case AMDGPU_PL_GDS:
> case AMDGPU_PL_GWS:
> case AMDGPU_PL_OA:
> + case AMDGPU_PL_DOORBELL:
> placement->num_placement = 0;
> placement->num_busy_placement = 0;
> return;
> @@ -500,9 +501,11 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
> if (old_mem->mem_type == AMDGPU_PL_GDS ||
> old_mem->mem_type == AMDGPU_PL_GWS ||
> old_mem->mem_type == AMDGPU_PL_OA ||
> + old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> new_mem->mem_type == AMDGPU_PL_GDS ||
> new_mem->mem_type == AMDGPU_PL_GWS ||
> - new_mem->mem_type == AMDGPU_PL_OA) {
> + new_mem->mem_type == AMDGPU_PL_OA ||
> + new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> /* Nothing to save here */
> ttm_bo_move_null(bo, new_mem);
> goto out;
> @@ -586,6 +589,17 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
> mem->bus.offset += adev->gmc.vram_aper_base;
> mem->bus.is_iomem = true;
> break;
> + case AMDGPU_PL_DOORBELL:
> + mem->bus.offset = mem->start << PAGE_SHIFT;
That here won't work if we ever allow allocating more than one page for
a doorbell.
> +
> + if (adev->mman.doorbell_aper_base_kaddr &&
> + mem->placement & TTM_PL_FLAG_CONTIGUOUS)
> + mem->bus.addr = (u8 *)adev->mman.doorbell_aper_base_kaddr +
> + mem->bus.offset;
This doesn't make any sense at all. TTM_PL_FLAG_CONTIGUOUS should
probably be completely ignored for doorbells.
Regards,
Christian.
> +
> + mem->bus.offset += adev->gmc.doorbell_aper_base;
> + mem->bus.is_iomem = true;
> + break;
> default:
> return -EINVAL;
> }
> @@ -1267,6 +1281,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
> flags |= AMDGPU_PTE_VALID;
>
> if (mem && (mem->mem_type == TTM_PL_TT ||
> + mem->mem_type == AMDGPU_PL_DOORBELL ||
> mem->mem_type == AMDGPU_PL_PREEMPT)) {
> flags |= AMDGPU_PTE_SYSTEM;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index 243deb1ffc54..9971665d7d99 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -124,7 +124,8 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> u64 offset, u64 size,
> struct device *dev,
> enum dma_data_direction dir,
> - struct sg_table **sgt);
> + struct sg_table **sgt,
> + u32 mem_type);
> void amdgpu_bar_mgr_free_sgt(struct device *dev,
> enum dma_data_direction dir,
> struct sg_table *sgt);
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory
2023-02-06 11:19 ` Christian König
@ 2023-02-06 15:31 ` Shashank Sharma
0 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-06 15:31 UTC (permalink / raw)
To: Christian König, amd-gfx; +Cc: alexander.deucher
Hey Christian,
On 06/02/2023 12:19, Christian König wrote:
> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
>> From: Alex Deucher <alexander.deucher@amd.com>
>>
>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>> ---
>> include/uapi/drm/amdgpu_drm.h | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/uapi/drm/amdgpu_drm.h
>> b/include/uapi/drm/amdgpu_drm.h
>> index 4038abe8505a..fd1c65d78ded 100644
>> --- a/include/uapi/drm/amdgpu_drm.h
>> +++ b/include/uapi/drm/amdgpu_drm.h
>> @@ -94,6 +94,9 @@ extern "C" {
>> *
>> * %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute
>> engines
>> * for appending data.
>> + *
>> + * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell memory. It is an MMIO
>> region for
>> + * signalling user mode queues.
>
> Drop "memory" from the sentence. The key point of doorbells is that
> they are *not* memory :)
>
> Apart from that looks good to me,
> Christian.
Noted.
- Shashank
>
>> */
>> #define AMDGPU_GEM_DOMAIN_CPU 0x1
>> #define AMDGPU_GEM_DOMAIN_GTT 0x2
>> @@ -101,12 +104,14 @@ extern "C" {
>> #define AMDGPU_GEM_DOMAIN_GDS 0x8
>> #define AMDGPU_GEM_DOMAIN_GWS 0x10
>> #define AMDGPU_GEM_DOMAIN_OA 0x20
>> +#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
>> #define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \
>> AMDGPU_GEM_DOMAIN_GTT | \
>> AMDGPU_GEM_DOMAIN_VRAM | \
>> AMDGPU_GEM_DOMAIN_GDS | \
>> AMDGPU_GEM_DOMAIN_GWS | \
>> - AMDGPU_GEM_DOMAIN_OA)
>> + AMDGPU_GEM_DOMAIN_OA | \
>> + AMDGPU_GEM_DOMAIN_DOORBELL)
>> /* Flag that CPU access will be required for the case of VRAM
>> domain */
>> #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr
2023-02-06 11:20 ` Christian König
@ 2023-02-06 15:34 ` Shashank Sharma
2023-02-06 16:03 ` Christian König
2023-02-06 16:17 ` Alex Deucher
1 sibling, 1 reply; 40+ messages in thread
From: Shashank Sharma @ 2023-02-06 15:34 UTC (permalink / raw)
To: Christian König, amd-gfx; +Cc: alexander.deucher
On 06/02/2023 12:20, Christian König wrote:
> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
>> From: Alex Deucher <alexander.deucher@amd.com>
>>
>> Rename the VRAM manager functions so they can be resused to manage
>> doorbell BAR as well.
>
> Yeah, as said before Alex did this before we had the buddy allocator.
>
> This doesn't makes sense any more and should probably be dropped
> completely.
>
> Christian.
Yeah, I was wondering if we just not use the buddy-allocation for
doorbell, but still separate out the VRAM vs DB function, would that
make better sense ?
- Shashank
>
>>
>> Cc: Christian Koenig <christian.koenig@amd.com>
>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 8 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +-
>> .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 14 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 36 ++--
>> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 200 ++++++++++--------
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 18 +-
>> 12 files changed, 157 insertions(+), 143 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>> index 7b5ce00f0602..e34eae8d64cf 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>> @@ -723,7 +723,7 @@ static void
>> amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev,
>> if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) {
>> u64 total_vis_vram = adev->gmc.visible_vram_size;
>> u64 used_vis_vram =
>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>> if (used_vis_vram < total_vis_vram) {
>> u64 free_vis_vram = total_vis_vram - used_vis_vram;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>> index 271e30e34d93..c48ccde281c3 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>> @@ -179,9 +179,9 @@ static struct sg_table *amdgpu_dma_buf_map(struct
>> dma_buf_attachment *attach,
>> break;
>> case TTM_PL_VRAM:
>> - r = amdgpu_vram_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
>> - bo->tbo.base.size, attach->dev,
>> - dir, &sgt);
>> + r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
>> + bo->tbo.base.size, attach->dev,
>> + dir, &sgt);
>> if (r)
>> return ERR_PTR(r);
>> break;
>> @@ -215,7 +215,7 @@ static void amdgpu_dma_buf_unmap(struct
>> dma_buf_attachment *attach,
>> sg_free_table(sgt);
>> kfree(sgt);
>> } else {
>> - amdgpu_vram_mgr_free_sgt(attach->dev, dir, sgt);
>> + amdgpu_bar_mgr_free_sgt(attach->dev, dir, sgt);
>> }
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> index cd4caaa29528..9f148ea7ca66 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> @@ -2807,12 +2807,12 @@ static struct pci_error_handlers
>> amdgpu_pci_err_handler = {
>> .resume = amdgpu_pci_resume,
>> };
>> -extern const struct attribute_group amdgpu_vram_mgr_attr_group;
>> +extern const struct attribute_group amdgpu_bar_mgr_attr_group;
>> extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
>> extern const struct attribute_group amdgpu_vbios_version_attr_group;
>> static const struct attribute_group *amdgpu_sysfs_groups[] = {
>> - &amdgpu_vram_mgr_attr_group,
>> + &amdgpu_bar_mgr_attr_group,
>> &amdgpu_gtt_mgr_attr_group,
>> &amdgpu_vbios_version_attr_group,
>> NULL,
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 7aa7e52ca784..2ce11434fb22 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -650,7 +650,7 @@ int amdgpu_info_ioctl(struct drm_device *dev,
>> void *data, struct drm_file *filp)
>> ui64 =
>> ttm_resource_manager_usage(&adev->mman.vram_mgr.manager);
>> return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
>> case AMDGPU_INFO_VIS_VRAM_USAGE:
>> - ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
>> + ui64 = amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>> return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
>> case AMDGPU_INFO_GTT_USAGE:
>> ui64 =
>> ttm_resource_manager_usage(&adev->mman.gtt_mgr.manager);
>> @@ -704,7 +704,7 @@ int amdgpu_info_ioctl(struct drm_device *dev,
>> void *data, struct drm_file *filp)
>> atomic64_read(&adev->visible_pin_size),
>> mem.vram.usable_heap_size);
>> mem.cpu_accessible_vram.heap_usage =
>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>> mem.cpu_accessible_vram.max_allocation =
>> mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index 25a68d8888e0..ca85d64a72c2 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -958,7 +958,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
>> *bo, u32 domain,
>> domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
>> if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
>> atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
>> - atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
>> + atomic64_add(amdgpu_bar_mgr_bo_visible_size(bo),
>> &adev->visible_pin_size);
>> } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
>> atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
>> @@ -1009,7 +1009,7 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
>> if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {
>> atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
>> - atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
>> + atomic64_sub(amdgpu_bar_mgr_bo_visible_size(bo),
>> &adev->visible_pin_size);
>> } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
>> atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> index ad490c1e2f57..4e64a035d49d 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> @@ -1899,7 +1899,7 @@ static int amdgpu_ras_badpages_read(struct
>> amdgpu_device *adev,
>> .size = AMDGPU_GPU_PAGE_SIZE,
>> .flags = AMDGPU_RAS_RETIRE_PAGE_RESERVED,
>> };
>> - status =
>> amdgpu_vram_mgr_query_page_status(&adev->mman.vram_mgr,
>> + status = amdgpu_bar_mgr_query_page_status(&adev->mman.vram_mgr,
>> data->bps[i].retired_page);
>> if (status == -EBUSY)
>> (*bps)[i].flags = AMDGPU_RAS_RETIRE_PAGE_PENDING;
>> @@ -2012,7 +2012,7 @@ int amdgpu_ras_add_bad_pages(struct
>> amdgpu_device *adev,
>> goto out;
>> }
>> - amdgpu_vram_mgr_reserve_range(&adev->mman.vram_mgr,
>> + amdgpu_bar_mgr_reserve_range(&adev->mman.vram_mgr,
>> bps[i].retired_page << AMDGPU_GPU_PAGE_SHIFT,
>> AMDGPU_GPU_PAGE_SIZE);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>> index 5c4f93ee0c57..dd2b43acc600 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>> @@ -68,7 +68,7 @@ static inline void amdgpu_res_first(struct
>> ttm_resource *res,
>> switch (cur->mem_type) {
>> case TTM_PL_VRAM:
>> - head = &to_amdgpu_vram_mgr_resource(res)->blocks;
>> + head = &to_amdgpu_bar_mgr_resource(res)->blocks;
>> block = list_first_entry_or_null(head,
>> struct drm_buddy_block,
>> @@ -76,16 +76,16 @@ static inline void amdgpu_res_first(struct
>> ttm_resource *res,
>> if (!block)
>> goto fallback;
>> - while (start >= amdgpu_vram_mgr_block_size(block)) {
>> - start -= amdgpu_vram_mgr_block_size(block);
>> + while (start >= amdgpu_bar_mgr_block_size(block)) {
>> + start -= amdgpu_bar_mgr_block_size(block);
>> next = block->link.next;
>> if (next != head)
>> block = list_entry(next, struct drm_buddy_block,
>> link);
>> }
>> - cur->start = amdgpu_vram_mgr_block_start(block) + start;
>> - cur->size = min(amdgpu_vram_mgr_block_size(block) - start,
>> size);
>> + cur->start = amdgpu_bar_mgr_block_start(block) + start;
>> + cur->size = min(amdgpu_bar_mgr_block_size(block) - start,
>> size);
>> cur->remaining = size;
>> cur->node = block;
>> break;
>> @@ -148,8 +148,8 @@ static inline void amdgpu_res_next(struct
>> amdgpu_res_cursor *cur, uint64_t size)
>> block = list_entry(next, struct drm_buddy_block, link);
>> cur->node = block;
>> - cur->start = amdgpu_vram_mgr_block_start(block);
>> - cur->size = min(amdgpu_vram_mgr_block_size(block),
>> cur->remaining);
>> + cur->start = amdgpu_bar_mgr_block_start(block);
>> + cur->size = min(amdgpu_bar_mgr_block_size(block),
>> cur->remaining);
>> break;
>> case TTM_PL_TT:
>> node = cur->node;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> index 55e0284b2bdd..668826653591 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> @@ -1735,7 +1735,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>> adev->mman.initialized = true;
>> /* Initialize VRAM pool with all of VRAM divided into pages */
>> - r = amdgpu_vram_mgr_init(adev);
>> + r = amdgpu_bar_mgr_init(adev, TTM_PL_VRAM);
>> if (r) {
>> DRM_ERROR("Failed initializing VRAM heap.\n");
>> return r;
>> @@ -1911,7 +1911,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>> drm_dev_exit(idx);
>> }
>> - amdgpu_vram_mgr_fini(adev);
>> + amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
>> amdgpu_gtt_mgr_fini(adev);
>> amdgpu_preempt_mgr_fini(adev);
>> ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> index e2cd5894afc9..a918bbd67004 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> @@ -61,7 +61,7 @@ struct amdgpu_mman {
>> /* Scheduler entity for buffer moves */
>> struct drm_sched_entity entity;
>> - struct amdgpu_vram_mgr vram_mgr;
>> + struct amdgpu_bar_mgr vram_mgr;
>> struct amdgpu_gtt_mgr gtt_mgr;
>> struct ttm_resource_manager preempt_mgr;
>> @@ -107,29 +107,29 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device
>> *adev, uint64_t gtt_size);
>> void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
>> int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
>> void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
>> -int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
>> -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
>> +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain);
>> +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain);
>> bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
>> void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
>> uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
>> -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
>> -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
>> - struct ttm_resource *mem,
>> - u64 offset, u64 size,
>> - struct device *dev,
>> - enum dma_data_direction dir,
>> - struct sg_table **sgt);
>> -void amdgpu_vram_mgr_free_sgt(struct device *dev,
>> - enum dma_data_direction dir,
>> - struct sg_table *sgt);
>> -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
>> -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
>> - uint64_t start, uint64_t size);
>> -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
>> - uint64_t start);
>> +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo);
>> +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
>> + struct ttm_resource *mem,
>> + u64 offset, u64 size,
>> + struct device *dev,
>> + enum dma_data_direction dir,
>> + struct sg_table **sgt);
>> +void amdgpu_bar_mgr_free_sgt(struct device *dev,
>> + enum dma_data_direction dir,
>> + struct sg_table *sgt);
>> +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr);
>> +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
>> + uint64_t start, uint64_t size);
>> +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
>> + uint64_t start);
>> int amdgpu_ttm_init(struct amdgpu_device *adev);
>> void amdgpu_ttm_fini(struct amdgpu_device *adev);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>> index 2994b9db196f..fc9edc3028b6 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>> @@ -599,7 +599,7 @@ static int amdgpu_virt_write_vf2pf_data(struct
>> amdgpu_device *adev)
>> vf2pf_info->fb_usage =
>> ttm_resource_manager_usage(&adev->mman.vram_mgr.manager) >> 20;
>> vf2pf_info->fb_vis_usage =
>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
>> vf2pf_info->fb_size = adev->gmc.real_vram_size >> 20;
>> vf2pf_info->fb_vis_size = adev->gmc.visible_vram_size >> 20;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> index 9fa1d814508a..30d68e3a2469 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>> @@ -31,46 +31,46 @@
>> #include "amdgpu_atomfirmware.h"
>> #include "atom.h"
>> -struct amdgpu_vram_reservation {
>> +struct amdgpu_bar_reservation {
>> u64 start;
>> u64 size;
>> struct list_head allocated;
>> struct list_head blocks;
>> };
>> -static inline struct amdgpu_vram_mgr *
>> -to_vram_mgr(struct ttm_resource_manager *man)
>> +static inline struct amdgpu_bar_mgr *
>> +to_bar_mgr(struct ttm_resource_manager *man)
>> {
>> - return container_of(man, struct amdgpu_vram_mgr, manager);
>> + return container_of(man, struct amdgpu_bar_mgr, manager);
>> }
>> static inline struct amdgpu_device *
>> -to_amdgpu_device(struct amdgpu_vram_mgr *mgr)
>> +to_amdgpu_device(struct amdgpu_bar_mgr *mgr)
>> {
>> return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
>> }
>> static inline struct drm_buddy_block *
>> -amdgpu_vram_mgr_first_block(struct list_head *list)
>> +amdgpu_bar_mgr_first_block(struct list_head *list)
>> {
>> return list_first_entry_or_null(list, struct drm_buddy_block,
>> link);
>> }
>> -static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct
>> list_head *head)
>> +static inline bool amdgpu_is_bar_mgr_blocks_contiguous(struct
>> list_head *head)
>> {
>> struct drm_buddy_block *block;
>> u64 start, size;
>> - block = amdgpu_vram_mgr_first_block(head);
>> + block = amdgpu_bar_mgr_first_block(head);
>> if (!block)
>> return false;
>> while (head != block->link.next) {
>> - start = amdgpu_vram_mgr_block_start(block);
>> - size = amdgpu_vram_mgr_block_size(block);
>> + start = amdgpu_bar_mgr_block_start(block);
>> + size = amdgpu_bar_mgr_block_size(block);
>> block = list_entry(block->link.next, struct
>> drm_buddy_block, link);
>> - if (start + size != amdgpu_vram_mgr_block_start(block))
>> + if (start + size != amdgpu_bar_mgr_block_start(block))
>> return false;
>> }
>> @@ -100,7 +100,7 @@ static ssize_t
>> amdgpu_mem_info_vram_total_show(struct device *dev,
>> * DOC: mem_info_vis_vram_total
>> *
>> * The amdgpu driver provides a sysfs API for reporting current total
>> - * visible VRAM available on the device
>> + * visible BAR available on the device
>> * The file mem_info_vis_vram_total is used for this and returns
>> the total
>> * amount of visible VRAM in bytes
>> */
>> @@ -148,7 +148,7 @@ static ssize_t
>> amdgpu_mem_info_vis_vram_used_show(struct device *dev,
>> struct amdgpu_device *adev = drm_to_adev(ddev);
>> return sysfs_emit(buf, "%llu\n",
>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr));
>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr));
>> }
>> /**
>> @@ -203,7 +203,7 @@ static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
>> static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
>> amdgpu_mem_info_vram_vendor, NULL);
>> -static struct attribute *amdgpu_vram_mgr_attributes[] = {
>> +static struct attribute *amdgpu_bar_mgr_attributes[] = {
>> &dev_attr_mem_info_vram_total.attr,
>> &dev_attr_mem_info_vis_vram_total.attr,
>> &dev_attr_mem_info_vram_used.attr,
>> @@ -212,23 +212,23 @@ static struct attribute
>> *amdgpu_vram_mgr_attributes[] = {
>> NULL
>> };
>> -const struct attribute_group amdgpu_vram_mgr_attr_group = {
>> - .attrs = amdgpu_vram_mgr_attributes
>> +const struct attribute_group amdgpu_bar_mgr_attr_group = {
>> + .attrs = amdgpu_bar_mgr_attributes
>> };
>> /**
>> - * amdgpu_vram_mgr_vis_size - Calculate visible block size
>> + * amdgpu_bar_mgr_vis_size - Calculate visible block size
>> *
>> * @adev: amdgpu_device pointer
>> * @block: DRM BUDDY block structure
>> *
>> * Calculate how many bytes of the DRM BUDDY block are inside
>> visible VRAM
>> */
>> -static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
>> +static u64 amdgpu_bar_mgr_vis_size(struct amdgpu_device *adev,
>> struct drm_buddy_block *block)
>> {
>> - u64 start = amdgpu_vram_mgr_block_start(block);
>> - u64 end = start + amdgpu_vram_mgr_block_size(block);
>> + u64 start = amdgpu_bar_mgr_block_start(block);
>> + u64 end = start + amdgpu_bar_mgr_block_size(block);
>> if (start >= adev->gmc.visible_vram_size)
>> return 0;
>> @@ -238,18 +238,18 @@ static u64 amdgpu_vram_mgr_vis_size(struct
>> amdgpu_device *adev,
>> }
>> /**
>> - * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size
>> + * amdgpu_bar_mgr_bo_visible_size - CPU visible BO size
>> *
>> * @bo: &amdgpu_bo buffer object (must be in VRAM)
>> *
>> * Returns:
>> * How much of the given &amdgpu_bo buffer object lies in CPU
>> visible VRAM.
>> */
>> -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
>> +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo)
>> {
>> struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
>> struct ttm_resource *res = bo->tbo.resource;
>> - struct amdgpu_vram_mgr_resource *vres =
>> to_amdgpu_vram_mgr_resource(res);
>> + struct amdgpu_bar_mgr_resource *vres =
>> to_amdgpu_bar_mgr_resource(res);
>> struct drm_buddy_block *block;
>> u64 usage = 0;
>> @@ -260,18 +260,18 @@ u64 amdgpu_vram_mgr_bo_visible_size(struct
>> amdgpu_bo *bo)
>> return 0;
>> list_for_each_entry(block, &vres->blocks, link)
>> - usage += amdgpu_vram_mgr_vis_size(adev, block);
>> + usage += amdgpu_bar_mgr_vis_size(adev, block);
>> return usage;
>> }
>> /* Commit the reservation of VRAM pages */
>> -static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager
>> *man)
>> +static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager *man)
>> {
>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>> struct amdgpu_device *adev = to_amdgpu_device(mgr);
>> struct drm_buddy *mm = &mgr->mm;
>> - struct amdgpu_vram_reservation *rsv, *temp;
>> + struct amdgpu_bar_reservation *rsv, *temp;
>> struct drm_buddy_block *block;
>> uint64_t vis_usage;
>> @@ -281,14 +281,14 @@ static void amdgpu_vram_mgr_do_reserve(struct
>> ttm_resource_manager *man)
>> DRM_BUDDY_RANGE_ALLOCATION))
>> continue;
>> - block = amdgpu_vram_mgr_first_block(&rsv->allocated);
>> + block = amdgpu_bar_mgr_first_block(&rsv->allocated);
>> if (!block)
>> continue;
>> dev_dbg(adev->dev, "Reservation 0x%llx - %lld, Succeeded\n",
>> rsv->start, rsv->size);
>> - vis_usage = amdgpu_vram_mgr_vis_size(adev, block);
>> + vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
>> atomic64_add(vis_usage, &mgr->vis_usage);
>> spin_lock(&man->bdev->lru_lock);
>> man->usage += rsv->size;
>> @@ -298,18 +298,18 @@ static void amdgpu_vram_mgr_do_reserve(struct
>> ttm_resource_manager *man)
>> }
>> /**
>> - * amdgpu_vram_mgr_reserve_range - Reserve a range from VRAM
>> + * amdgpu_bar_mgr_reserve_range - Reserve a range from VRAM
>> *
>> - * @mgr: amdgpu_vram_mgr pointer
>> + * @mgr: amdgpu_bar_mgr pointer
>> * @start: start address of the range in VRAM
>> * @size: size of the range
>> *
>> * Reserve memory from start address with the specified size in VRAM
>> */
>> -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
>> +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
>> uint64_t start, uint64_t size)
>> {
>> - struct amdgpu_vram_reservation *rsv;
>> + struct amdgpu_bar_reservation *rsv;
>> rsv = kzalloc(sizeof(*rsv), GFP_KERNEL);
>> if (!rsv)
>> @@ -323,16 +323,16 @@ int amdgpu_vram_mgr_reserve_range(struct
>> amdgpu_vram_mgr *mgr,
>> mutex_lock(&mgr->lock);
>> list_add_tail(&rsv->blocks, &mgr->reservations_pending);
>> - amdgpu_vram_mgr_do_reserve(&mgr->manager);
>> + amdgpu_bar_mgr_do_reserve(&mgr->manager);
>> mutex_unlock(&mgr->lock);
>> return 0;
>> }
>> /**
>> - * amdgpu_vram_mgr_query_page_status - query the reservation status
>> + * amdgpu_bar_mgr_query_page_status - query the reservation status
>> *
>> - * @mgr: amdgpu_vram_mgr pointer
>> + * @mgr: amdgpu_bar_mgr pointer
>> * @start: start address of a page in VRAM
>> *
>> * Returns:
>> @@ -340,10 +340,10 @@ int amdgpu_vram_mgr_reserve_range(struct
>> amdgpu_vram_mgr *mgr,
>> * 0: the page has been reserved
>> * -ENOENT: the input page is not a reservation
>> */
>> -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
>> +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
>> uint64_t start)
>> {
>> - struct amdgpu_vram_reservation *rsv;
>> + struct amdgpu_bar_reservation *rsv;
>> int ret;
>> mutex_lock(&mgr->lock);
>> @@ -371,7 +371,7 @@ int amdgpu_vram_mgr_query_page_status(struct
>> amdgpu_vram_mgr *mgr,
>> }
>> /**
>> - * amdgpu_vram_mgr_new - allocate new ranges
>> + * amdgpu_bar_mgr_new - allocate new ranges
>> *
>> * @man: TTM memory type manager
>> * @tbo: TTM BO we need this range for
>> @@ -380,15 +380,15 @@ int amdgpu_vram_mgr_query_page_status(struct
>> amdgpu_vram_mgr *mgr,
>> *
>> * Allocate VRAM for the given BO.
>> */
>> -static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
>> +static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
>> struct ttm_buffer_object *tbo,
>> const struct ttm_place *place,
>> struct ttm_resource **res)
>> {
>> u64 vis_usage = 0, max_bytes, cur_size, min_block_size;
>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>> struct amdgpu_device *adev = to_amdgpu_device(mgr);
>> - struct amdgpu_vram_mgr_resource *vres;
>> + struct amdgpu_bar_mgr_resource *vres;
>> u64 size, remaining_size, lpfn, fpfn;
>> struct drm_buddy *mm = &mgr->mm;
>> struct drm_buddy_block *block;
>> @@ -512,7 +512,7 @@ static int amdgpu_vram_mgr_new(struct
>> ttm_resource_manager *man,
>> * Compute the original_size value by subtracting the
>> * last block size with (aligned size - original size)
>> */
>> - original_size = amdgpu_vram_mgr_block_size(block) -
>> (size - cur_size);
>> + original_size = amdgpu_bar_mgr_block_size(block) - (size
>> - cur_size);
>> }
>> mutex_lock(&mgr->lock);
>> @@ -529,8 +529,8 @@ static int amdgpu_vram_mgr_new(struct
>> ttm_resource_manager *man,
>> list_for_each_entry(block, &vres->blocks, link) {
>> unsigned long start;
>> - start = amdgpu_vram_mgr_block_start(block) +
>> - amdgpu_vram_mgr_block_size(block);
>> + start = amdgpu_bar_mgr_block_start(block) +
>> + amdgpu_bar_mgr_block_size(block);
>> start >>= PAGE_SHIFT;
>> if (start > PFN_UP(vres->base.size))
>> @@ -539,10 +539,10 @@ static int amdgpu_vram_mgr_new(struct
>> ttm_resource_manager *man,
>> start = 0;
>> vres->base.start = max(vres->base.start, start);
>> - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
>> + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
>> }
>> - if (amdgpu_is_vram_mgr_blocks_contiguous(&vres->blocks))
>> + if (amdgpu_is_bar_mgr_blocks_contiguous(&vres->blocks))
>> vres->base.placement |= TTM_PL_FLAG_CONTIGUOUS;
>> if (adev->gmc.xgmi.connected_to_cpu)
>> @@ -565,18 +565,18 @@ static int amdgpu_vram_mgr_new(struct
>> ttm_resource_manager *man,
>> }
>> /**
>> - * amdgpu_vram_mgr_del - free ranges
>> + * amdgpu_bar_mgr_del - free ranges
>> *
>> * @man: TTM memory type manager
>> * @res: TTM memory object
>> *
>> * Free the allocated VRAM again.
>> */
>> -static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
>> +static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
>> struct ttm_resource *res)
>> {
>> - struct amdgpu_vram_mgr_resource *vres =
>> to_amdgpu_vram_mgr_resource(res);
>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>> + struct amdgpu_bar_mgr_resource *vres =
>> to_amdgpu_bar_mgr_resource(res);
>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>> struct amdgpu_device *adev = to_amdgpu_device(mgr);
>> struct drm_buddy *mm = &mgr->mm;
>> struct drm_buddy_block *block;
>> @@ -584,9 +584,9 @@ static void amdgpu_vram_mgr_del(struct
>> ttm_resource_manager *man,
>> mutex_lock(&mgr->lock);
>> list_for_each_entry(block, &vres->blocks, link)
>> - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
>> + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
>> - amdgpu_vram_mgr_do_reserve(man);
>> + amdgpu_bar_mgr_do_reserve(man);
>> drm_buddy_free_list(mm, &vres->blocks);
>> mutex_unlock(&mgr->lock);
>> @@ -598,7 +598,7 @@ static void amdgpu_vram_mgr_del(struct
>> ttm_resource_manager *man,
>> }
>> /**
>> - * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table
>> + * amdgpu_bar_mgr_alloc_sgt - allocate and fill a sg table
>> *
>> * @adev: amdgpu device pointer
>> * @res: TTM memory object
>> @@ -610,7 +610,7 @@ static void amdgpu_vram_mgr_del(struct
>> ttm_resource_manager *man,
>> *
>> * Allocate and fill a sg table from a VRAM allocation.
>> */
>> -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
>> +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
>> struct ttm_resource *res,
>> u64 offset, u64 length,
>> struct device *dev,
>> @@ -685,7 +685,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct
>> amdgpu_device *adev,
>> }
>> /**
>> - * amdgpu_vram_mgr_free_sgt - allocate and fill a sg table
>> + * amdgpu_bar_mgr_free_sgt - allocate and fill a sg table
>> *
>> * @dev: device pointer
>> * @dir: data direction of resource to unmap
>> @@ -693,7 +693,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct
>> amdgpu_device *adev,
>> *
>> * Free a previously allocate sg table.
>> */
>> -void amdgpu_vram_mgr_free_sgt(struct device *dev,
>> +void amdgpu_bar_mgr_free_sgt(struct device *dev,
>> enum dma_data_direction dir,
>> struct sg_table *sgt)
>> {
>> @@ -709,19 +709,19 @@ void amdgpu_vram_mgr_free_sgt(struct device *dev,
>> }
>> /**
>> - * amdgpu_vram_mgr_vis_usage - how many bytes are used in the
>> visible part
>> + * amdgpu_bar_mgr_vis_usage - how many bytes are used in the visible
>> part
>> *
>> - * @mgr: amdgpu_vram_mgr pointer
>> + * @mgr: amdgpu_bar_mgr pointer
>> *
>> * Returns how many bytes are used in the visible part of VRAM
>> */
>> -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
>> +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr)
>> {
>> return atomic64_read(&mgr->vis_usage);
>> }
>> /**
>> - * amdgpu_vram_mgr_intersects - test each drm buddy block for
>> intersection
>> + * amdgpu_bar_mgr_intersects - test each drm buddy block for
>> intersection
>> *
>> * @man: TTM memory type manager
>> * @res: The resource to test
>> @@ -730,20 +730,20 @@ uint64_t amdgpu_vram_mgr_vis_usage(struct
>> amdgpu_vram_mgr *mgr)
>> *
>> * Test each drm buddy block for intersection for eviction decision.
>> */
>> -static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager
>> *man,
>> +static bool amdgpu_bar_mgr_intersects(struct ttm_resource_manager *man,
>> struct ttm_resource *res,
>> const struct ttm_place *place,
>> size_t size)
>> {
>> - struct amdgpu_vram_mgr_resource *mgr =
>> to_amdgpu_vram_mgr_resource(res);
>> + struct amdgpu_bar_mgr_resource *mgr =
>> to_amdgpu_bar_mgr_resource(res);
>> struct drm_buddy_block *block;
>> /* Check each drm buddy block individually */
>> list_for_each_entry(block, &mgr->blocks, link) {
>> unsigned long fpfn =
>> - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
>> + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
>> unsigned long lpfn = fpfn +
>> - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
>> + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
>> if (place->fpfn < lpfn &&
>> (!place->lpfn || place->lpfn > fpfn))
>> @@ -754,7 +754,7 @@ static bool amdgpu_vram_mgr_intersects(struct
>> ttm_resource_manager *man,
>> }
>> /**
>> - * amdgpu_vram_mgr_compatible - test each drm buddy block for
>> compatibility
>> + * amdgpu_bar_mgr_compatible - test each drm buddy block for
>> compatibility
>> *
>> * @man: TTM memory type manager
>> * @res: The resource to test
>> @@ -763,20 +763,20 @@ static bool amdgpu_vram_mgr_intersects(struct
>> ttm_resource_manager *man,
>> *
>> * Test each drm buddy block for placement compatibility.
>> */
>> -static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager
>> *man,
>> +static bool amdgpu_bar_mgr_compatible(struct ttm_resource_manager *man,
>> struct ttm_resource *res,
>> const struct ttm_place *place,
>> size_t size)
>> {
>> - struct amdgpu_vram_mgr_resource *mgr =
>> to_amdgpu_vram_mgr_resource(res);
>> + struct amdgpu_bar_mgr_resource *mgr =
>> to_amdgpu_bar_mgr_resource(res);
>> struct drm_buddy_block *block;
>> /* Check each drm buddy block individually */
>> list_for_each_entry(block, &mgr->blocks, link) {
>> unsigned long fpfn =
>> - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
>> + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
>> unsigned long lpfn = fpfn +
>> - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
>> + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
>> if (fpfn < place->fpfn ||
>> (place->lpfn && lpfn > place->lpfn))
>> @@ -787,22 +787,22 @@ static bool amdgpu_vram_mgr_compatible(struct
>> ttm_resource_manager *man,
>> }
>> /**
>> - * amdgpu_vram_mgr_debug - dump VRAM table
>> + * amdgpu_bar_mgr_debug - dump VRAM table
>> *
>> * @man: TTM memory type manager
>> * @printer: DRM printer to use
>> *
>> * Dump the table content using printk.
>> */
>> -static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
>> +static void amdgpu_bar_mgr_debug(struct ttm_resource_manager *man,
>> struct drm_printer *printer)
>> {
>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>> struct drm_buddy *mm = &mgr->mm;
>> struct drm_buddy_block *block;
>> drm_printf(printer, " vis usage:%llu\n",
>> - amdgpu_vram_mgr_vis_usage(mgr));
>> + amdgpu_bar_mgr_vis_usage(mgr));
>> mutex_lock(&mgr->lock);
>> drm_printf(printer, "default_page_size: %lluKiB\n",
>> @@ -816,31 +816,38 @@ static void amdgpu_vram_mgr_debug(struct
>> ttm_resource_manager *man,
>> mutex_unlock(&mgr->lock);
>> }
>> -static const struct ttm_resource_manager_func amdgpu_vram_mgr_func
>> = {
>> - .alloc = amdgpu_vram_mgr_new,
>> - .free = amdgpu_vram_mgr_del,
>> - .intersects = amdgpu_vram_mgr_intersects,
>> - .compatible = amdgpu_vram_mgr_compatible,
>> - .debug = amdgpu_vram_mgr_debug
>> +static const struct ttm_resource_manager_func amdgpu_bar_mgr_func = {
>> + .alloc = amdgpu_bar_mgr_new,
>> + .free = amdgpu_bar_mgr_del,
>> + .intersects = amdgpu_bar_mgr_intersects,
>> + .compatible = amdgpu_bar_mgr_compatible,
>> + .debug = amdgpu_bar_mgr_debug
>> };
>> /**
>> - * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
>> + * amdgpu_bar_mgr_init - init BAR manager and DRM MM
>> *
>> * @adev: amdgpu_device pointer
>> + * @domain: memory domain to initialize
>> *
>> * Allocate and initialize the VRAM manager.
>> */
>> -int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
>> +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
>> {
>> - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
>> - struct ttm_resource_manager *man = &mgr->manager;
>> + struct amdgpu_bar_mgr *mgr;
>> + struct ttm_resource_manager *man;
>> int err;
>> + if (domain != TTM_PL_VRAM)
>> + return -EINVAL;
>> +
>> + mgr = &adev->mman.vram_mgr;
>> + man = &mgr->manager;
>> +
>> ttm_resource_manager_init(man, &adev->mman.bdev,
>> adev->gmc.real_vram_size);
>> - man->func = &amdgpu_vram_mgr_func;
>> + man->func = &amdgpu_bar_mgr_func;
>> err = drm_buddy_init(&mgr->mm, man->size, PAGE_SIZE);
>> if (err)
>> @@ -851,25 +858,32 @@ int amdgpu_vram_mgr_init(struct amdgpu_device
>> *adev)
>> INIT_LIST_HEAD(&mgr->reserved_pages);
>> mgr->default_page_size = PAGE_SIZE;
>> - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM,
>> &mgr->manager);
>> + ttm_set_driver_manager(&adev->mman.bdev, domain, &mgr->manager);
>> ttm_resource_manager_set_used(man, true);
>> return 0;
>> }
>> /**
>> - * amdgpu_vram_mgr_fini - free and destroy VRAM manager
>> + * amdgpu_bar_mgr_fini - free and destroy VRAM manager
>> *
>> * @adev: amdgpu_device pointer
>> + * @domain: memory domain to destroy
>> *
>> - * Destroy and free the VRAM manager, returns -EBUSY if ranges are
>> still
>> + * Destroy and free the BAR manager, returns -EBUSY if ranges are still
>> * allocated inside it.
>> */
>> -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
>> +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain)
>> {
>> - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
>> - struct ttm_resource_manager *man = &mgr->manager;
>> + struct amdgpu_bar_mgr *mgr;
>> + struct ttm_resource_manager *man;
>> int ret;
>> - struct amdgpu_vram_reservation *rsv, *temp;
>> + struct amdgpu_bar_reservation *rsv, *temp;
>> +
>> + if (domain != TTM_PL_VRAM)
>> + return;
>> +
>> + mgr = &adev->mman.vram_mgr;
>> + man = &mgr->manager;
>> ttm_resource_manager_set_used(man, false);
>> @@ -889,5 +903,5 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device
>> *adev)
>> mutex_unlock(&mgr->lock);
>> ttm_resource_manager_cleanup(man);
>> - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL);
>> + ttm_set_driver_manager(&adev->mman.bdev, domain, NULL);
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>> index 0e04e42cf809..241faba5ae55 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>> @@ -21,12 +21,12 @@
>> *
>> */
>> -#ifndef __AMDGPU_VRAM_MGR_H__
>> -#define __AMDGPU_VRAM_MGR_H__
>> +#ifndef __AMDGPU_BAR_MGR_H__
>> +#define __AMDGPU_BAR_MGR_H__
>> #include <drm/drm_buddy.h>
>> -struct amdgpu_vram_mgr {
>> +struct amdgpu_bar_mgr {
>> struct ttm_resource_manager manager;
>> struct drm_buddy mm;
>> /* protects access to buffer objects */
>> @@ -37,26 +37,26 @@ struct amdgpu_vram_mgr {
>> u64 default_page_size;
>> };
>> -struct amdgpu_vram_mgr_resource {
>> +struct amdgpu_bar_mgr_resource {
>> struct ttm_resource base;
>> struct list_head blocks;
>> unsigned long flags;
>> };
>> -static inline u64 amdgpu_vram_mgr_block_start(struct
>> drm_buddy_block *block)
>> +static inline u64 amdgpu_bar_mgr_block_start(struct drm_buddy_block
>> *block)
>> {
>> return drm_buddy_block_offset(block);
>> }
>> -static inline u64 amdgpu_vram_mgr_block_size(struct
>> drm_buddy_block *block)
>> +static inline u64 amdgpu_bar_mgr_block_size(struct drm_buddy_block
>> *block)
>> {
>> return (u64)PAGE_SIZE << drm_buddy_block_order(block);
>> }
>> -static inline struct amdgpu_vram_mgr_resource *
>> -to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
>> +static inline struct amdgpu_bar_mgr_resource *
>> +to_amdgpu_bar_mgr_resource(struct ttm_resource *res)
>> {
>> - return container_of(res, struct amdgpu_vram_mgr_resource, base);
>> + return container_of(res, struct amdgpu_bar_mgr_resource, base);
>> }
>> #endif
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr
2023-02-06 15:34 ` Shashank Sharma
@ 2023-02-06 16:03 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 16:03 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 06.02.23 um 16:34 schrieb Shashank Sharma:
>
> On 06/02/2023 12:20, Christian König wrote:
>> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
>>> From: Alex Deucher <alexander.deucher@amd.com>
>>>
>>> Rename the VRAM manager functions so they can be resused to manage
>>> doorbell BAR as well.
>>
>> Yeah, as said before Alex did this before we had the buddy allocator.
>>
>> This doesn't makes sense any more and should probably be dropped
>> completely.
>>
>> Christian.
>
>
> Yeah, I was wondering if we just not use the buddy-allocation for
> doorbell, but still separate out the VRAM vs DB function, would that
> make better sense ?
Nope. One of the main reasons we have a separate buddy based manager for
VRAM is that we have CPU visible vs invisible areas.
For the doorbell we simply don't have any of that, so the additional
complexity is just superfluous and will sooner or later cause trouble.
Christian.
>
> - Shashank
>
>
>>
>>>
>>> Cc: Christian Koenig <christian.koenig@amd.com>
>>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>>> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 8 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +-
>>> .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 14 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 36 ++--
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 200
>>> ++++++++++--------
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 18 +-
>>> 12 files changed, 157 insertions(+), 143 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> index 7b5ce00f0602..e34eae8d64cf 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> @@ -723,7 +723,7 @@ static void
>>> amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev,
>>> if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) {
>>> u64 total_vis_vram = adev->gmc.visible_vram_size;
>>> u64 used_vis_vram =
>>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
>>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>>> if (used_vis_vram < total_vis_vram) {
>>> u64 free_vis_vram = total_vis_vram - used_vis_vram;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>>> index 271e30e34d93..c48ccde281c3 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
>>> @@ -179,9 +179,9 @@ static struct sg_table
>>> *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
>>> break;
>>> case TTM_PL_VRAM:
>>> - r = amdgpu_vram_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
>>> - bo->tbo.base.size, attach->dev,
>>> - dir, &sgt);
>>> + r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
>>> + bo->tbo.base.size, attach->dev,
>>> + dir, &sgt);
>>> if (r)
>>> return ERR_PTR(r);
>>> break;
>>> @@ -215,7 +215,7 @@ static void amdgpu_dma_buf_unmap(struct
>>> dma_buf_attachment *attach,
>>> sg_free_table(sgt);
>>> kfree(sgt);
>>> } else {
>>> - amdgpu_vram_mgr_free_sgt(attach->dev, dir, sgt);
>>> + amdgpu_bar_mgr_free_sgt(attach->dev, dir, sgt);
>>> }
>>> }
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>>> index cd4caaa29528..9f148ea7ca66 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>>> @@ -2807,12 +2807,12 @@ static struct pci_error_handlers
>>> amdgpu_pci_err_handler = {
>>> .resume = amdgpu_pci_resume,
>>> };
>>> -extern const struct attribute_group amdgpu_vram_mgr_attr_group;
>>> +extern const struct attribute_group amdgpu_bar_mgr_attr_group;
>>> extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
>>> extern const struct attribute_group amdgpu_vbios_version_attr_group;
>>> static const struct attribute_group *amdgpu_sysfs_groups[] = {
>>> - &amdgpu_vram_mgr_attr_group,
>>> + &amdgpu_bar_mgr_attr_group,
>>> &amdgpu_gtt_mgr_attr_group,
>>> &amdgpu_vbios_version_attr_group,
>>> NULL,
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> index 7aa7e52ca784..2ce11434fb22 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> @@ -650,7 +650,7 @@ int amdgpu_info_ioctl(struct drm_device *dev,
>>> void *data, struct drm_file *filp)
>>> ui64 =
>>> ttm_resource_manager_usage(&adev->mman.vram_mgr.manager);
>>> return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
>>> case AMDGPU_INFO_VIS_VRAM_USAGE:
>>> - ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
>>> + ui64 = amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>>> return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
>>> case AMDGPU_INFO_GTT_USAGE:
>>> ui64 =
>>> ttm_resource_manager_usage(&adev->mman.gtt_mgr.manager);
>>> @@ -704,7 +704,7 @@ int amdgpu_info_ioctl(struct drm_device *dev,
>>> void *data, struct drm_file *filp)
>>> atomic64_read(&adev->visible_pin_size),
>>> mem.vram.usable_heap_size);
>>> mem.cpu_accessible_vram.heap_usage =
>>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
>>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
>>> mem.cpu_accessible_vram.max_allocation =
>>> mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> index 25a68d8888e0..ca85d64a72c2 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> @@ -958,7 +958,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
>>> *bo, u32 domain,
>>> domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
>>> if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
>>> atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
>>> - atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
>>> + atomic64_add(amdgpu_bar_mgr_bo_visible_size(bo),
>>> &adev->visible_pin_size);
>>> } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
>>> atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
>>> @@ -1009,7 +1009,7 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
>>> if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {
>>> atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
>>> - atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
>>> + atomic64_sub(amdgpu_bar_mgr_bo_visible_size(bo),
>>> &adev->visible_pin_size);
>>> } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
>>> atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>>> index ad490c1e2f57..4e64a035d49d 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>>> @@ -1899,7 +1899,7 @@ static int amdgpu_ras_badpages_read(struct
>>> amdgpu_device *adev,
>>> .size = AMDGPU_GPU_PAGE_SIZE,
>>> .flags = AMDGPU_RAS_RETIRE_PAGE_RESERVED,
>>> };
>>> - status =
>>> amdgpu_vram_mgr_query_page_status(&adev->mman.vram_mgr,
>>> + status =
>>> amdgpu_bar_mgr_query_page_status(&adev->mman.vram_mgr,
>>> data->bps[i].retired_page);
>>> if (status == -EBUSY)
>>> (*bps)[i].flags = AMDGPU_RAS_RETIRE_PAGE_PENDING;
>>> @@ -2012,7 +2012,7 @@ int amdgpu_ras_add_bad_pages(struct
>>> amdgpu_device *adev,
>>> goto out;
>>> }
>>> - amdgpu_vram_mgr_reserve_range(&adev->mman.vram_mgr,
>>> + amdgpu_bar_mgr_reserve_range(&adev->mman.vram_mgr,
>>> bps[i].retired_page << AMDGPU_GPU_PAGE_SHIFT,
>>> AMDGPU_GPU_PAGE_SIZE);
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>>> index 5c4f93ee0c57..dd2b43acc600 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
>>> @@ -68,7 +68,7 @@ static inline void amdgpu_res_first(struct
>>> ttm_resource *res,
>>> switch (cur->mem_type) {
>>> case TTM_PL_VRAM:
>>> - head = &to_amdgpu_vram_mgr_resource(res)->blocks;
>>> + head = &to_amdgpu_bar_mgr_resource(res)->blocks;
>>> block = list_first_entry_or_null(head,
>>> struct drm_buddy_block,
>>> @@ -76,16 +76,16 @@ static inline void amdgpu_res_first(struct
>>> ttm_resource *res,
>>> if (!block)
>>> goto fallback;
>>> - while (start >= amdgpu_vram_mgr_block_size(block)) {
>>> - start -= amdgpu_vram_mgr_block_size(block);
>>> + while (start >= amdgpu_bar_mgr_block_size(block)) {
>>> + start -= amdgpu_bar_mgr_block_size(block);
>>> next = block->link.next;
>>> if (next != head)
>>> block = list_entry(next, struct drm_buddy_block,
>>> link);
>>> }
>>> - cur->start = amdgpu_vram_mgr_block_start(block) + start;
>>> - cur->size = min(amdgpu_vram_mgr_block_size(block) - start,
>>> size);
>>> + cur->start = amdgpu_bar_mgr_block_start(block) + start;
>>> + cur->size = min(amdgpu_bar_mgr_block_size(block) - start,
>>> size);
>>> cur->remaining = size;
>>> cur->node = block;
>>> break;
>>> @@ -148,8 +148,8 @@ static inline void amdgpu_res_next(struct
>>> amdgpu_res_cursor *cur, uint64_t size)
>>> block = list_entry(next, struct drm_buddy_block, link);
>>> cur->node = block;
>>> - cur->start = amdgpu_vram_mgr_block_start(block);
>>> - cur->size = min(amdgpu_vram_mgr_block_size(block),
>>> cur->remaining);
>>> + cur->start = amdgpu_bar_mgr_block_start(block);
>>> + cur->size = min(amdgpu_bar_mgr_block_size(block),
>>> cur->remaining);
>>> break;
>>> case TTM_PL_TT:
>>> node = cur->node;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> index 55e0284b2bdd..668826653591 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> @@ -1735,7 +1735,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>>> adev->mman.initialized = true;
>>> /* Initialize VRAM pool with all of VRAM divided into pages */
>>> - r = amdgpu_vram_mgr_init(adev);
>>> + r = amdgpu_bar_mgr_init(adev, TTM_PL_VRAM);
>>> if (r) {
>>> DRM_ERROR("Failed initializing VRAM heap.\n");
>>> return r;
>>> @@ -1911,7 +1911,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>>> drm_dev_exit(idx);
>>> }
>>> - amdgpu_vram_mgr_fini(adev);
>>> + amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
>>> amdgpu_gtt_mgr_fini(adev);
>>> amdgpu_preempt_mgr_fini(adev);
>>> ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>>> index e2cd5894afc9..a918bbd67004 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>>> @@ -61,7 +61,7 @@ struct amdgpu_mman {
>>> /* Scheduler entity for buffer moves */
>>> struct drm_sched_entity entity;
>>> - struct amdgpu_vram_mgr vram_mgr;
>>> + struct amdgpu_bar_mgr vram_mgr;
>>> struct amdgpu_gtt_mgr gtt_mgr;
>>> struct ttm_resource_manager preempt_mgr;
>>> @@ -107,29 +107,29 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device
>>> *adev, uint64_t gtt_size);
>>> void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
>>> int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
>>> void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
>>> -int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
>>> -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
>>> +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain);
>>> +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain);
>>> bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
>>> void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
>>> uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager
>>> *man);
>>> -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
>>> -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
>>> - struct ttm_resource *mem,
>>> - u64 offset, u64 size,
>>> - struct device *dev,
>>> - enum dma_data_direction dir,
>>> - struct sg_table **sgt);
>>> -void amdgpu_vram_mgr_free_sgt(struct device *dev,
>>> - enum dma_data_direction dir,
>>> - struct sg_table *sgt);
>>> -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
>>> -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
>>> - uint64_t start, uint64_t size);
>>> -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
>>> - uint64_t start);
>>> +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo);
>>> +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
>>> + struct ttm_resource *mem,
>>> + u64 offset, u64 size,
>>> + struct device *dev,
>>> + enum dma_data_direction dir,
>>> + struct sg_table **sgt);
>>> +void amdgpu_bar_mgr_free_sgt(struct device *dev,
>>> + enum dma_data_direction dir,
>>> + struct sg_table *sgt);
>>> +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr);
>>> +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
>>> + uint64_t start, uint64_t size);
>>> +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
>>> + uint64_t start);
>>> int amdgpu_ttm_init(struct amdgpu_device *adev);
>>> void amdgpu_ttm_fini(struct amdgpu_device *adev);
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> index 2994b9db196f..fc9edc3028b6 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> @@ -599,7 +599,7 @@ static int amdgpu_virt_write_vf2pf_data(struct
>>> amdgpu_device *adev)
>>> vf2pf_info->fb_usage =
>>> ttm_resource_manager_usage(&adev->mman.vram_mgr.manager) >> 20;
>>> vf2pf_info->fb_vis_usage =
>>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
>>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
>>> vf2pf_info->fb_size = adev->gmc.real_vram_size >> 20;
>>> vf2pf_info->fb_vis_size = adev->gmc.visible_vram_size >> 20;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>>> index 9fa1d814508a..30d68e3a2469 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
>>> @@ -31,46 +31,46 @@
>>> #include "amdgpu_atomfirmware.h"
>>> #include "atom.h"
>>> -struct amdgpu_vram_reservation {
>>> +struct amdgpu_bar_reservation {
>>> u64 start;
>>> u64 size;
>>> struct list_head allocated;
>>> struct list_head blocks;
>>> };
>>> -static inline struct amdgpu_vram_mgr *
>>> -to_vram_mgr(struct ttm_resource_manager *man)
>>> +static inline struct amdgpu_bar_mgr *
>>> +to_bar_mgr(struct ttm_resource_manager *man)
>>> {
>>> - return container_of(man, struct amdgpu_vram_mgr, manager);
>>> + return container_of(man, struct amdgpu_bar_mgr, manager);
>>> }
>>> static inline struct amdgpu_device *
>>> -to_amdgpu_device(struct amdgpu_vram_mgr *mgr)
>>> +to_amdgpu_device(struct amdgpu_bar_mgr *mgr)
>>> {
>>> return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
>>> }
>>> static inline struct drm_buddy_block *
>>> -amdgpu_vram_mgr_first_block(struct list_head *list)
>>> +amdgpu_bar_mgr_first_block(struct list_head *list)
>>> {
>>> return list_first_entry_or_null(list, struct drm_buddy_block,
>>> link);
>>> }
>>> -static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct
>>> list_head *head)
>>> +static inline bool amdgpu_is_bar_mgr_blocks_contiguous(struct
>>> list_head *head)
>>> {
>>> struct drm_buddy_block *block;
>>> u64 start, size;
>>> - block = amdgpu_vram_mgr_first_block(head);
>>> + block = amdgpu_bar_mgr_first_block(head);
>>> if (!block)
>>> return false;
>>> while (head != block->link.next) {
>>> - start = amdgpu_vram_mgr_block_start(block);
>>> - size = amdgpu_vram_mgr_block_size(block);
>>> + start = amdgpu_bar_mgr_block_start(block);
>>> + size = amdgpu_bar_mgr_block_size(block);
>>> block = list_entry(block->link.next, struct
>>> drm_buddy_block, link);
>>> - if (start + size != amdgpu_vram_mgr_block_start(block))
>>> + if (start + size != amdgpu_bar_mgr_block_start(block))
>>> return false;
>>> }
>>> @@ -100,7 +100,7 @@ static ssize_t
>>> amdgpu_mem_info_vram_total_show(struct device *dev,
>>> * DOC: mem_info_vis_vram_total
>>> *
>>> * The amdgpu driver provides a sysfs API for reporting current total
>>> - * visible VRAM available on the device
>>> + * visible BAR available on the device
>>> * The file mem_info_vis_vram_total is used for this and returns
>>> the total
>>> * amount of visible VRAM in bytes
>>> */
>>> @@ -148,7 +148,7 @@ static ssize_t
>>> amdgpu_mem_info_vis_vram_used_show(struct device *dev,
>>> struct amdgpu_device *adev = drm_to_adev(ddev);
>>> return sysfs_emit(buf, "%llu\n",
>>> - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr));
>>> + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr));
>>> }
>>> /**
>>> @@ -203,7 +203,7 @@ static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
>>> static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
>>> amdgpu_mem_info_vram_vendor, NULL);
>>> -static struct attribute *amdgpu_vram_mgr_attributes[] = {
>>> +static struct attribute *amdgpu_bar_mgr_attributes[] = {
>>> &dev_attr_mem_info_vram_total.attr,
>>> &dev_attr_mem_info_vis_vram_total.attr,
>>> &dev_attr_mem_info_vram_used.attr,
>>> @@ -212,23 +212,23 @@ static struct attribute
>>> *amdgpu_vram_mgr_attributes[] = {
>>> NULL
>>> };
>>> -const struct attribute_group amdgpu_vram_mgr_attr_group = {
>>> - .attrs = amdgpu_vram_mgr_attributes
>>> +const struct attribute_group amdgpu_bar_mgr_attr_group = {
>>> + .attrs = amdgpu_bar_mgr_attributes
>>> };
>>> /**
>>> - * amdgpu_vram_mgr_vis_size - Calculate visible block size
>>> + * amdgpu_bar_mgr_vis_size - Calculate visible block size
>>> *
>>> * @adev: amdgpu_device pointer
>>> * @block: DRM BUDDY block structure
>>> *
>>> * Calculate how many bytes of the DRM BUDDY block are inside
>>> visible VRAM
>>> */
>>> -static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
>>> +static u64 amdgpu_bar_mgr_vis_size(struct amdgpu_device *adev,
>>> struct drm_buddy_block *block)
>>> {
>>> - u64 start = amdgpu_vram_mgr_block_start(block);
>>> - u64 end = start + amdgpu_vram_mgr_block_size(block);
>>> + u64 start = amdgpu_bar_mgr_block_start(block);
>>> + u64 end = start + amdgpu_bar_mgr_block_size(block);
>>> if (start >= adev->gmc.visible_vram_size)
>>> return 0;
>>> @@ -238,18 +238,18 @@ static u64 amdgpu_vram_mgr_vis_size(struct
>>> amdgpu_device *adev,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size
>>> + * amdgpu_bar_mgr_bo_visible_size - CPU visible BO size
>>> *
>>> * @bo: &amdgpu_bo buffer object (must be in VRAM)
>>> *
>>> * Returns:
>>> * How much of the given &amdgpu_bo buffer object lies in CPU
>>> visible VRAM.
>>> */
>>> -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
>>> +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo)
>>> {
>>> struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
>>> struct ttm_resource *res = bo->tbo.resource;
>>> - struct amdgpu_vram_mgr_resource *vres =
>>> to_amdgpu_vram_mgr_resource(res);
>>> + struct amdgpu_bar_mgr_resource *vres =
>>> to_amdgpu_bar_mgr_resource(res);
>>> struct drm_buddy_block *block;
>>> u64 usage = 0;
>>> @@ -260,18 +260,18 @@ u64 amdgpu_vram_mgr_bo_visible_size(struct
>>> amdgpu_bo *bo)
>>> return 0;
>>> list_for_each_entry(block, &vres->blocks, link)
>>> - usage += amdgpu_vram_mgr_vis_size(adev, block);
>>> + usage += amdgpu_bar_mgr_vis_size(adev, block);
>>> return usage;
>>> }
>>> /* Commit the reservation of VRAM pages */
>>> -static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager
>>> *man)
>>> +static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager
>>> *man)
>>> {
>>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>>> struct amdgpu_device *adev = to_amdgpu_device(mgr);
>>> struct drm_buddy *mm = &mgr->mm;
>>> - struct amdgpu_vram_reservation *rsv, *temp;
>>> + struct amdgpu_bar_reservation *rsv, *temp;
>>> struct drm_buddy_block *block;
>>> uint64_t vis_usage;
>>> @@ -281,14 +281,14 @@ static void
>>> amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
>>> DRM_BUDDY_RANGE_ALLOCATION))
>>> continue;
>>> - block = amdgpu_vram_mgr_first_block(&rsv->allocated);
>>> + block = amdgpu_bar_mgr_first_block(&rsv->allocated);
>>> if (!block)
>>> continue;
>>> dev_dbg(adev->dev, "Reservation 0x%llx - %lld,
>>> Succeeded\n",
>>> rsv->start, rsv->size);
>>> - vis_usage = amdgpu_vram_mgr_vis_size(adev, block);
>>> + vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
>>> atomic64_add(vis_usage, &mgr->vis_usage);
>>> spin_lock(&man->bdev->lru_lock);
>>> man->usage += rsv->size;
>>> @@ -298,18 +298,18 @@ static void amdgpu_vram_mgr_do_reserve(struct
>>> ttm_resource_manager *man)
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_reserve_range - Reserve a range from VRAM
>>> + * amdgpu_bar_mgr_reserve_range - Reserve a range from VRAM
>>> *
>>> - * @mgr: amdgpu_vram_mgr pointer
>>> + * @mgr: amdgpu_bar_mgr pointer
>>> * @start: start address of the range in VRAM
>>> * @size: size of the range
>>> *
>>> * Reserve memory from start address with the specified size in VRAM
>>> */
>>> -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
>>> +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
>>> uint64_t start, uint64_t size)
>>> {
>>> - struct amdgpu_vram_reservation *rsv;
>>> + struct amdgpu_bar_reservation *rsv;
>>> rsv = kzalloc(sizeof(*rsv), GFP_KERNEL);
>>> if (!rsv)
>>> @@ -323,16 +323,16 @@ int amdgpu_vram_mgr_reserve_range(struct
>>> amdgpu_vram_mgr *mgr,
>>> mutex_lock(&mgr->lock);
>>> list_add_tail(&rsv->blocks, &mgr->reservations_pending);
>>> - amdgpu_vram_mgr_do_reserve(&mgr->manager);
>>> + amdgpu_bar_mgr_do_reserve(&mgr->manager);
>>> mutex_unlock(&mgr->lock);
>>> return 0;
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_query_page_status - query the reservation status
>>> + * amdgpu_bar_mgr_query_page_status - query the reservation status
>>> *
>>> - * @mgr: amdgpu_vram_mgr pointer
>>> + * @mgr: amdgpu_bar_mgr pointer
>>> * @start: start address of a page in VRAM
>>> *
>>> * Returns:
>>> @@ -340,10 +340,10 @@ int amdgpu_vram_mgr_reserve_range(struct
>>> amdgpu_vram_mgr *mgr,
>>> * 0: the page has been reserved
>>> * -ENOENT: the input page is not a reservation
>>> */
>>> -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
>>> +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
>>> uint64_t start)
>>> {
>>> - struct amdgpu_vram_reservation *rsv;
>>> + struct amdgpu_bar_reservation *rsv;
>>> int ret;
>>> mutex_lock(&mgr->lock);
>>> @@ -371,7 +371,7 @@ int amdgpu_vram_mgr_query_page_status(struct
>>> amdgpu_vram_mgr *mgr,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_new - allocate new ranges
>>> + * amdgpu_bar_mgr_new - allocate new ranges
>>> *
>>> * @man: TTM memory type manager
>>> * @tbo: TTM BO we need this range for
>>> @@ -380,15 +380,15 @@ int amdgpu_vram_mgr_query_page_status(struct
>>> amdgpu_vram_mgr *mgr,
>>> *
>>> * Allocate VRAM for the given BO.
>>> */
>>> -static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
>>> +static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
>>> struct ttm_buffer_object *tbo,
>>> const struct ttm_place *place,
>>> struct ttm_resource **res)
>>> {
>>> u64 vis_usage = 0, max_bytes, cur_size, min_block_size;
>>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>>> struct amdgpu_device *adev = to_amdgpu_device(mgr);
>>> - struct amdgpu_vram_mgr_resource *vres;
>>> + struct amdgpu_bar_mgr_resource *vres;
>>> u64 size, remaining_size, lpfn, fpfn;
>>> struct drm_buddy *mm = &mgr->mm;
>>> struct drm_buddy_block *block;
>>> @@ -512,7 +512,7 @@ static int amdgpu_vram_mgr_new(struct
>>> ttm_resource_manager *man,
>>> * Compute the original_size value by subtracting the
>>> * last block size with (aligned size - original size)
>>> */
>>> - original_size = amdgpu_vram_mgr_block_size(block) -
>>> (size - cur_size);
>>> + original_size = amdgpu_bar_mgr_block_size(block) -
>>> (size - cur_size);
>>> }
>>> mutex_lock(&mgr->lock);
>>> @@ -529,8 +529,8 @@ static int amdgpu_vram_mgr_new(struct
>>> ttm_resource_manager *man,
>>> list_for_each_entry(block, &vres->blocks, link) {
>>> unsigned long start;
>>> - start = amdgpu_vram_mgr_block_start(block) +
>>> - amdgpu_vram_mgr_block_size(block);
>>> + start = amdgpu_bar_mgr_block_start(block) +
>>> + amdgpu_bar_mgr_block_size(block);
>>> start >>= PAGE_SHIFT;
>>> if (start > PFN_UP(vres->base.size))
>>> @@ -539,10 +539,10 @@ static int amdgpu_vram_mgr_new(struct
>>> ttm_resource_manager *man,
>>> start = 0;
>>> vres->base.start = max(vres->base.start, start);
>>> - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
>>> + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
>>> }
>>> - if (amdgpu_is_vram_mgr_blocks_contiguous(&vres->blocks))
>>> + if (amdgpu_is_bar_mgr_blocks_contiguous(&vres->blocks))
>>> vres->base.placement |= TTM_PL_FLAG_CONTIGUOUS;
>>> if (adev->gmc.xgmi.connected_to_cpu)
>>> @@ -565,18 +565,18 @@ static int amdgpu_vram_mgr_new(struct
>>> ttm_resource_manager *man,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_del - free ranges
>>> + * amdgpu_bar_mgr_del - free ranges
>>> *
>>> * @man: TTM memory type manager
>>> * @res: TTM memory object
>>> *
>>> * Free the allocated VRAM again.
>>> */
>>> -static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
>>> +static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
>>> struct ttm_resource *res)
>>> {
>>> - struct amdgpu_vram_mgr_resource *vres =
>>> to_amdgpu_vram_mgr_resource(res);
>>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>>> + struct amdgpu_bar_mgr_resource *vres =
>>> to_amdgpu_bar_mgr_resource(res);
>>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>>> struct amdgpu_device *adev = to_amdgpu_device(mgr);
>>> struct drm_buddy *mm = &mgr->mm;
>>> struct drm_buddy_block *block;
>>> @@ -584,9 +584,9 @@ static void amdgpu_vram_mgr_del(struct
>>> ttm_resource_manager *man,
>>> mutex_lock(&mgr->lock);
>>> list_for_each_entry(block, &vres->blocks, link)
>>> - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
>>> + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
>>> - amdgpu_vram_mgr_do_reserve(man);
>>> + amdgpu_bar_mgr_do_reserve(man);
>>> drm_buddy_free_list(mm, &vres->blocks);
>>> mutex_unlock(&mgr->lock);
>>> @@ -598,7 +598,7 @@ static void amdgpu_vram_mgr_del(struct
>>> ttm_resource_manager *man,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table
>>> + * amdgpu_bar_mgr_alloc_sgt - allocate and fill a sg table
>>> *
>>> * @adev: amdgpu device pointer
>>> * @res: TTM memory object
>>> @@ -610,7 +610,7 @@ static void amdgpu_vram_mgr_del(struct
>>> ttm_resource_manager *man,
>>> *
>>> * Allocate and fill a sg table from a VRAM allocation.
>>> */
>>> -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
>>> +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
>>> struct ttm_resource *res,
>>> u64 offset, u64 length,
>>> struct device *dev,
>>> @@ -685,7 +685,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct
>>> amdgpu_device *adev,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_free_sgt - allocate and fill a sg table
>>> + * amdgpu_bar_mgr_free_sgt - allocate and fill a sg table
>>> *
>>> * @dev: device pointer
>>> * @dir: data direction of resource to unmap
>>> @@ -693,7 +693,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct
>>> amdgpu_device *adev,
>>> *
>>> * Free a previously allocate sg table.
>>> */
>>> -void amdgpu_vram_mgr_free_sgt(struct device *dev,
>>> +void amdgpu_bar_mgr_free_sgt(struct device *dev,
>>> enum dma_data_direction dir,
>>> struct sg_table *sgt)
>>> {
>>> @@ -709,19 +709,19 @@ void amdgpu_vram_mgr_free_sgt(struct device *dev,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_vis_usage - how many bytes are used in the
>>> visible part
>>> + * amdgpu_bar_mgr_vis_usage - how many bytes are used in the
>>> visible part
>>> *
>>> - * @mgr: amdgpu_vram_mgr pointer
>>> + * @mgr: amdgpu_bar_mgr pointer
>>> *
>>> * Returns how many bytes are used in the visible part of VRAM
>>> */
>>> -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
>>> +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr)
>>> {
>>> return atomic64_read(&mgr->vis_usage);
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_intersects - test each drm buddy block for
>>> intersection
>>> + * amdgpu_bar_mgr_intersects - test each drm buddy block for
>>> intersection
>>> *
>>> * @man: TTM memory type manager
>>> * @res: The resource to test
>>> @@ -730,20 +730,20 @@ uint64_t amdgpu_vram_mgr_vis_usage(struct
>>> amdgpu_vram_mgr *mgr)
>>> *
>>> * Test each drm buddy block for intersection for eviction decision.
>>> */
>>> -static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager
>>> *man,
>>> +static bool amdgpu_bar_mgr_intersects(struct ttm_resource_manager
>>> *man,
>>> struct ttm_resource *res,
>>> const struct ttm_place *place,
>>> size_t size)
>>> {
>>> - struct amdgpu_vram_mgr_resource *mgr =
>>> to_amdgpu_vram_mgr_resource(res);
>>> + struct amdgpu_bar_mgr_resource *mgr =
>>> to_amdgpu_bar_mgr_resource(res);
>>> struct drm_buddy_block *block;
>>> /* Check each drm buddy block individually */
>>> list_for_each_entry(block, &mgr->blocks, link) {
>>> unsigned long fpfn =
>>> - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
>>> + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
>>> unsigned long lpfn = fpfn +
>>> - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
>>> + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
>>> if (place->fpfn < lpfn &&
>>> (!place->lpfn || place->lpfn > fpfn))
>>> @@ -754,7 +754,7 @@ static bool amdgpu_vram_mgr_intersects(struct
>>> ttm_resource_manager *man,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_compatible - test each drm buddy block for
>>> compatibility
>>> + * amdgpu_bar_mgr_compatible - test each drm buddy block for
>>> compatibility
>>> *
>>> * @man: TTM memory type manager
>>> * @res: The resource to test
>>> @@ -763,20 +763,20 @@ static bool amdgpu_vram_mgr_intersects(struct
>>> ttm_resource_manager *man,
>>> *
>>> * Test each drm buddy block for placement compatibility.
>>> */
>>> -static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager
>>> *man,
>>> +static bool amdgpu_bar_mgr_compatible(struct ttm_resource_manager
>>> *man,
>>> struct ttm_resource *res,
>>> const struct ttm_place *place,
>>> size_t size)
>>> {
>>> - struct amdgpu_vram_mgr_resource *mgr =
>>> to_amdgpu_vram_mgr_resource(res);
>>> + struct amdgpu_bar_mgr_resource *mgr =
>>> to_amdgpu_bar_mgr_resource(res);
>>> struct drm_buddy_block *block;
>>> /* Check each drm buddy block individually */
>>> list_for_each_entry(block, &mgr->blocks, link) {
>>> unsigned long fpfn =
>>> - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
>>> + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
>>> unsigned long lpfn = fpfn +
>>> - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
>>> + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
>>> if (fpfn < place->fpfn ||
>>> (place->lpfn && lpfn > place->lpfn))
>>> @@ -787,22 +787,22 @@ static bool amdgpu_vram_mgr_compatible(struct
>>> ttm_resource_manager *man,
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_debug - dump VRAM table
>>> + * amdgpu_bar_mgr_debug - dump VRAM table
>>> *
>>> * @man: TTM memory type manager
>>> * @printer: DRM printer to use
>>> *
>>> * Dump the table content using printk.
>>> */
>>> -static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
>>> +static void amdgpu_bar_mgr_debug(struct ttm_resource_manager *man,
>>> struct drm_printer *printer)
>>> {
>>> - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
>>> + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
>>> struct drm_buddy *mm = &mgr->mm;
>>> struct drm_buddy_block *block;
>>> drm_printf(printer, " vis usage:%llu\n",
>>> - amdgpu_vram_mgr_vis_usage(mgr));
>>> + amdgpu_bar_mgr_vis_usage(mgr));
>>> mutex_lock(&mgr->lock);
>>> drm_printf(printer, "default_page_size: %lluKiB\n",
>>> @@ -816,31 +816,38 @@ static void amdgpu_vram_mgr_debug(struct
>>> ttm_resource_manager *man,
>>> mutex_unlock(&mgr->lock);
>>> }
>>> -static const struct ttm_resource_manager_func
>>> amdgpu_vram_mgr_func = {
>>> - .alloc = amdgpu_vram_mgr_new,
>>> - .free = amdgpu_vram_mgr_del,
>>> - .intersects = amdgpu_vram_mgr_intersects,
>>> - .compatible = amdgpu_vram_mgr_compatible,
>>> - .debug = amdgpu_vram_mgr_debug
>>> +static const struct ttm_resource_manager_func amdgpu_bar_mgr_func = {
>>> + .alloc = amdgpu_bar_mgr_new,
>>> + .free = amdgpu_bar_mgr_del,
>>> + .intersects = amdgpu_bar_mgr_intersects,
>>> + .compatible = amdgpu_bar_mgr_compatible,
>>> + .debug = amdgpu_bar_mgr_debug
>>> };
>>> /**
>>> - * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
>>> + * amdgpu_bar_mgr_init - init BAR manager and DRM MM
>>> *
>>> * @adev: amdgpu_device pointer
>>> + * @domain: memory domain to initialize
>>> *
>>> * Allocate and initialize the VRAM manager.
>>> */
>>> -int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
>>> +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
>>> {
>>> - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
>>> - struct ttm_resource_manager *man = &mgr->manager;
>>> + struct amdgpu_bar_mgr *mgr;
>>> + struct ttm_resource_manager *man;
>>> int err;
>>> + if (domain != TTM_PL_VRAM)
>>> + return -EINVAL;
>>> +
>>> + mgr = &adev->mman.vram_mgr;
>>> + man = &mgr->manager;
>>> +
>>> ttm_resource_manager_init(man, &adev->mman.bdev,
>>> adev->gmc.real_vram_size);
>>> - man->func = &amdgpu_vram_mgr_func;
>>> + man->func = &amdgpu_bar_mgr_func;
>>> err = drm_buddy_init(&mgr->mm, man->size, PAGE_SIZE);
>>> if (err)
>>> @@ -851,25 +858,32 @@ int amdgpu_vram_mgr_init(struct amdgpu_device
>>> *adev)
>>> INIT_LIST_HEAD(&mgr->reserved_pages);
>>> mgr->default_page_size = PAGE_SIZE;
>>> - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM,
>>> &mgr->manager);
>>> + ttm_set_driver_manager(&adev->mman.bdev, domain, &mgr->manager);
>>> ttm_resource_manager_set_used(man, true);
>>> return 0;
>>> }
>>> /**
>>> - * amdgpu_vram_mgr_fini - free and destroy VRAM manager
>>> + * amdgpu_bar_mgr_fini - free and destroy VRAM manager
>>> *
>>> * @adev: amdgpu_device pointer
>>> + * @domain: memory domain to destroy
>>> *
>>> - * Destroy and free the VRAM manager, returns -EBUSY if ranges are
>>> still
>>> + * Destroy and free the BAR manager, returns -EBUSY if ranges are
>>> still
>>> * allocated inside it.
>>> */
>>> -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
>>> +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain)
>>> {
>>> - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
>>> - struct ttm_resource_manager *man = &mgr->manager;
>>> + struct amdgpu_bar_mgr *mgr;
>>> + struct ttm_resource_manager *man;
>>> int ret;
>>> - struct amdgpu_vram_reservation *rsv, *temp;
>>> + struct amdgpu_bar_reservation *rsv, *temp;
>>> +
>>> + if (domain != TTM_PL_VRAM)
>>> + return;
>>> +
>>> + mgr = &adev->mman.vram_mgr;
>>> + man = &mgr->manager;
>>> ttm_resource_manager_set_used(man, false);
>>> @@ -889,5 +903,5 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device
>>> *adev)
>>> mutex_unlock(&mgr->lock);
>>> ttm_resource_manager_cleanup(man);
>>> - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL);
>>> + ttm_set_driver_manager(&adev->mman.bdev, domain, NULL);
>>> }
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>>> index 0e04e42cf809..241faba5ae55 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
>>> @@ -21,12 +21,12 @@
>>> *
>>> */
>>> -#ifndef __AMDGPU_VRAM_MGR_H__
>>> -#define __AMDGPU_VRAM_MGR_H__
>>> +#ifndef __AMDGPU_BAR_MGR_H__
>>> +#define __AMDGPU_BAR_MGR_H__
>>> #include <drm/drm_buddy.h>
>>> -struct amdgpu_vram_mgr {
>>> +struct amdgpu_bar_mgr {
>>> struct ttm_resource_manager manager;
>>> struct drm_buddy mm;
>>> /* protects access to buffer objects */
>>> @@ -37,26 +37,26 @@ struct amdgpu_vram_mgr {
>>> u64 default_page_size;
>>> };
>>> -struct amdgpu_vram_mgr_resource {
>>> +struct amdgpu_bar_mgr_resource {
>>> struct ttm_resource base;
>>> struct list_head blocks;
>>> unsigned long flags;
>>> };
>>> -static inline u64 amdgpu_vram_mgr_block_start(struct
>>> drm_buddy_block *block)
>>> +static inline u64 amdgpu_bar_mgr_block_start(struct drm_buddy_block
>>> *block)
>>> {
>>> return drm_buddy_block_offset(block);
>>> }
>>> -static inline u64 amdgpu_vram_mgr_block_size(struct
>>> drm_buddy_block *block)
>>> +static inline u64 amdgpu_bar_mgr_block_size(struct drm_buddy_block
>>> *block)
>>> {
>>> return (u64)PAGE_SIZE << drm_buddy_block_order(block);
>>> }
>>> -static inline struct amdgpu_vram_mgr_resource *
>>> -to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
>>> +static inline struct amdgpu_bar_mgr_resource *
>>> +to_amdgpu_bar_mgr_resource(struct ttm_resource *res)
>>> {
>>> - return container_of(res, struct amdgpu_vram_mgr_resource, base);
>>> + return container_of(res, struct amdgpu_bar_mgr_resource, base);
>>> }
>>> #endif
>>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr
2023-02-06 11:20 ` Christian König
2023-02-06 15:34 ` Shashank Sharma
@ 2023-02-06 16:17 ` Alex Deucher
1 sibling, 0 replies; 40+ messages in thread
From: Alex Deucher @ 2023-02-06 16:17 UTC (permalink / raw)
To: Christian König; +Cc: alexander.deucher, amd-gfx, Shashank Sharma
On Mon, Feb 6, 2023 at 6:21 AM Christian König <christian.koenig@amd.com> wrote:
>
> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> > From: Alex Deucher <alexander.deucher@amd.com>
> >
> > Rename the VRAM manager functions so they can be resused to manage
> > doorbell BAR as well.
>
> Yeah, as said before Alex did this before we had the buddy allocator.
>
> This doesn't makes sense any more and should probably be dropped completely.
I had suggested that we just use this as is for now so we could get
everything up and running to prove this out. Now that we have this
actually working, we can look at dropping this.
Alex
>
> Christian.
>
> >
> > Cc: Christian Koenig <christian.koenig@amd.com>
> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> > Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 8 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +-
> > .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 14 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 36 ++--
> > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 200 ++++++++++--------
> > drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 18 +-
> > 12 files changed, 157 insertions(+), 143 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> > index 7b5ce00f0602..e34eae8d64cf 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> > @@ -723,7 +723,7 @@ static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev,
> > if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) {
> > u64 total_vis_vram = adev->gmc.visible_vram_size;
> > u64 used_vis_vram =
> > - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
> > + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
> >
> > if (used_vis_vram < total_vis_vram) {
> > u64 free_vis_vram = total_vis_vram - used_vis_vram;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > index 271e30e34d93..c48ccde281c3 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > @@ -179,9 +179,9 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
> > break;
> >
> > case TTM_PL_VRAM:
> > - r = amdgpu_vram_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
> > - bo->tbo.base.size, attach->dev,
> > - dir, &sgt);
> > + r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
> > + bo->tbo.base.size, attach->dev,
> > + dir, &sgt);
> > if (r)
> > return ERR_PTR(r);
> > break;
> > @@ -215,7 +215,7 @@ static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,
> > sg_free_table(sgt);
> > kfree(sgt);
> > } else {
> > - amdgpu_vram_mgr_free_sgt(attach->dev, dir, sgt);
> > + amdgpu_bar_mgr_free_sgt(attach->dev, dir, sgt);
> > }
> > }
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> > index cd4caaa29528..9f148ea7ca66 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> > @@ -2807,12 +2807,12 @@ static struct pci_error_handlers amdgpu_pci_err_handler = {
> > .resume = amdgpu_pci_resume,
> > };
> >
> > -extern const struct attribute_group amdgpu_vram_mgr_attr_group;
> > +extern const struct attribute_group amdgpu_bar_mgr_attr_group;
> > extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
> > extern const struct attribute_group amdgpu_vbios_version_attr_group;
> >
> > static const struct attribute_group *amdgpu_sysfs_groups[] = {
> > - &amdgpu_vram_mgr_attr_group,
> > + &amdgpu_bar_mgr_attr_group,
> > &amdgpu_gtt_mgr_attr_group,
> > &amdgpu_vbios_version_attr_group,
> > NULL,
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > index 7aa7e52ca784..2ce11434fb22 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > @@ -650,7 +650,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
> > ui64 = ttm_resource_manager_usage(&adev->mman.vram_mgr.manager);
> > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
> > case AMDGPU_INFO_VIS_VRAM_USAGE:
> > - ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
> > + ui64 = amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
> > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
> > case AMDGPU_INFO_GTT_USAGE:
> > ui64 = ttm_resource_manager_usage(&adev->mman.gtt_mgr.manager);
> > @@ -704,7 +704,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
> > atomic64_read(&adev->visible_pin_size),
> > mem.vram.usable_heap_size);
> > mem.cpu_accessible_vram.heap_usage =
> > - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr);
> > + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr);
> > mem.cpu_accessible_vram.max_allocation =
> > mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > index 25a68d8888e0..ca85d64a72c2 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > @@ -958,7 +958,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
> > domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
> > if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
> > atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
> > - atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
> > + atomic64_add(amdgpu_bar_mgr_bo_visible_size(bo),
> > &adev->visible_pin_size);
> > } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
> > atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
> > @@ -1009,7 +1009,7 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
> >
> > if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {
> > atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
> > - atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
> > + atomic64_sub(amdgpu_bar_mgr_bo_visible_size(bo),
> > &adev->visible_pin_size);
> > } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
> > atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > index ad490c1e2f57..4e64a035d49d 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > @@ -1899,7 +1899,7 @@ static int amdgpu_ras_badpages_read(struct amdgpu_device *adev,
> > .size = AMDGPU_GPU_PAGE_SIZE,
> > .flags = AMDGPU_RAS_RETIRE_PAGE_RESERVED,
> > };
> > - status = amdgpu_vram_mgr_query_page_status(&adev->mman.vram_mgr,
> > + status = amdgpu_bar_mgr_query_page_status(&adev->mman.vram_mgr,
> > data->bps[i].retired_page);
> > if (status == -EBUSY)
> > (*bps)[i].flags = AMDGPU_RAS_RETIRE_PAGE_PENDING;
> > @@ -2012,7 +2012,7 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
> > goto out;
> > }
> >
> > - amdgpu_vram_mgr_reserve_range(&adev->mman.vram_mgr,
> > + amdgpu_bar_mgr_reserve_range(&adev->mman.vram_mgr,
> > bps[i].retired_page << AMDGPU_GPU_PAGE_SHIFT,
> > AMDGPU_GPU_PAGE_SIZE);
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
> > index 5c4f93ee0c57..dd2b43acc600 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
> > @@ -68,7 +68,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
> >
> > switch (cur->mem_type) {
> > case TTM_PL_VRAM:
> > - head = &to_amdgpu_vram_mgr_resource(res)->blocks;
> > + head = &to_amdgpu_bar_mgr_resource(res)->blocks;
> >
> > block = list_first_entry_or_null(head,
> > struct drm_buddy_block,
> > @@ -76,16 +76,16 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
> > if (!block)
> > goto fallback;
> >
> > - while (start >= amdgpu_vram_mgr_block_size(block)) {
> > - start -= amdgpu_vram_mgr_block_size(block);
> > + while (start >= amdgpu_bar_mgr_block_size(block)) {
> > + start -= amdgpu_bar_mgr_block_size(block);
> >
> > next = block->link.next;
> > if (next != head)
> > block = list_entry(next, struct drm_buddy_block, link);
> > }
> >
> > - cur->start = amdgpu_vram_mgr_block_start(block) + start;
> > - cur->size = min(amdgpu_vram_mgr_block_size(block) - start, size);
> > + cur->start = amdgpu_bar_mgr_block_start(block) + start;
> > + cur->size = min(amdgpu_bar_mgr_block_size(block) - start, size);
> > cur->remaining = size;
> > cur->node = block;
> > break;
> > @@ -148,8 +148,8 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
> > block = list_entry(next, struct drm_buddy_block, link);
> >
> > cur->node = block;
> > - cur->start = amdgpu_vram_mgr_block_start(block);
> > - cur->size = min(amdgpu_vram_mgr_block_size(block), cur->remaining);
> > + cur->start = amdgpu_bar_mgr_block_start(block);
> > + cur->size = min(amdgpu_bar_mgr_block_size(block), cur->remaining);
> > break;
> > case TTM_PL_TT:
> > node = cur->node;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > index 55e0284b2bdd..668826653591 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > @@ -1735,7 +1735,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> > adev->mman.initialized = true;
> >
> > /* Initialize VRAM pool with all of VRAM divided into pages */
> > - r = amdgpu_vram_mgr_init(adev);
> > + r = amdgpu_bar_mgr_init(adev, TTM_PL_VRAM);
> > if (r) {
> > DRM_ERROR("Failed initializing VRAM heap.\n");
> > return r;
> > @@ -1911,7 +1911,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
> > drm_dev_exit(idx);
> > }
> >
> > - amdgpu_vram_mgr_fini(adev);
> > + amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
> > amdgpu_gtt_mgr_fini(adev);
> > amdgpu_preempt_mgr_fini(adev);
> > ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> > index e2cd5894afc9..a918bbd67004 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> > @@ -61,7 +61,7 @@ struct amdgpu_mman {
> > /* Scheduler entity for buffer moves */
> > struct drm_sched_entity entity;
> >
> > - struct amdgpu_vram_mgr vram_mgr;
> > + struct amdgpu_bar_mgr vram_mgr;
> > struct amdgpu_gtt_mgr gtt_mgr;
> > struct ttm_resource_manager preempt_mgr;
> >
> > @@ -107,29 +107,29 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
> > void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
> > int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
> > void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
> > -int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
> > -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
> > +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain);
> > +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain);
> >
> > bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
> > void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
> >
> > uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
> >
> > -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
> > -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> > - struct ttm_resource *mem,
> > - u64 offset, u64 size,
> > - struct device *dev,
> > - enum dma_data_direction dir,
> > - struct sg_table **sgt);
> > -void amdgpu_vram_mgr_free_sgt(struct device *dev,
> > - enum dma_data_direction dir,
> > - struct sg_table *sgt);
> > -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
> > -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> > - uint64_t start, uint64_t size);
> > -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> > - uint64_t start);
> > +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo);
> > +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> > + struct ttm_resource *mem,
> > + u64 offset, u64 size,
> > + struct device *dev,
> > + enum dma_data_direction dir,
> > + struct sg_table **sgt);
> > +void amdgpu_bar_mgr_free_sgt(struct device *dev,
> > + enum dma_data_direction dir,
> > + struct sg_table *sgt);
> > +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr);
> > +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
> > + uint64_t start, uint64_t size);
> > +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
> > + uint64_t start);
> >
> > int amdgpu_ttm_init(struct amdgpu_device *adev);
> > void amdgpu_ttm_fini(struct amdgpu_device *adev);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> > index 2994b9db196f..fc9edc3028b6 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> > @@ -599,7 +599,7 @@ static int amdgpu_virt_write_vf2pf_data(struct amdgpu_device *adev)
> > vf2pf_info->fb_usage =
> > ttm_resource_manager_usage(&adev->mman.vram_mgr.manager) >> 20;
> > vf2pf_info->fb_vis_usage =
> > - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
> > + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr) >> 20;
> > vf2pf_info->fb_size = adev->gmc.real_vram_size >> 20;
> > vf2pf_info->fb_vis_size = adev->gmc.visible_vram_size >> 20;
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> > index 9fa1d814508a..30d68e3a2469 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> > @@ -31,46 +31,46 @@
> > #include "amdgpu_atomfirmware.h"
> > #include "atom.h"
> >
> > -struct amdgpu_vram_reservation {
> > +struct amdgpu_bar_reservation {
> > u64 start;
> > u64 size;
> > struct list_head allocated;
> > struct list_head blocks;
> > };
> >
> > -static inline struct amdgpu_vram_mgr *
> > -to_vram_mgr(struct ttm_resource_manager *man)
> > +static inline struct amdgpu_bar_mgr *
> > +to_bar_mgr(struct ttm_resource_manager *man)
> > {
> > - return container_of(man, struct amdgpu_vram_mgr, manager);
> > + return container_of(man, struct amdgpu_bar_mgr, manager);
> > }
> >
> > static inline struct amdgpu_device *
> > -to_amdgpu_device(struct amdgpu_vram_mgr *mgr)
> > +to_amdgpu_device(struct amdgpu_bar_mgr *mgr)
> > {
> > return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
> > }
> >
> > static inline struct drm_buddy_block *
> > -amdgpu_vram_mgr_first_block(struct list_head *list)
> > +amdgpu_bar_mgr_first_block(struct list_head *list)
> > {
> > return list_first_entry_or_null(list, struct drm_buddy_block, link);
> > }
> >
> > -static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct list_head *head)
> > +static inline bool amdgpu_is_bar_mgr_blocks_contiguous(struct list_head *head)
> > {
> > struct drm_buddy_block *block;
> > u64 start, size;
> >
> > - block = amdgpu_vram_mgr_first_block(head);
> > + block = amdgpu_bar_mgr_first_block(head);
> > if (!block)
> > return false;
> >
> > while (head != block->link.next) {
> > - start = amdgpu_vram_mgr_block_start(block);
> > - size = amdgpu_vram_mgr_block_size(block);
> > + start = amdgpu_bar_mgr_block_start(block);
> > + size = amdgpu_bar_mgr_block_size(block);
> >
> > block = list_entry(block->link.next, struct drm_buddy_block, link);
> > - if (start + size != amdgpu_vram_mgr_block_start(block))
> > + if (start + size != amdgpu_bar_mgr_block_start(block))
> > return false;
> > }
> >
> > @@ -100,7 +100,7 @@ static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev,
> > * DOC: mem_info_vis_vram_total
> > *
> > * The amdgpu driver provides a sysfs API for reporting current total
> > - * visible VRAM available on the device
> > + * visible BAR available on the device
> > * The file mem_info_vis_vram_total is used for this and returns the total
> > * amount of visible VRAM in bytes
> > */
> > @@ -148,7 +148,7 @@ static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev,
> > struct amdgpu_device *adev = drm_to_adev(ddev);
> >
> > return sysfs_emit(buf, "%llu\n",
> > - amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr));
> > + amdgpu_bar_mgr_vis_usage(&adev->mman.vram_mgr));
> > }
> >
> > /**
> > @@ -203,7 +203,7 @@ static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
> > static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
> > amdgpu_mem_info_vram_vendor, NULL);
> >
> > -static struct attribute *amdgpu_vram_mgr_attributes[] = {
> > +static struct attribute *amdgpu_bar_mgr_attributes[] = {
> > &dev_attr_mem_info_vram_total.attr,
> > &dev_attr_mem_info_vis_vram_total.attr,
> > &dev_attr_mem_info_vram_used.attr,
> > @@ -212,23 +212,23 @@ static struct attribute *amdgpu_vram_mgr_attributes[] = {
> > NULL
> > };
> >
> > -const struct attribute_group amdgpu_vram_mgr_attr_group = {
> > - .attrs = amdgpu_vram_mgr_attributes
> > +const struct attribute_group amdgpu_bar_mgr_attr_group = {
> > + .attrs = amdgpu_bar_mgr_attributes
> > };
> >
> > /**
> > - * amdgpu_vram_mgr_vis_size - Calculate visible block size
> > + * amdgpu_bar_mgr_vis_size - Calculate visible block size
> > *
> > * @adev: amdgpu_device pointer
> > * @block: DRM BUDDY block structure
> > *
> > * Calculate how many bytes of the DRM BUDDY block are inside visible VRAM
> > */
> > -static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
> > +static u64 amdgpu_bar_mgr_vis_size(struct amdgpu_device *adev,
> > struct drm_buddy_block *block)
> > {
> > - u64 start = amdgpu_vram_mgr_block_start(block);
> > - u64 end = start + amdgpu_vram_mgr_block_size(block);
> > + u64 start = amdgpu_bar_mgr_block_start(block);
> > + u64 end = start + amdgpu_bar_mgr_block_size(block);
> >
> > if (start >= adev->gmc.visible_vram_size)
> > return 0;
> > @@ -238,18 +238,18 @@ static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size
> > + * amdgpu_bar_mgr_bo_visible_size - CPU visible BO size
> > *
> > * @bo: &amdgpu_bo buffer object (must be in VRAM)
> > *
> > * Returns:
> > * How much of the given &amdgpu_bo buffer object lies in CPU visible VRAM.
> > */
> > -u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
> > +u64 amdgpu_bar_mgr_bo_visible_size(struct amdgpu_bo *bo)
> > {
> > struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
> > struct ttm_resource *res = bo->tbo.resource;
> > - struct amdgpu_vram_mgr_resource *vres = to_amdgpu_vram_mgr_resource(res);
> > + struct amdgpu_bar_mgr_resource *vres = to_amdgpu_bar_mgr_resource(res);
> > struct drm_buddy_block *block;
> > u64 usage = 0;
> >
> > @@ -260,18 +260,18 @@ u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo)
> > return 0;
> >
> > list_for_each_entry(block, &vres->blocks, link)
> > - usage += amdgpu_vram_mgr_vis_size(adev, block);
> > + usage += amdgpu_bar_mgr_vis_size(adev, block);
> >
> > return usage;
> > }
> >
> > /* Commit the reservation of VRAM pages */
> > -static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
> > +static void amdgpu_bar_mgr_do_reserve(struct ttm_resource_manager *man)
> > {
> > - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> > + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> > struct amdgpu_device *adev = to_amdgpu_device(mgr);
> > struct drm_buddy *mm = &mgr->mm;
> > - struct amdgpu_vram_reservation *rsv, *temp;
> > + struct amdgpu_bar_reservation *rsv, *temp;
> > struct drm_buddy_block *block;
> > uint64_t vis_usage;
> >
> > @@ -281,14 +281,14 @@ static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
> > DRM_BUDDY_RANGE_ALLOCATION))
> > continue;
> >
> > - block = amdgpu_vram_mgr_first_block(&rsv->allocated);
> > + block = amdgpu_bar_mgr_first_block(&rsv->allocated);
> > if (!block)
> > continue;
> >
> > dev_dbg(adev->dev, "Reservation 0x%llx - %lld, Succeeded\n",
> > rsv->start, rsv->size);
> >
> > - vis_usage = amdgpu_vram_mgr_vis_size(adev, block);
> > + vis_usage = amdgpu_bar_mgr_vis_size(adev, block);
> > atomic64_add(vis_usage, &mgr->vis_usage);
> > spin_lock(&man->bdev->lru_lock);
> > man->usage += rsv->size;
> > @@ -298,18 +298,18 @@ static void amdgpu_vram_mgr_do_reserve(struct ttm_resource_manager *man)
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_reserve_range - Reserve a range from VRAM
> > + * amdgpu_bar_mgr_reserve_range - Reserve a range from VRAM
> > *
> > - * @mgr: amdgpu_vram_mgr pointer
> > + * @mgr: amdgpu_bar_mgr pointer
> > * @start: start address of the range in VRAM
> > * @size: size of the range
> > *
> > * Reserve memory from start address with the specified size in VRAM
> > */
> > -int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> > +int amdgpu_bar_mgr_reserve_range(struct amdgpu_bar_mgr *mgr,
> > uint64_t start, uint64_t size)
> > {
> > - struct amdgpu_vram_reservation *rsv;
> > + struct amdgpu_bar_reservation *rsv;
> >
> > rsv = kzalloc(sizeof(*rsv), GFP_KERNEL);
> > if (!rsv)
> > @@ -323,16 +323,16 @@ int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> >
> > mutex_lock(&mgr->lock);
> > list_add_tail(&rsv->blocks, &mgr->reservations_pending);
> > - amdgpu_vram_mgr_do_reserve(&mgr->manager);
> > + amdgpu_bar_mgr_do_reserve(&mgr->manager);
> > mutex_unlock(&mgr->lock);
> >
> > return 0;
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_query_page_status - query the reservation status
> > + * amdgpu_bar_mgr_query_page_status - query the reservation status
> > *
> > - * @mgr: amdgpu_vram_mgr pointer
> > + * @mgr: amdgpu_bar_mgr pointer
> > * @start: start address of a page in VRAM
> > *
> > * Returns:
> > @@ -340,10 +340,10 @@ int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
> > * 0: the page has been reserved
> > * -ENOENT: the input page is not a reservation
> > */
> > -int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> > +int amdgpu_bar_mgr_query_page_status(struct amdgpu_bar_mgr *mgr,
> > uint64_t start)
> > {
> > - struct amdgpu_vram_reservation *rsv;
> > + struct amdgpu_bar_reservation *rsv;
> > int ret;
> >
> > mutex_lock(&mgr->lock);
> > @@ -371,7 +371,7 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_new - allocate new ranges
> > + * amdgpu_bar_mgr_new - allocate new ranges
> > *
> > * @man: TTM memory type manager
> > * @tbo: TTM BO we need this range for
> > @@ -380,15 +380,15 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
> > *
> > * Allocate VRAM for the given BO.
> > */
> > -static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> > +static int amdgpu_bar_mgr_new(struct ttm_resource_manager *man,
> > struct ttm_buffer_object *tbo,
> > const struct ttm_place *place,
> > struct ttm_resource **res)
> > {
> > u64 vis_usage = 0, max_bytes, cur_size, min_block_size;
> > - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> > + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> > struct amdgpu_device *adev = to_amdgpu_device(mgr);
> > - struct amdgpu_vram_mgr_resource *vres;
> > + struct amdgpu_bar_mgr_resource *vres;
> > u64 size, remaining_size, lpfn, fpfn;
> > struct drm_buddy *mm = &mgr->mm;
> > struct drm_buddy_block *block;
> > @@ -512,7 +512,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> > * Compute the original_size value by subtracting the
> > * last block size with (aligned size - original size)
> > */
> > - original_size = amdgpu_vram_mgr_block_size(block) - (size - cur_size);
> > + original_size = amdgpu_bar_mgr_block_size(block) - (size - cur_size);
> > }
> >
> > mutex_lock(&mgr->lock);
> > @@ -529,8 +529,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> > list_for_each_entry(block, &vres->blocks, link) {
> > unsigned long start;
> >
> > - start = amdgpu_vram_mgr_block_start(block) +
> > - amdgpu_vram_mgr_block_size(block);
> > + start = amdgpu_bar_mgr_block_start(block) +
> > + amdgpu_bar_mgr_block_size(block);
> > start >>= PAGE_SHIFT;
> >
> > if (start > PFN_UP(vres->base.size))
> > @@ -539,10 +539,10 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> > start = 0;
> > vres->base.start = max(vres->base.start, start);
> >
> > - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
> > + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
> > }
> >
> > - if (amdgpu_is_vram_mgr_blocks_contiguous(&vres->blocks))
> > + if (amdgpu_is_bar_mgr_blocks_contiguous(&vres->blocks))
> > vres->base.placement |= TTM_PL_FLAG_CONTIGUOUS;
> >
> > if (adev->gmc.xgmi.connected_to_cpu)
> > @@ -565,18 +565,18 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_del - free ranges
> > + * amdgpu_bar_mgr_del - free ranges
> > *
> > * @man: TTM memory type manager
> > * @res: TTM memory object
> > *
> > * Free the allocated VRAM again.
> > */
> > -static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> > +static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
> > struct ttm_resource *res)
> > {
> > - struct amdgpu_vram_mgr_resource *vres = to_amdgpu_vram_mgr_resource(res);
> > - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> > + struct amdgpu_bar_mgr_resource *vres = to_amdgpu_bar_mgr_resource(res);
> > + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> > struct amdgpu_device *adev = to_amdgpu_device(mgr);
> > struct drm_buddy *mm = &mgr->mm;
> > struct drm_buddy_block *block;
> > @@ -584,9 +584,9 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> >
> > mutex_lock(&mgr->lock);
> > list_for_each_entry(block, &vres->blocks, link)
> > - vis_usage += amdgpu_vram_mgr_vis_size(adev, block);
> > + vis_usage += amdgpu_bar_mgr_vis_size(adev, block);
> >
> > - amdgpu_vram_mgr_do_reserve(man);
> > + amdgpu_bar_mgr_do_reserve(man);
> >
> > drm_buddy_free_list(mm, &vres->blocks);
> > mutex_unlock(&mgr->lock);
> > @@ -598,7 +598,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table
> > + * amdgpu_bar_mgr_alloc_sgt - allocate and fill a sg table
> > *
> > * @adev: amdgpu device pointer
> > * @res: TTM memory object
> > @@ -610,7 +610,7 @@ static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man,
> > *
> > * Allocate and fill a sg table from a VRAM allocation.
> > */
> > -int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> > +int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> > struct ttm_resource *res,
> > u64 offset, u64 length,
> > struct device *dev,
> > @@ -685,7 +685,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_free_sgt - allocate and fill a sg table
> > + * amdgpu_bar_mgr_free_sgt - allocate and fill a sg table
> > *
> > * @dev: device pointer
> > * @dir: data direction of resource to unmap
> > @@ -693,7 +693,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
> > *
> > * Free a previously allocate sg table.
> > */
> > -void amdgpu_vram_mgr_free_sgt(struct device *dev,
> > +void amdgpu_bar_mgr_free_sgt(struct device *dev,
> > enum dma_data_direction dir,
> > struct sg_table *sgt)
> > {
> > @@ -709,19 +709,19 @@ void amdgpu_vram_mgr_free_sgt(struct device *dev,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part
> > + * amdgpu_bar_mgr_vis_usage - how many bytes are used in the visible part
> > *
> > - * @mgr: amdgpu_vram_mgr pointer
> > + * @mgr: amdgpu_bar_mgr pointer
> > *
> > * Returns how many bytes are used in the visible part of VRAM
> > */
> > -uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
> > +uint64_t amdgpu_bar_mgr_vis_usage(struct amdgpu_bar_mgr *mgr)
> > {
> > return atomic64_read(&mgr->vis_usage);
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_intersects - test each drm buddy block for intersection
> > + * amdgpu_bar_mgr_intersects - test each drm buddy block for intersection
> > *
> > * @man: TTM memory type manager
> > * @res: The resource to test
> > @@ -730,20 +730,20 @@ uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr)
> > *
> > * Test each drm buddy block for intersection for eviction decision.
> > */
> > -static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
> > +static bool amdgpu_bar_mgr_intersects(struct ttm_resource_manager *man,
> > struct ttm_resource *res,
> > const struct ttm_place *place,
> > size_t size)
> > {
> > - struct amdgpu_vram_mgr_resource *mgr = to_amdgpu_vram_mgr_resource(res);
> > + struct amdgpu_bar_mgr_resource *mgr = to_amdgpu_bar_mgr_resource(res);
> > struct drm_buddy_block *block;
> >
> > /* Check each drm buddy block individually */
> > list_for_each_entry(block, &mgr->blocks, link) {
> > unsigned long fpfn =
> > - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
> > + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
> > unsigned long lpfn = fpfn +
> > - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
> > + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
> >
> > if (place->fpfn < lpfn &&
> > (!place->lpfn || place->lpfn > fpfn))
> > @@ -754,7 +754,7 @@ static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_compatible - test each drm buddy block for compatibility
> > + * amdgpu_bar_mgr_compatible - test each drm buddy block for compatibility
> > *
> > * @man: TTM memory type manager
> > * @res: The resource to test
> > @@ -763,20 +763,20 @@ static bool amdgpu_vram_mgr_intersects(struct ttm_resource_manager *man,
> > *
> > * Test each drm buddy block for placement compatibility.
> > */
> > -static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager *man,
> > +static bool amdgpu_bar_mgr_compatible(struct ttm_resource_manager *man,
> > struct ttm_resource *res,
> > const struct ttm_place *place,
> > size_t size)
> > {
> > - struct amdgpu_vram_mgr_resource *mgr = to_amdgpu_vram_mgr_resource(res);
> > + struct amdgpu_bar_mgr_resource *mgr = to_amdgpu_bar_mgr_resource(res);
> > struct drm_buddy_block *block;
> >
> > /* Check each drm buddy block individually */
> > list_for_each_entry(block, &mgr->blocks, link) {
> > unsigned long fpfn =
> > - amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;
> > + amdgpu_bar_mgr_block_start(block) >> PAGE_SHIFT;
> > unsigned long lpfn = fpfn +
> > - (amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);
> > + (amdgpu_bar_mgr_block_size(block) >> PAGE_SHIFT);
> >
> > if (fpfn < place->fpfn ||
> > (place->lpfn && lpfn > place->lpfn))
> > @@ -787,22 +787,22 @@ static bool amdgpu_vram_mgr_compatible(struct ttm_resource_manager *man,
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_debug - dump VRAM table
> > + * amdgpu_bar_mgr_debug - dump VRAM table
> > *
> > * @man: TTM memory type manager
> > * @printer: DRM printer to use
> > *
> > * Dump the table content using printk.
> > */
> > -static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
> > +static void amdgpu_bar_mgr_debug(struct ttm_resource_manager *man,
> > struct drm_printer *printer)
> > {
> > - struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);
> > + struct amdgpu_bar_mgr *mgr = to_bar_mgr(man);
> > struct drm_buddy *mm = &mgr->mm;
> > struct drm_buddy_block *block;
> >
> > drm_printf(printer, " vis usage:%llu\n",
> > - amdgpu_vram_mgr_vis_usage(mgr));
> > + amdgpu_bar_mgr_vis_usage(mgr));
> >
> > mutex_lock(&mgr->lock);
> > drm_printf(printer, "default_page_size: %lluKiB\n",
> > @@ -816,31 +816,38 @@ static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man,
> > mutex_unlock(&mgr->lock);
> > }
> >
> > -static const struct ttm_resource_manager_func amdgpu_vram_mgr_func = {
> > - .alloc = amdgpu_vram_mgr_new,
> > - .free = amdgpu_vram_mgr_del,
> > - .intersects = amdgpu_vram_mgr_intersects,
> > - .compatible = amdgpu_vram_mgr_compatible,
> > - .debug = amdgpu_vram_mgr_debug
> > +static const struct ttm_resource_manager_func amdgpu_bar_mgr_func = {
> > + .alloc = amdgpu_bar_mgr_new,
> > + .free = amdgpu_bar_mgr_del,
> > + .intersects = amdgpu_bar_mgr_intersects,
> > + .compatible = amdgpu_bar_mgr_compatible,
> > + .debug = amdgpu_bar_mgr_debug
> > };
> >
> > /**
> > - * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
> > + * amdgpu_bar_mgr_init - init BAR manager and DRM MM
> > *
> > * @adev: amdgpu_device pointer
> > + * @domain: memory domain to initialize
> > *
> > * Allocate and initialize the VRAM manager.
> > */
> > -int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
> > +int amdgpu_bar_mgr_init(struct amdgpu_device *adev, u32 domain)
> > {
> > - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
> > - struct ttm_resource_manager *man = &mgr->manager;
> > + struct amdgpu_bar_mgr *mgr;
> > + struct ttm_resource_manager *man;
> > int err;
> >
> > + if (domain != TTM_PL_VRAM)
> > + return -EINVAL;
> > +
> > + mgr = &adev->mman.vram_mgr;
> > + man = &mgr->manager;
> > +
> > ttm_resource_manager_init(man, &adev->mman.bdev,
> > adev->gmc.real_vram_size);
> >
> > - man->func = &amdgpu_vram_mgr_func;
> > + man->func = &amdgpu_bar_mgr_func;
> >
> > err = drm_buddy_init(&mgr->mm, man->size, PAGE_SIZE);
> > if (err)
> > @@ -851,25 +858,32 @@ int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
> > INIT_LIST_HEAD(&mgr->reserved_pages);
> > mgr->default_page_size = PAGE_SIZE;
> >
> > - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, &mgr->manager);
> > + ttm_set_driver_manager(&adev->mman.bdev, domain, &mgr->manager);
> > ttm_resource_manager_set_used(man, true);
> > return 0;
> > }
> >
> > /**
> > - * amdgpu_vram_mgr_fini - free and destroy VRAM manager
> > + * amdgpu_bar_mgr_fini - free and destroy VRAM manager
> > *
> > * @adev: amdgpu_device pointer
> > + * @domain: memory domain to destroy
> > *
> > - * Destroy and free the VRAM manager, returns -EBUSY if ranges are still
> > + * Destroy and free the BAR manager, returns -EBUSY if ranges are still
> > * allocated inside it.
> > */
> > -void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
> > +void amdgpu_bar_mgr_fini(struct amdgpu_device *adev, u32 domain)
> > {
> > - struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr;
> > - struct ttm_resource_manager *man = &mgr->manager;
> > + struct amdgpu_bar_mgr *mgr;
> > + struct ttm_resource_manager *man;
> > int ret;
> > - struct amdgpu_vram_reservation *rsv, *temp;
> > + struct amdgpu_bar_reservation *rsv, *temp;
> > +
> > + if (domain != TTM_PL_VRAM)
> > + return;
> > +
> > + mgr = &adev->mman.vram_mgr;
> > + man = &mgr->manager;
> >
> > ttm_resource_manager_set_used(man, false);
> >
> > @@ -889,5 +903,5 @@ void amdgpu_vram_mgr_fini(struct amdgpu_device *adev)
> > mutex_unlock(&mgr->lock);
> >
> > ttm_resource_manager_cleanup(man);
> > - ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL);
> > + ttm_set_driver_manager(&adev->mman.bdev, domain, NULL);
> > }
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
> > index 0e04e42cf809..241faba5ae55 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
> > @@ -21,12 +21,12 @@
> > *
> > */
> >
> > -#ifndef __AMDGPU_VRAM_MGR_H__
> > -#define __AMDGPU_VRAM_MGR_H__
> > +#ifndef __AMDGPU_BAR_MGR_H__
> > +#define __AMDGPU_BAR_MGR_H__
> >
> > #include <drm/drm_buddy.h>
> >
> > -struct amdgpu_vram_mgr {
> > +struct amdgpu_bar_mgr {
> > struct ttm_resource_manager manager;
> > struct drm_buddy mm;
> > /* protects access to buffer objects */
> > @@ -37,26 +37,26 @@ struct amdgpu_vram_mgr {
> > u64 default_page_size;
> > };
> >
> > -struct amdgpu_vram_mgr_resource {
> > +struct amdgpu_bar_mgr_resource {
> > struct ttm_resource base;
> > struct list_head blocks;
> > unsigned long flags;
> > };
> >
> > -static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)
> > +static inline u64 amdgpu_bar_mgr_block_start(struct drm_buddy_block *block)
> > {
> > return drm_buddy_block_offset(block);
> > }
> >
> > -static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)
> > +static inline u64 amdgpu_bar_mgr_block_size(struct drm_buddy_block *block)
> > {
> > return (u64)PAGE_SIZE << drm_buddy_block_order(block);
> > }
> >
> > -static inline struct amdgpu_vram_mgr_resource *
> > -to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
> > +static inline struct amdgpu_bar_mgr_resource *
> > +to_amdgpu_bar_mgr_resource(struct ttm_resource *res)
> > {
> > - return container_of(res, struct amdgpu_vram_mgr_resource, base);
> > + return container_of(res, struct amdgpu_bar_mgr_resource, base);
> > }
> >
> > #endif
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init
2023-02-03 19:08 ` [PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init Shashank Sharma
@ 2023-02-06 16:20 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 16:20 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> To consolidate it with vram handling.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Alex Deucher <shashank.sharma@amd.com>
I can't check all the implementation details, but from a mile high view
that looks correct.
Acked-by: Christian König <christian.koenig@amd.com>
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 96 ++--------------------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 64 +++++++++++++++
> 2 files changed, 71 insertions(+), 89 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index b07b7679bf9f..7c21ffe63ebc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1016,82 +1016,6 @@ int amdgpu_device_pci_reset(struct amdgpu_device *adev)
> return pci_reset_function(adev->pdev);
> }
>
> -/*
> - * GPU doorbell aperture helpers function.
> - */
> -/**
> - * amdgpu_device_doorbell_init - Init doorbell driver information.
> - *
> - * @adev: amdgpu_device pointer
> - *
> - * Init doorbell driver information (CIK)
> - * Returns 0 on success, error on failure.
> - */
> -static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> -{
> -
> - /* No doorbell on SI hardware generation */
> - if (adev->asic_type < CHIP_BONAIRE) {
> - adev->gmc.doorbell_aper_base = 0;
> - adev->gmc.doorbell_aper_size = 0;
> - adev->doorbell.num_doorbells = 0;
> - adev->mman.doorbell_aper_base_kaddr = NULL;
> - return 0;
> - }
> -
> - if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
> - return -EINVAL;
> -
> - amdgpu_asic_init_doorbell_index(adev);
> -
> - /* doorbell bar mapping */
> - adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
> - adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
> -
> - if (adev->enable_mes) {
> - adev->doorbell.num_doorbells =
> - adev->gmc.doorbell_aper_size / sizeof(u32);
> - } else {
> - adev->doorbell.num_doorbells =
> - min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
> - adev->doorbell_index.max_assignment+1);
> - if (adev->doorbell.num_doorbells == 0)
> - return -EINVAL;
> -
> - /* For Vega, reserve and map two pages on doorbell BAR since SDMA
> - * paging queue doorbell use the second page. The
> - * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
> - * doorbells are in the first page. So with paging queue enabled,
> - * the max num_doorbells should + 1 page (0x400 in dword)
> - */
> - if (adev->asic_type >= CHIP_VEGA10)
> - adev->doorbell.num_doorbells += 0x400;
> - }
> -
> - adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
> - adev->doorbell.num_doorbells *
> - sizeof(u32));
> - if (adev->mman.doorbell_aper_base_kaddr == NULL)
> - return -ENOMEM;
> -
> - return 0;
> -}
> -
> -/**
> - * amdgpu_device_doorbell_fini - Tear down doorbell driver information.
> - *
> - * @adev: amdgpu_device pointer
> - *
> - * Tear down doorbell driver information (CIK)
> - */
> -static void amdgpu_device_doorbell_fini(struct amdgpu_device *adev)
> -{
> - iounmap(adev->mman.doorbell_aper_base_kaddr);
> - adev->mman.doorbell_aper_base_kaddr = NULL;
> -}
> -
> -
> -
> /*
> * amdgpu_device_wb_*()
> * Writeback is the method by which the GPU updates special pages in memory
> @@ -1239,7 +1163,6 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
> cmd & ~PCI_COMMAND_MEMORY);
>
> /* Free the VRAM and doorbell BAR, we most likely need to move both. */
> - amdgpu_device_doorbell_fini(adev);
> if (adev->asic_type >= CHIP_BONAIRE)
> pci_release_resource(adev->pdev, 2);
>
> @@ -1253,11 +1176,10 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
>
> pci_assign_unassigned_bus_resources(adev->pdev->bus);
>
> - /* When the doorbell or fb BAR isn't available we have no chance of
> - * using the device.
> - */
> - r = amdgpu_device_doorbell_init(adev);
> - if (r || (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET))
> + if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
> + return -ENODEV;
> +
> + if (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET)
> return -ENODEV;
>
> pci_write_config_word(adev->pdev, PCI_COMMAND, cmd);
> @@ -3711,9 +3633,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> if (!adev->have_atomics_support)
> dev_info(adev->dev, "PCIE atomic ops is not supported\n");
>
> - /* doorbell bar mapping and doorbell index init*/
> - amdgpu_device_doorbell_init(adev);
> -
> if (amdgpu_emu_mode == 1) {
> /* post the asic on emulation mode */
> emu_soc_asic_init(adev);
> @@ -3941,14 +3860,14 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
> /* Clear all CPU mappings pointing to this device */
> unmap_mapping_range(adev->ddev.anon_inode->i_mapping, 0, 0, 1);
>
> - /* Unmap all mapped bars - Doorbell, registers and VRAM */
> - amdgpu_device_doorbell_fini(adev);
> -
> iounmap(adev->rmmio);
> adev->rmmio = NULL;
> if (adev->mman.vram_aper_base_kaddr)
> iounmap(adev->mman.vram_aper_base_kaddr);
> adev->mman.vram_aper_base_kaddr = NULL;
> + if (adev->mman.doorbell_aper_base_kaddr)
> + iounmap(adev->mman.doorbell_aper_base_kaddr);
> + adev->mman.doorbell_aper_base_kaddr = NULL;
>
> /* Memory manager related */
> if (!adev->gmc.xgmi.connected_to_cpu) {
> @@ -4051,7 +3970,6 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
>
> iounmap(adev->rmmio);
> adev->rmmio = NULL;
> - amdgpu_device_doorbell_fini(adev);
> drm_dev_exit(idx);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index bb2230d14ea6..983826ae7509 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1705,6 +1705,63 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
> return 0;
> }
>
> +/*
> + * GPU doorbell aperture helpers function.
> + */
> +/**
> + * amdgpu_ttm_doorbell_init - Init doorbell driver information.
> + *
> + * @adev: amdgpu_device pointer
> + *
> + * Init doorbell driver information (CIK)
> + * Returns 0 on success, error on failure.
> + */
> +static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
> +{
> +
> + /* No doorbell on SI hardware generation */
> + if (adev->asic_type < CHIP_BONAIRE) {
> + adev->gmc.doorbell_aper_base = 0;
> + adev->gmc.doorbell_aper_size = 0;
> + adev->doorbell.num_doorbells = 0;
> + adev->mman.doorbell_aper_base_kaddr = NULL;
> + return 0;
> + }
> +
> + if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
> + return -EINVAL;
> +
> + amdgpu_asic_init_doorbell_index(adev);
> +
> + /* doorbell bar mapping */
> + adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
> + adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
> + adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
> + adev->gmc.doorbell_aper_size);
> +
> + if (adev->enable_mes) {
> + adev->doorbell.num_doorbells =
> + adev->gmc.doorbell_aper_size / sizeof(u32);
> + } else {
> + adev->doorbell.num_doorbells =
> + min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
> + adev->doorbell_index.max_assignment+1);
> + if (adev->doorbell.num_doorbells == 0)
> + return -EINVAL;
> +
> + /* For Vega, reserve and map two pages on doorbell BAR since SDMA
> + * paging queue doorbell use the second page. The
> + * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
> + * doorbells are in the first page. So with paging queue enabled,
> + * the max num_doorbells should + 1 page (0x400 in dword)
> + */
> + if (adev->asic_type >= CHIP_VEGA10)
> + adev->doorbell.num_doorbells += 0x400;
> + }
> +
> + return 0;
> +}
> +
> /*
> * amdgpu_ttm_init - Init the memory management (ttm) as well as various
> * gtt/vram related fields.
> @@ -1761,6 +1818,10 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> adev->gmc.visible_vram_size);
> #endif
>
> + r = amdgpu_ttm_doorbell_init(adev);
> + if (r)
> + return r;
> +
> /*
> *The reserved vram for firmware must be pinned to the specified
> *place on the VRAM, so reserve it early.
> @@ -1907,6 +1968,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
> if (adev->mman.vram_aper_base_kaddr)
> iounmap(adev->mman.vram_aper_base_kaddr);
> adev->mman.vram_aper_base_kaddr = NULL;
> + if (adev->mman.doorbell_aper_base_kaddr)
> + iounmap(adev->mman.doorbell_aper_base_kaddr);
> + adev->mman.doorbell_aper_base_kaddr = NULL;
>
> drm_dev_exit(idx);
> }
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL
2023-02-06 11:30 ` Christian König
@ 2023-02-06 16:30 ` Alex Deucher
0 siblings, 0 replies; 40+ messages in thread
From: Alex Deucher @ 2023-02-06 16:30 UTC (permalink / raw)
To: Christian König; +Cc: alexander.deucher, amd-gfx, Shashank Sharma
On Mon, Feb 6, 2023 at 6:30 AM Christian König <christian.koenig@amd.com> wrote:
>
> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> > From: Alex Deucher <alexander.deucher@amd.com>
> >
> > This patch adds changes to accommodate the new GEM/TTM domain
> > for doorbell memory.
> >
> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> > Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
> > drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 19 ++++++++++------
> > drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 24 ++++++++++++++++++++-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 17 ++++++++++++++-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
> > 7 files changed, 58 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index e3e2e6e3b485..e1c1a360614e 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -974,6 +974,7 @@ struct amdgpu_device {
> > atomic64_t vram_pin_size;
> > atomic64_t visible_pin_size;
> > atomic64_t gart_pin_size;
> > + atomic64_t doorbell_pin_size;
>
> Please drop that, the amount of pinned doorbells is not needed as far as
> I can see.
>
> >
> > /* soc15 register offset based on ip, instance and segment */
> > uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> > index 0656e5bb4f05..43a3137019b1 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c
> > @@ -659,15 +659,17 @@ static void amdgpu_bar_mgr_del(struct ttm_resource_manager *man,
> > * @dev: the other device
> > * @dir: dma direction
> > * @sgt: resulting sg table
> > + * @mem_type: memory type
> > *
> > * Allocate and fill a sg table from a VRAM allocation.
> > */
> > int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> > - struct ttm_resource *res,
> > - u64 offset, u64 length,
> > - struct device *dev,
> > - enum dma_data_direction dir,
> > - struct sg_table **sgt)
> > + struct ttm_resource *res,
> > + u64 offset, u64 length,
> > + struct device *dev,
> > + enum dma_data_direction dir,
> > + struct sg_table **sgt,
> > + u32 mem_type)
>
> And again that doesn't make any sense at all.
>
> For now we don't want to export doorbells through DMA-buf.
>
> > {
> > struct amdgpu_res_cursor cursor;
> > struct scatterlist *sg;
> > @@ -701,10 +703,15 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> > */
> > amdgpu_res_first(res, offset, length, &cursor);
> > for_each_sgtable_sg((*sgt), sg, i) {
> > - phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
> > + phys_addr_t phys = cursor.start;
> > size_t size = cursor.size;
> > dma_addr_t addr;
> >
> > + if (mem_type == TTM_PL_VRAM)
> > + phys += adev->gmc.vram_aper_base;
> > + else
> > + phys += adev->gmc.doorbell_aper_base;
> > +
> > addr = dma_map_resource(dev, phys, size, dir,
> > DMA_ATTR_SKIP_CPU_SYNC);
> > r = dma_mapping_error(dev, addr);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > index c48ccde281c3..c645bdc49f34 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > @@ -179,9 +179,10 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
> > break;
> >
> > case TTM_PL_VRAM:
> > + case AMDGPU_PL_DOORBELL:
> > r = amdgpu_bar_mgr_alloc_sgt(adev, bo->tbo.resource, 0,
> > bo->tbo.base.size, attach->dev,
> > - dir, &sgt);
> > + dir, &sgt, bo->tbo.resource->mem_type);
> > if (r)
> > return ERR_PTR(r);
> > break;
>
> That stuff can be dropped as well as far as I can see.
>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > index 887fc53a7d16..b2cfd46c459b 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > @@ -147,6 +147,18 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
> > c++;
> > }
> >
> > + if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
> > + places[c].fpfn = 0;
> > + places[c].lpfn = 0;
> > + places[c].mem_type = AMDGPU_PL_DOORBELL;
> > + places[c].flags = 0;
> > + places[c].flags |= TTM_PL_FLAG_TOPDOWN;
> > +
> > + if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
> > + places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;
> > + c++;
> > + }
> > +
> > if (domain & AMDGPU_GEM_DOMAIN_GTT) {
> > places[c].fpfn = 0;
> > places[c].lpfn = 0;
> > @@ -464,6 +476,13 @@ static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,
> > if (man && size < man->size)
> > return true;
> > goto fail;
> > + } else if (domain & AMDGPU_GEM_DOMAIN_DOORBELL) {
> > + man = ttm_manager_type(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
> > +
> > + if (size < man->size)
> > + return true;
> > + else
> > + goto fail;
>
> Do we ever want userspace to allocate more than one doorbell page at a time?
One 4k page would support 512 64 bit doorbells and hence 512 user
queues. That seems like a reasonable queue limit.
Alex
>
> > }
> >
> > /* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */
> > @@ -962,8 +981,9 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
> > &adev->visible_pin_size);
> > } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
> > atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
> > + } else if (domain == AMDGPU_GEM_DOMAIN_DOORBELL) {
> > + atomic64_add(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
>
> Can be dropped.
>
> > }
> > -
> > error:
> > return r;
> > }
> > @@ -1013,6 +1033,8 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo)
> > &adev->visible_pin_size);
> > } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
> > atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
> > + } else if (bo->tbo.resource->mem_type == AMDGPU_PL_DOORBELL) {
> > + atomic64_sub(amdgpu_bo_size(bo), &adev->doorbell_pin_size);
>
> Dito.
>
> > }
> > }
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > index 93207badf83f..082f451d26f4 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > @@ -326,7 +326,7 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
> > u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
> > u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
> > void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
> > - uint64_t *gtt_mem, uint64_t *cpu_mem);
> > + uint64_t *gtt_mem, uint64_t *cpu_mem);
> > void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
> > int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
> > struct dma_fence **fence);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > index bb2230d14ea6..71eff2f195a7 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > @@ -128,6 +128,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
> > case AMDGPU_PL_GDS:
> > case AMDGPU_PL_GWS:
> > case AMDGPU_PL_OA:
> > + case AMDGPU_PL_DOORBELL:
> > placement->num_placement = 0;
> > placement->num_busy_placement = 0;
> > return;
> > @@ -500,9 +501,11 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
> > if (old_mem->mem_type == AMDGPU_PL_GDS ||
> > old_mem->mem_type == AMDGPU_PL_GWS ||
> > old_mem->mem_type == AMDGPU_PL_OA ||
> > + old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> > new_mem->mem_type == AMDGPU_PL_GDS ||
> > new_mem->mem_type == AMDGPU_PL_GWS ||
> > - new_mem->mem_type == AMDGPU_PL_OA) {
> > + new_mem->mem_type == AMDGPU_PL_OA ||
> > + new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> > /* Nothing to save here */
> > ttm_bo_move_null(bo, new_mem);
> > goto out;
> > @@ -586,6 +589,17 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
> > mem->bus.offset += adev->gmc.vram_aper_base;
> > mem->bus.is_iomem = true;
> > break;
> > + case AMDGPU_PL_DOORBELL:
> > + mem->bus.offset = mem->start << PAGE_SHIFT;
>
> That here won't work if we ever allow allocating more than one page for
> a doorbell.
>
> > +
> > + if (adev->mman.doorbell_aper_base_kaddr &&
> > + mem->placement & TTM_PL_FLAG_CONTIGUOUS)
> > + mem->bus.addr = (u8 *)adev->mman.doorbell_aper_base_kaddr +
> > + mem->bus.offset;
>
> This doesn't make any sense at all. TTM_PL_FLAG_CONTIGUOUS should
> probably be completely ignored for doorbells.
>
> Regards,
> Christian.
>
> > +
> > + mem->bus.offset += adev->gmc.doorbell_aper_base;
> > + mem->bus.is_iomem = true;
> > + break;
> > default:
> > return -EINVAL;
> > }
> > @@ -1267,6 +1281,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
> > flags |= AMDGPU_PTE_VALID;
> >
> > if (mem && (mem->mem_type == TTM_PL_TT ||
> > + mem->mem_type == AMDGPU_PL_DOORBELL ||
> > mem->mem_type == AMDGPU_PL_PREEMPT)) {
> > flags |= AMDGPU_PTE_SYSTEM;
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> > index 243deb1ffc54..9971665d7d99 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> > @@ -124,7 +124,8 @@ int amdgpu_bar_mgr_alloc_sgt(struct amdgpu_device *adev,
> > u64 offset, u64 size,
> > struct device *dev,
> > enum dma_data_direction dir,
> > - struct sg_table **sgt);
> > + struct sg_table **sgt,
> > + u32 mem_type);
> > void amdgpu_bar_mgr_free_sgt(struct device *dev,
> > enum dma_data_direction dir,
> > struct sg_table *sgt);
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 10/13] drm/amdgpu: doorbell support in get_memory functions
2023-02-03 19:08 ` [PATCH 10/13] drm/amdgpu: doorbell support in get_memory functions Shashank Sharma
@ 2023-02-06 16:30 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 16:30 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch adds section for doorbell memory in memory status
> reporting functions like vm/bo_get_memory.
Marek reworked this just recently to pass around a structure. You should
probably rebase the code when that patch lands.
Apart from that looks good to me.
Christian.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 ++++++++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 15 ++++++++-------
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++-
> 5 files changed, 22 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
> index 99a7855ab1bc..202df09ba5de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
> @@ -60,7 +60,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
> struct amdgpu_fpriv *fpriv = file->driver_priv;
> struct amdgpu_vm *vm = &fpriv->vm;
>
> - uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
> + uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0, doorbell_mem = 0;
> ktime_t usage[AMDGPU_HW_IP_NUM];
> uint32_t bus, dev, fn, domain;
> unsigned int hw_ip;
> @@ -75,7 +75,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
> if (ret)
> return;
>
> - amdgpu_vm_get_memory(vm, &vram_mem, >t_mem, &cpu_mem);
> + amdgpu_vm_get_memory(vm, &vram_mem, >t_mem, &cpu_mem, &doorbell_mem);
> amdgpu_bo_unreserve(vm->root.bo);
>
> amdgpu_ctx_mgr_usage(&fpriv->ctx_mgr, usage);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index b2cfd46c459b..ef1f3106bc69 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -1288,7 +1288,8 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
> }
>
> void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
> - uint64_t *gtt_mem, uint64_t *cpu_mem)
> + uint64_t *gtt_mem, uint64_t *cpu_mem,
> + uint64_t *doorbell_mem)
> {
> unsigned int domain;
>
> @@ -1300,6 +1301,9 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
> case AMDGPU_GEM_DOMAIN_GTT:
> *gtt_mem += amdgpu_bo_size(bo);
> break;
> + case AMDGPU_GEM_DOMAIN_DOORBELL:
> + *doorbell_mem += amdgpu_bo_size(bo);
> + break;
> case AMDGPU_GEM_DOMAIN_CPU:
> default:
> *cpu_mem += amdgpu_bo_size(bo);
> @@ -1578,6 +1582,9 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
> case AMDGPU_GEM_DOMAIN_GTT:
> placement = " GTT";
> break;
> + case AMDGPU_GEM_DOMAIN_DOORBELL:
> + placement = "DOOR";
> + break;
> case AMDGPU_GEM_DOMAIN_CPU:
> default:
> placement = " CPU";
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index 082f451d26f4..bf9759758f0d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -326,7 +326,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
> u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
> u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
> void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
> - uint64_t *gtt_mem, uint64_t *cpu_mem);
> + uint64_t *gtt_mem, uint64_t *cpu_mem,
> + uint64_t *doorbell_mem);
> void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
> int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
> struct dma_fence **fence);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index dc379dc22c77..1561d138945b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -918,7 +918,8 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> }
>
> void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
> - uint64_t *gtt_mem, uint64_t *cpu_mem)
> + uint64_t *gtt_mem, uint64_t *cpu_mem,
> + uint64_t *doorbell_mem)
> {
> struct amdgpu_bo_va *bo_va, *tmp;
>
> @@ -927,37 +928,37 @@ void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
> if (!bo_va->base.bo)
> continue;
> amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
> - gtt_mem, cpu_mem);
> + gtt_mem, cpu_mem, doorbell_mem);
> }
> list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) {
> if (!bo_va->base.bo)
> continue;
> amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
> - gtt_mem, cpu_mem);
> + gtt_mem, cpu_mem, doorbell_mem);
> }
> list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) {
> if (!bo_va->base.bo)
> continue;
> amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
> - gtt_mem, cpu_mem);
> + gtt_mem, cpu_mem, doorbell_mem);
> }
> list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) {
> if (!bo_va->base.bo)
> continue;
> amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
> - gtt_mem, cpu_mem);
> + gtt_mem, cpu_mem, doorbell_mem);
> }
> list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) {
> if (!bo_va->base.bo)
> continue;
> amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
> - gtt_mem, cpu_mem);
> + gtt_mem, cpu_mem, doorbell_mem);
> }
> list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) {
> if (!bo_va->base.bo)
> continue;
> amdgpu_bo_get_memory(bo_va->base.bo, vram_mem,
> - gtt_mem, cpu_mem);
> + gtt_mem, cpu_mem, doorbell_mem);
> }
> spin_unlock(&vm->status_lock);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 094bb4807303..b8ac7d311c8b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -458,7 +458,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm);
> void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
> struct amdgpu_vm *vm);
> void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
> - uint64_t *gtt_mem, uint64_t *cpu_mem);
> + uint64_t *gtt_mem, uint64_t *cpu_mem,
> + uint64_t *doorbell_mem);
>
> int amdgpu_vm_pt_clear(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> struct amdgpu_bo_vm *vmbo, bool immediate);
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at
2023-02-03 19:08 ` [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
@ 2023-02-06 16:51 ` Christian König
2023-02-06 17:01 ` Alex Deucher
0 siblings, 1 reply; 40+ messages in thread
From: Christian König @ 2023-02-06 16:51 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher, Shashank Sharma
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Shashank Sharma <contactshashanksharma@gmail.com>
>
> This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
> so that it could be used for both VRAM and DOORBELL domains objects. It
> also adds supporting code for existing callers.
We should probably drop this one as well.
We just removed the domain from the function because we only have BIOS
reserved regions in VRAM, never anywhere else.
Allocating a doorbell for the kernel is not really an use case for
amdgpu_bo_create_kernel_at().
Christian.
>
> Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
> 4 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index ef1f3106bc69..dec391fa42dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -367,7 +367,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> * 0 on success, negative error code otherwise.
> */
> int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
> - uint64_t offset, uint64_t size,
> + uint64_t offset, uint64_t size, uint32_t domain,
> struct amdgpu_bo **bo_ptr, void **cpu_addr)
> {
> struct ttm_operation_ctx ctx = { false, false };
> @@ -378,7 +378,7 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
> size = ALIGN(size, PAGE_SIZE);
>
> r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL,
> + domain, bo_ptr, NULL,
> cpu_addr);
> if (r)
> return r;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index bf9759758f0d..b2b7e55ac486 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -284,7 +284,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> u32 domain, struct amdgpu_bo **bo_ptr,
> u64 *gpu_addr, void **cpu_addr);
> int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
> - uint64_t offset, uint64_t size,
> + uint64_t offset, uint64_t size, uint32_t domain,
> struct amdgpu_bo **bo_ptr, void **cpu_addr);
> int amdgpu_bo_create_user(struct amdgpu_device *adev,
> struct amdgpu_bo_param *bp,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 08355f981313..4cec90debe46 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1591,6 +1591,7 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
> return amdgpu_bo_create_kernel_at(adev,
> adev->mman.fw_vram_usage_start_offset,
> adev->mman.fw_vram_usage_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &adev->mman.fw_vram_usage_reserved_bo,
> &adev->mman.fw_vram_usage_va);
> }
> @@ -1616,6 +1617,7 @@ static int amdgpu_ttm_drv_reserve_vram_init(struct amdgpu_device *adev)
> return amdgpu_bo_create_kernel_at(adev,
> adev->mman.drv_vram_usage_start_offset,
> adev->mman.drv_vram_usage_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &adev->mman.drv_vram_usage_reserved_bo,
> &adev->mman.drv_vram_usage_va);
> }
> @@ -1696,6 +1698,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
> ret = amdgpu_bo_create_kernel_at(adev,
> ctx->c2p_train_data_offset,
> ctx->train_data_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &ctx->c2p_bo,
> NULL);
> if (ret) {
> @@ -1709,6 +1712,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
> ret = amdgpu_bo_create_kernel_at(adev,
> adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
> adev->mman.discovery_tmr_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &adev->mman.discovery_memory,
> NULL);
> if (ret) {
> @@ -1816,18 +1820,21 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> * avoid display artifacts while transitioning between pre-OS
> * and driver. */
> r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &adev->mman.stolen_vga_memory,
> NULL);
> if (r)
> return r;
> r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
> adev->mman.stolen_extended_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &adev->mman.stolen_extended_memory,
> NULL);
> if (r)
> return r;
> r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_reserved_offset,
> adev->mman.stolen_reserved_size,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &adev->mman.stolen_reserved_memory,
> NULL);
> if (r)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> index fc9edc3028b6..fd1f58158238 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> @@ -395,6 +395,7 @@ static void amdgpu_virt_ras_reserve_bps(struct amdgpu_device *adev)
> */
> if (amdgpu_bo_create_kernel_at(adev, bp << AMDGPU_GPU_PAGE_SHIFT,
> AMDGPU_GPU_PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> &bo, NULL))
> DRM_DEBUG("RAS WARN: reserve vram for retired page %llx fail\n", bp);
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 12/14] drm/amdgpu: initialize doorbell memory pool
2023-02-03 19:08 ` [PATCH 12/14] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
@ 2023-02-06 16:54 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 16:54 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch initializes doorbell pool with bar manager, which will
> divide all the doorbell memory into pages.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index e04409210415..95017de6b23d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1837,6 +1837,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> if (r)
> return r;
>
> + /* Initialize DOORBELL pool with all of DOORBELL divided into pages */
> + r = amdgpu_bar_mgr_init(adev, AMDGPU_PL_DOORBELL);
Just replacing this with ttm_range_man_init() should be sufficient to
not use the VRAM manager here.
Christian.
> + if (r) {
> + DRM_ERROR("Failed initializing DOORBELL heap.\n");
> + return r;
> + }
> +
> /*
> *The reserved vram for firmware must be pinned to the specified
> *place on the VRAM, so reserve it early.
> @@ -1890,6 +1897,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
> (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
>
> + DRM_INFO("amdgpu: %uM of DOORBELL memory ready\n",
> + (unsigned) (adev->gmc.doorbell_aper_size / (1024 * 1024)));
> +
> /* Compute GTT size, either based on 1/2 the size of RAM size
> * or whatever the user passed on module init */
> if (amdgpu_gtt_size == -1) {
> @@ -1991,6 +2001,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
> }
>
> amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
> + amdgpu_bar_mgr_fini(adev, AMDGPU_PL_DOORBELL);
> amdgpu_gtt_mgr_fini(adev);
> amdgpu_preempt_mgr_fini(adev);
> ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 14/14] drm/amdgpu: introduce doorbell bo in kernel
2023-02-03 19:08 ` [PATCH 14/14] " Shashank Sharma
@ 2023-02-06 16:57 ` Christian König
2023-02-06 17:19 ` Shashank Sharma
0 siblings, 1 reply; 40+ messages in thread
From: Christian König @ 2023-02-06 16:57 UTC (permalink / raw)
To: Shashank Sharma, amd-gfx; +Cc: alexander.deucher
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch does the following:
> - Removes doorbell ptr from adev.
> - Moves doorbell.num_doorbells into mman.num_doorbells.
> - Introduces a kernel bo for doorbell management in form of mman.doorbell_kernel_bo.
> This bo holds the doorbell space now.
> - Introduces mman.doorbell_bo_size: to save total doorbell memory size.
> - Also introduces mman.doorbell_va to save CPU address of doorbell BO
> mapping. This ptr will be used now for doorbell read/write from doorbell BAR.
Please don't call any CPU address VA, this is a term we usually use with
GPUVM.
Rather use doorbell_cpu_addr for this.
Christian.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 ++++++-------
> drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 4 ----
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++++++++++----
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 6 +++++
> 6 files changed, 35 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index e1c1a360614e..dd3875ae1ad3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -834,7 +834,6 @@ struct amdgpu_device {
> spinlock_t audio_endpt_idx_lock;
> amdgpu_block_rreg_t audio_endpt_rreg;
> amdgpu_block_wreg_t audio_endpt_wreg;
> - struct amdgpu_doorbell doorbell;
>
> /* clock/pll info */
> struct amdgpu_clock clock;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index 28076da2258f..aea943e337df 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -109,11 +109,10 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
> *aperture_base = adev->gmc.doorbell_aper_base;
> *aperture_size = 0;
> *start_offset = 0;
> - } else if (adev->gmc.doorbell_aper_size > adev->doorbell.num_doorbells *
> - sizeof(u32)) {
> + } else if (adev->gmc.doorbell_aper_size > adev->mman.doorbell_kernel_bo_size) {
> *aperture_base = adev->gmc.doorbell_aper_base;
> *aperture_size = adev->gmc.doorbell_aper_size;
> - *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
> + *start_offset = adev->mman.doorbell_kernel_bo_size;
> } else {
> *aperture_base = 0;
> *aperture_size = 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 7c21ffe63ebc..9c3ce1ae66ea 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -593,8 +593,8 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
> if (amdgpu_device_skip_hw_access(adev))
> return 0;
>
> - if (index < adev->doorbell.num_doorbells) {
> - return readl(adev->mman.doorbell_aper_base_kaddr + index);
> + if (index < adev->mman.num_doorbells) {
> + return readl(adev->mman.doorbell_va + index);
> } else {
> DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
> return 0;
> @@ -616,8 +616,8 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
> if (amdgpu_device_skip_hw_access(adev))
> return;
>
> - if (index < adev->doorbell.num_doorbells) {
> - writel(v, adev->mman.doorbell_aper_base_kaddr + index);
> + if (index < adev->mman.num_doorbells) {
> + writel(v, adev->mman.doorbell_va + index);
> } else {
> DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
> }
> @@ -637,8 +637,8 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
> if (amdgpu_device_skip_hw_access(adev))
> return 0;
>
> - if (index < adev->doorbell.num_doorbells) {
> - return atomic64_read((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index));
> + if (index < adev->mman.num_doorbells) {
> + return atomic64_read((atomic64_t *)(adev->mman.doorbell_va + index));
> } else {
> DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
> return 0;
> @@ -660,8 +660,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
> if (amdgpu_device_skip_hw_access(adev))
> return;
>
> - if (index < adev->doorbell.num_doorbells) {
> - atomic64_set((atomic64_t *)(adev->mman.doorbell_aper_base_kaddr + index), v);
> + if (index < adev->mman.num_doorbells) {
> + atomic64_set((atomic64_t *)(adev->mman.doorbell_va + index), v);
> } else {
> DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> index 464be28da4fb..97298a98561f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
> @@ -24,10 +24,6 @@
> /*
> * GPU doorbell structures, functions & helpers
> */
> -struct amdgpu_doorbell {
> - u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
> -};
> -
> /* Reserved doorbells for amdgpu (including multimedia).
> * KFD can use all the rest in the 2M doorbell bar.
> * For asic before vega10, doorbell is 32-bit, so the
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index e38720b91958..8f0537f16cc8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1742,7 +1742,7 @@ static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
> if (adev->asic_type < CHIP_BONAIRE) {
> adev->gmc.doorbell_aper_base = 0;
> adev->gmc.doorbell_aper_size = 0;
> - adev->doorbell.num_doorbells = 0;
> + adev->mman.num_doorbells = 0;
> adev->mman.doorbell_aper_base_kaddr = NULL;
> return 0;
> }
> @@ -1759,13 +1759,13 @@ static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
> adev->gmc.doorbell_aper_size);
>
> if (adev->enable_mes) {
> - adev->doorbell.num_doorbells =
> + adev->mman.num_doorbells =
> adev->gmc.doorbell_aper_size / sizeof(u32);
> } else {
> - adev->doorbell.num_doorbells =
> + adev->mman.num_doorbells =
> min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
> adev->doorbell_index.max_assignment+1);
> - if (adev->doorbell.num_doorbells == 0)
> + if (adev->mman.num_doorbells == 0)
> return -EINVAL;
>
> /* For Vega, reserve and map two pages on doorbell BAR since SDMA
> @@ -1775,7 +1775,7 @@ static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
> * the max num_doorbells should + 1 page (0x400 in dword)
> */
> if (adev->asic_type >= CHIP_VEGA10)
> - adev->doorbell.num_doorbells += 0x400;
> + adev->mman.num_doorbells += 0x400;
> }
>
> return 0;
> @@ -1901,6 +1901,18 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> if (r)
> return r;
>
> + adev->mman.doorbell_kernel_bo_size = adev->mman.num_doorbells * sizeof(u32);
> + r = amdgpu_bo_create_kernel_at(adev,
> + 0,
> + adev->mman.doorbell_kernel_bo_size,
> + AMDGPU_GEM_DOMAIN_DOORBELL,
> + &adev->mman.doorbell_kernel_bo,
> + &adev->mman.doorbell_va);
> + if (r) {
> + DRM_ERROR("Failed to create doorbell BO\n");
> + return r;
> + }
> +
> DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
> (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
>
> @@ -1992,6 +2004,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
> NULL, NULL);
> amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
> &adev->mman.sdma_access_ptr);
> + amdgpu_bo_free_kernel(&adev->mman.doorbell_kernel_bo,
> + NULL, &adev->mman.doorbell_va);
> amdgpu_ttm_fw_reserve_vram_fini(adev);
> amdgpu_ttm_drv_reserve_vram_fini(adev);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index a492de079c2e..405294ca9834 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -98,6 +98,12 @@ struct amdgpu_mman {
> /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
> struct amdgpu_bo *sdma_access_bo;
> void *sdma_access_ptr;
> +
> + /* doorbells reserved for the kernel driver */
> + u32 num_doorbells; /* Number of doorbells actually reserved for amdgpu. */
> + uint64_t doorbell_kernel_bo_size;
> + struct amdgpu_bo *doorbell_kernel_bo;
> + void *doorbell_va;
> };
>
> struct amdgpu_copy_mem {
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at
2023-02-06 16:51 ` Christian König
@ 2023-02-06 17:01 ` Alex Deucher
2023-02-06 17:03 ` Christian König
0 siblings, 1 reply; 40+ messages in thread
From: Alex Deucher @ 2023-02-06 17:01 UTC (permalink / raw)
To: Christian König
Cc: alexander.deucher, Shashank Sharma, amd-gfx, Shashank Sharma
On Mon, Feb 6, 2023 at 11:51 AM Christian König
<christian.koenig@amd.com> wrote:
>
> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> > From: Shashank Sharma <contactshashanksharma@gmail.com>
> >
> > This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
> > so that it could be used for both VRAM and DOORBELL domains objects. It
> > also adds supporting code for existing callers.
>
> We should probably drop this one as well.
>
> We just removed the domain from the function because we only have BIOS
> reserved regions in VRAM, never anywhere else.
>
> Allocating a doorbell for the kernel is not really an use case for
> amdgpu_bo_create_kernel_at().
We just need some way to guarantee that the kernel always gets the
first page. It's required for SR-IOV compatibility.
Alex
>
> Christian.
>
> >
> > Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++++++
> > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
> > 4 files changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > index ef1f3106bc69..dec391fa42dc 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > @@ -367,7 +367,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> > * 0 on success, negative error code otherwise.
> > */
> > int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
> > - uint64_t offset, uint64_t size,
> > + uint64_t offset, uint64_t size, uint32_t domain,
> > struct amdgpu_bo **bo_ptr, void **cpu_addr)
> > {
> > struct ttm_operation_ctx ctx = { false, false };
> > @@ -378,7 +378,7 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
> > size = ALIGN(size, PAGE_SIZE);
> >
> > r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE,
> > - AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL,
> > + domain, bo_ptr, NULL,
> > cpu_addr);
> > if (r)
> > return r;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > index bf9759758f0d..b2b7e55ac486 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > @@ -284,7 +284,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> > u32 domain, struct amdgpu_bo **bo_ptr,
> > u64 *gpu_addr, void **cpu_addr);
> > int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
> > - uint64_t offset, uint64_t size,
> > + uint64_t offset, uint64_t size, uint32_t domain,
> > struct amdgpu_bo **bo_ptr, void **cpu_addr);
> > int amdgpu_bo_create_user(struct amdgpu_device *adev,
> > struct amdgpu_bo_param *bp,
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > index 08355f981313..4cec90debe46 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > @@ -1591,6 +1591,7 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
> > return amdgpu_bo_create_kernel_at(adev,
> > adev->mman.fw_vram_usage_start_offset,
> > adev->mman.fw_vram_usage_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &adev->mman.fw_vram_usage_reserved_bo,
> > &adev->mman.fw_vram_usage_va);
> > }
> > @@ -1616,6 +1617,7 @@ static int amdgpu_ttm_drv_reserve_vram_init(struct amdgpu_device *adev)
> > return amdgpu_bo_create_kernel_at(adev,
> > adev->mman.drv_vram_usage_start_offset,
> > adev->mman.drv_vram_usage_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &adev->mman.drv_vram_usage_reserved_bo,
> > &adev->mman.drv_vram_usage_va);
> > }
> > @@ -1696,6 +1698,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
> > ret = amdgpu_bo_create_kernel_at(adev,
> > ctx->c2p_train_data_offset,
> > ctx->train_data_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &ctx->c2p_bo,
> > NULL);
> > if (ret) {
> > @@ -1709,6 +1712,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
> > ret = amdgpu_bo_create_kernel_at(adev,
> > adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
> > adev->mman.discovery_tmr_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &adev->mman.discovery_memory,
> > NULL);
> > if (ret) {
> > @@ -1816,18 +1820,21 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> > * avoid display artifacts while transitioning between pre-OS
> > * and driver. */
> > r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &adev->mman.stolen_vga_memory,
> > NULL);
> > if (r)
> > return r;
> > r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
> > adev->mman.stolen_extended_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &adev->mman.stolen_extended_memory,
> > NULL);
> > if (r)
> > return r;
> > r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_reserved_offset,
> > adev->mman.stolen_reserved_size,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &adev->mman.stolen_reserved_memory,
> > NULL);
> > if (r)
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> > index fc9edc3028b6..fd1f58158238 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> > @@ -395,6 +395,7 @@ static void amdgpu_virt_ras_reserve_bps(struct amdgpu_device *adev)
> > */
> > if (amdgpu_bo_create_kernel_at(adev, bp << AMDGPU_GPU_PAGE_SHIFT,
> > AMDGPU_GPU_PAGE_SIZE,
> > + AMDGPU_GEM_DOMAIN_VRAM,
> > &bo, NULL))
> > DRM_DEBUG("RAS WARN: reserve vram for retired page %llx fail\n", bp);
> >
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at
2023-02-06 17:01 ` Alex Deucher
@ 2023-02-06 17:03 ` Christian König
0 siblings, 0 replies; 40+ messages in thread
From: Christian König @ 2023-02-06 17:03 UTC (permalink / raw)
To: Alex Deucher; +Cc: alexander.deucher, Shashank Sharma, amd-gfx, Shashank Sharma
Am 06.02.23 um 18:01 schrieb Alex Deucher:
> On Mon, Feb 6, 2023 at 11:51 AM Christian König
> <christian.koenig@amd.com> wrote:
>> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
>>> From: Shashank Sharma <contactshashanksharma@gmail.com>
>>>
>>> This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
>>> so that it could be used for both VRAM and DOORBELL domains objects. It
>>> also adds supporting code for existing callers.
>> We should probably drop this one as well.
>>
>> We just removed the domain from the function because we only have BIOS
>> reserved regions in VRAM, never anywhere else.
>>
>> Allocating a doorbell for the kernel is not really an use case for
>> amdgpu_bo_create_kernel_at().
> We just need some way to guarantee that the kernel always gets the
> first page. It's required for SR-IOV compatibility.
That should be guaranteed when we use ttm_range_manager() since that one
gives you pages in the order you allocate them.
If the first page is already taken then bo_create_kernel_at() won't help
either, you just get a error returned.
Just allocating and returning the error yourself does the same here.
Christian.
>
> Alex
>
>> Christian.
>>
>>> Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +++++++
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
>>> 4 files changed, 11 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> index ef1f3106bc69..dec391fa42dc 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>>> @@ -367,7 +367,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
>>> * 0 on success, negative error code otherwise.
>>> */
>>> int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
>>> - uint64_t offset, uint64_t size,
>>> + uint64_t offset, uint64_t size, uint32_t domain,
>>> struct amdgpu_bo **bo_ptr, void **cpu_addr)
>>> {
>>> struct ttm_operation_ctx ctx = { false, false };
>>> @@ -378,7 +378,7 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
>>> size = ALIGN(size, PAGE_SIZE);
>>>
>>> r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE,
>>> - AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL,
>>> + domain, bo_ptr, NULL,
>>> cpu_addr);
>>> if (r)
>>> return r;
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
>>> index bf9759758f0d..b2b7e55ac486 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
>>> @@ -284,7 +284,7 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
>>> u32 domain, struct amdgpu_bo **bo_ptr,
>>> u64 *gpu_addr, void **cpu_addr);
>>> int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
>>> - uint64_t offset, uint64_t size,
>>> + uint64_t offset, uint64_t size, uint32_t domain,
>>> struct amdgpu_bo **bo_ptr, void **cpu_addr);
>>> int amdgpu_bo_create_user(struct amdgpu_device *adev,
>>> struct amdgpu_bo_param *bp,
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> index 08355f981313..4cec90debe46 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> @@ -1591,6 +1591,7 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
>>> return amdgpu_bo_create_kernel_at(adev,
>>> adev->mman.fw_vram_usage_start_offset,
>>> adev->mman.fw_vram_usage_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &adev->mman.fw_vram_usage_reserved_bo,
>>> &adev->mman.fw_vram_usage_va);
>>> }
>>> @@ -1616,6 +1617,7 @@ static int amdgpu_ttm_drv_reserve_vram_init(struct amdgpu_device *adev)
>>> return amdgpu_bo_create_kernel_at(adev,
>>> adev->mman.drv_vram_usage_start_offset,
>>> adev->mman.drv_vram_usage_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &adev->mman.drv_vram_usage_reserved_bo,
>>> &adev->mman.drv_vram_usage_va);
>>> }
>>> @@ -1696,6 +1698,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
>>> ret = amdgpu_bo_create_kernel_at(adev,
>>> ctx->c2p_train_data_offset,
>>> ctx->train_data_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &ctx->c2p_bo,
>>> NULL);
>>> if (ret) {
>>> @@ -1709,6 +1712,7 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
>>> ret = amdgpu_bo_create_kernel_at(adev,
>>> adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
>>> adev->mman.discovery_tmr_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &adev->mman.discovery_memory,
>>> NULL);
>>> if (ret) {
>>> @@ -1816,18 +1820,21 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>>> * avoid display artifacts while transitioning between pre-OS
>>> * and driver. */
>>> r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &adev->mman.stolen_vga_memory,
>>> NULL);
>>> if (r)
>>> return r;
>>> r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
>>> adev->mman.stolen_extended_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &adev->mman.stolen_extended_memory,
>>> NULL);
>>> if (r)
>>> return r;
>>> r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_reserved_offset,
>>> adev->mman.stolen_reserved_size,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &adev->mman.stolen_reserved_memory,
>>> NULL);
>>> if (r)
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> index fc9edc3028b6..fd1f58158238 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
>>> @@ -395,6 +395,7 @@ static void amdgpu_virt_ras_reserve_bps(struct amdgpu_device *adev)
>>> */
>>> if (amdgpu_bo_create_kernel_at(adev, bp << AMDGPU_GPU_PAGE_SHIFT,
>>> AMDGPU_GPU_PAGE_SIZE,
>>> + AMDGPU_GEM_DOMAIN_VRAM,
>>> &bo, NULL))
>>> DRM_DEBUG("RAS WARN: reserve vram for retired page %llx fail\n", bp);
>>>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 14/14] drm/amdgpu: introduce doorbell bo in kernel
2023-02-06 16:57 ` Christian König
@ 2023-02-06 17:19 ` Shashank Sharma
0 siblings, 0 replies; 40+ messages in thread
From: Shashank Sharma @ 2023-02-06 17:19 UTC (permalink / raw)
To: Christian König, amd-gfx; +Cc: alexander.deucher
On 06/02/2023 17:57, Christian König wrote:
> Am 03.02.23 um 20:08 schrieb Shashank Sharma:
>> From: Alex Deucher <alexander.deucher@amd.com>
>>
>> This patch does the following:
>> - Removes doorbell ptr from adev.
>> - Moves doorbell.num_doorbells into mman.num_doorbells.
>> - Introduces a kernel bo for doorbell management in form of
>> mman.doorbell_kernel_bo.
>> This bo holds the doorbell space now.
>> - Introduces mman.doorbell_bo_size: to save total doorbell memory size.
>> - Also introduces mman.doorbell_va to save CPU address of doorbell BO
>> mapping. This ptr will be used now for doorbell read/write from
>> doorbell BAR.
>
> Please don't call any CPU address VA, this is a term we usually use
> with GPUVM.
>
> Rather use doorbell_cpu_addr for this.
>
> Christian.
Noted,
- Shashank
>
>>
>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 ++--
>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 ++++++-------
>> drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 4 ----
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++++++++++----
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 6 +++++
>> 6 files changed, 35 insertions(+), 21 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index e1c1a360614e..dd3875ae1ad3 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -834,7 +834,6 @@ struct amdgpu_device {
>> spinlock_t audio_endpt_idx_lock;
>> amdgpu_block_rreg_t audio_endpt_rreg;
>> amdgpu_block_wreg_t audio_endpt_wreg;
>> - struct amdgpu_doorbell doorbell;
>> /* clock/pll info */
>> struct amdgpu_clock clock;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
>> index 28076da2258f..aea943e337df 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
>> @@ -109,11 +109,10 @@ static void amdgpu_doorbell_get_kfd_info(struct
>> amdgpu_device *adev,
>> *aperture_base = adev->gmc.doorbell_aper_base;
>> *aperture_size = 0;
>> *start_offset = 0;
>> - } else if (adev->gmc.doorbell_aper_size >
>> adev->doorbell.num_doorbells *
>> - sizeof(u32)) {
>> + } else if (adev->gmc.doorbell_aper_size >
>> adev->mman.doorbell_kernel_bo_size) {
>> *aperture_base = adev->gmc.doorbell_aper_base;
>> *aperture_size = adev->gmc.doorbell_aper_size;
>> - *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
>> + *start_offset = adev->mman.doorbell_kernel_bo_size;
>> } else {
>> *aperture_base = 0;
>> *aperture_size = 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> index 7c21ffe63ebc..9c3ce1ae66ea 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> @@ -593,8 +593,8 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device
>> *adev, u32 index)
>> if (amdgpu_device_skip_hw_access(adev))
>> return 0;
>> - if (index < adev->doorbell.num_doorbells) {
>> - return readl(adev->mman.doorbell_aper_base_kaddr + index);
>> + if (index < adev->mman.num_doorbells) {
>> + return readl(adev->mman.doorbell_va + index);
>> } else {
>> DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n",
>> index);
>> return 0;
>> @@ -616,8 +616,8 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device
>> *adev, u32 index, u32 v)
>> if (amdgpu_device_skip_hw_access(adev))
>> return;
>> - if (index < adev->doorbell.num_doorbells) {
>> - writel(v, adev->mman.doorbell_aper_base_kaddr + index);
>> + if (index < adev->mman.num_doorbells) {
>> + writel(v, adev->mman.doorbell_va + index);
>> } else {
>> DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n",
>> index);
>> }
>> @@ -637,8 +637,8 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device
>> *adev, u32 index)
>> if (amdgpu_device_skip_hw_access(adev))
>> return 0;
>> - if (index < adev->doorbell.num_doorbells) {
>> - return atomic64_read((atomic64_t
>> *)(adev->mman.doorbell_aper_base_kaddr + index));
>> + if (index < adev->mman.num_doorbells) {
>> + return atomic64_read((atomic64_t *)(adev->mman.doorbell_va +
>> index));
>> } else {
>> DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n",
>> index);
>> return 0;
>> @@ -660,8 +660,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device
>> *adev, u32 index, u64 v)
>> if (amdgpu_device_skip_hw_access(adev))
>> return;
>> - if (index < adev->doorbell.num_doorbells) {
>> - atomic64_set((atomic64_t
>> *)(adev->mman.doorbell_aper_base_kaddr + index), v);
>> + if (index < adev->mman.num_doorbells) {
>> + atomic64_set((atomic64_t *)(adev->mman.doorbell_va + index),
>> v);
>> } else {
>> DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n",
>> index);
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> index 464be28da4fb..97298a98561f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
>> @@ -24,10 +24,6 @@
>> /*
>> * GPU doorbell structures, functions & helpers
>> */
>> -struct amdgpu_doorbell {
>> - u32 num_doorbells; /* Number of doorbells actually
>> reserved for amdgpu. */
>> -};
>> -
>> /* Reserved doorbells for amdgpu (including multimedia).
>> * KFD can use all the rest in the 2M doorbell bar.
>> * For asic before vega10, doorbell is 32-bit, so the
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> index e38720b91958..8f0537f16cc8 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> @@ -1742,7 +1742,7 @@ static int amdgpu_ttm_doorbell_init(struct
>> amdgpu_device *adev)
>> if (adev->asic_type < CHIP_BONAIRE) {
>> adev->gmc.doorbell_aper_base = 0;
>> adev->gmc.doorbell_aper_size = 0;
>> - adev->doorbell.num_doorbells = 0;
>> + adev->mman.num_doorbells = 0;
>> adev->mman.doorbell_aper_base_kaddr = NULL;
>> return 0;
>> }
>> @@ -1759,13 +1759,13 @@ static int amdgpu_ttm_doorbell_init(struct
>> amdgpu_device *adev)
>> adev->gmc.doorbell_aper_size);
>> if (adev->enable_mes) {
>> - adev->doorbell.num_doorbells =
>> + adev->mman.num_doorbells =
>> adev->gmc.doorbell_aper_size / sizeof(u32);
>> } else {
>> - adev->doorbell.num_doorbells =
>> + adev->mman.num_doorbells =
>> min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
>> adev->doorbell_index.max_assignment+1);
>> - if (adev->doorbell.num_doorbells == 0)
>> + if (adev->mman.num_doorbells == 0)
>> return -EINVAL;
>> /* For Vega, reserve and map two pages on doorbell BAR
>> since SDMA
>> @@ -1775,7 +1775,7 @@ static int amdgpu_ttm_doorbell_init(struct
>> amdgpu_device *adev)
>> * the max num_doorbells should + 1 page (0x400 in dword)
>> */
>> if (adev->asic_type >= CHIP_VEGA10)
>> - adev->doorbell.num_doorbells += 0x400;
>> + adev->mman.num_doorbells += 0x400;
>> }
>> return 0;
>> @@ -1901,6 +1901,18 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>> if (r)
>> return r;
>> + adev->mman.doorbell_kernel_bo_size = adev->mman.num_doorbells
>> * sizeof(u32);
>> + r = amdgpu_bo_create_kernel_at(adev,
>> + 0,
>> + adev->mman.doorbell_kernel_bo_size,
>> + AMDGPU_GEM_DOMAIN_DOORBELL,
>> + &adev->mman.doorbell_kernel_bo,
>> + &adev->mman.doorbell_va);
>> + if (r) {
>> + DRM_ERROR("Failed to create doorbell BO\n");
>> + return r;
>> + }
>> +
>> DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
>> (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
>> @@ -1992,6 +2004,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>> NULL, NULL);
>> amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
>> &adev->mman.sdma_access_ptr);
>> + amdgpu_bo_free_kernel(&adev->mman.doorbell_kernel_bo,
>> + NULL, &adev->mman.doorbell_va);
>> amdgpu_ttm_fw_reserve_vram_fini(adev);
>> amdgpu_ttm_drv_reserve_vram_fini(adev);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> index a492de079c2e..405294ca9834 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
>> @@ -98,6 +98,12 @@ struct amdgpu_mman {
>> /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
>> struct amdgpu_bo *sdma_access_bo;
>> void *sdma_access_ptr;
>> +
>> + /* doorbells reserved for the kernel driver */
>> + u32 num_doorbells; /* Number of doorbells actually
>> reserved for amdgpu. */
>> + uint64_t doorbell_kernel_bo_size;
>> + struct amdgpu_bo *doorbell_kernel_bo;
>> + void *doorbell_va;
>> };
>> struct amdgpu_copy_mem {
>
^ permalink raw reply [flat|nested] 40+ messages in thread
end of thread, other threads:[~2023-02-06 17:19 UTC | newest]
Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-03 19:08 [PATCH 00/13] Re-design doorbell framework for usermode queues Shashank Sharma
2023-02-03 19:08 ` [PATCH 01/13] drm/amdgpu: add UAPI for allocating doorbell memory Shashank Sharma
2023-02-06 11:19 ` Christian König
2023-02-06 15:31 ` Shashank Sharma
2023-02-03 19:08 ` [PATCH 02/13] drm/amdgpu: rename vram_mgr functions to bar_mgr Shashank Sharma
2023-02-06 11:20 ` Christian König
2023-02-06 15:34 ` Shashank Sharma
2023-02-06 16:03 ` Christian König
2023-02-06 16:17 ` Alex Deucher
2023-02-03 19:08 ` [PATCH 03/13] drm/amdgpu: rename amdgpu_vram_mgr.c/h to amdgpu_bar_mgr.c/h Shashank Sharma
2023-02-03 19:08 ` [PATCH 04/13] drm/amdgpu: replace aper_base_kaddr with vram_aper_base_kaddr Shashank Sharma
2023-02-06 11:21 ` Christian König
2023-02-03 19:08 ` [PATCH 05/13] drm/amdgpu: add doorbell support to amdgpu_bar_mgr Shashank Sharma
2023-02-03 19:08 ` [PATCH 06/13] drm/amdgpu: rename gmc.aper_base/size Shashank Sharma
2023-02-06 11:22 ` Christian König
2023-02-03 19:08 ` [PATCH 07/13] drm/amdgpu: store doorbell info in gmc structure Shashank Sharma
2023-02-06 11:23 ` Christian König
2023-02-03 19:08 ` [PATCH 08/13] drm/amdgpu: move doorbell ptr into mman structure Shashank Sharma
2023-02-06 11:24 ` Christian König
2023-02-03 19:08 ` [PATCH 09/13] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
2023-02-06 11:30 ` Christian König
2023-02-06 16:30 ` Alex Deucher
2023-02-03 19:08 ` [PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init Shashank Sharma
2023-02-06 16:20 ` Christian König
2023-02-03 19:08 ` [PATCH 10/14] drm/amdgpu: accommodate DOMAIN/PL_DOORBELL Shashank Sharma
2023-02-03 19:08 ` [PATCH 10/13] drm/amdgpu: doorbell support in get_memory functions Shashank Sharma
2023-02-06 16:30 ` Christian König
2023-02-03 19:08 ` [PATCH 11/14] " Shashank Sharma
2023-02-03 19:08 ` [PATCH 11/13] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
2023-02-03 19:08 ` [PATCH 12/13] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
2023-02-06 16:51 ` Christian König
2023-02-06 17:01 ` Alex Deucher
2023-02-06 17:03 ` Christian König
2023-02-03 19:08 ` [PATCH 12/14] drm/amdgpu: initialize doorbell memory pool Shashank Sharma
2023-02-06 16:54 ` Christian König
2023-02-03 19:08 ` [PATCH 13/14] drm/amdgpu: add domain info in bo_create_kernel_at Shashank Sharma
2023-02-03 19:08 ` [PATCH 13/13] drm/amdgpu: introduce doorbell bo in kernel Shashank Sharma
2023-02-03 19:08 ` [PATCH 14/14] " Shashank Sharma
2023-02-06 16:57 ` Christian König
2023-02-06 17:19 ` Shashank Sharma
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.