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From: Alex Deucher <alexdeucher@gmail.com>
To: Guchun Chen <guchun.chen@amd.com>
Cc: "Deucher, Alexander" <alexander.deucher@amd.com>,
	xinhui pan <xinhui.pan@amd.com>,
	Christian Koenig <christian.koenig@amd.com>,
	amd-gfx list <amd-gfx@lists.freedesktop.org>,
	Hawking Zhang <hawking.zhang@amd.com>
Subject: Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs
Date: Tue, 22 Feb 2022 12:00:19 -0500	[thread overview]
Message-ID: <CADnq5_PRn-G0FC46Wh-8HJs=EL+hLNfYz=NNC-PGKosDrPXrsQ@mail.gmail.com> (raw)
In-Reply-To: <20220222150731.16954-1-guchun.chen@amd.com>

On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote:
>
> Due to faulty VBIOS out there, harvest bit setting is not
> consistently correct especially for display IP. So far,
> it's hard to work out a solution on all the legacy Navi1x
> ASICs in a short time, so to avoid regression, limit harvest
> bit read on several ASICs. Will revisit later once VBIOS has
> corrected it in long term.
>

Looks like it may be incorrect for VCN as well.  Double check that.

Alex


> Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legacy GPUs")
> Signed-off-by: Guchun Chen <guchun.chen@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++-----
>  1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> index 11255290f117..2e0ff1ace6fc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
>          * so read harvest bit per IP data structure to set
>          * harvest configuration.
>          */
> -       if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0))
> -               amdgpu_discovery_read_harvest_bit_per_ip(adev,
> -                                                       &vcn_harvest_count);
> -       else
> +       if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) {
> +               if ((adev->pdev->device == 0x731E &&
> +                       (adev->pdev->revision == 0xC6 ||
> +                        adev->pdev->revision == 0xC7)) ||
> +                       (adev->pdev->device == 0x7340 &&
> +                        adev->pdev->revision == 0xC9) ||
> +                       (adev->pdev->device == 0x7360 &&
> +                        adev->pdev->revision == 0xC7))
> +                       amdgpu_discovery_read_harvest_bit_per_ip(adev,
> +                               &vcn_harvest_count);
> +       } else {
>                 amdgpu_disocvery_read_from_harvest_table(adev,
> -                                                       &vcn_harvest_count);
> +                       &vcn_harvest_count);
> +       }
>
>         amdgpu_discovery_harvest_config_quirk(adev);
>
> --
> 2.17.1
>

  parent reply	other threads:[~2022-02-22 17:00 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-22 15:07 [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Guchun Chen
2022-02-22 15:25 ` Deucher, Alexander
2022-02-22 17:00 ` Alex Deucher [this message]
2022-02-23  2:29   ` Chen, Guchun
2022-02-23  2:30     ` Deucher, Alexander
2022-02-24 15:58 ` Alex Deucher
2022-02-25  2:26   ` Chen, Guchun

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