* [PATCH 1/2] drm/amdgpu: enable ras capablity check on arcturus
@ 2019-11-13 14:57 ` Hawking Zhang
0 siblings, 0 replies; 8+ messages in thread
From: Hawking Zhang @ 2019-11-13 14:57 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Alex Deucher,
Dennis Li, John Clements
Cc: Hawking Zhang
check hw ras capablity via atomfirmware
Change-Id: I495b73ac6c04910de2ad8d9c46e98873fb5bc44d
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index d2e0859f57a0..98e41d9c2fc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -1661,7 +1661,8 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev,
*supported = 0;
if (amdgpu_sriov_vf(adev) ||
- adev->asic_type != CHIP_VEGA20)
+ (adev->asic_type != CHIP_VEGA20 &&
+ adev->asic_type != CHIP_ARCTURUS))
return;
if (adev->is_atom_fw &&
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] drm/amdgpu: enable ras capablity check on arcturus
@ 2019-11-13 14:57 ` Hawking Zhang
0 siblings, 0 replies; 8+ messages in thread
From: Hawking Zhang @ 2019-11-13 14:57 UTC (permalink / raw)
To: amd-gfx, Alex Deucher, Dennis Li, John Clements; +Cc: Hawking Zhang
check hw ras capablity via atomfirmware
Change-Id: I495b73ac6c04910de2ad8d9c46e98873fb5bc44d
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index d2e0859f57a0..98e41d9c2fc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -1661,7 +1661,8 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev,
*supported = 0;
if (amdgpu_sriov_vf(adev) ||
- adev->asic_type != CHIP_VEGA20)
+ (adev->asic_type != CHIP_VEGA20 &&
+ adev->asic_type != CHIP_ARCTURUS))
return;
if (adev->is_atom_fw &&
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
@ 2019-11-13 14:57 ` Hawking Zhang
0 siblings, 0 replies; 8+ messages in thread
From: Hawking Zhang @ 2019-11-13 14:57 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Alex Deucher,
Dennis Li, John Clements
Cc: Hawking Zhang
reuse vg20 umc functions for arcturus umc ras
Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3784b62201b0..8a5b722ce5b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
adev->umc.funcs = &umc_v6_0_funcs;
break;
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM;
@@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
r = amdgpu_atomfirmware_mem_ecc_supported(adev);
if (!r) {
DRM_INFO("ECC is not present.\n");
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
@ 2019-11-13 14:57 ` Hawking Zhang
0 siblings, 0 replies; 8+ messages in thread
From: Hawking Zhang @ 2019-11-13 14:57 UTC (permalink / raw)
To: amd-gfx, Alex Deucher, Dennis Li, John Clements; +Cc: Hawking Zhang
reuse vg20 umc functions for arcturus umc ras
Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3784b62201b0..8a5b722ce5b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
adev->umc.funcs = &umc_v6_0_funcs;
break;
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM;
@@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
r = amdgpu_atomfirmware_mem_ecc_supported(adev);
if (!r) {
DRM_INFO("ECC is not present.\n");
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
@ 2019-11-13 15:04 ` Alex Deucher
0 siblings, 0 replies; 8+ messages in thread
From: Alex Deucher @ 2019-11-13 15:04 UTC (permalink / raw)
To: Hawking Zhang; +Cc: Alex Deucher, John Clements, Dennis Li, amd-gfx list
On Wed, Nov 13, 2019 at 9:57 AM Hawking Zhang <Hawking.Zhang@amd.com> wrote:
>
> reuse vg20 umc functions for arcturus umc ras
>
> Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 3784b62201b0..8a5b722ce5b7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
> adev->umc.funcs = &umc_v6_0_funcs;
> break;
> case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
> adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
> adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM;
> @@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
> switch (adev->asic_type) {
> case CHIP_VEGA10:
> case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> r = amdgpu_atomfirmware_mem_ecc_supported(adev);
> if (!r) {
> DRM_INFO("ECC is not present.\n");
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
@ 2019-11-13 15:04 ` Alex Deucher
0 siblings, 0 replies; 8+ messages in thread
From: Alex Deucher @ 2019-11-13 15:04 UTC (permalink / raw)
To: Hawking Zhang; +Cc: Alex Deucher, John Clements, Dennis Li, amd-gfx list
On Wed, Nov 13, 2019 at 9:57 AM Hawking Zhang <Hawking.Zhang@amd.com> wrote:
>
> reuse vg20 umc functions for arcturus umc ras
>
> Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 3784b62201b0..8a5b722ce5b7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
> adev->umc.funcs = &umc_v6_0_funcs;
> break;
> case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
> adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
> adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM;
> @@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
> switch (adev->asic_type) {
> case CHIP_VEGA10:
> case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> r = amdgpu_atomfirmware_mem_ecc_supported(adev);
> if (!r) {
> DRM_INFO("ECC is not present.\n");
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
@ 2019-11-14 2:41 ` Clements, John
0 siblings, 0 replies; 8+ messages in thread
From: Clements, John @ 2019-11-14 2:41 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Deucher, Alexander, Li, Dennis
Cc: Zhang, Hawking
Reviewed-by: John Clements <John.Clements@amd.com>
-----Original Message-----
From: Hawking Zhang <Hawking.Zhang@amd.com>
Sent: Wednesday, November 13, 2019 10:57 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com>; Li, Dennis <Dennis.Li@amd.com>; Clements, John <John.Clements@amd.com>
Cc: Zhang, Hawking <Hawking.Zhang@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
reuse vg20 umc functions for arcturus umc ras
Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3784b62201b0..8a5b722ce5b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
adev->umc.funcs = &umc_v6_0_funcs;
break;
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM; @@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
r = amdgpu_atomfirmware_mem_ecc_supported(adev);
if (!r) {
DRM_INFO("ECC is not present.\n");
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
@ 2019-11-14 2:41 ` Clements, John
0 siblings, 0 replies; 8+ messages in thread
From: Clements, John @ 2019-11-14 2:41 UTC (permalink / raw)
To: Zhang, Hawking, amd-gfx, Deucher, Alexander, Li, Dennis; +Cc: Zhang, Hawking
Reviewed-by: John Clements <John.Clements@amd.com>
-----Original Message-----
From: Hawking Zhang <Hawking.Zhang@amd.com>
Sent: Wednesday, November 13, 2019 10:57 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com>; Li, Dennis <Dennis.Li@amd.com>; Clements, John <John.Clements@amd.com>
Cc: Zhang, Hawking <Hawking.Zhang@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras
reuse vg20 umc functions for arcturus umc ras
Change-Id: Ia8af3c20a717c76ec18aa5fa332cfd81ca60ff69
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3784b62201b0..8a5b722ce5b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -635,6 +635,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
adev->umc.funcs = &umc_v6_0_funcs;
break;
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM; @@ -748,6 +749,7 @@ static int gmc_v9_0_late_init(void *handle)
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_VEGA20:
+ case CHIP_ARCTURUS:
r = amdgpu_atomfirmware_mem_ecc_supported(adev);
if (!r) {
DRM_INFO("ECC is not present.\n");
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-11-14 2:41 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-13 14:57 [PATCH 1/2] drm/amdgpu: enable ras capablity check on arcturus Hawking Zhang
2019-11-13 14:57 ` Hawking Zhang
[not found] ` <20191113145705.12298-1-Hawking.Zhang-5C7GfCeVMHo@public.gmane.org>
2019-11-13 14:57 ` [PATCH 2/2] drm/amdgpu: init umc functions for arcturus umc ras Hawking Zhang
2019-11-13 14:57 ` Hawking Zhang
[not found] ` <20191113145705.12298-2-Hawking.Zhang-5C7GfCeVMHo@public.gmane.org>
2019-11-13 15:04 ` Alex Deucher
2019-11-13 15:04 ` Alex Deucher
2019-11-14 2:41 ` Clements, John
2019-11-14 2:41 ` Clements, John
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.