* [PATCH 1/5] drm/amd/pp: Add ACP PG support in SMU
@ 2018-07-29 11:12 Rex Zhu
[not found] ` <1532862729-29907-1-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Rex Zhu @ 2018-07-29 11:12 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu
when ACP block not enabled, we power off
acp block to save power.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 18 ++++++++++++++++++
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 21 ++++++++++++++++++++-
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 7a646f9..da4ebff 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1181,6 +1181,21 @@ static int pp_dpm_powergate_gfx(void *handle, bool gate)
return hwmgr->hwmgr_func->powergate_gfx(hwmgr, gate);
}
+static void pp_dpm_powergate_acp(void *handle, bool gate)
+{
+ struct pp_hwmgr *hwmgr = handle;
+
+ if (!hwmgr || !hwmgr->pm_en)
+ return;
+
+ if (hwmgr->hwmgr_func->powergate_acp == NULL) {
+ pr_info("%s was not implemented.\n", __func__);
+ return;
+ }
+
+ hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
+}
+
static int pp_set_powergating_by_smu(void *handle,
uint32_t block_type, bool gate)
{
@@ -1200,6 +1215,9 @@ static int pp_set_powergating_by_smu(void *handle,
case AMD_IP_BLOCK_TYPE_GFX:
ret = pp_dpm_powergate_gfx(handle, gate);
break;
+ case AMD_IP_BLOCK_TYPE_ACP:
+ pp_dpm_powergate_acp(handle, gate);
+ break;
default:
break;
}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
index 0adfc53..b863704 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
@@ -664,8 +664,13 @@ static void smu8_init_power_gate_state(struct pp_hwmgr *hwmgr)
data->uvd_power_gated = false;
data->vce_power_gated = false;
data->samu_power_gated = false;
+#ifdef CONFIG_DRM_AMD_ACP
data->acp_power_gated = false;
- data->pgacpinit = true;
+#else
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
+ data->acp_power_gated = true;
+#endif
+
}
static void smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr)
@@ -1886,6 +1891,19 @@ static int smu8_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable)
}
+static void smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
+{
+ struct smu8_hwmgr *data = hwmgr->backend;
+
+ if (data->acp_power_gated == bgate)
+ return;
+
+ if (bgate)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
+ else
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerON);
+}
+
static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
{
struct smu8_hwmgr *data = hwmgr->backend;
@@ -1951,6 +1969,7 @@ static void smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
.powerdown_uvd = smu8_dpm_powerdown_uvd,
.powergate_uvd = smu8_dpm_powergate_uvd,
.powergate_vce = smu8_dpm_powergate_vce,
+ .powergate_acp = smu8_dpm_powergate_acp,
.get_mclk = smu8_dpm_get_mclk,
.get_sclk = smu8_dpm_get_sclk,
.patch_boot_state = smu8_dpm_patch_boot_state,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index d3d9626..7e58a0d 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -247,6 +247,7 @@ struct pp_hwmgr_func {
int (*powerdown_uvd)(struct pp_hwmgr *hwmgr);
void (*powergate_vce)(struct pp_hwmgr *hwmgr, bool bgate);
void (*powergate_uvd)(struct pp_hwmgr *hwmgr, bool bgate);
+ void (*powergate_acp)(struct pp_hwmgr *hwmgr, bool bgate);
uint32_t (*get_mclk)(struct pp_hwmgr *hwmgr, bool low);
uint32_t (*get_sclk)(struct pp_hwmgr *hwmgr, bool low);
int (*power_state_set)(struct pp_hwmgr *hwmgr,
--
1.9.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/5] drm/amdgpu: Power down acp if board uses AZ (v2)
[not found] ` <1532862729-29907-1-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-07-29 11:12 ` Rex Zhu
2018-07-29 11:12 ` [PATCH 3/5] drm/amd/amdgpu: Enabling Power Gating for Stoney platform Rex Zhu
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Rex Zhu @ 2018-07-29 11:12 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher, Rex Zhu
From: Rex Zhu <Rex.Zhu@amd.com>
if board uses AZ rather than ACP, we power down acp
through smu to save power.
v2: handle S3/S4 and hw_fini (Alex)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 71efcf3..d4d1738 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -289,10 +289,12 @@ static int acp_hw_init(void *handle)
r = amd_acp_hw_init(adev->acp.cgs_device,
ip_block->version->major, ip_block->version->minor);
/* -ENODEV means board uses AZ rather than ACP */
- if (r == -ENODEV)
+ if (r == -ENODEV) {
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
return 0;
- else if (r)
+ } else if (r) {
return r;
+ }
if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289)
return -EINVAL;
@@ -497,8 +499,10 @@ static int acp_hw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
/* return early if no ACP */
- if (!adev->acp.acp_cell)
+ if (!adev->acp.acp_cell) {
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
return 0;
+ }
/* Assert Soft reset of ACP */
val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
@@ -556,11 +560,21 @@ static int acp_hw_fini(void *handle)
static int acp_suspend(void *handle)
{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ /* power up on suspend */
+ if (!adev->acp.acp_cell)
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
return 0;
}
static int acp_resume(void *handle)
{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ /* power down again on resume */
+ if (!adev->acp.acp_cell)
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
return 0;
}
--
1.9.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/5] drm/amd/amdgpu: Enabling Power Gating for Stoney platform
[not found] ` <1532862729-29907-1-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
2018-07-29 11:12 ` [PATCH 2/5] drm/amdgpu: Power down acp if board uses AZ (v2) Rex Zhu
@ 2018-07-29 11:12 ` Rex Zhu
2018-07-29 11:12 ` [PATCH 4/5] drm/amdgpu/acp: Powrgate acp via smu Rex Zhu
2018-07-29 11:12 ` [PATCH 5/5] drm/amgpu/acp: Implement set_powergating_state for acp Rex Zhu
3 siblings, 0 replies; 6+ messages in thread
From: Rex Zhu @ 2018-07-29 11:12 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu, Vijendar Mukunda
From: Vijendar Mukunda <vijendar.mukunda@amd.com>
Removed condition checks to skip the power gating feature for
stoney platform.
Signed-off-by: Vijendar Mukunda <vijendar.mukunda@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 53 ++++++++++++++++-----------------
1 file changed, 25 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index d4d1738..bab8fab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -301,20 +301,19 @@ static int acp_hw_init(void *handle)
acp_base = adev->rmmio_base;
- if (adev->asic_type != CHIP_STONEY) {
- adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL);
- if (adev->acp.acp_genpd == NULL)
- return -ENOMEM;
- adev->acp.acp_genpd->gpd.name = "ACP_AUDIO";
- adev->acp.acp_genpd->gpd.power_off = acp_poweroff;
- adev->acp.acp_genpd->gpd.power_on = acp_poweron;
+ adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL);
+ if (adev->acp.acp_genpd == NULL)
+ return -ENOMEM;
+ adev->acp.acp_genpd->gpd.name = "ACP_AUDIO";
+ adev->acp.acp_genpd->gpd.power_off = acp_poweroff;
+ adev->acp.acp_genpd->gpd.power_on = acp_poweron;
- adev->acp.acp_genpd->cgs_dev = adev->acp.cgs_device;
- pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false);
- }
+ adev->acp.acp_genpd->cgs_dev = adev->acp.cgs_device;
+
+ pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false);
adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell),
GFP_KERNEL);
@@ -431,17 +430,17 @@ static int acp_hw_init(void *handle)
if (r)
return r;
- if (adev->asic_type != CHIP_STONEY) {
- for (i = 0; i < ACP_DEVS ; i++) {
- dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
- r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev);
- if (r) {
- dev_err(dev, "Failed to add dev to genpd\n");
- return r;
- }
+
+ for (i = 0; i < ACP_DEVS ; i++) {
+ dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
+ r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev);
+ if (r) {
+ dev_err(dev, "Failed to add dev to genpd\n");
+ return r;
}
}
+
/* Assert Soft reset of ACP */
val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
@@ -499,7 +498,7 @@ static int acp_hw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
/* return early if no ACP */
- if (!adev->acp.acp_cell) {
+ if (!adev->acp.acp_genpd) {
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
return 0;
}
@@ -540,19 +539,17 @@ static int acp_hw_fini(void *handle)
udelay(100);
}
- if (adev->acp.acp_genpd) {
- for (i = 0; i < ACP_DEVS ; i++) {
- dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
- ret = pm_genpd_remove_device(dev);
- /* If removal fails, dont giveup and try rest */
- if (ret)
- dev_err(dev, "remove dev from genpd failed\n");
- }
- kfree(adev->acp.acp_genpd);
+ for (i = 0; i < ACP_DEVS ; i++) {
+ dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
+ ret = pm_genpd_remove_device(dev);
+ /* If removal fails, dont giveup and try rest */
+ if (ret)
+ dev_err(dev, "remove dev from genpd failed\n");
}
mfd_remove_devices(adev->acp.parent);
kfree(adev->acp.acp_res);
+ kfree(adev->acp.acp_genpd);
kfree(adev->acp.acp_cell);
return 0;
--
1.9.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 4/5] drm/amdgpu/acp: Powrgate acp via smu
[not found] ` <1532862729-29907-1-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
2018-07-29 11:12 ` [PATCH 2/5] drm/amdgpu: Power down acp if board uses AZ (v2) Rex Zhu
2018-07-29 11:12 ` [PATCH 3/5] drm/amd/amdgpu: Enabling Power Gating for Stoney platform Rex Zhu
@ 2018-07-29 11:12 ` Rex Zhu
2018-07-29 11:12 ` [PATCH 5/5] drm/amgpu/acp: Implement set_powergating_state for acp Rex Zhu
3 siblings, 0 replies; 6+ messages in thread
From: Rex Zhu @ 2018-07-29 11:12 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu
Call smu to power gate/ungate acp instand of only
powr down acp tiles in acp block.
when smu power gate acp:
smu will turn off clock, power down acp tiles,check and
enter in ULV state.
when smu ungate acp:
smu will exit ulv, turn on clocks, power on acp tiles.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 134 ++++++--------------------------
1 file changed, 22 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index bab8fab..b5b66c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -116,136 +116,47 @@ static int acp_sw_fini(void *handle)
return 0;
}
-/* power off a tile/block within ACP */
-static int acp_suspend_tile(void *cgs_dev, int tile)
-{
- u32 val = 0;
- u32 count = 0;
-
- if ((tile < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) {
- pr_err("Invalid ACP tile : %d to suspend\n", tile);
- return -1;
- }
-
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile);
- val &= ACP_TILE_ON_MASK;
-
- if (val == 0x0) {
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG);
- val = val | (1 << tile);
- cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val);
- cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG,
- 0x500 + tile);
-
- count = ACP_TIMEOUT_LOOP;
- while (true) {
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0
- + tile);
- val = val & ACP_TILE_ON_MASK;
- if (val == ACP_TILE_OFF_MASK)
- break;
- if (--count == 0) {
- pr_err("Timeout reading ACP PGFSM status\n");
- return -ETIMEDOUT;
- }
- udelay(100);
- }
-
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG);
-
- val |= ACP_TILE_OFF_RETAIN_REG_MASK;
- cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val);
- }
- return 0;
-}
-
-/* power on a tile/block within ACP */
-static int acp_resume_tile(void *cgs_dev, int tile)
-{
- u32 val = 0;
- u32 count = 0;
-
- if ((tile < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) {
- pr_err("Invalid ACP tile to resume\n");
- return -1;
- }
-
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile);
- val = val & ACP_TILE_ON_MASK;
-
- if (val != 0x0) {
- cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG,
- 0x600 + tile);
- count = ACP_TIMEOUT_LOOP;
- while (true) {
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0
- + tile);
- val = val & ACP_TILE_ON_MASK;
- if (val == 0x0)
- break;
- if (--count == 0) {
- pr_err("Timeout reading ACP PGFSM status\n");
- return -ETIMEDOUT;
- }
- udelay(100);
- }
- val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG);
- if (tile == ACP_TILE_P1)
- val = val & (ACP_TILE_P1_MASK);
- else if (tile == ACP_TILE_P2)
- val = val & (ACP_TILE_P2_MASK);
-
- cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val);
- }
- return 0;
-}
-
struct acp_pm_domain {
- void *cgs_dev;
+ void *adev;
struct generic_pm_domain gpd;
};
static int acp_poweroff(struct generic_pm_domain *genpd)
{
- int i, ret;
struct acp_pm_domain *apd;
+ struct amdgpu_device *adev;
apd = container_of(genpd, struct acp_pm_domain, gpd);
if (apd != NULL) {
- /* Donot return abruptly if any of power tile fails to suspend.
- * Log it and continue powering off other tile
- */
- for (i = 4; i >= 0 ; i--) {
- ret = acp_suspend_tile(apd->cgs_dev, ACP_TILE_P1 + i);
- if (ret)
- pr_err("ACP tile %d tile suspend failed\n", i);
- }
+ adev = apd->adev;
+ /* call smu to POWER GATE ACP block
+ * smu will
+ * 1. turn off the acp clock
+ * 2. power off the acp tiles
+ * 3. check and enter ulv state
+ */
+ if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
}
return 0;
}
static int acp_poweron(struct generic_pm_domain *genpd)
{
- int i, ret;
struct acp_pm_domain *apd;
+ struct amdgpu_device *adev;
apd = container_of(genpd, struct acp_pm_domain, gpd);
if (apd != NULL) {
- for (i = 0; i < 2; i++) {
- ret = acp_resume_tile(apd->cgs_dev, ACP_TILE_P1 + i);
- if (ret) {
- pr_err("ACP tile %d resume failed\n", i);
- break;
- }
- }
-
- /* Disable DSPs which are not going to be used */
- for (i = 0; i < 3; i++) {
- ret = acp_suspend_tile(apd->cgs_dev, ACP_TILE_DSP0 + i);
- /* Continue suspending other DSP, even if one fails */
- if (ret)
- pr_err("ACP DSP %d suspend failed\n", i);
- }
+ adev = apd->adev;
+ /* call smu to UNGATE ACP block
+ * smu will
+ * 1. exit ulv
+ * 2. turn on acp clock
+ * 3. power on acp tiles
+ */
+ if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
}
return 0;
}
@@ -311,7 +222,7 @@ static int acp_hw_init(void *handle)
adev->acp.acp_genpd->gpd.power_on = acp_poweron;
- adev->acp.acp_genpd->cgs_dev = adev->acp.cgs_device;
+ adev->acp.acp_genpd->adev = adev;
pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false);
@@ -430,7 +341,6 @@ static int acp_hw_init(void *handle)
if (r)
return r;
-
for (i = 0; i < ACP_DEVS ; i++) {
dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);
r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev);
--
1.9.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 5/5] drm/amgpu/acp: Implement set_powergating_state for acp
[not found] ` <1532862729-29907-1-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
` (2 preceding siblings ...)
2018-07-29 11:12 ` [PATCH 4/5] drm/amdgpu/acp: Powrgate acp via smu Rex Zhu
@ 2018-07-29 11:12 ` Rex Zhu
[not found] ` <1532862729-29907-5-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
3 siblings, 1 reply; 6+ messages in thread
From: Rex Zhu @ 2018-07-29 11:12 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu
so driver can powergate acp block after asic initialized
to save power.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index b5b66c3..297a549 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -514,6 +514,12 @@ static int acp_set_clockgating_state(void *handle,
static int acp_set_powergating_state(void *handle,
enum amd_powergating_state state)
{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ bool enable = state == AMD_PG_STATE_GATE ? true : false;
+
+ if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);
+
return 0;
}
--
1.9.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 5/5] drm/amgpu/acp: Implement set_powergating_state for acp
[not found] ` <1532862729-29907-5-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-07-31 21:47 ` Alex Deucher
0 siblings, 0 replies; 6+ messages in thread
From: Alex Deucher @ 2018-07-31 21:47 UTC (permalink / raw)
To: Rex Zhu; +Cc: amd-gfx list
On Sun, Jul 29, 2018 at 7:12 AM, Rex Zhu <rex.zhu@amd.com> wrote:
> so driver can powergate acp block after asic initialized
> to save power.
>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index b5b66c3..297a549 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -514,6 +514,12 @@ static int acp_set_clockgating_state(void *handle,
> static int acp_set_powergating_state(void *handle,
> enum amd_powergating_state state)
> {
> + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> + bool enable = state == AMD_PG_STATE_GATE ? true : false;
> +
> + if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);
> +
> return 0;
> }
>
> --
> 1.9.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-07-31 21:47 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-29 11:12 [PATCH 1/5] drm/amd/pp: Add ACP PG support in SMU Rex Zhu
[not found] ` <1532862729-29907-1-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
2018-07-29 11:12 ` [PATCH 2/5] drm/amdgpu: Power down acp if board uses AZ (v2) Rex Zhu
2018-07-29 11:12 ` [PATCH 3/5] drm/amd/amdgpu: Enabling Power Gating for Stoney platform Rex Zhu
2018-07-29 11:12 ` [PATCH 4/5] drm/amdgpu/acp: Powrgate acp via smu Rex Zhu
2018-07-29 11:12 ` [PATCH 5/5] drm/amgpu/acp: Implement set_powergating_state for acp Rex Zhu
[not found] ` <1532862729-29907-5-git-send-email-rex.zhu-5C7GfCeVMHo@public.gmane.org>
2018-07-31 21:47 ` Alex Deucher
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