* [PATCH v2 0/4] arm64: dts: exynos: gs101: define all PERIC USI nodes
@ 2024-03-26 10:36 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Hi,
The series starts with some cleanup/cosmetics patches, then defines all
the PERIC USI nodes.
v2:
- reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names
- move the pinctrl-* properties after clocks so that we keep alphabetic
order
- join lines close to 80 chars
- use alphabetic order for the standard/common properties:
address/size-cells, clocks, interrupts, pinctrl
- collect R-b tags
v1:
- https://lore.kernel.org/linux-samsung-soc/20240307135248.162752-1-tudor.ambarus@linaro.org/
- https://lore.kernel.org/linux-samsung-soc/20240307135912.163996-1-tudor.ambarus@linaro.org/
Tudor Ambarus (4):
arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
arm64: dts: exynos: gs101: join lines close to 80 chars
arm64: dts: exynos: gs101: define all PERIC USI nodes
.../boot/dts/exynos/google/gs101-oriole.dts | 2 -
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 791 +++++++++++++++++-
2 files changed, 779 insertions(+), 14 deletions(-)
--
2.44.0.396.g6e790dbe36-goog
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 0/4] arm64: dts: exynos: gs101: define all PERIC USI nodes
@ 2024-03-26 10:36 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Hi,
The series starts with some cleanup/cosmetics patches, then defines all
the PERIC USI nodes.
v2:
- reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names
- move the pinctrl-* properties after clocks so that we keep alphabetic
order
- join lines close to 80 chars
- use alphabetic order for the standard/common properties:
address/size-cells, clocks, interrupts, pinctrl
- collect R-b tags
v1:
- https://lore.kernel.org/linux-samsung-soc/20240307135248.162752-1-tudor.ambarus@linaro.org/
- https://lore.kernel.org/linux-samsung-soc/20240307135912.163996-1-tudor.ambarus@linaro.org/
Tudor Ambarus (4):
arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
arm64: dts: exynos: gs101: join lines close to 80 chars
arm64: dts: exynos: gs101: define all PERIC USI nodes
.../boot/dts/exynos/google/gs101-oriole.dts | 2 -
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 791 +++++++++++++++++-
2 files changed, 779 insertions(+), 14 deletions(-)
--
2.44.0.396.g6e790dbe36-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 10:36 ` Tudor Ambarus
-1 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi,
thus the pinctrl-0/names shall stay in dtsi. Move them.
While moving, reverse the pinctrl-* lines, first pinctrl-0 then
pinctrl-names.
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 --
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index 6ccade2c8cb4..9dc0f47ef646 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -103,8 +103,6 @@ key_power: key-power-pins {
};
&serial_0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_bus>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 55e6bcb3689e..0b0db735dc8e 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -424,6 +424,8 @@ serial_0: serial@10a00000 {
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
+ pinctrl-0 = <&uart0_bus>;
+ pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
--
2.44.0.396.g6e790dbe36-goog
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
@ 2024-03-26 10:36 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi,
thus the pinctrl-0/names shall stay in dtsi. Move them.
While moving, reverse the pinctrl-* lines, first pinctrl-0 then
pinctrl-names.
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 --
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index 6ccade2c8cb4..9dc0f47ef646 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -103,8 +103,6 @@ key_power: key-power-pins {
};
&serial_0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_bus>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 55e6bcb3689e..0b0db735dc8e 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -424,6 +424,8 @@ serial_0: serial@10a00000 {
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
+ pinctrl-0 = <&uart0_bus>;
+ pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
--
2.44.0.396.g6e790dbe36-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 10:36 ` Tudor Ambarus
-1 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
pinctrl-* properties after clocks so that we keep alphabetic order and
align with the other similar definitions.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 0b0db735dc8e..cfb3ddc7f885 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -393,11 +393,11 @@ hsi2c_8: i2c@10970000 {
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&hsi2c8_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
+ pinctrl-0 = <&hsi2c8_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
@@ -473,11 +473,11 @@ hsi2c_12: i2c@10d50000 {
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-0 = <&hsi2c12_bus>;
- pinctrl-names = "default";
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
+ pinctrl-0 = <&hsi2c12_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
--
2.44.0.396.g6e790dbe36-goog
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
@ 2024-03-26 10:36 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
pinctrl-* properties after clocks so that we keep alphabetic order and
align with the other similar definitions.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 0b0db735dc8e..cfb3ddc7f885 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -393,11 +393,11 @@ hsi2c_8: i2c@10970000 {
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&hsi2c8_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
+ pinctrl-0 = <&hsi2c8_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
@@ -473,11 +473,11 @@ hsi2c_12: i2c@10d50000 {
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-0 = <&hsi2c12_bus>;
- pinctrl-names = "default";
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
+ pinctrl-0 = <&hsi2c12_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
--
2.44.0.396.g6e790dbe36-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 10:36 ` Tudor Ambarus
-1 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
These lines fit 81 characters, which is pretty close to 80.
Join the lines.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index cfb3ddc7f885..690deca37e4f 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -374,8 +374,7 @@ pinctrl_peric0: pinctrl@10840000 {
};
usi8: usi@109700c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
ranges;
#address-cells = <1>;
@@ -403,8 +402,7 @@ hsi2c_8: i2c@10970000 {
};
usi_uart: usi@10a000c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10a000c0 0x20>;
ranges;
#address-cells = <1>;
@@ -419,8 +417,7 @@ usi_uart: usi@10a000c0 {
serial_0: serial@10a00000 {
compatible = "google,gs101-uart";
reg = <0x10a00000 0xc0>;
- interrupts = <GIC_SPI 634
- IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
@@ -454,8 +451,7 @@ pinctrl_peric1: pinctrl@10c40000 {
};
usi12: usi@10d500c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d500c0 0x20>;
ranges;
#address-cells = <1>;
--
2.44.0.396.g6e790dbe36-goog
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
@ 2024-03-26 10:36 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
These lines fit 81 characters, which is pretty close to 80.
Join the lines.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index cfb3ddc7f885..690deca37e4f 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -374,8 +374,7 @@ pinctrl_peric0: pinctrl@10840000 {
};
usi8: usi@109700c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
ranges;
#address-cells = <1>;
@@ -403,8 +402,7 @@ hsi2c_8: i2c@10970000 {
};
usi_uart: usi@10a000c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10a000c0 0x20>;
ranges;
#address-cells = <1>;
@@ -419,8 +417,7 @@ usi_uart: usi@10a000c0 {
serial_0: serial@10a00000 {
compatible = "google,gs101-uart";
reg = <0x10a00000 0xc0>;
- interrupts = <GIC_SPI 634
- IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
@@ -454,8 +451,7 @@ pinctrl_peric1: pinctrl@10c40000 {
};
usi12: usi@10d500c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d500c0 0x20>;
ranges;
#address-cells = <1>;
--
2.44.0.396.g6e790dbe36-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI nodes
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 10:36 ` Tudor Ambarus
-1 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Universal Serial Interface (USI) supports three types of serial
interface such as UART, SPI and I2C. Each protocol works independently.
USI can be configured to work as one of these protocols. Define all the
USI nodes from the PERIC blocks (USI0-14), in all their possible
configurations. These blocks have the TX/RX FIFO depth of 64 bytes.
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 769 +++++++++++++++++++
1 file changed, 769 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 690deca37e4f..eddb6b326fde 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -373,6 +373,391 @@ pinctrl_peric0: pinctrl@10840000 {
interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ usi1: usi@109000c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109000c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1000>;
+ status = "disabled";
+
+ hsi2c_1: i2c@10900000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10900000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_1: serial@10900000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10900000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart1_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_1: spi@10900000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10900000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi2: usi@109100c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109100c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1004>;
+ status = "disabled";
+
+ hsi2c_2: i2c@10910000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10910000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c2_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_2: serial@10910000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10910000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart2_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_2: spi@10910000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10910000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi2_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi3: usi@109200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1008>;
+ status = "disabled";
+
+ hsi2c_3: i2c@10920000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10920000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c3_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_3: serial@10920000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10920000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart3_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_3: spi@10920000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10920000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi3_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi4: usi@109300c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109300c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x100c>;
+ status = "disabled";
+
+ hsi2c_4: i2c@10930000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10930000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c4_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_4: serial@10930000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10930000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart4_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_4: spi@10930000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10930000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi4_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi5: usi@109400c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1010>;
+ status = "disabled";
+
+ hsi2c_5: i2c@10940000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10940000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c5_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_5: serial@10940000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10940000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart5_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_5: spi@10940000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10940000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi5_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi6: usi@109500c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109500c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1014>;
+ status = "disabled";
+
+ hsi2c_6: i2c@10950000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10950000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c6_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_6: serial@10950000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10950000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart6_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_6: spi@10950000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10950000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi6_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi7: usi@109600c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109600c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1018>;
+ status = "disabled";
+
+ hsi2c_7: i2c@10960000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10960000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c7_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_7: serial@10960000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10960000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart7_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_7: spi@10960000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10960000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi7_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
usi8: usi@109700c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
@@ -399,6 +784,33 @@ hsi2c_8: i2c@10970000 {
pinctrl-names = "default";
status = "disabled";
};
+
+ serial_8: serial@10970000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10970000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart8_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_8: spi@10970000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10970000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi8_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
};
usi_uart: usi@10a000c0 {
@@ -428,6 +840,61 @@ serial_0: serial@10a00000 {
};
};
+ usi14: usi@10a200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10a200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1028>;
+ status = "disabled";
+
+ hsi2c_14: i2c@10a20000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10a20000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c14_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_14: serial@10a20000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10a20000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart14_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_14: spi@10a20000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10a20000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi14_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
cmu_peric1: clock-controller@10c00000 {
compatible = "google,gs101-cmu-peric1";
reg = <0x10c00000 0x4000>;
@@ -450,6 +917,226 @@ pinctrl_peric1: pinctrl@10c40000 {
interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ usi0: usi@10d100c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d100c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1000>;
+ status = "disabled";
+
+ hsi2c_0: i2c@10d10000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d10000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_usi0: serial@10d10000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d10000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart0_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_0: spi@10d10000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d10000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi9: usi@10d200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1004>;
+ status = "disabled";
+
+ hsi2c_9: i2c@10d20000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d20000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c9_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_9: serial@10d20000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d20000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart9_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_9: spi@10d20000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d20000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi9_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi10: usi@10d300c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d300c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1008>;
+ status = "disabled";
+
+ hsi2c_10: i2c@10d30000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d30000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c10_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_10: serial@10d30000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d30000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart10_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_10: spi@10d30000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d30000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi10_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi11: usi@10d400c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x100c>;
+ status = "disabled";
+
+ hsi2c_11: i2c@10d40000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d40000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c11_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_11: serial@10d40000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d40000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart11_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_11: spi@10d40000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d40000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi11_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
usi12: usi@10d500c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d500c0 0x20>;
@@ -476,6 +1163,88 @@ hsi2c_12: i2c@10d50000 {
pinctrl-names = "default";
status = "disabled";
};
+
+ serial_12: serial@10d50000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d50000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart12_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_12: spi@10d50000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d50000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi12_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi13: usi@10d600c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d600c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1014>;
+ status = "disabled";
+
+ hsi2c_13: i2c@10d60000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d60000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c13_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_13: serial@10d60000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d60000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart13_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_13: spi@10d60000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d60000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi13_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
};
pinctrl_hsi1: pinctrl@11840000 {
--
2.44.0.396.g6e790dbe36-goog
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI nodes
@ 2024-03-26 10:36 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 10:36 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Universal Serial Interface (USI) supports three types of serial
interface such as UART, SPI and I2C. Each protocol works independently.
USI can be configured to work as one of these protocols. Define all the
USI nodes from the PERIC blocks (USI0-14), in all their possible
configurations. These blocks have the TX/RX FIFO depth of 64 bytes.
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 769 +++++++++++++++++++
1 file changed, 769 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 690deca37e4f..eddb6b326fde 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -373,6 +373,391 @@ pinctrl_peric0: pinctrl@10840000 {
interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ usi1: usi@109000c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109000c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1000>;
+ status = "disabled";
+
+ hsi2c_1: i2c@10900000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10900000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_1: serial@10900000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10900000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart1_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_1: spi@10900000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10900000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi2: usi@109100c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109100c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1004>;
+ status = "disabled";
+
+ hsi2c_2: i2c@10910000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10910000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c2_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_2: serial@10910000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10910000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart2_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_2: spi@10910000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10910000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi2_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi3: usi@109200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1008>;
+ status = "disabled";
+
+ hsi2c_3: i2c@10920000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10920000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c3_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_3: serial@10920000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10920000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart3_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_3: spi@10920000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10920000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi3_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi4: usi@109300c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109300c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x100c>;
+ status = "disabled";
+
+ hsi2c_4: i2c@10930000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10930000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c4_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_4: serial@10930000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10930000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart4_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_4: spi@10930000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10930000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi4_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi5: usi@109400c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1010>;
+ status = "disabled";
+
+ hsi2c_5: i2c@10940000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10940000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c5_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_5: serial@10940000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10940000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart5_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_5: spi@10940000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10940000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi5_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi6: usi@109500c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109500c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1014>;
+ status = "disabled";
+
+ hsi2c_6: i2c@10950000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10950000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c6_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_6: serial@10950000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10950000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart6_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_6: spi@10950000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10950000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi6_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi7: usi@109600c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109600c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1018>;
+ status = "disabled";
+
+ hsi2c_7: i2c@10960000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10960000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c7_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_7: serial@10960000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10960000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart7_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_7: spi@10960000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10960000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi7_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
usi8: usi@109700c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
@@ -399,6 +784,33 @@ hsi2c_8: i2c@10970000 {
pinctrl-names = "default";
status = "disabled";
};
+
+ serial_8: serial@10970000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10970000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart8_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_8: spi@10970000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10970000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi8_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
};
usi_uart: usi@10a000c0 {
@@ -428,6 +840,61 @@ serial_0: serial@10a00000 {
};
};
+ usi14: usi@10a200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10a200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1028>;
+ status = "disabled";
+
+ hsi2c_14: i2c@10a20000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10a20000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c14_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_14: serial@10a20000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10a20000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart14_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_14: spi@10a20000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10a20000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi14_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
cmu_peric1: clock-controller@10c00000 {
compatible = "google,gs101-cmu-peric1";
reg = <0x10c00000 0x4000>;
@@ -450,6 +917,226 @@ pinctrl_peric1: pinctrl@10c40000 {
interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ usi0: usi@10d100c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d100c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1000>;
+ status = "disabled";
+
+ hsi2c_0: i2c@10d10000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d10000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_usi0: serial@10d10000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d10000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart0_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_0: spi@10d10000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d10000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi9: usi@10d200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1004>;
+ status = "disabled";
+
+ hsi2c_9: i2c@10d20000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d20000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c9_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_9: serial@10d20000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d20000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart9_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_9: spi@10d20000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d20000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi9_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi10: usi@10d300c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d300c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1008>;
+ status = "disabled";
+
+ hsi2c_10: i2c@10d30000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d30000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c10_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_10: serial@10d30000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d30000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart10_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_10: spi@10d30000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d30000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi10_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi11: usi@10d400c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x100c>;
+ status = "disabled";
+
+ hsi2c_11: i2c@10d40000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d40000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c11_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_11: serial@10d40000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d40000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart11_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_11: spi@10d40000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d40000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi11_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
usi12: usi@10d500c0 {
compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d500c0 0x20>;
@@ -476,6 +1163,88 @@ hsi2c_12: i2c@10d50000 {
pinctrl-names = "default";
status = "disabled";
};
+
+ serial_12: serial@10d50000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d50000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart12_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_12: spi@10d50000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d50000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi12_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi13: usi@10d600c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d600c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1014>;
+ status = "disabled";
+
+ hsi2c_13: i2c@10d60000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d60000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c13_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_13: serial@10d60000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d60000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart13_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_13: spi@10d60000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d60000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi13_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
};
pinctrl_hsi1: pinctrl@11840000 {
--
2.44.0.396.g6e790dbe36-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* RE: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 11:06 ` Alim Akhtar
-1 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:06 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-
> 0/names to dtsi
>
> The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi, thus the
> pinctrl-0/names shall stay in dtsi. Move them.
>
> While moving, reverse the pinctrl-* lines, first pinctrl-0 then pinctrl-names.
>
> Reviewed-by: André Draszik <andre.draszik@linaro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 --
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
@ 2024-03-26 11:06 ` Alim Akhtar
0 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:06 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-
> 0/names to dtsi
>
> The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi, thus the
> pinctrl-0/names shall stay in dtsi. Move them.
>
> While moving, reverse the pinctrl-* lines, first pinctrl-0 then pinctrl-names.
>
> Reviewed-by: André Draszik <andre.draszik@linaro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 --
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 11:06 ` Alim Akhtar
-1 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:06 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props
> alphabetically
>
> Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
> pinctrl-* properties after clocks so that we keep alphabetic order and
align
> with the other similar definitions.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
@ 2024-03-26 11:06 ` Alim Akhtar
0 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:06 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props
> alphabetically
>
> Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
> pinctrl-* properties after clocks so that we keep alphabetic order and
align
> with the other similar definitions.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 11:10 ` Alim Akhtar
-1 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:10 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
chars
>
> These lines fit 81 characters, which is pretty close to 80.
> Join the lines.
>
Does this breaks checkpatch flow?
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
For better readability, this looks good.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
@ 2024-03-26 11:10 ` Alim Akhtar
0 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:10 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
chars
>
> These lines fit 81 characters, which is pretty close to 80.
> Join the lines.
>
Does this breaks checkpatch flow?
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
For better readability, this looks good.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 11:13 ` André Draszik
-1 siblings, 0 replies; 30+ messages in thread
From: André Draszik @ 2024-03-26 11:13 UTC (permalink / raw)
To: Tudor Ambarus, peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, willmcvicker, kernel-team
Hi Tudor,
On Tue, 2024-03-26 at 10:36 +0000, Tudor Ambarus wrote:
> Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
> pinctrl-* properties after clocks so that we keep alphabetic order and
> align with the other similar definitions.
Krzysztof had requested to change not just the DTSI but all instances for GS101
here:
https://lore.kernel.org/all/98810c49-38e6-4402-bd47-05d8cbc99ef3@linaro.org/
Cheers,
Andre'
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
@ 2024-03-26 11:13 ` André Draszik
0 siblings, 0 replies; 30+ messages in thread
From: André Draszik @ 2024-03-26 11:13 UTC (permalink / raw)
To: Tudor Ambarus, peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, willmcvicker, kernel-team
Hi Tudor,
On Tue, 2024-03-26 at 10:36 +0000, Tudor Ambarus wrote:
> Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
> pinctrl-* properties after clocks so that we keep alphabetic order and
> align with the other similar definitions.
Krzysztof had requested to change not just the DTSI but all instances for GS101
here:
https://lore.kernel.org/all/98810c49-38e6-4402-bd47-05d8cbc99ef3@linaro.org/
Cheers,
Andre'
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 11:24 ` Peter Griffin
-1 siblings, 0 replies; 30+ messages in thread
From: Peter Griffin @ 2024-03-26 11:24 UTC (permalink / raw)
To: Tudor Ambarus
Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, alim.akhtar,
linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
On Tue, 26 Mar 2024 at 10:36, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
>
> The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi,
> thus the pinctrl-0/names shall stay in dtsi. Move them.
>
> While moving, reverse the pinctrl-* lines, first pinctrl-0 then
> pinctrl-names.
>
> Reviewed-by: André Draszik <andre.draszik@linaro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
regards,
Peter
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
@ 2024-03-26 11:24 ` Peter Griffin
0 siblings, 0 replies; 30+ messages in thread
From: Peter Griffin @ 2024-03-26 11:24 UTC (permalink / raw)
To: Tudor Ambarus
Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, alim.akhtar,
linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
On Tue, 26 Mar 2024 at 10:36, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
>
> The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi,
> thus the pinctrl-0/names shall stay in dtsi. Move them.
>
> While moving, reverse the pinctrl-* lines, first pinctrl-0 then
> pinctrl-names.
>
> Reviewed-by: André Draszik <andre.draszik@linaro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
regards,
Peter
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI nodes
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-26 11:35 ` Alim Akhtar
-1 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:35 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI
nodes
>
> Universal Serial Interface (USI) supports three types of serial interface
such
> as UART, SPI and I2C. Each protocol works independently.
> USI can be configured to work as one of these protocols. Define all the
USI
> nodes from the PERIC blocks (USI0-14), in all their possible
configurations.
> These blocks have the TX/RX FIFO depth of 64 bytes.
>
> Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 769
> +++++++++++++++++++
> 1 file changed, 769 insertions(+)
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* RE: [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI nodes
@ 2024-03-26 11:35 ` Alim Akhtar
0 siblings, 0 replies; 30+ messages in thread
From: Alim Akhtar @ 2024-03-26 11:35 UTC (permalink / raw)
To: 'Tudor Ambarus',
peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@linaro.org>
> Sent: Tuesday, March 26, 2024 4:06 PM
> To: peter.griffin@linaro.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; andre.draszik@linaro.org;
> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
> <tudor.ambarus@linaro.org>
> Subject: [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI
nodes
>
> Universal Serial Interface (USI) supports three types of serial interface
such
> as UART, SPI and I2C. Each protocol works independently.
> USI can be configured to work as one of these protocols. Define all the
USI
> nodes from the PERIC blocks (USI0-14), in all their possible
configurations.
> These blocks have the TX/RX FIFO depth of 64 bytes.
>
> Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 769
> +++++++++++++++++++
> 1 file changed, 769 insertions(+)
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
2024-03-26 11:13 ` André Draszik
@ 2024-03-26 14:39 ` Tudor Ambarus
-1 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 14:39 UTC (permalink / raw)
To: André Draszik, peter.griffin, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, willmcvicker, kernel-team
On 3/26/24 11:13, André Draszik wrote:
> Hi Tudor,
>
> On Tue, 2024-03-26 at 10:36 +0000, Tudor Ambarus wrote:
>> Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
>> pinctrl-* properties after clocks so that we keep alphabetic order and
>> align with the other similar definitions.
>
> Krzysztof had requested to change not just the DTSI but all instances for GS101
> here:
> https://lore.kernel.org/all/98810c49-38e6-4402-bd47-05d8cbc99ef3@linaro.org/
>
ah, yes, makes sense. I saw you had your own patch doing the reverse,
I'll take yours and rebase on top.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically
@ 2024-03-26 14:39 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 14:39 UTC (permalink / raw)
To: André Draszik, peter.griffin, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, willmcvicker, kernel-team
On 3/26/24 11:13, André Draszik wrote:
> Hi Tudor,
>
> On Tue, 2024-03-26 at 10:36 +0000, Tudor Ambarus wrote:
>> Reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names. Move the
>> pinctrl-* properties after clocks so that we keep alphabetic order and
>> align with the other similar definitions.
>
> Krzysztof had requested to change not just the DTSI but all instances for GS101
> here:
> https://lore.kernel.org/all/98810c49-38e6-4402-bd47-05d8cbc99ef3@linaro.org/
>
ah, yes, makes sense. I saw you had your own patch doing the reverse,
I'll take yours and rebase on top.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
2024-03-26 11:10 ` Alim Akhtar
@ 2024-03-26 14:48 ` Tudor Ambarus
-1 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 14:48 UTC (permalink / raw)
To: Alim Akhtar, peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
On 3/26/24 11:10, Alim Akhtar wrote:
> Hi Tudor
Hi, Alim!
>
>> -----Original Message-----
>> From: Tudor Ambarus <tudor.ambarus@linaro.org>
>> Sent: Tuesday, March 26, 2024 4:06 PM
>> To: peter.griffin@linaro.org; robh+dt@kernel.org;
>> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
>> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
>> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
>> kernel@vger.kernel.org; andre.draszik@linaro.org;
>> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
>> <tudor.ambarus@linaro.org>
>> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
> chars
>>
>> These lines fit 81 characters, which is pretty close to 80.
>> Join the lines.
>>
> Does this breaks checkpatch flow?
./scripts/checkpatch --strict does not complain
>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
>> ---
> For better readability, this looks good.
>
> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Thank you for reviewing the series!
Cheers,
ta
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
@ 2024-03-26 14:48 ` Tudor Ambarus
0 siblings, 0 replies; 30+ messages in thread
From: Tudor Ambarus @ 2024-03-26 14:48 UTC (permalink / raw)
To: Alim Akhtar, peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
On 3/26/24 11:10, Alim Akhtar wrote:
> Hi Tudor
Hi, Alim!
>
>> -----Original Message-----
>> From: Tudor Ambarus <tudor.ambarus@linaro.org>
>> Sent: Tuesday, March 26, 2024 4:06 PM
>> To: peter.griffin@linaro.org; robh+dt@kernel.org;
>> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
>> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
>> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
>> kernel@vger.kernel.org; andre.draszik@linaro.org;
>> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
>> <tudor.ambarus@linaro.org>
>> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
> chars
>>
>> These lines fit 81 characters, which is pretty close to 80.
>> Join the lines.
>>
> Does this breaks checkpatch flow?
./scripts/checkpatch --strict does not complain
>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
>> ---
> For better readability, this looks good.
>
> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Thank you for reviewing the series!
Cheers,
ta
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
2024-03-26 14:48 ` Tudor Ambarus
@ 2024-03-28 9:49 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 30+ messages in thread
From: Krzysztof Kozlowski @ 2024-03-28 9:49 UTC (permalink / raw)
To: Tudor Ambarus, Alim Akhtar, peter.griffin, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
On 26/03/2024 15:48, Tudor Ambarus wrote:
>
>
> On 3/26/24 11:10, Alim Akhtar wrote:
>> Hi Tudor
>
> Hi, Alim!
>>
>>> -----Original Message-----
>>> From: Tudor Ambarus <tudor.ambarus@linaro.org>
>>> Sent: Tuesday, March 26, 2024 4:06 PM
>>> To: peter.griffin@linaro.org; robh+dt@kernel.org;
>>> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
>>> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
>>> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
>>> kernel@vger.kernel.org; andre.draszik@linaro.org;
>>> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
>>> <tudor.ambarus@linaro.org>
>>> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
>> chars
>>>
>>> These lines fit 81 characters, which is pretty close to 80.
>>> Join the lines.
>>>
>> Does this breaks checkpatch flow?
>
> ./scripts/checkpatch --strict does not complain
Because checkpatch does not have limit of 80... Coding style has, but
for readability it is fine to stretch or even break this rule.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
@ 2024-03-28 9:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 30+ messages in thread
From: Krzysztof Kozlowski @ 2024-03-28 9:49 UTC (permalink / raw)
To: Tudor Ambarus, Alim Akhtar, peter.griffin, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
On 26/03/2024 15:48, Tudor Ambarus wrote:
>
>
> On 3/26/24 11:10, Alim Akhtar wrote:
>> Hi Tudor
>
> Hi, Alim!
>>
>>> -----Original Message-----
>>> From: Tudor Ambarus <tudor.ambarus@linaro.org>
>>> Sent: Tuesday, March 26, 2024 4:06 PM
>>> To: peter.griffin@linaro.org; robh+dt@kernel.org;
>>> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
>>> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
>>> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
>>> kernel@vger.kernel.org; andre.draszik@linaro.org;
>>> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
>>> <tudor.ambarus@linaro.org>
>>> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
>> chars
>>>
>>> These lines fit 81 characters, which is pretty close to 80.
>>> Join the lines.
>>>
>> Does this breaks checkpatch flow?
>
> ./scripts/checkpatch --strict does not complain
Because checkpatch does not have limit of 80... Coding style has, but
for readability it is fine to stretch or even break this rule.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
2024-03-26 10:36 ` Tudor Ambarus
@ 2024-03-28 11:34 ` Peter Griffin
-1 siblings, 0 replies; 30+ messages in thread
From: Peter Griffin @ 2024-03-28 11:34 UTC (permalink / raw)
To: Tudor Ambarus
Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, alim.akhtar,
linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
On Tue, 26 Mar 2024 at 10:36, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
>
> These lines fit 81 characters, which is pretty close to 80.
> Join the lines.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index cfb3ddc7f885..690deca37e4f 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -374,8 +374,7 @@ pinctrl_peric0: pinctrl@10840000 {
> };
>
> usi8: usi@109700c0 {
> - compatible = "google,gs101-usi",
> - "samsung,exynos850-usi";
> + compatible = "google,gs101-usi", "samsung,exynos850-usi";
> reg = <0x109700c0 0x20>;
> ranges;
> #address-cells = <1>;
> @@ -403,8 +402,7 @@ hsi2c_8: i2c@10970000 {
> };
>
> usi_uart: usi@10a000c0 {
> - compatible = "google,gs101-usi",
> - "samsung,exynos850-usi";
> + compatible = "google,gs101-usi", "samsung,exynos850-usi";
> reg = <0x10a000c0 0x20>;
> ranges;
> #address-cells = <1>;
> @@ -419,8 +417,7 @@ usi_uart: usi@10a000c0 {
> serial_0: serial@10a00000 {
> compatible = "google,gs101-uart";
> reg = <0x10a00000 0xc0>;
> - interrupts = <GIC_SPI 634
> - IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
> clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
> <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
> clock-names = "uart", "clk_uart_baud0";
> @@ -454,8 +451,7 @@ pinctrl_peric1: pinctrl@10c40000 {
> };
>
> usi12: usi@10d500c0 {
> - compatible = "google,gs101-usi",
> - "samsung,exynos850-usi";
> + compatible = "google,gs101-usi", "samsung,exynos850-usi";
> reg = <0x10d500c0 0x20>;
> ranges;
> #address-cells = <1>;
> --
> 2.44.0.396.g6e790dbe36-goog
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
@ 2024-03-28 11:34 ` Peter Griffin
0 siblings, 0 replies; 30+ messages in thread
From: Peter Griffin @ 2024-03-28 11:34 UTC (permalink / raw)
To: Tudor Ambarus
Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, alim.akhtar,
linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
Hi Tudor,
On Tue, 26 Mar 2024 at 10:36, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
>
> These lines fit 81 characters, which is pretty close to 80.
> Join the lines.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index cfb3ddc7f885..690deca37e4f 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -374,8 +374,7 @@ pinctrl_peric0: pinctrl@10840000 {
> };
>
> usi8: usi@109700c0 {
> - compatible = "google,gs101-usi",
> - "samsung,exynos850-usi";
> + compatible = "google,gs101-usi", "samsung,exynos850-usi";
> reg = <0x109700c0 0x20>;
> ranges;
> #address-cells = <1>;
> @@ -403,8 +402,7 @@ hsi2c_8: i2c@10970000 {
> };
>
> usi_uart: usi@10a000c0 {
> - compatible = "google,gs101-usi",
> - "samsung,exynos850-usi";
> + compatible = "google,gs101-usi", "samsung,exynos850-usi";
> reg = <0x10a000c0 0x20>;
> ranges;
> #address-cells = <1>;
> @@ -419,8 +417,7 @@ usi_uart: usi@10a000c0 {
> serial_0: serial@10a00000 {
> compatible = "google,gs101-uart";
> reg = <0x10a00000 0xc0>;
> - interrupts = <GIC_SPI 634
> - IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
> clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
> <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
> clock-names = "uart", "clk_uart_baud0";
> @@ -454,8 +451,7 @@ pinctrl_peric1: pinctrl@10c40000 {
> };
>
> usi12: usi@10d500c0 {
> - compatible = "google,gs101-usi",
> - "samsung,exynos850-usi";
> + compatible = "google,gs101-usi", "samsung,exynos850-usi";
> reg = <0x10d500c0 0x20>;
> ranges;
> #address-cells = <1>;
> --
> 2.44.0.396.g6e790dbe36-goog
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2024-03-28 11:35 UTC | newest]
Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-03-26 10:36 [PATCH v2 0/4] arm64: dts: exynos: gs101: define all PERIC USI nodes Tudor Ambarus
2024-03-26 10:36 ` Tudor Ambarus
2024-03-26 10:36 ` [PATCH v2 1/4] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi Tudor Ambarus
2024-03-26 10:36 ` Tudor Ambarus
2024-03-26 11:06 ` Alim Akhtar
2024-03-26 11:06 ` Alim Akhtar
2024-03-26 11:24 ` Peter Griffin
2024-03-26 11:24 ` Peter Griffin
2024-03-26 10:36 ` [PATCH v2 2/4] arm64: dts: exynos: gs101: order pinctrl-* props alphabetically Tudor Ambarus
2024-03-26 10:36 ` Tudor Ambarus
2024-03-26 11:06 ` Alim Akhtar
2024-03-26 11:06 ` Alim Akhtar
2024-03-26 11:13 ` André Draszik
2024-03-26 11:13 ` André Draszik
2024-03-26 14:39 ` Tudor Ambarus
2024-03-26 14:39 ` Tudor Ambarus
2024-03-26 10:36 ` [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars Tudor Ambarus
2024-03-26 10:36 ` Tudor Ambarus
2024-03-26 11:10 ` Alim Akhtar
2024-03-26 11:10 ` Alim Akhtar
2024-03-26 14:48 ` Tudor Ambarus
2024-03-26 14:48 ` Tudor Ambarus
2024-03-28 9:49 ` Krzysztof Kozlowski
2024-03-28 9:49 ` Krzysztof Kozlowski
2024-03-28 11:34 ` Peter Griffin
2024-03-28 11:34 ` Peter Griffin
2024-03-26 10:36 ` [PATCH v2 4/4] arm64: dts: exynos: gs101: define all PERIC USI nodes Tudor Ambarus
2024-03-26 10:36 ` Tudor Ambarus
2024-03-26 11:35 ` Alim Akhtar
2024-03-26 11:35 ` Alim Akhtar
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