[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[fu.wei]

From: Tomasz Nowicki <tomasz.nowicki@linaro.org>

This commit provides APEI arch-specific bits for aarch64

Meanwhile,
(1)add a new subfunction "hest_ia32_init" for
"acpi_disable_cmcff" which is used by IA-32 Architecture
Corrected Machine Check (CMC).
(2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
a generic place.
(3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.

[Fu Wei: improve && upstream]

Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
Signed-off-by: Fu Wei <fu.wei@linaro.org>
Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
---
Changelog:
v12:https://lkml.org/lkml/2016/7/29/
    Fix a comment problem(redundant "with")
    Rebase to 4.7.0-g680eee2

v11:https://lkml.org/lkml/2016/7/27/427
    Rebase to v4.7-0e06f5c0

v10:https://lkml.org/lkml/2016/4/14
    Fix the Alphabetical order problem in arch/arm64/Kconfig

v9: https://lkml.org/lkml/2016/4/5/522
    Improve the comment for arch_apei_flush_tlb_one.
    Using select "HAVE_ACPI_APEI if (ACPI && EFI)" to fix the EFI dependence
    problem.

v8: https://lkml.org/lkml/2016/3/29/132
    Fix a "undefined reference" bug by selecting EFI when ACPI_APEI is set
    on ARM64.

v7: https://lkml.org/lkml/2016/3/17/183
    Add comment for arch_apei_flush_tlb_one in arch/arm64/include/asm/acpi.h

v6: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006644.html
    Move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
    a generic place.
    Delete HAVE_ACPI_APEI_HEST_IA32.

v5: https://lkml.org/lkml/2015/12/10/131
    Add "HAVE_ACPI_APEI_HEST_IA32" instead of
    "#if defined(__i386__) || defined(__x86_64__)".

v4: https://lkml.org/lkml/2015/12/8/188
    Rebase to latest kernel version(4.4-rc4).
    Move arch_apei_flush_tlb_one into header file as a inline function
    Add a new subfunction "hest_ia_init" for "acpi_disable_cmcff".

v3: https://lkml.org/lkml/2015/12/3/521
    Remove "acpi_disable_cmcff" from arm64 code,
    and wrap it in hest.c by "#if defined(__i386__) || defined(__x86_64__)"

v2: https://lkml.org/lkml/2015/12/2/432
    Rebase to latest kernel version(4.4-rc3).
    Move arch_apei_flush_tlb_one() to arch/arm64/kernel/acpi.c

v1: https://lkml.org/lkml/2015/8/14/199
    Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
    Delete arch/arm64/kernel/apei.c.
    Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".

 arch/arm64/Kconfig            |  1 +
 arch/arm64/include/asm/acpi.h | 16 +++++++++++++++-
 arch/x86/kernel/acpi/apei.c   |  3 ---
 drivers/acpi/apei/hest.c      | 18 +++++++++++++++---
 4 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 9f8b99e..3268299 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -50,6 +50,7 @@ config ARM64
 	select GENERIC_TIME_VSYSCALL
 	select HANDLE_DOMAIN_IRQ
 	select HARDIRQS_SW_RESEND
+	select HAVE_ACPI_APEI if (ACPI && EFI)
 	select HAVE_ALIGNED_STRUCT_PAGE if SLUB
 	select HAVE_ARCH_AUDITSYSCALL
 	select HAVE_ARCH_BITREVERSE
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index 5420cb0..7cdf681 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -17,6 +17,7 @@
 
 #include <asm/cputype.h>
 #include <asm/smp_plat.h>
+#include <asm/tlbflush.h>
 
 /* Macros for consistency checks of the GICC subtable of MADT */
 #define ACPI_MADT_GICC_LENGTH	\
@@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
 }
 
 #ifdef	CONFIG_ACPI_APEI
+#define acpi_disable_cmcff 1
 pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
-#endif
+
+/*
+ * Despite its name, this function must still broadcast the TLB
+ * invalidation in order to ensure other CPUs don't up with junk
+ * entries as a result of speculation. Unusually, its also called in
+ * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
+ * TLB broadcasting, then we're in trouble here.
+ */
+static inline void arch_apei_flush_tlb_one(unsigned long addr)
+{
+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
+}
+#endif /* CONFIG_ACPI_APEI */
 
 #ifdef CONFIG_ACPI_NUMA
 int arm64_acpi_numa_init(void);
diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
index c280df6..ea3046e 100644
--- a/arch/x86/kernel/acpi/apei.c
+++ b/arch/x86/kernel/acpi/apei.c
@@ -24,9 +24,6 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
 	struct acpi_hest_ia_corrected *cmc;
 	struct acpi_hest_ia_error_bank *mc_bank;
 
-	if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
-		return 0;
-
 	cmc = (struct acpi_hest_ia_corrected *)hest_hdr;
 	if (!cmc->enabled)
 		return 0;
diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
index 20b3fcf..792a0d9 100644
--- a/drivers/acpi/apei/hest.c
+++ b/drivers/acpi/apei/hest.c
@@ -123,7 +123,18 @@ EXPORT_SYMBOL_GPL(apei_hest_parse);
  */
 static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data)
 {
-	return arch_apei_enable_cmcff(hest_hdr, data);
+	if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
+		return 0;
+
+	if (!acpi_disable_cmcff)
+		return !arch_apei_enable_cmcff(hest_hdr, data);
+
+	return 0;
+}
+
+static inline int __init hest_ia32_init(void)
+{
+	return apei_hest_parse(hest_parse_cmc, NULL);
 }
 
 struct ghes_arr {
@@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
 		goto err;
 	}
 
-	if (!acpi_disable_cmcff)
-		apei_hest_parse(hest_parse_cmc, NULL);
+	rc = hest_ia32_init();
+	if (rc)
+		goto err;
 
 	if (!ghes_disable) {
 		rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
-- 
2.5.5

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[fu.wei at linaro.org]

From: Tomasz Nowicki <tomasz.nowicki@linaro.org>

This commit provides APEI arch-specific bits for aarch64

Meanwhile,
(1)add a new subfunction "hest_ia32_init" for
"acpi_disable_cmcff" which is used by IA-32 Architecture
Corrected Machine Check (CMC).
(2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
a generic place.
(3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.

[Fu Wei: improve && upstream]

Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
Signed-off-by: Fu Wei <fu.wei@linaro.org>
Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
---
Changelog:
v12:https://lkml.org/lkml/2016/7/29/
    Fix a comment problem(redundant "with")
    Rebase to 4.7.0-g680eee2

v11:https://lkml.org/lkml/2016/7/27/427
    Rebase to v4.7-0e06f5c0

v10:https://lkml.org/lkml/2016/4/14
    Fix the Alphabetical order problem in arch/arm64/Kconfig

v9: https://lkml.org/lkml/2016/4/5/522
    Improve the comment for arch_apei_flush_tlb_one.
    Using select "HAVE_ACPI_APEI if (ACPI && EFI)" to fix the EFI dependence
    problem.

v8: https://lkml.org/lkml/2016/3/29/132
    Fix a "undefined reference" bug by selecting EFI when ACPI_APEI is set
    on ARM64.

v7: https://lkml.org/lkml/2016/3/17/183
    Add comment for arch_apei_flush_tlb_one in arch/arm64/include/asm/acpi.h

v6: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006644.html
    Move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
    a generic place.
    Delete HAVE_ACPI_APEI_HEST_IA32.

v5: https://lkml.org/lkml/2015/12/10/131
    Add "HAVE_ACPI_APEI_HEST_IA32" instead of
    "#if defined(__i386__) || defined(__x86_64__)".

v4: https://lkml.org/lkml/2015/12/8/188
    Rebase to latest kernel version(4.4-rc4).
    Move arch_apei_flush_tlb_one into header file as a inline function
    Add a new subfunction "hest_ia_init" for "acpi_disable_cmcff".

v3: https://lkml.org/lkml/2015/12/3/521
    Remove "acpi_disable_cmcff" from arm64 code,
    and wrap it in hest.c by "#if defined(__i386__) || defined(__x86_64__)"

v2: https://lkml.org/lkml/2015/12/2/432
    Rebase to latest kernel version(4.4-rc3).
    Move arch_apei_flush_tlb_one() to arch/arm64/kernel/acpi.c

v1: https://lkml.org/lkml/2015/8/14/199
    Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
    Delete arch/arm64/kernel/apei.c.
    Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".

 arch/arm64/Kconfig            |  1 +
 arch/arm64/include/asm/acpi.h | 16 +++++++++++++++-
 arch/x86/kernel/acpi/apei.c   |  3 ---
 drivers/acpi/apei/hest.c      | 18 +++++++++++++++---
 4 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 9f8b99e..3268299 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -50,6 +50,7 @@ config ARM64
 	select GENERIC_TIME_VSYSCALL
 	select HANDLE_DOMAIN_IRQ
 	select HARDIRQS_SW_RESEND
+	select HAVE_ACPI_APEI if (ACPI && EFI)
 	select HAVE_ALIGNED_STRUCT_PAGE if SLUB
 	select HAVE_ARCH_AUDITSYSCALL
 	select HAVE_ARCH_BITREVERSE
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index 5420cb0..7cdf681 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -17,6 +17,7 @@
 
 #include <asm/cputype.h>
 #include <asm/smp_plat.h>
+#include <asm/tlbflush.h>
 
 /* Macros for consistency checks of the GICC subtable of MADT */
 #define ACPI_MADT_GICC_LENGTH	\
@@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
 }
 
 #ifdef	CONFIG_ACPI_APEI
+#define acpi_disable_cmcff 1
 pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
-#endif
+
+/*
+ * Despite its name, this function must still broadcast the TLB
+ * invalidation in order to ensure other CPUs don't up with junk
+ * entries as a result of speculation. Unusually, its also called in
+ * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
+ * TLB broadcasting, then we're in trouble here.
+ */
+static inline void arch_apei_flush_tlb_one(unsigned long addr)
+{
+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
+}
+#endif /* CONFIG_ACPI_APEI */
 
 #ifdef CONFIG_ACPI_NUMA
 int arm64_acpi_numa_init(void);
diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
index c280df6..ea3046e 100644
--- a/arch/x86/kernel/acpi/apei.c
+++ b/arch/x86/kernel/acpi/apei.c
@@ -24,9 +24,6 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
 	struct acpi_hest_ia_corrected *cmc;
 	struct acpi_hest_ia_error_bank *mc_bank;
 
-	if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
-		return 0;
-
 	cmc = (struct acpi_hest_ia_corrected *)hest_hdr;
 	if (!cmc->enabled)
 		return 0;
diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
index 20b3fcf..792a0d9 100644
--- a/drivers/acpi/apei/hest.c
+++ b/drivers/acpi/apei/hest.c
@@ -123,7 +123,18 @@ EXPORT_SYMBOL_GPL(apei_hest_parse);
  */
 static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data)
 {
-	return arch_apei_enable_cmcff(hest_hdr, data);
+	if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
+		return 0;
+
+	if (!acpi_disable_cmcff)
+		return !arch_apei_enable_cmcff(hest_hdr, data);
+
+	return 0;
+}
+
+static inline int __init hest_ia32_init(void)
+{
+	return apei_hest_parse(hest_parse_cmc, NULL);
 }
 
 struct ghes_arr {
@@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
 		goto err;
 	}
 
-	if (!acpi_disable_cmcff)
-		apei_hest_parse(hest_parse_cmc, NULL);
+	rc = hest_ia32_init();
+	if (rc)
+		goto err;
 
 	if (!ghes_disable) {
 		rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
-- 
2.5.5

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei@linaro.org wrote:
> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> 
> This commit provides APEI arch-specific bits for aarch64
> 
> Meanwhile,
> (1)add a new subfunction "hest_ia32_init" for
> "acpi_disable_cmcff" which is used by IA-32 Architecture
> Corrected Machine Check (CMC).
> (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
> a generic place.
> (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
> because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
> 
> [Fu Wei: improve && upstream]
> 
> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
> Signed-off-by: Fu Wei <fu.wei@linaro.org>
> Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
> Acked-by: Will Deacon <will.deacon@arm.com>
> ---

...

> @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>  }
>  
>  #ifdef	CONFIG_ACPI_APEI
> +#define acpi_disable_cmcff 1

What does that mean? ARM doesn't have firmware-first mode?

A piece of comment please.

>  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
> -#endif
> +
> +/*
> + * Despite its name, this function must still broadcast the TLB
> + * invalidation in order to ensure other CPUs don't up with junk
						      ^
						     end

> + * entries as a result of speculation. Unusually, its also called in
> + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
> + * TLB broadcasting, then we're in trouble here.
> + */
> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> +{
> +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> +}
> +#endif /* CONFIG_ACPI_APEI */
>  
>  #ifdef CONFIG_ACPI_NUMA
>  int arm64_acpi_numa_init(void);
> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
> index c280df6..ea3046e 100644
> --- a/arch/x86/kernel/acpi/apei.c
> +++ b/arch/x86/kernel/acpi/apei.c

...

> diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
> index 20b3fcf..792a0d9 100644
> --- a/drivers/acpi/apei/hest.c
> +++ b/drivers/acpi/apei/hest.c
> @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>  		goto err;
>  	}
>  
> -	if (!acpi_disable_cmcff)
> -		apei_hest_parse(hest_parse_cmc, NULL);
> +	rc = hest_ia32_init();

Why do you need a separate hest_ia32_init() here?

You can do

	rc = apei_hest_parse(hest_parse_cmc, NULL);

directly here AFAICT.

> +	if (rc)
> +		goto err;
>  
>  	if (!ghes_disable) {
>  		rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> -- 
> 2.5.5
> 

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei at linaro.org wrote:
> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> 
> This commit provides APEI arch-specific bits for aarch64
> 
> Meanwhile,
> (1)add a new subfunction "hest_ia32_init" for
> "acpi_disable_cmcff" which is used by IA-32 Architecture
> Corrected Machine Check (CMC).
> (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
> a generic place.
> (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
> because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
> 
> [Fu Wei: improve && upstream]
> 
> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
> Signed-off-by: Fu Wei <fu.wei@linaro.org>
> Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
> Acked-by: Will Deacon <will.deacon@arm.com>
> ---

...

> @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>  }
>  
>  #ifdef	CONFIG_ACPI_APEI
> +#define acpi_disable_cmcff 1

What does that mean? ARM doesn't have firmware-first mode?

A piece of comment please.

>  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
> -#endif
> +
> +/*
> + * Despite its name, this function must still broadcast the TLB
> + * invalidation in order to ensure other CPUs don't up with junk
						      ^
						     end

> + * entries as a result of speculation. Unusually, its also called in
> + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
> + * TLB broadcasting, then we're in trouble here.
> + */
> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> +{
> +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> +}
> +#endif /* CONFIG_ACPI_APEI */
>  
>  #ifdef CONFIG_ACPI_NUMA
>  int arm64_acpi_numa_init(void);
> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
> index c280df6..ea3046e 100644
> --- a/arch/x86/kernel/acpi/apei.c
> +++ b/arch/x86/kernel/acpi/apei.c

...

> diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
> index 20b3fcf..792a0d9 100644
> --- a/drivers/acpi/apei/hest.c
> +++ b/drivers/acpi/apei/hest.c
> @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>  		goto err;
>  	}
>  
> -	if (!acpi_disable_cmcff)
> -		apei_hest_parse(hest_parse_cmc, NULL);
> +	rc = hest_ia32_init();

Why do you need a separate hest_ia32_init() here?

You can do

	rc = apei_hest_parse(hest_parse_cmc, NULL);

directly here AFAICT.

> +	if (rc)
> +		goto err;
>  
>  	if (!ghes_disable) {
>  		rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> -- 
> 2.5.5
> 

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
--

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

Tomasz's linaro address bounces, adding one I've found on lkml to CC
instead.

On Thu, Aug 04, 2016 at 11:48:38AM +0200, Borislav Petkov wrote:
> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei@linaro.org wrote:
> > From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> > 
> > This commit provides APEI arch-specific bits for aarch64
> > 
> > Meanwhile,
> > (1)add a new subfunction "hest_ia32_init" for
> > "acpi_disable_cmcff" which is used by IA-32 Architecture
> > Corrected Machine Check (CMC).
> > (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
> > a generic place.
> > (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
> > because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
> > 
> > [Fu Wei: improve && upstream]
> > 
> > Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> > Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
> > Signed-off-by: Fu Wei <fu.wei@linaro.org>
> > Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
> > Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
> > Acked-by: Will Deacon <will.deacon@arm.com>
> > ---
> 
> ...
> 
> > @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
> >  }
> >  
> >  #ifdef	CONFIG_ACPI_APEI
> > +#define acpi_disable_cmcff 1
> 
> What does that mean? ARM doesn't have firmware-first mode?
> 
> A piece of comment please.
> 
> >  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
> > -#endif
> > +
> > +/*
> > + * Despite its name, this function must still broadcast the TLB
> > + * invalidation in order to ensure other CPUs don't up with junk
> 						      ^
> 						     end
> 
> > + * entries as a result of speculation. Unusually, its also called in
> > + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
> > + * TLB broadcasting, then we're in trouble here.
> > + */
> > +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> > +{
> > +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> > +}
> > +#endif /* CONFIG_ACPI_APEI */
> >  
> >  #ifdef CONFIG_ACPI_NUMA
> >  int arm64_acpi_numa_init(void);
> > diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
> > index c280df6..ea3046e 100644
> > --- a/arch/x86/kernel/acpi/apei.c
> > +++ b/arch/x86/kernel/acpi/apei.c
> 
> ...
> 
> > diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
> > index 20b3fcf..792a0d9 100644
> > --- a/drivers/acpi/apei/hest.c
> > +++ b/drivers/acpi/apei/hest.c
> > @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
> >  		goto err;
> >  	}
> >  
> > -	if (!acpi_disable_cmcff)
> > -		apei_hest_parse(hest_parse_cmc, NULL);
> > +	rc = hest_ia32_init();
> 
> Why do you need a separate hest_ia32_init() here?
> 
> You can do
> 
> 	rc = apei_hest_parse(hest_parse_cmc, NULL);
> 
> directly here AFAICT.
> 
> > +	if (rc)
> > +		goto err;
> >  
> >  	if (!ghes_disable) {
> >  		rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> > -- 
> > 2.5.5
> > 

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

Tomasz's linaro address bounces, adding one I've found on lkml to CC
instead.

On Thu, Aug 04, 2016 at 11:48:38AM +0200, Borislav Petkov wrote:
> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei at linaro.org wrote:
> > From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> > 
> > This commit provides APEI arch-specific bits for aarch64
> > 
> > Meanwhile,
> > (1)add a new subfunction "hest_ia32_init" for
> > "acpi_disable_cmcff" which is used by IA-32 Architecture
> > Corrected Machine Check (CMC).
> > (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
> > a generic place.
> > (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
> > because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
> > 
> > [Fu Wei: improve && upstream]
> > 
> > Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> > Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
> > Signed-off-by: Fu Wei <fu.wei@linaro.org>
> > Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
> > Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
> > Acked-by: Will Deacon <will.deacon@arm.com>
> > ---
> 
> ...
> 
> > @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
> >  }
> >  
> >  #ifdef	CONFIG_ACPI_APEI
> > +#define acpi_disable_cmcff 1
> 
> What does that mean? ARM doesn't have firmware-first mode?
> 
> A piece of comment please.
> 
> >  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
> > -#endif
> > +
> > +/*
> > + * Despite its name, this function must still broadcast the TLB
> > + * invalidation in order to ensure other CPUs don't up with junk
> 						      ^
> 						     end
> 
> > + * entries as a result of speculation. Unusually, its also called in
> > + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
> > + * TLB broadcasting, then we're in trouble here.
> > + */
> > +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> > +{
> > +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> > +}
> > +#endif /* CONFIG_ACPI_APEI */
> >  
> >  #ifdef CONFIG_ACPI_NUMA
> >  int arm64_acpi_numa_init(void);
> > diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
> > index c280df6..ea3046e 100644
> > --- a/arch/x86/kernel/acpi/apei.c
> > +++ b/arch/x86/kernel/acpi/apei.c
> 
> ...
> 
> > diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
> > index 20b3fcf..792a0d9 100644
> > --- a/drivers/acpi/apei/hest.c
> > +++ b/drivers/acpi/apei/hest.c
> > @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
> >  		goto err;
> >  	}
> >  
> > -	if (!acpi_disable_cmcff)
> > -		apei_hest_parse(hest_parse_cmc, NULL);
> > +	rc = hest_ia32_init();
> 
> Why do you need a separate hest_ia32_init() here?
> 
> You can do
> 
> 	rc = apei_hest_parse(hest_parse_cmc, NULL);
> 
> directly here AFAICT.
> 
> > +	if (rc)
> > +		goto err;
> >  
> >  	if (!ghes_disable) {
> >  		rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> > -- 
> > 2.5.5
> > 

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
--

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav.

On 4 August 2016 at 18:30, Borislav Petkov <bp@suse.de> wrote:
> Tomasz's linaro address bounces, adding one I've found on lkml to CC
> instead.

Thanks for reminding me, I have added him(tn@semihalf.com) in TO list.
The dated email address(tomasz.nowicki@linaro.org) was added by "git
send-email".
I have disabled it by "--no-signed-off-by-cc"

>
> On Thu, Aug 04, 2016 at 11:48:38AM +0200, Borislav Petkov wrote:
>> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei@linaro.org wrote:
>> > From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> >
>> > This commit provides APEI arch-specific bits for aarch64
>> >
>> > Meanwhile,
>> > (1)add a new subfunction "hest_ia32_init" for
>> > "acpi_disable_cmcff" which is used by IA-32 Architecture
>> > Corrected Machine Check (CMC).
>> > (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>> > a generic place.
>> > (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
>> > because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
>> >
>> > [Fu Wei: improve && upstream]
>> >
>> > Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> > Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>> > Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> > Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
>> > Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
>> > Acked-by: Will Deacon <will.deacon@arm.com>
>> > ---
>>
>> ...
>>
>> > @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>> >  }
>> >
>> >  #ifdef     CONFIG_ACPI_APEI
>> > +#define acpi_disable_cmcff 1
>>
>> What does that mean? ARM doesn't have firmware-first mode?
>>
>> A piece of comment please.
>>
>> >  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
>> > -#endif
>> > +
>> > +/*
>> > + * Despite its name, this function must still broadcast the TLB
>> > + * invalidation in order to ensure other CPUs don't up with junk
>>                                                     ^
>>                                                    end
>>
>> > + * entries as a result of speculation. Unusually, its also called in
>> > + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
>> > + * TLB broadcasting, then we're in trouble here.
>> > + */
>> > +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> > +{
>> > +   flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> > +}
>> > +#endif /* CONFIG_ACPI_APEI */
>> >
>> >  #ifdef CONFIG_ACPI_NUMA
>> >  int arm64_acpi_numa_init(void);
>> > diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
>> > index c280df6..ea3046e 100644
>> > --- a/arch/x86/kernel/acpi/apei.c
>> > +++ b/arch/x86/kernel/acpi/apei.c
>>
>> ...
>>
>> > diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
>> > index 20b3fcf..792a0d9 100644
>> > --- a/drivers/acpi/apei/hest.c
>> > +++ b/drivers/acpi/apei/hest.c
>> > @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>> >             goto err;
>> >     }
>> >
>> > -   if (!acpi_disable_cmcff)
>> > -           apei_hest_parse(hest_parse_cmc, NULL);
>> > +   rc = hest_ia32_init();
>>
>> Why do you need a separate hest_ia32_init() here?
>>
>> You can do
>>
>>       rc = apei_hest_parse(hest_parse_cmc, NULL);
>>
>> directly here AFAICT.
>>
>> > +   if (rc)
>> > +           goto err;
>> >
>> >     if (!ghes_disable) {
>> >             rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>> > --
>> > 2.5.5
>> >
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav.

On 4 August 2016 at 18:30, Borislav Petkov <bp@suse.de> wrote:
> Tomasz's linaro address bounces, adding one I've found on lkml to CC
> instead.

Thanks for reminding me, I have added him(tn@semihalf.com) in TO list.
The dated email address(tomasz.nowicki@linaro.org) was added by "git
send-email".
I have disabled it by "--no-signed-off-by-cc"

>
> On Thu, Aug 04, 2016 at 11:48:38AM +0200, Borislav Petkov wrote:
>> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei@linaro.org wrote:
>> > From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> >
>> > This commit provides APEI arch-specific bits for aarch64
>> >
>> > Meanwhile,
>> > (1)add a new subfunction "hest_ia32_init" for
>> > "acpi_disable_cmcff" which is used by IA-32 Architecture
>> > Corrected Machine Check (CMC).
>> > (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>> > a generic place.
>> > (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
>> > because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
>> >
>> > [Fu Wei: improve && upstream]
>> >
>> > Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> > Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>> > Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> > Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
>> > Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
>> > Acked-by: Will Deacon <will.deacon@arm.com>
>> > ---
>>
>> ...
>>
>> > @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>> >  }
>> >
>> >  #ifdef     CONFIG_ACPI_APEI
>> > +#define acpi_disable_cmcff 1
>>
>> What does that mean? ARM doesn't have firmware-first mode?
>>
>> A piece of comment please.
>>
>> >  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
>> > -#endif
>> > +
>> > +/*
>> > + * Despite its name, this function must still broadcast the TLB
>> > + * invalidation in order to ensure other CPUs don't up with junk
>>                                                     ^
>>                                                    end
>>
>> > + * entries as a result of speculation. Unusually, its also called in
>> > + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
>> > + * TLB broadcasting, then we're in trouble here.
>> > + */
>> > +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> > +{
>> > +   flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> > +}
>> > +#endif /* CONFIG_ACPI_APEI */
>> >
>> >  #ifdef CONFIG_ACPI_NUMA
>> >  int arm64_acpi_numa_init(void);
>> > diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
>> > index c280df6..ea3046e 100644
>> > --- a/arch/x86/kernel/acpi/apei.c
>> > +++ b/arch/x86/kernel/acpi/apei.c
>>
>> ...
>>
>> > diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
>> > index 20b3fcf..792a0d9 100644
>> > --- a/drivers/acpi/apei/hest.c
>> > +++ b/drivers/acpi/apei/hest.c
>> > @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>> >             goto err;
>> >     }
>> >
>> > -   if (!acpi_disable_cmcff)
>> > -           apei_hest_parse(hest_parse_cmc, NULL);
>> > +   rc = hest_ia32_init();
>>
>> Why do you need a separate hest_ia32_init() here?
>>
>> You can do
>>
>>       rc = apei_hest_parse(hest_parse_cmc, NULL);
>>
>> directly here AFAICT.
>>
>> > +   if (rc)
>> > +           goto err;
>> >
>> >     if (!ghes_disable) {
>> >             rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>> > --
>> > 2.5.5
>> >
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav.

On 4 August 2016 at 18:30, Borislav Petkov <bp@suse.de> wrote:
> Tomasz's linaro address bounces, adding one I've found on lkml to CC
> instead.

Thanks for reminding me, I have added him(tn at semihalf.com) in TO list.
The dated email address(tomasz.nowicki at linaro.org) was added by "git
send-email".
I have disabled it by "--no-signed-off-by-cc"

>
> On Thu, Aug 04, 2016 at 11:48:38AM +0200, Borislav Petkov wrote:
>> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei at linaro.org wrote:
>> > From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> >
>> > This commit provides APEI arch-specific bits for aarch64
>> >
>> > Meanwhile,
>> > (1)add a new subfunction "hest_ia32_init" for
>> > "acpi_disable_cmcff" which is used by IA-32 Architecture
>> > Corrected Machine Check (CMC).
>> > (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>> > a generic place.
>> > (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
>> > because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
>> >
>> > [Fu Wei: improve && upstream]
>> >
>> > Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> > Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>> > Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> > Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
>> > Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
>> > Acked-by: Will Deacon <will.deacon@arm.com>
>> > ---
>>
>> ...
>>
>> > @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>> >  }
>> >
>> >  #ifdef     CONFIG_ACPI_APEI
>> > +#define acpi_disable_cmcff 1
>>
>> What does that mean? ARM doesn't have firmware-first mode?
>>
>> A piece of comment please.
>>
>> >  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
>> > -#endif
>> > +
>> > +/*
>> > + * Despite its name, this function must still broadcast the TLB
>> > + * invalidation in order to ensure other CPUs don't up with junk
>>                                                     ^
>>                                                    end
>>
>> > + * entries as a result of speculation. Unusually, its also called in
>> > + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
>> > + * TLB broadcasting, then we're in trouble here.
>> > + */
>> > +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> > +{
>> > +   flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> > +}
>> > +#endif /* CONFIG_ACPI_APEI */
>> >
>> >  #ifdef CONFIG_ACPI_NUMA
>> >  int arm64_acpi_numa_init(void);
>> > diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
>> > index c280df6..ea3046e 100644
>> > --- a/arch/x86/kernel/acpi/apei.c
>> > +++ b/arch/x86/kernel/acpi/apei.c
>>
>> ...
>>
>> > diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
>> > index 20b3fcf..792a0d9 100644
>> > --- a/drivers/acpi/apei/hest.c
>> > +++ b/drivers/acpi/apei/hest.c
>> > @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>> >             goto err;
>> >     }
>> >
>> > -   if (!acpi_disable_cmcff)
>> > -           apei_hest_parse(hest_parse_cmc, NULL);
>> > +   rc = hest_ia32_init();
>>
>> Why do you need a separate hest_ia32_init() here?
>>
>> You can do
>>
>>       rc = apei_hest_parse(hest_parse_cmc, NULL);
>>
>> directly here AFAICT.
>>
>> > +   if (rc)
>> > +           goto err;
>> >
>> >     if (!ghes_disable) {
>> >             rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>> > --
>> > 2.5.5
>> >
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav

On 4 August 2016 at 17:48, Borislav Petkov <bp@suse.de> wrote:
> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei@linaro.org wrote:
>> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>
>> This commit provides APEI arch-specific bits for aarch64
>>
>> Meanwhile,
>> (1)add a new subfunction "hest_ia32_init" for
>> "acpi_disable_cmcff" which is used by IA-32 Architecture
>> Corrected Machine Check (CMC).
>> (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>> a generic place.
>> (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
>> because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
>>
>> [Fu Wei: improve && upstream]
>>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>> Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
>> Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
>> Acked-by: Will Deacon <will.deacon@arm.com>
>> ---
>
> ...
>
>> @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>>  }
>>
>>  #ifdef       CONFIG_ACPI_APEI
>> +#define acpi_disable_cmcff 1
>
> What does that mean? ARM doesn't have firmware-first mode?
>
> A piece of comment please.

Thanks I have added a comment on v13, please check.

>
>>  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
>> -#endif
>> +
>> +/*
>> + * Despite its name, this function must still broadcast the TLB
>> + * invalidation in order to ensure other CPUs don't up with junk
>                                                       ^
>                                                      end

Fixed, thanks :-)

>
>> + * entries as a result of speculation. Unusually, its also called in
>> + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
>> + * TLB broadcasting, then we're in trouble here.
>> + */
>> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> +{
>> +     flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> +}
>> +#endif /* CONFIG_ACPI_APEI */
>>
>>  #ifdef CONFIG_ACPI_NUMA
>>  int arm64_acpi_numa_init(void);
>> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
>> index c280df6..ea3046e 100644
>> --- a/arch/x86/kernel/acpi/apei.c
>> +++ b/arch/x86/kernel/acpi/apei.c
>
> ...
>
>> diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
>> index 20b3fcf..792a0d9 100644
>> --- a/drivers/acpi/apei/hest.c
>> +++ b/drivers/acpi/apei/hest.c
>> @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>>               goto err;
>>       }
>>
>> -     if (!acpi_disable_cmcff)
>> -             apei_hest_parse(hest_parse_cmc, NULL);
>> +     rc = hest_ia32_init();
>
> Why do you need a separate hest_ia32_init() here?
>
> You can do
>
>         rc = apei_hest_parse(hest_parse_cmc, NULL);
>
> directly here AFAICT.

yes, we can do that.

But the reason for a  separate hest_ia32_init() is:
For now(ACPI 6.1), we have three IA-32 Architecture-specific error
source structures, maybe we will parse them later.
So I made this hest_ia32_init() for all these structures. maybe we can do :
---
 static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
 return 0;

 if (!acpi_disable_cmcff)
 return !arch_apei_enable_cmcff(hest_hdr, data);

 return 0;
}

 static int __init hest_parse_mce(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CHECK)
 return 0;

// do something

 return 0;
}

 static int __init hest_parse_nmi(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_NMI)
 return 0;

// do something

 return 0;
}

static inline int __init hest_ia32_init(void)
{
  int ret = apei_hest_parse(hest_parse_nmi, NULL);
  if (ret)
     return ret;

  ret = apei_hest_parse(hest_parse_mce, NULL);
  if (ret)
     return ret;

   return apei_hest_parse(hest_parse_cmc, NULL);
}
---

But it is just my thought, please correct me if I misunderstand
something. Thanks :-)

>
>> +     if (rc)
>> +             goto err;
>>
>>       if (!ghes_disable) {
>>               rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>> --
>> 2.5.5
>>
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav

On 4 August 2016 at 17:48, Borislav Petkov <bp@suse.de> wrote:
> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei@linaro.org wrote:
>> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>
>> This commit provides APEI arch-specific bits for aarch64
>>
>> Meanwhile,
>> (1)add a new subfunction "hest_ia32_init" for
>> "acpi_disable_cmcff" which is used by IA-32 Architecture
>> Corrected Machine Check (CMC).
>> (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>> a generic place.
>> (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
>> because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
>>
>> [Fu Wei: improve && upstream]
>>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>> Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
>> Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
>> Acked-by: Will Deacon <will.deacon@arm.com>
>> ---
>
> ...
>
>> @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>>  }
>>
>>  #ifdef       CONFIG_ACPI_APEI
>> +#define acpi_disable_cmcff 1
>
> What does that mean? ARM doesn't have firmware-first mode?
>
> A piece of comment please.

Thanks I have added a comment on v13, please check.

>
>>  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
>> -#endif
>> +
>> +/*
>> + * Despite its name, this function must still broadcast the TLB
>> + * invalidation in order to ensure other CPUs don't up with junk
>                                                       ^
>                                                      end

Fixed, thanks :-)

>
>> + * entries as a result of speculation. Unusually, its also called in
>> + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
>> + * TLB broadcasting, then we're in trouble here.
>> + */
>> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> +{
>> +     flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> +}
>> +#endif /* CONFIG_ACPI_APEI */
>>
>>  #ifdef CONFIG_ACPI_NUMA
>>  int arm64_acpi_numa_init(void);
>> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
>> index c280df6..ea3046e 100644
>> --- a/arch/x86/kernel/acpi/apei.c
>> +++ b/arch/x86/kernel/acpi/apei.c
>
> ...
>
>> diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
>> index 20b3fcf..792a0d9 100644
>> --- a/drivers/acpi/apei/hest.c
>> +++ b/drivers/acpi/apei/hest.c
>> @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>>               goto err;
>>       }
>>
>> -     if (!acpi_disable_cmcff)
>> -             apei_hest_parse(hest_parse_cmc, NULL);
>> +     rc = hest_ia32_init();
>
> Why do you need a separate hest_ia32_init() here?
>
> You can do
>
>         rc = apei_hest_parse(hest_parse_cmc, NULL);
>
> directly here AFAICT.

yes, we can do that.

But the reason for a  separate hest_ia32_init() is:
For now(ACPI 6.1), we have three IA-32 Architecture-specific error
source structures, maybe we will parse them later.
So I made this hest_ia32_init() for all these structures. maybe we can do :
---
 static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
 return 0;

 if (!acpi_disable_cmcff)
 return !arch_apei_enable_cmcff(hest_hdr, data);

 return 0;
}

 static int __init hest_parse_mce(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CHECK)
 return 0;

// do something

 return 0;
}

 static int __init hest_parse_nmi(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_NMI)
 return 0;

// do something

 return 0;
}

static inline int __init hest_ia32_init(void)
{
  int ret = apei_hest_parse(hest_parse_nmi, NULL);
  if (ret)
     return ret;

  ret = apei_hest_parse(hest_parse_mce, NULL);
  if (ret)
     return ret;

   return apei_hest_parse(hest_parse_cmc, NULL);
}
---

But it is just my thought, please correct me if I misunderstand
something. Thanks :-)

>
>> +     if (rc)
>> +             goto err;
>>
>>       if (!ghes_disable) {
>>               rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>> --
>> 2.5.5
>>
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav

On 4 August 2016 at 17:48, Borislav Petkov <bp@suse.de> wrote:
> On Fri, Jul 29, 2016 at 04:57:44PM +0800, fu.wei at linaro.org wrote:
>> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>
>> This commit provides APEI arch-specific bits for aarch64
>>
>> Meanwhile,
>> (1)add a new subfunction "hest_ia32_init" for
>> "acpi_disable_cmcff" which is used by IA-32 Architecture
>> Corrected Machine Check (CMC).
>> (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
>> a generic place.
>> (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
>> because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
>>
>> [Fu Wei: improve && upstream]
>>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>> Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
>> Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
>> Acked-by: Will Deacon <will.deacon@arm.com>
>> ---
>
> ...
>
>> @@ -110,8 +111,21 @@ static inline const char *acpi_get_enable_method(int cpu)
>>  }
>>
>>  #ifdef       CONFIG_ACPI_APEI
>> +#define acpi_disable_cmcff 1
>
> What does that mean? ARM doesn't have firmware-first mode?
>
> A piece of comment please.

Thanks I have added a comment on v13, please check.

>
>>  pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
>> -#endif
>> +
>> +/*
>> + * Despite its name, this function must still broadcast the TLB
>> + * invalidation in order to ensure other CPUs don't up with junk
>                                                       ^
>                                                      end

Fixed, thanks :-)

>
>> + * entries as a result of speculation. Unusually, its also called in
>> + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
>> + * TLB broadcasting, then we're in trouble here.
>> + */
>> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> +{
>> +     flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> +}
>> +#endif /* CONFIG_ACPI_APEI */
>>
>>  #ifdef CONFIG_ACPI_NUMA
>>  int arm64_acpi_numa_init(void);
>> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
>> index c280df6..ea3046e 100644
>> --- a/arch/x86/kernel/acpi/apei.c
>> +++ b/arch/x86/kernel/acpi/apei.c
>
> ...
>
>> diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
>> index 20b3fcf..792a0d9 100644
>> --- a/drivers/acpi/apei/hest.c
>> +++ b/drivers/acpi/apei/hest.c
>> @@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
>>               goto err;
>>       }
>>
>> -     if (!acpi_disable_cmcff)
>> -             apei_hest_parse(hest_parse_cmc, NULL);
>> +     rc = hest_ia32_init();
>
> Why do you need a separate hest_ia32_init() here?
>
> You can do
>
>         rc = apei_hest_parse(hest_parse_cmc, NULL);
>
> directly here AFAICT.

yes, we can do that.

But the reason for a  separate hest_ia32_init() is:
For now(ACPI 6.1), we have three IA-32 Architecture-specific error
source structures, maybe we will parse them later.
So I made this hest_ia32_init() for all these structures. maybe we can do :
---
 static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
 return 0;

 if (!acpi_disable_cmcff)
 return !arch_apei_enable_cmcff(hest_hdr, data);

 return 0;
}

 static int __init hest_parse_mce(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CHECK)
 return 0;

// do something

 return 0;
}

 static int __init hest_parse_nmi(struct acpi_hest_header *hest_hdr, void *data)
 {
 if (hest_hdr->type != ACPI_HEST_TYPE_IA32_NMI)
 return 0;

// do something

 return 0;
}

static inline int __init hest_ia32_init(void)
{
  int ret = apei_hest_parse(hest_parse_nmi, NULL);
  if (ret)
     return ret;

  ret = apei_hest_parse(hest_parse_mce, NULL);
  if (ret)
     return ret;

   return apei_hest_parse(hest_parse_cmc, NULL);
}
---

But it is just my thought, please correct me if I misunderstand
something. Thanks :-)

>
>> +     if (rc)
>> +             goto err;
>>
>>       if (!ghes_disable) {
>>               rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>> --
>> 2.5.5
>>
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Wed, Aug 10, 2016 at 06:40:53PM +0800, Fu Wei wrote:
> But the reason for a  separate hest_ia32_init() is:
> For now(ACPI 6.1), we have three IA-32 Architecture-specific error
> source structures, maybe we will parse them later.
> So I made this hest_ia32_init() for all these structures. maybe we can do :

So I'd make it as simple as possible now and cross that bridge only when
we get there, i.e., only when you are adding support for those and not
earlier.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Wed, Aug 10, 2016 at 06:40:53PM +0800, Fu Wei wrote:
> But the reason for a  separate hest_ia32_init() is:
> For now(ACPI 6.1), we have three IA-32 Architecture-specific error
> source structures, maybe we will parse them later.
> So I made this hest_ia32_init() for all these structures. maybe we can do :

So I'd make it as simple as possible now and cross that bridge only when
we get there, i.e., only when you are adding support for those and not
earlier.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Wed, Aug 10, 2016 at 06:40:53PM +0800, Fu Wei wrote:
> But the reason for a  separate hest_ia32_init() is:
> For now(ACPI 6.1), we have three IA-32 Architecture-specific error
> source structures, maybe we will parse them later.
> So I made this hest_ia32_init() for all these structures. maybe we can do :

So I'd make it as simple as possible now and cross that bridge only when
we get there, i.e., only when you are adding support for those and not
earlier.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
--

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav,

On 10 August 2016 at 18:45, Borislav Petkov <bp@suse.de> wrote:
> On Wed, Aug 10, 2016 at 06:40:53PM +0800, Fu Wei wrote:
>> But the reason for a  separate hest_ia32_init() is:
>> For now(ACPI 6.1), we have three IA-32 Architecture-specific error
>> source structures, maybe we will parse them later.
>> So I made this hest_ia32_init() for all these structures. maybe we can do :
>
> So I'd make it as simple as possible now and cross that bridge only when
> we get there, i.e., only when you are adding support for those and not
> earlier.
>

OK, got your point.
Sorry for sending v13 before checking this with you.

so I will do :

@@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
  goto err;
  }

- if (!acpi_disable_cmcff)
- apei_hest_parse(hest_parse_cmc, NULL);
+ rc =apei_hest_parse(hest_parse_cmc, NULL);
+ if (rc)
+ goto err;

  if (!ghes_disable) {
  rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);

Do you have other suggestion? then I can post v14 to fix it :-)

> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav,

On 10 August 2016 at 18:45, Borislav Petkov <bp@suse.de> wrote:
> On Wed, Aug 10, 2016 at 06:40:53PM +0800, Fu Wei wrote:
>> But the reason for a  separate hest_ia32_init() is:
>> For now(ACPI 6.1), we have three IA-32 Architecture-specific error
>> source structures, maybe we will parse them later.
>> So I made this hest_ia32_init() for all these structures. maybe we can do :
>
> So I'd make it as simple as possible now and cross that bridge only when
> we get there, i.e., only when you are adding support for those and not
> earlier.
>

OK, got your point.
Sorry for sending v13 before checking this with you.

so I will do :

@@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
  goto err;
  }

- if (!acpi_disable_cmcff)
- apei_hest_parse(hest_parse_cmc, NULL);
+ rc =apei_hest_parse(hest_parse_cmc, NULL);
+ if (rc)
+ goto err;

  if (!ghes_disable) {
  rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);

Do you have other suggestion? then I can post v14 to fix it :-)

> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav,

On 10 August 2016 at 18:45, Borislav Petkov <bp@suse.de> wrote:
> On Wed, Aug 10, 2016 at 06:40:53PM +0800, Fu Wei wrote:
>> But the reason for a  separate hest_ia32_init() is:
>> For now(ACPI 6.1), we have three IA-32 Architecture-specific error
>> source structures, maybe we will parse them later.
>> So I made this hest_ia32_init() for all these structures. maybe we can do :
>
> So I'd make it as simple as possible now and cross that bridge only when
> we get there, i.e., only when you are adding support for those and not
> earlier.
>

OK, got your point.
Sorry for sending v13 before checking this with you.

so I will do :

@@ -232,8 +243,9 @@ void __init acpi_hest_init(void)
  goto err;
  }

- if (!acpi_disable_cmcff)
- apei_hest_parse(hest_parse_cmc, NULL);
+ rc =apei_hest_parse(hest_parse_cmc, NULL);
+ if (rc)
+ goto err;

  if (!ghes_disable) {
  rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);

Do you have other suggestion? then I can post v14 to fix it :-)

> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Wed, Aug 10, 2016 at 07:01:05PM +0800, Fu Wei wrote:
> - if (!acpi_disable_cmcff)
> - apei_hest_parse(hest_parse_cmc, NULL);
> + rc =apei_hest_parse(hest_parse_cmc, NULL);
> + if (rc)
> + goto err;
> 
>   if (!ghes_disable) {
>   rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> 
> Do you have other suggestion? then I can post v14 to fix it :-)

Nah, looks good :)

Let's keep it simple and add more involved handling when it is really
needed. Thanks!

Btw, that comment:

+/*
+ * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
+ * IA-32 Architecture Corrected Machine Checkx(cmc) FIRMWARE_FIRST mode by
+ * boot parameter(acpi=nocmcff). But we don't have this IA-32 specific
+ * feature on ARM64, this definition is only for compatibility.
+ */
+#define acpi_disable_cmcff 1

looks ok, except the small typo:

Architecture Corrected Machine Checkx(cmc)
				    ^
Make that

"IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode"

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Wed, Aug 10, 2016 at 07:01:05PM +0800, Fu Wei wrote:
> - if (!acpi_disable_cmcff)
> - apei_hest_parse(hest_parse_cmc, NULL);
> + rc =apei_hest_parse(hest_parse_cmc, NULL);
> + if (rc)
> + goto err;
> 
>   if (!ghes_disable) {
>   rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> 
> Do you have other suggestion? then I can post v14 to fix it :-)

Nah, looks good :)

Let's keep it simple and add more involved handling when it is really
needed. Thanks!

Btw, that comment:

+/*
+ * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
+ * IA-32 Architecture Corrected Machine Checkx(cmc) FIRMWARE_FIRST mode by
+ * boot parameter(acpi=nocmcff). But we don't have this IA-32 specific
+ * feature on ARM64, this definition is only for compatibility.
+ */
+#define acpi_disable_cmcff 1

looks ok, except the small typo:

Architecture Corrected Machine Checkx(cmc)
				    ^
Make that

"IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode"

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Borislav Petkov]

On Wed, Aug 10, 2016 at 07:01:05PM +0800, Fu Wei wrote:
> - if (!acpi_disable_cmcff)
> - apei_hest_parse(hest_parse_cmc, NULL);
> + rc =apei_hest_parse(hest_parse_cmc, NULL);
> + if (rc)
> + goto err;
> 
>   if (!ghes_disable) {
>   rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
> 
> Do you have other suggestion? then I can post v14 to fix it :-)

Nah, looks good :)

Let's keep it simple and add more involved handling when it is really
needed. Thanks!

Btw, that comment:

+/*
+ * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
+ * IA-32 Architecture Corrected Machine Checkx(cmc) FIRMWARE_FIRST mode by
+ * boot parameter(acpi=nocmcff). But we don't have this IA-32 specific
+ * feature on ARM64, this definition is only for compatibility.
+ */
+#define acpi_disable_cmcff 1

looks ok, except the small typo:

Architecture Corrected Machine Checkx(cmc)
				    ^
Make that

"IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode"

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
--

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav,

On 10 August 2016 at 19:10, Borislav Petkov <bp@suse.de> wrote:
> On Wed, Aug 10, 2016 at 07:01:05PM +0800, Fu Wei wrote:
>> - if (!acpi_disable_cmcff)
>> - apei_hest_parse(hest_parse_cmc, NULL);
>> + rc =apei_hest_parse(hest_parse_cmc, NULL);
>> + if (rc)
>> + goto err;
>>
>>   if (!ghes_disable) {
>>   rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>>
>> Do you have other suggestion? then I can post v14 to fix it :-)
>
> Nah, looks good :)
>
> Let's keep it simple and add more involved handling when it is really
> needed. Thanks!

Thanks for your help, this have been fixed in v14(just posted).

>
> Btw, that comment:
>
> +/*
> + * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
> + * IA-32 Architecture Corrected Machine Checkx(cmc) FIRMWARE_FIRST mode by
> + * boot parameter(acpi=nocmcff). But we don't have this IA-32 specific
> + * feature on ARM64, this definition is only for compatibility.
> + */
> +#define acpi_disable_cmcff 1
>
> looks ok, except the small typo:
>
> Architecture Corrected Machine Checkx(cmc)
>                                     ^
> Make that
>
> "IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode"

Done! Thanks :-)

>
> Thanks.
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav,

On 10 August 2016 at 19:10, Borislav Petkov <bp@suse.de> wrote:
> On Wed, Aug 10, 2016 at 07:01:05PM +0800, Fu Wei wrote:
>> - if (!acpi_disable_cmcff)
>> - apei_hest_parse(hest_parse_cmc, NULL);
>> + rc =apei_hest_parse(hest_parse_cmc, NULL);
>> + if (rc)
>> + goto err;
>>
>>   if (!ghes_disable) {
>>   rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>>
>> Do you have other suggestion? then I can post v14 to fix it :-)
>
> Nah, looks good :)
>
> Let's keep it simple and add more involved handling when it is really
> needed. Thanks!

Thanks for your help, this have been fixed in v14(just posted).

>
> Btw, that comment:
>
> +/*
> + * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
> + * IA-32 Architecture Corrected Machine Checkx(cmc) FIRMWARE_FIRST mode by
> + * boot parameter(acpi=nocmcff). But we don't have this IA-32 specific
> + * feature on ARM64, this definition is only for compatibility.
> + */
> +#define acpi_disable_cmcff 1
>
> looks ok, except the small typo:
>
> Architecture Corrected Machine Checkx(cmc)
>                                     ^
> Make that
>
> "IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode"

Done! Thanks :-)

>
> Thanks.
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

[PATCH v12] acpi, apei, arm64: APEI initial support for aarch64.

[Fu Wei]

Hi Borislav,

On 10 August 2016 at 19:10, Borislav Petkov <bp@suse.de> wrote:
> On Wed, Aug 10, 2016 at 07:01:05PM +0800, Fu Wei wrote:
>> - if (!acpi_disable_cmcff)
>> - apei_hest_parse(hest_parse_cmc, NULL);
>> + rc =apei_hest_parse(hest_parse_cmc, NULL);
>> + if (rc)
>> + goto err;
>>
>>   if (!ghes_disable) {
>>   rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
>>
>> Do you have other suggestion? then I can post v14 to fix it :-)
>
> Nah, looks good :)
>
> Let's keep it simple and add more involved handling when it is really
> needed. Thanks!

Thanks for your help, this have been fixed in v14(just posted).

>
> Btw, that comment:
>
> +/*
> + * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
> + * IA-32 Architecture Corrected Machine Checkx(cmc) FIRMWARE_FIRST mode by
> + * boot parameter(acpi=nocmcff). But we don't have this IA-32 specific
> + * feature on ARM64, this definition is only for compatibility.
> + */
> +#define acpi_disable_cmcff 1
>
> looks ok, except the small typo:
>
> Architecture Corrected Machine Checkx(cmc)
>                                     ^
> Make that
>
> "IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode"

Done! Thanks :-)

>
> Thanks.
>
> --
> Regards/Gruss,
>     Boris.
>
> ECO tip #101: Trim your mails when you reply.
>
> SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
> --



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat