* [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML
2021-11-02 13:44 [PATCH v8 0/3] Add support for sc7280 WPSS PIL loading Rakesh Pillai
@ 2021-11-02 13:44 ` Rakesh Pillai
2021-11-12 18:41 ` Rob Herring
2021-11-15 23:40 ` Stephen Boyd
2021-11-02 13:44 ` [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support Rakesh Pillai
2021-11-02 13:44 ` [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS Rakesh Pillai
2 siblings, 2 replies; 14+ messages in thread
From: Rakesh Pillai @ 2021-11-02 13:44 UTC (permalink / raw)
To: agross, bjorn.andersson, ohad, mathieu.poirier, robh+dt, p.zabel
Cc: swboyd, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel, sibis, mpubbise, kuabhs, Rakesh Pillai
Convert Qualcomm ADSP/CDSP Remoteproc devicetree
binding to YAML.
Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
---
.../bindings/remoteproc/qcom,hexagon-v56.txt | 140 ------------------
.../bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 161 +++++++++++++++++++++
.../bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 160 ++++++++++++++++++++
3 files changed, 321 insertions(+), 140 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt
deleted file mode 100644
index 1337a3d..0000000
--- a/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt
+++ /dev/null
@@ -1,140 +0,0 @@
-Qualcomm Technology Inc. Hexagon v56 Peripheral Image Loader
-
-This document defines the binding for a component that loads and boots firmware
-on the Qualcomm Technology Inc. Hexagon v56 core.
-
-- compatible:
- Usage: required
- Value type: <string>
- Definition: must be one of:
- "qcom,qcs404-cdsp-pil",
- "qcom,sdm845-adsp-pil"
-
-- reg:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: must specify the base address and size of the qdsp6ss register
-
-- interrupts-extended:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: must list the watchdog, fatal IRQs ready, handover and
- stop-ack IRQs
-
-- interrupt-names:
- Usage: required
- Value type: <stringlist>
- Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
-
-- clocks:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: List of phandles and clock specifier pairs for the Hexagon,
- per clock-names below.
-
-- clock-names:
- Usage: required for SDM845 ADSP
- Value type: <stringlist>
- Definition: List of clock input name strings sorted in the same
- order as the clocks property. Definition must have
- "xo", "sway_cbcr", "lpass_ahbs_aon_cbcr",
- "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep"
- and "qdsp6ss_core".
-
-- clock-names:
- Usage: required for QCS404 CDSP
- Value type: <stringlist>
- Definition: List of clock input name strings sorted in the same
- order as the clocks property. Definition must have
- "xo", "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave",
- "q6ss_master", "q6_axim".
-
-- power-domains:
- Usage: required
- Value type: <phandle>
- Definition: reference to cx power domain node.
-
-- resets:
- Usage: required
- Value type: <phandle>
- Definition: reference to the list of resets for the Hexagon.
-
-- reset-names:
- Usage: required for SDM845 ADSP
- Value type: <stringlist>
- Definition: must be "pdc_sync" and "cc_lpass"
-
-- reset-names:
- Usage: required for QCS404 CDSP
- Value type: <stringlist>
- Definition: must be "restart"
-
-- qcom,halt-regs:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: a phandle reference to a syscon representing TCSR followed
- by the offset within syscon for Hexagon halt register.
-
-- memory-region:
- Usage: required
- Value type: <phandle>
- Definition: reference to the reserved-memory for the firmware
-
-- qcom,smem-states:
- Usage: required
- Value type: <phandle>
- Definition: reference to the smem state for requesting the Hexagon to
- shut down
-
-- qcom,smem-state-names:
- Usage: required
- Value type: <stringlist>
- Definition: must be "stop"
-
-
-= SUBNODES
-The adsp node may have an subnode named "glink-edge" that describes the
-communication edge, channels and devices related to the Hexagon.
-See ../soc/qcom/qcom,glink.txt for details on how to describe these.
-
-= EXAMPLE
-The following example describes the resources needed to boot control the
-ADSP, as it is found on SDM845 boards.
-
- remoteproc@17300000 {
- compatible = "qcom,sdm845-adsp-pil";
- reg = <0x17300000 0x40c>;
-
- interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_LPASS_SWAY_CLK>,
- <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
- <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
- <&lpasscc LPASS_QDSP6SS_XO_CLK>,
- <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
- <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
- clock-names = "xo", "sway_cbcr",
- "lpass_ahbs_aon_cbcr",
- "lpass_ahbm_aon_cbcr", "qdsp6ss_xo",
- "qdsp6ss_sleep", "qdsp6ss_core";
-
- power-domains = <&rpmhpd SDM845_CX>;
-
- resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
- <&aoss_reset AOSS_CC_LPASS_RESTART>;
- reset-names = "pdc_sync", "cc_lpass";
-
- qcom,halt-regs = <&tcsr_mutex_regs 0x22000>;
-
- memory-region = <&pil_adsp_mem>;
-
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
- };
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
new file mode 100644
index 0000000..31413cf
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QCS404 CDSP Peripheral Image Loader
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description:
+ This document defines the binding for a component that loads and boots firmware
+ on the Qualcomm Technology Inc. CDSP (Compute DSP).
+
+properties:
+ compatible:
+ enum:
+ - qcom,qcs404-cdsp-pil
+
+ reg:
+ maxItems: 1
+ description:
+ The base address and size of the qdsp6ss register
+
+ interrupts:
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+
+ interrupt-names:
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+
+ clocks:
+ items:
+ - description: XO clock
+ - description: SWAY clock
+ - description: TBU clock
+ - description: BIMC clock
+ - description: AHB AON clock
+ - description: Q6SS SLAVE clock
+ - description: Q6SS MASTER clock
+ - description: Q6 AXIM clock
+
+ clock-names:
+ items:
+ - const: xo
+ - const: sway
+ - const: tbu
+ - const: bimc
+ - const: ahb_aon
+ - const: q6ss_slave
+ - const: q6ss_master
+ - const: q6_axim
+
+ power-domains:
+ items:
+ - description: CX power domain
+
+ resets:
+ items:
+ - description: AOSS restart
+
+ reset-names:
+ items:
+ - const: restart
+
+ memory-region:
+ maxItems: 1
+ description: Reference to the reserved-memory for the Hexagon core
+
+ qcom,halt-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Phandle reference to a syscon representing TCSR followed by the
+ three offsets within syscon for q6, modem and nc halt registers.
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the Hexagon core
+ items:
+ - description: Stop the modem
+
+ qcom,smem-state-names:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: The names of the state bits used for SMP2P output
+ items:
+ - const: stop
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - power-domains
+ - resets
+ - reset-names
+ - qcom,halt-regs
+ - memory-region
+ - qcom,smem-states
+ - qcom,smem-state-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,gcc-qcs404.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
+ remoteproc@b00000 {
+ compatible = "qcom,qcs404-cdsp-pil";
+ reg = <0x00b00000 0x4040>;
+
+ interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&xo_board>,
+ <&gcc GCC_CDSP_CFG_AHB_CLK>,
+ <&gcc GCC_CDSP_TBU_CLK>,
+ <&gcc GCC_BIMC_CDSP_CLK>,
+ <&turingcc TURING_WRAPPER_AON_CLK>,
+ <&turingcc TURING_Q6SS_AHBS_AON_CLK>,
+ <&turingcc TURING_Q6SS_AHBM_AON_CLK>,
+ <&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
+ clock-names = "xo",
+ "sway",
+ "tbu",
+ "bimc",
+ "ahb_aon",
+ "q6ss_slave",
+ "q6ss_master",
+ "q6_axim";
+
+ power-domains = <&rpmhpd SDM845_CX>;
+
+ resets = <&gcc GCC_CDSP_RESTART>;
+ reset-names = "restart";
+
+ qcom,halt-regs = <&tcsr 0x19004>;
+
+ memory-region = <&cdsp_fw_mem>;
+
+ qcom,smem-states = <&cdsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+ };
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
new file mode 100644
index 0000000..1535bbb
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
@@ -0,0 +1,160 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SDM845 ADSP Peripheral Image Loader
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description:
+ This document defines the binding for a component that loads and boots firmware
+ on the Qualcomm Technology Inc. ADSP.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sdm845-adsp-pil
+
+ reg:
+ maxItems: 1
+ description:
+ The base address and size of the qdsp6ss register
+
+ interrupts:
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+
+ interrupt-names:
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+
+ clocks:
+ items:
+ - description: XO clock
+ - description: SWAY clock
+ - description: LPASS AHBS AON clock
+ - description: LPASS AHBM AON clock
+ - description: QDSP XO clock
+ - description: Q6SP6SS SLEEP clock
+ - description: Q6SP6SS CORE clock
+
+ clock-names:
+ items:
+ - const: xo
+ - const: sway_cbcr
+ - const: lpass_ahbs_aon_cbcr
+ - const: lpass_ahbm_aon_cbcr
+ - const: qdsp6ss_xo
+ - const: qdsp6ss_sleep
+ - const: qdsp6ss_core
+
+ power-domains:
+ items:
+ - description: CX power domain
+
+ resets:
+ items:
+ - description: PDC AUDIO SYNC RESET
+ - description: CC LPASS restart
+
+ reset-names:
+ items:
+ - const: pdc_sync
+ - const: cc_lpass
+
+ memory-region:
+ maxItems: 1
+ description: Reference to the reserved-memory for the Hexagon core
+
+ qcom,halt-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Phandle reference to a syscon representing TCSR followed by the
+ three offsets within syscon for q6, modem and nc halt registers.
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the Hexagon core
+ items:
+ - description: Stop the modem
+
+ qcom,smem-state-names:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: The names of the state bits used for SMP2P output
+ items:
+ - const: stop
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - power-domains
+ - resets
+ - reset-names
+ - qcom,halt-regs
+ - memory-region
+ - qcom,smem-states
+ - qcom,smem-state-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+ #include <dt-bindings/clock/qcom,lpass-sdm845.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #include <dt-bindings/reset/qcom,sdm845-pdc.h>
+ #include <dt-bindings/reset/qcom,sdm845-aoss.h>
+ remoteproc@17300000 {
+ compatible = "qcom,sdm845-adsp-pil";
+ reg = <0x17300000 0x40c>;
+
+ interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_LPASS_SWAY_CLK>,
+ <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
+ <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
+ <&lpasscc LPASS_QDSP6SS_XO_CLK>,
+ <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
+ <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
+ clock-names = "xo", "sway_cbcr",
+ "lpass_ahbs_aon_cbcr",
+ "lpass_ahbm_aon_cbcr", "qdsp6ss_xo",
+ "qdsp6ss_sleep", "qdsp6ss_core";
+
+ power-domains = <&rpmhpd SDM845_CX>;
+
+ resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
+ <&aoss_reset AOSS_CC_LPASS_RESTART>;
+ reset-names = "pdc_sync", "cc_lpass";
+
+ qcom,halt-regs = <&tcsr_mutex_regs 0x22000>;
+
+ memory-region = <&pil_adsp_mem>;
+
+ qcom,smem-states = <&adsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+ };
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML
2021-11-02 13:44 ` [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML Rakesh Pillai
@ 2021-11-12 18:41 ` Rob Herring
2021-11-15 23:40 ` Stephen Boyd
1 sibling, 0 replies; 14+ messages in thread
From: Rob Herring @ 2021-11-12 18:41 UTC (permalink / raw)
To: Rakesh Pillai
Cc: mathieu.poirier, bjorn.andersson, linux-arm-msm, sibis,
linux-remoteproc, devicetree, agross, linux-kernel, robh+dt,
swboyd, kuabhs, p.zabel, mpubbise, ohad
On Tue, 02 Nov 2021 19:14:31 +0530, Rakesh Pillai wrote:
> Convert Qualcomm ADSP/CDSP Remoteproc devicetree
> binding to YAML.
>
> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
> ---
> .../bindings/remoteproc/qcom,hexagon-v56.txt | 140 ------------------
> .../bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 161 +++++++++++++++++++++
> .../bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 160 ++++++++++++++++++++
> 3 files changed, 321 insertions(+), 140 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML
2021-11-02 13:44 ` [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML Rakesh Pillai
2021-11-12 18:41 ` Rob Herring
@ 2021-11-15 23:40 ` Stephen Boyd
1 sibling, 0 replies; 14+ messages in thread
From: Stephen Boyd @ 2021-11-15 23:40 UTC (permalink / raw)
To: Rakesh Pillai, agross, bjorn.andersson, mathieu.poirier, ohad,
p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
Quoting Rakesh Pillai (2021-11-02 06:44:31)
> Convert Qualcomm ADSP/CDSP Remoteproc devicetree
> binding to YAML.
>
> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
> ---
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support
2021-11-02 13:44 [PATCH v8 0/3] Add support for sc7280 WPSS PIL loading Rakesh Pillai
2021-11-02 13:44 ` [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML Rakesh Pillai
@ 2021-11-02 13:44 ` Rakesh Pillai
2021-11-12 18:41 ` Rob Herring
2021-11-15 23:41 ` Stephen Boyd
2021-11-02 13:44 ` [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS Rakesh Pillai
2 siblings, 2 replies; 14+ messages in thread
From: Rakesh Pillai @ 2021-11-02 13:44 UTC (permalink / raw)
To: agross, bjorn.andersson, ohad, mathieu.poirier, robh+dt, p.zabel
Cc: swboyd, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel, sibis, mpubbise, kuabhs, Rakesh Pillai
Add WPSS PIL loading support for SC7280 SoCs.
Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
---
.../bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 217 +++++++++++++++++++++
1 file changed, 217 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
new file mode 100644
index 0000000..eaf7dd1
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
@@ -0,0 +1,217 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 WPSS Peripheral Image Loader
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description:
+ This document defines the binding for a component that loads and boots firmware
+ on the Qualcomm Technology Inc. WPSS.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sc7280-wpss-pil
+
+ reg:
+ maxItems: 1
+ description:
+ The base address and size of the qdsp6ss register
+
+ interrupts:
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
+ clocks:
+ items:
+ - description: GCC WPSS AHB BDG Master clock
+ - description: GCC WPSS AHB clock
+ - description: GCC WPSS RSCP clock
+ - description: XO clock
+
+ clock-names:
+ items:
+ - const: ahb_bdg
+ - const: ahb
+ - const: rscp
+ - const: xo
+
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MX power domain
+
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mx
+
+ resets:
+ items:
+ - description: AOSS restart
+ - description: PDC SYNC
+
+ reset-names:
+ items:
+ - const: restart
+ - const: pdc_sync
+
+ memory-region:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference to the reserved-memory for the Hexagon core
+
+ firmware-name:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ The name of the firmware which should be loaded for this remote
+ processor.
+
+ qcom,halt-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Phandle reference to a syscon representing TCSR followed by the
+ three offsets within syscon for q6, modem and nc halt registers.
+
+ qcom,qmp:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference to the AOSS side-channel message RAM.
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the Hexagon core
+ items:
+ - description: Stop the modem
+
+ qcom,smem-state-names:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: The names of the state bits used for SMP2P output
+ items:
+ - const: stop
+
+ glink-edge:
+ type: object
+ description: |
+ Qualcomm G-Link subnode which represents communication edge, channels
+ and devices related to the ADSP.
+
+ properties:
+ interrupts:
+ items:
+ - description: IRQ from WPSS to GLINK
+
+ mboxes:
+ items:
+ - description: Mailbox for communication between APPS and WPSS
+
+ label:
+ description: The names of the state bits used for SMP2P output
+ items:
+ - const: wpss
+
+ qcom,remote-pid:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: ID of the shared memory used by GLINK for communication with WPSS
+ maxItems: 1
+
+ required:
+ - interrupts
+ - mboxes
+ - label
+ - qcom,remote-pid
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - power-domains
+ - power-domain-names
+ - resets
+ - reset-names
+ - qcom,halt-regs
+ - memory-region
+ - qcom,qmp
+ - qcom,smem-states
+ - qcom,smem-state-names
+ - glink-edge
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #include <dt-bindings/reset/qcom,sdm845-aoss.h>
+ #include <dt-bindings/reset/qcom,sdm845-pdc.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+ remoteproc@8a00000 {
+ compatible = "qcom,sc7280-wpss-pil";
+ reg = <0x08a00000 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
+ <&gcc GCC_WPSS_AHB_CLK>,
+ <&gcc GCC_WPSS_RSCP_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "ahb_bdg", "ahb",
+ "rscp", "xo";
+
+ power-domains = <&rpmhpd SC7280_CX>,
+ <&rpmhpd SC7280_MX>;
+ power-domain-names = "cx", "mx";
+
+ memory-region = <&wpss_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&wpss_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
+ <&pdc_reset PDC_WPSS_SYNC_RESET>;
+ reset-names = "restart", "pdc_sync";
+
+ qcom,halt-regs = <&tcsr_mutex 0x37000>;
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_WPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "wpss";
+ qcom,remote-pid = <13>;
+ };
+ };
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support
2021-11-02 13:44 ` [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support Rakesh Pillai
@ 2021-11-12 18:41 ` Rob Herring
2021-11-15 23:41 ` Stephen Boyd
1 sibling, 0 replies; 14+ messages in thread
From: Rob Herring @ 2021-11-12 18:41 UTC (permalink / raw)
To: Rakesh Pillai
Cc: ohad, agross, swboyd, bjorn.andersson, linux-arm-msm,
linux-remoteproc, mpubbise, linux-kernel, devicetree, sibis,
kuabhs, robh+dt, p.zabel, mathieu.poirier
On Tue, 02 Nov 2021 19:14:32 +0530, Rakesh Pillai wrote:
> Add WPSS PIL loading support for SC7280 SoCs.
>
> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
> ---
> .../bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 217 +++++++++++++++++++++
> 1 file changed, 217 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support
2021-11-02 13:44 ` [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support Rakesh Pillai
2021-11-12 18:41 ` Rob Herring
@ 2021-11-15 23:41 ` Stephen Boyd
1 sibling, 0 replies; 14+ messages in thread
From: Stephen Boyd @ 2021-11-15 23:41 UTC (permalink / raw)
To: Rakesh Pillai, agross, bjorn.andersson, mathieu.poirier, ohad,
p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
Quoting Rakesh Pillai (2021-11-02 06:44:32)
> Add WPSS PIL loading support for SC7280 SoCs.
>
> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
> ---
One question
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> .../bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 217 +++++++++++++++++++++
> 1 file changed, 217 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
> new file mode 100644
> index 0000000..eaf7dd1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
> @@ -0,0 +1,217 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7280 WPSS Peripheral Image Loader
> +
> +maintainers:
[...]
> +
> + glink-edge:
> + type: object
> + description: |
> + Qualcomm G-Link subnode which represents communication edge, channels
> + and devices related to the ADSP.
> +
> + properties:
> + interrupts:
> + items:
> + - description: IRQ from WPSS to GLINK
> +
> + mboxes:
> + items:
> + - description: Mailbox for communication between APPS and WPSS
> +
> + label:
> + description: The names of the state bits used for SMP2P output
> + items:
> + - const: wpss
> +
> + qcom,remote-pid:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: ID of the shared memory used by GLINK for communication with WPSS
> + maxItems: 1
> +
> + required:
> + - interrupts
> + - mboxes
> + - label
> + - qcom,remote-pid
Add additionalProperties: false here too?
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-02 13:44 [PATCH v8 0/3] Add support for sc7280 WPSS PIL loading Rakesh Pillai
2021-11-02 13:44 ` [PATCH v8 1/3] dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML Rakesh Pillai
2021-11-02 13:44 ` [PATCH v8 2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support Rakesh Pillai
@ 2021-11-02 13:44 ` Rakesh Pillai
2021-11-15 23:43 ` Stephen Boyd
2021-11-16 22:54 ` Stephen Boyd
2 siblings, 2 replies; 14+ messages in thread
From: Rakesh Pillai @ 2021-11-02 13:44 UTC (permalink / raw)
To: agross, bjorn.andersson, ohad, mathieu.poirier, robh+dt, p.zabel
Cc: swboyd, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel, sibis, mpubbise, kuabhs, Rakesh Pillai
Add support for PIL loading of WPSS processor for SC7280
- WPSS boot will be requested by the wifi driver and hence
disable auto-boot for WPSS.
- Add a separate shutdown sequence handler for WPSS.
- Add multiple power-domain voting support
- Parse firmware-name from dtsi entry
Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_adsp.c | 219 +++++++++++++++++++++++++++++++++---
1 file changed, 203 insertions(+), 16 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
index 098362e6..e2e8d33 100644
--- a/drivers/remoteproc/qcom_q6v5_adsp.c
+++ b/drivers/remoteproc/qcom_q6v5_adsp.c
@@ -32,6 +32,7 @@
/* time out value */
#define ACK_TIMEOUT 1000
+#define ACK_TIMEOUT_US 1000000
#define BOOT_FSM_TIMEOUT 10000
/* mask values */
#define EVB_MASK GENMASK(27, 4)
@@ -51,6 +52,8 @@
#define QDSP6SS_CORE_CBCR 0x20
#define QDSP6SS_SLEEP_CBCR 0x3c
+#define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3
+
struct adsp_pil_data {
int crash_reason_smem;
const char *firmware_name;
@@ -58,9 +61,13 @@ struct adsp_pil_data {
const char *ssr_name;
const char *sysmon_name;
int ssctl_id;
+ bool is_wpss;
+ bool auto_boot;
const char **clk_ids;
int num_clks;
+ const char **proxy_pd_names;
+ const char *load_state;
};
struct qcom_adsp {
@@ -93,11 +100,143 @@ struct qcom_adsp {
void *mem_region;
size_t mem_size;
+ struct device *proxy_pds[QCOM_Q6V5_RPROC_PROXY_PD_MAX];
+ size_t proxy_pd_count;
+
struct qcom_rproc_glink glink_subdev;
struct qcom_rproc_ssr ssr_subdev;
struct qcom_sysmon *sysmon;
+
+ int (*shutdown)(struct qcom_adsp *adsp);
};
+static size_t qcom_rproc_pds_attach(struct device *dev, struct device **devs,
+ const char **pd_names)
+{
+ size_t num_pds = 0;
+ int ret;
+ int i;
+
+ if (!pd_names)
+ return 0;
+
+ /* Handle single power domain */
+ if (dev->pm_domain) {
+ devs[0] = dev;
+ pm_runtime_enable(dev);
+ return 1;
+ }
+
+ while (pd_names[num_pds])
+ num_pds++;
+
+ for (i = 0; i < num_pds; i++) {
+ devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
+ if (IS_ERR_OR_NULL(devs[i])) {
+ ret = PTR_ERR(devs[i]) ? : -ENODATA;
+ goto unroll_attach;
+ }
+ }
+
+ return num_pds;
+
+unroll_attach:
+ for (i--; i >= 0; i--)
+ dev_pm_domain_detach(devs[i], false);
+
+ return ret;
+}
+
+static void qcom_rproc_pds_detach(struct qcom_adsp *adsp, struct device **pds,
+ size_t pd_count)
+{
+ struct device *dev = adsp->dev;
+ int i;
+
+ /* Handle single power domain */
+ if (dev->pm_domain && pd_count) {
+ pm_runtime_disable(dev);
+ return;
+ }
+
+ for (i = 0; i < pd_count; i++)
+ dev_pm_domain_detach(pds[i], false);
+}
+
+static int qcom_rproc_pds_enable(struct qcom_adsp *adsp, struct device **pds,
+ size_t pd_count)
+{
+ int ret;
+ int i;
+
+ for (i = 0; i < pd_count; i++) {
+ dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
+ ret = pm_runtime_get_sync(pds[i]);
+ if (ret < 0) {
+ pm_runtime_put_noidle(pds[i]);
+ dev_pm_genpd_set_performance_state(pds[i], 0);
+ goto unroll_pd_votes;
+ }
+ }
+
+ return 0;
+
+unroll_pd_votes:
+ for (i--; i >= 0; i--) {
+ dev_pm_genpd_set_performance_state(pds[i], 0);
+ pm_runtime_put(pds[i]);
+ }
+
+ return ret;
+}
+
+static void qcom_rproc_pds_disable(struct qcom_adsp *adsp, struct device **pds,
+ size_t pd_count)
+{
+ int i;
+
+ for (i = 0; i < pd_count; i++) {
+ dev_pm_genpd_set_performance_state(pds[i], 0);
+ pm_runtime_put(pds[i]);
+ }
+}
+
+static int qcom_wpss_shutdown(struct qcom_adsp *adsp)
+{
+ unsigned int val;
+
+ regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 1);
+
+ /* Wait for halt ACK from QDSP6 */
+ regmap_read_poll_timeout(adsp->halt_map,
+ adsp->halt_lpass + LPASS_HALTACK_REG, val,
+ val, 1000, ACK_TIMEOUT_US);
+
+ /* Assert the WPSS PDC Reset */
+ reset_control_assert(adsp->pdc_sync_reset);
+ /* Place the WPSS processor into reset */
+ reset_control_assert(adsp->restart);
+ /* wait after asserting subsystem restart from AOSS */
+ usleep_range(200, 205);
+ /* Remove the WPSS reset */
+ reset_control_deassert(adsp->restart);
+ /* De-assert the WPSS PDC Reset */
+ reset_control_deassert(adsp->pdc_sync_reset);
+
+ usleep_range(100, 105);
+
+ clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks);
+
+ regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 0);
+
+ /* Wait for halt ACK from QDSP6 */
+ regmap_read_poll_timeout(adsp->halt_map,
+ adsp->halt_lpass + LPASS_HALTACK_REG, val,
+ !val, 1000, ACK_TIMEOUT_US);
+
+ return 0;
+}
+
static int qcom_adsp_shutdown(struct qcom_adsp *adsp)
{
unsigned long timeout;
@@ -193,12 +332,10 @@ static int adsp_start(struct rproc *rproc)
if (ret)
goto disable_irqs;
- dev_pm_genpd_set_performance_state(adsp->dev, INT_MAX);
- ret = pm_runtime_get_sync(adsp->dev);
- if (ret) {
- pm_runtime_put_noidle(adsp->dev);
+ ret = qcom_rproc_pds_enable(adsp, adsp->proxy_pds,
+ adsp->proxy_pd_count);
+ if (ret < 0)
goto disable_xo_clk;
- }
ret = clk_bulk_prepare_enable(adsp->num_clks, adsp->clks);
if (ret) {
@@ -243,8 +380,7 @@ static int adsp_start(struct rproc *rproc)
disable_adsp_clks:
clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks);
disable_power_domain:
- dev_pm_genpd_set_performance_state(adsp->dev, 0);
- pm_runtime_put(adsp->dev);
+ qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
disable_xo_clk:
clk_disable_unprepare(adsp->xo);
disable_irqs:
@@ -258,8 +394,7 @@ static void qcom_adsp_pil_handover(struct qcom_q6v5 *q6v5)
struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
clk_disable_unprepare(adsp->xo);
- dev_pm_genpd_set_performance_state(adsp->dev, 0);
- pm_runtime_put(adsp->dev);
+ qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
}
static int adsp_stop(struct rproc *rproc)
@@ -272,7 +407,7 @@ static int adsp_stop(struct rproc *rproc)
if (ret == -ETIMEDOUT)
dev_err(adsp->dev, "timed out on wait\n");
- ret = qcom_adsp_shutdown(adsp);
+ ret = adsp->shutdown(adsp);
if (ret)
dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
@@ -427,6 +562,7 @@ static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
static int adsp_probe(struct platform_device *pdev)
{
const struct adsp_pil_data *desc;
+ const char *firmware_name;
struct qcom_adsp *adsp;
struct rproc *rproc;
int ret;
@@ -435,12 +571,22 @@ static int adsp_probe(struct platform_device *pdev)
if (!desc)
return -EINVAL;
+ firmware_name = desc->firmware_name;
+ ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
+ &firmware_name);
+ if (ret < 0 && ret != -EINVAL) {
+ dev_err(&pdev->dev, "unable to read firmware-name\n");
+ return ret;
+ }
+
rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
- desc->firmware_name, sizeof(*adsp));
+ firmware_name, sizeof(*adsp));
if (!rproc) {
dev_err(&pdev->dev, "unable to allocate remoteproc\n");
return -ENOMEM;
}
+
+ rproc->auto_boot = desc->auto_boot;
rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
adsp = (struct qcom_adsp *)rproc->priv;
@@ -449,6 +595,11 @@ static int adsp_probe(struct platform_device *pdev)
adsp->info_name = desc->sysmon_name;
platform_set_drvdata(pdev, adsp);
+ if (desc->is_wpss)
+ adsp->shutdown = qcom_wpss_shutdown;
+ else
+ adsp->shutdown = qcom_adsp_shutdown;
+
ret = adsp_alloc_memory_region(adsp);
if (ret)
goto free_rproc;
@@ -457,7 +608,13 @@ static int adsp_probe(struct platform_device *pdev)
if (ret)
goto free_rproc;
- pm_runtime_enable(adsp->dev);
+ ret = qcom_rproc_pds_attach(adsp->dev, adsp->proxy_pds,
+ desc->proxy_pd_names);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Failed to attach proxy power domains\n");
+ goto free_rproc;
+ }
+ adsp->proxy_pd_count = ret;
ret = adsp_init_reset(adsp);
if (ret)
@@ -467,8 +624,8 @@ static int adsp_probe(struct platform_device *pdev)
if (ret)
goto disable_pm;
- ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, NULL,
- qcom_adsp_pil_handover);
+ ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
+ desc->load_state, qcom_adsp_pil_handover);
if (ret)
goto disable_pm;
@@ -489,7 +646,8 @@ static int adsp_probe(struct platform_device *pdev)
return 0;
disable_pm:
- pm_runtime_disable(adsp->dev);
+ qcom_rproc_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
+
free_rproc:
rproc_free(rproc);
@@ -506,7 +664,7 @@ static int adsp_remove(struct platform_device *pdev)
qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
qcom_remove_sysmon_subdev(adsp->sysmon);
qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
- pm_runtime_disable(adsp->dev);
+ qcom_rproc_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
rproc_free(adsp->rproc);
return 0;
@@ -518,11 +676,16 @@ static const struct adsp_pil_data adsp_resource_init = {
.ssr_name = "lpass",
.sysmon_name = "adsp",
.ssctl_id = 0x14,
+ .is_wpss = false,
+ .auto_boot = true,
.clk_ids = (const char*[]) {
"sway_cbcr", "lpass_ahbs_aon_cbcr", "lpass_ahbm_aon_cbcr",
"qdsp6ss_xo", "qdsp6ss_sleep", "qdsp6ss_core", NULL
},
.num_clks = 7,
+ .proxy_pd_names = (const char*[]) {
+ "cx", NULL
+ },
};
static const struct adsp_pil_data cdsp_resource_init = {
@@ -531,15 +694,39 @@ static const struct adsp_pil_data cdsp_resource_init = {
.ssr_name = "cdsp",
.sysmon_name = "cdsp",
.ssctl_id = 0x17,
+ .is_wpss = false,
+ .auto_boot = true,
.clk_ids = (const char*[]) {
"sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", "q6ss_master",
"q6_axim", NULL
},
.num_clks = 7,
+ .proxy_pd_names = (const char*[]) {
+ "cx", NULL
+ },
+};
+
+static const struct adsp_pil_data wpss_resource_init = {
+ .crash_reason_smem = 626,
+ .firmware_name = "wpss.mdt",
+ .ssr_name = "wpss",
+ .sysmon_name = "wpss",
+ .ssctl_id = 0x19,
+ .is_wpss = true,
+ .auto_boot = false,
+ .load_state = "wpss",
+ .clk_ids = (const char*[]) {
+ "ahb_bdg", "ahb", "rscp", NULL
+ },
+ .num_clks = 3,
+ .proxy_pd_names = (const char*[]) {
+ "cx", "mx", NULL
+ },
};
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,qcs404-cdsp-pil", .data = &cdsp_resource_init },
+ { .compatible = "qcom,sc7280-wpss-pil", .data = &wpss_resource_init },
{ .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init },
{ },
};
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-02 13:44 ` [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS Rakesh Pillai
@ 2021-11-15 23:43 ` Stephen Boyd
2021-11-16 17:49 ` pillair
2021-11-16 22:54 ` Stephen Boyd
1 sibling, 1 reply; 14+ messages in thread
From: Stephen Boyd @ 2021-11-15 23:43 UTC (permalink / raw)
To: Rakesh Pillai, agross, bjorn.andersson, mathieu.poirier, ohad,
p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
Quoting Rakesh Pillai (2021-11-02 06:44:33)
> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
> index 098362e6..e2e8d33 100644
> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
> @@ -435,12 +571,22 @@ static int adsp_probe(struct platform_device *pdev)
> if (!desc)
> return -EINVAL;
>
> + firmware_name = desc->firmware_name;
> + ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
Is this documented in the binding? If not, please add it.
> + &firmware_name);
> + if (ret < 0 && ret != -EINVAL) {
> + dev_err(&pdev->dev, "unable to read firmware-name\n");
> + return ret;
> + }
> +
> rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
> - desc->firmware_name, sizeof(*adsp));
> + firmware_name, sizeof(*adsp));
> if (!rproc) {
^ permalink raw reply [flat|nested] 14+ messages in thread* RE: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-15 23:43 ` Stephen Boyd
@ 2021-11-16 17:49 ` pillair
2021-11-16 23:53 ` Stephen Boyd
0 siblings, 1 reply; 14+ messages in thread
From: pillair @ 2021-11-16 17:49 UTC (permalink / raw)
To: 'Stephen Boyd',
agross, bjorn.andersson, mathieu.poirier, ohad, p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
> -----Original Message-----
> From: Stephen Boyd <swboyd@chromium.org>
> Sent: Tuesday, November 16, 2021 5:13 AM
> To: Rakesh Pillai <pillair@codeaurora.org>; agross@kernel.org;
> bjorn.andersson@linaro.org; mathieu.poirier@linaro.org; ohad@wizery.com;
> p.zabel@pengutronix.de; robh+dt@kernel.org
> Cc: linux-arm-msm@vger.kernel.org; linux-remoteproc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> sibis@codeaurora.org; mpubbise@codeaurora.org; kuabhs@chromium.org
> Subject: Re: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for
> sc7280 WPSS
>
> Quoting Rakesh Pillai (2021-11-02 06:44:33)
> > diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c
> b/drivers/remoteproc/qcom_q6v5_adsp.c
> > index 098362e6..e2e8d33 100644
> > --- a/drivers/remoteproc/qcom_q6v5_adsp.c
> > +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
> > @@ -435,12 +571,22 @@ static int adsp_probe(struct platform_device
> *pdev)
> > if (!desc)
> > return -EINVAL;
> >
> > + firmware_name = desc->firmware_name;
> > + ret = of_property_read_string(pdev->dev.of_node, "firmware-
> name",
>
> Is this documented in the binding? If not, please add it.
Hi Stephen,
"firmware-name" is already documented in the bindings.
Thanks,
Rakesh Pillai.
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-16 17:49 ` pillair
@ 2021-11-16 23:53 ` Stephen Boyd
0 siblings, 0 replies; 14+ messages in thread
From: Stephen Boyd @ 2021-11-16 23:53 UTC (permalink / raw)
To: agross, bjorn.andersson, mathieu.poirier, ohad, p.zabel, pillair,
robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
Quoting pillair@codeaurora.org (2021-11-16 09:49:05)
> >
> > Is this documented in the binding? If not, please add it.
>
> Hi Stephen,
> "firmware-name" is already documented in the bindings.
>
Ok I see it now. Thanks!
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-02 13:44 ` [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS Rakesh Pillai
2021-11-15 23:43 ` Stephen Boyd
@ 2021-11-16 22:54 ` Stephen Boyd
2021-11-17 6:31 ` Rakesh Pillai
1 sibling, 1 reply; 14+ messages in thread
From: Stephen Boyd @ 2021-11-16 22:54 UTC (permalink / raw)
To: Rakesh Pillai, agross, bjorn.andersson, mathieu.poirier, ohad,
p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
Quoting Rakesh Pillai (2021-11-02 06:44:33)
> @@ -457,7 +608,13 @@ static int adsp_probe(struct platform_device *pdev)
> if (ret)
> goto free_rproc;
>
> - pm_runtime_enable(adsp->dev);
> + ret = qcom_rproc_pds_attach(adsp->dev, adsp->proxy_pds,
> + desc->proxy_pd_names);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "Failed to attach proxy power domains\n");
> + goto free_rproc;
> + }
> + adsp->proxy_pd_count = ret;
Can we check this against the define so that we don't have more than the
fixed number of power domains and try to access elements beyond the
length of the array?
^ permalink raw reply [flat|nested] 14+ messages in thread* RE: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-16 22:54 ` Stephen Boyd
@ 2021-11-17 6:31 ` Rakesh Pillai
2021-11-17 6:39 ` Stephen Boyd
0 siblings, 1 reply; 14+ messages in thread
From: Rakesh Pillai @ 2021-11-17 6:31 UTC (permalink / raw)
To: 'Stephen Boyd',
agross, bjorn.andersson, mathieu.poirier, ohad, p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
> -----Original Message-----
> From: Stephen Boyd <swboyd@chromium.org>
> Sent: Wednesday, November 17, 2021 4:25 AM
> To: Rakesh Pillai <pillair@codeaurora.org>; agross@kernel.org;
> bjorn.andersson@linaro.org; mathieu.poirier@linaro.org; ohad@wizery.com;
> p.zabel@pengutronix.de; robh+dt@kernel.org
> Cc: linux-arm-msm@vger.kernel.org; linux-remoteproc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> sibis@codeaurora.org; mpubbise@codeaurora.org; kuabhs@chromium.org
> Subject: Re: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for
> sc7280 WPSS
>
> Quoting Rakesh Pillai (2021-11-02 06:44:33)
> > @@ -457,7 +608,13 @@ static int adsp_probe(struct platform_device
> *pdev)
> > if (ret)
> > goto free_rproc;
> >
> > - pm_runtime_enable(adsp->dev);
> > + ret = qcom_rproc_pds_attach(adsp->dev, adsp->proxy_pds,
> > + desc->proxy_pd_names);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev, "Failed to attach proxy power domains\n");
> > + goto free_rproc;
> > + }
> > + adsp->proxy_pd_count = ret;
>
> Can we check this against the define so that we don't have more than the
> fixed number of power domains and try to access elements beyond the
> length of the array?
The number of entries populated in the "proxy_pds" array depends on the "desc->proxy_pd_names", which is statically
initialized for each remoteproc. Hence there will not be any out of bound access for this array.
Thanks,
Rakesh Pillai.
^ permalink raw reply [flat|nested] 14+ messages in thread* RE: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
2021-11-17 6:31 ` Rakesh Pillai
@ 2021-11-17 6:39 ` Stephen Boyd
0 siblings, 0 replies; 14+ messages in thread
From: Stephen Boyd @ 2021-11-17 6:39 UTC (permalink / raw)
To: Rakesh Pillai, agross, bjorn.andersson, mathieu.poirier, ohad,
p.zabel, robh+dt
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel, sibis,
mpubbise, kuabhs
Quoting Rakesh Pillai (2021-11-16 22:31:51)
>
>
> > -----Original Message-----
> > From: Stephen Boyd <swboyd@chromium.org>
> > Sent: Wednesday, November 17, 2021 4:25 AM
> > To: Rakesh Pillai <pillair@codeaurora.org>; agross@kernel.org;
> > bjorn.andersson@linaro.org; mathieu.poirier@linaro.org; ohad@wizery.com;
> > p.zabel@pengutronix.de; robh+dt@kernel.org
> > Cc: linux-arm-msm@vger.kernel.org; linux-remoteproc@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> > sibis@codeaurora.org; mpubbise@codeaurora.org; kuabhs@chromium.org
> > Subject: Re: [PATCH v8 3/3] remoteproc: qcom: q6v5_wpss: Add support for
> > sc7280 WPSS
> >
> > Quoting Rakesh Pillai (2021-11-02 06:44:33)
> > > @@ -457,7 +608,13 @@ static int adsp_probe(struct platform_device
> > *pdev)
> > > if (ret)
> > > goto free_rproc;
> > >
> > > - pm_runtime_enable(adsp->dev);
> > > + ret = qcom_rproc_pds_attach(adsp->dev, adsp->proxy_pds,
> > > + desc->proxy_pd_names);
> > > + if (ret < 0) {
> > > + dev_err(&pdev->dev, "Failed to attach proxy power domains\n");
> > > + goto free_rproc;
> > > + }
> > > + adsp->proxy_pd_count = ret;
> >
> > Can we check this against the define so that we don't have more than the
> > fixed number of power domains and try to access elements beyond the
> > length of the array?
>
> The number of entries populated in the "proxy_pds" array depends on the "desc->proxy_pd_names", which is statically
> initialized for each remoteproc. Hence there will not be any out of bound access for this array.
>
Sure nothing is wrong today but it's a potential problem in the future
if someone adds more elements to proxy_pd_names than proxy_pds can hold.
Please prevent that from happening by writing stricter code.
^ permalink raw reply [flat|nested] 14+ messages in thread