* [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support
@ 2021-10-12 12:36 Prasad Malisetty
2021-10-12 17:26 ` Stephen Boyd
2021-10-12 23:00 ` kernel test robot
0 siblings, 2 replies; 5+ messages in thread
From: Prasad Malisetty @ 2021-10-12 12:36 UTC (permalink / raw)
To: sanm, agross, bjorn.andersson, robh+dt, linux-arm-msm,
devicetree, linux-kernel, vbadigan, manivannan.sadhasivam
Cc: Prasad Malisetty
Add pcie clock phandle for sc7280 SoC
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
---
This change is depends on the below patch series.
https://lkml.org/lkml/2021/10/7/841
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 39635da..78694c1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -569,9 +569,10 @@
reg = <0 0x00100000 0 0x1f0000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
- <0>, <0>, <0>, <0>, <0>, <0>;
+ <0>, <&pcie1_lane 0>,
+ <0>, <0>, <0>, <0>;
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
- "pcie_0_pipe_clk", "pcie_1_pipe-clk",
+ "pcie_0_pipe_clk", "pcie_1_pipe_clk",
"ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
"ufs_phy_tx_symbol_0_clk",
"usb3_phy_wrapper_gcc_usb30_pipe_clk";
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support
2021-10-12 12:36 [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support Prasad Malisetty
@ 2021-10-12 17:26 ` Stephen Boyd
2021-10-14 18:09 ` Prasad Malisetty
2021-10-12 23:00 ` kernel test robot
1 sibling, 1 reply; 5+ messages in thread
From: Stephen Boyd @ 2021-10-12 17:26 UTC (permalink / raw)
To: Prasad Malisetty, agross, bjorn.andersson, devicetree,
linux-arm-msm, linux-kernel, manivannan.sadhasivam, robh+dt,
sanm, vbadigan
Quoting Prasad Malisetty (2021-10-12 05:36:11)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 39635da..78694c1 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -569,9 +569,10 @@
> reg = <0 0x00100000 0 0x1f0000>;
> clocks = <&rpmhcc RPMH_CXO_CLK>,
> <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
> - <0>, <0>, <0>, <0>, <0>, <0>;
> + <0>, <&pcie1_lane 0>,
> + <0>, <0>, <0>, <0>;
> clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
> - "pcie_0_pipe_clk", "pcie_1_pipe-clk",
> + "pcie_0_pipe_clk", "pcie_1_pipe_clk",
It looks like a fix because the name doesn't match the binding. Can you
add a Fixes tag?
> "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
> "ufs_phy_tx_symbol_0_clk",
> "usb3_phy_wrapper_gcc_usb30_pipe_clk";
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support
2021-10-12 12:36 [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support Prasad Malisetty
@ 2021-10-12 23:00 ` kernel test robot
2021-10-12 23:00 ` kernel test robot
1 sibling, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-10-12 23:00 UTC (permalink / raw)
To: Prasad Malisetty, sanm, agross, bjorn.andersson, robh+dt,
linux-arm-msm, devicetree, linux-kernel, vbadigan,
manivannan.sadhasivam
Cc: kbuild-all, Prasad Malisetty
[-- Attachment #1: Type: text/plain, Size: 1688 bytes --]
Hi Prasad,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v5.15-rc5 next-20211012]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Prasad-Malisetty/arm64-dts-qcom-sc7280-Add-pcie-clock-support/20211012-203806
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-randconfig-c004-20211012 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/887ae9ef148eb995db505587e883960a3f178102
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Prasad-Malisetty/arm64-dts-qcom-sc7280-Add-pcie-clock-support/20211012-203806
git checkout 887ae9ef148eb995db505587e883960a3f178102
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> ERROR: Input tree has errors, aborting (use -f to force output)
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 42607 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support
@ 2021-10-12 23:00 ` kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2021-10-12 23:00 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1725 bytes --]
Hi Prasad,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v5.15-rc5 next-20211012]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Prasad-Malisetty/arm64-dts-qcom-sc7280-Add-pcie-clock-support/20211012-203806
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-randconfig-c004-20211012 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/887ae9ef148eb995db505587e883960a3f178102
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Prasad-Malisetty/arm64-dts-qcom-sc7280-Add-pcie-clock-support/20211012-203806
git checkout 887ae9ef148eb995db505587e883960a3f178102
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> ERROR: Input tree has errors, aborting (use -f to force output)
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 42607 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support
2021-10-12 17:26 ` Stephen Boyd
@ 2021-10-14 18:09 ` Prasad Malisetty
0 siblings, 0 replies; 5+ messages in thread
From: Prasad Malisetty @ 2021-10-14 18:09 UTC (permalink / raw)
To: Stephen Boyd
Cc: agross, bjorn.andersson, devicetree, linux-arm-msm, linux-kernel,
manivannan.sadhasivam, robh+dt, sanm, vbadigan
On 2021-10-12 22:56, Stephen Boyd wrote:
> Quoting Prasad Malisetty (2021-10-12 05:36:11)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 39635da..78694c1 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -569,9 +569,10 @@
>> reg = <0 0x00100000 0 0x1f0000>;
>> clocks = <&rpmhcc RPMH_CXO_CLK>,
>> <&rpmhcc RPMH_CXO_CLK_A>,
>> <&sleep_clk>,
>> - <0>, <0>, <0>, <0>, <0>, <0>;
>> + <0>, <&pcie1_lane 0>,
>> + <0>, <0>, <0>, <0>;
>> clock-names = "bi_tcxo", "bi_tcxo_ao",
>> "sleep_clk",
>> - "pcie_0_pipe_clk",
>> "pcie_1_pipe-clk",
>> + "pcie_0_pipe_clk",
>> "pcie_1_pipe_clk",
>
> It looks like a fix because the name doesn't match the binding. Can you
> add a Fixes tag?
>
Hi Stephen,
Thanks for the review.
Yes, I fixed the clock name as per the binding. I have added fixes tag
and updated the new pacth.
Thanks
-Prasad
>> "ufs_phy_rx_symbol_0_clk",
>> "ufs_phy_rx_symbol_1_clk",
>> "ufs_phy_tx_symbol_0_clk",
>>
>> "usb3_phy_wrapper_gcc_usb30_pipe_clk";
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-10-14 18:09 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-12 12:36 [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support Prasad Malisetty
2021-10-12 17:26 ` Stephen Boyd
2021-10-14 18:09 ` Prasad Malisetty
2021-10-12 23:00 ` kernel test robot
2021-10-12 23:00 ` kernel test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.