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From: Yinghai Lu <yinghai@kernel.org>
To: David Ahern <david.ahern@oracle.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"sparclinux@vger.kernel.org" <sparclinux@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: d63e2e1f3df breaks sparc/T5-8
Date: Fri, 27 Mar 2015 14:01:54 -0700	[thread overview]
Message-ID: <CAE9FiQXAD1ncuJ=ZiOSR4xCKbamPJ-5JSqEx1Veiai5bZKBcGA@mail.gmail.com> (raw)
In-Reply-To: <551495EE.20201@oracle.com>

On Thu, Mar 26, 2015 at 4:27 PM, David Ahern <david.ahern@oracle.com> wrote:
> On 3/26/15 2:43 PM, Yinghai Lu wrote:
>>
>> Can you send out boot log with "debug ignore_loglevel"?
>
>
> attached

So the kernel config is sparc32 or sparc64 ?

pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address
0x110204000)


only could happen when dma_addr_t is 32bit.

in drivers/pci/probe.c::__pcie_read_base()
                if ((sizeof(dma_addr_t) < 8) && l) {
                        /* Above 32-bit boundary; try to reallocate */
                        res->flags |= IORESOURCE_UNSET;
                        res->start = 0;
                        res->end = sz64;
                        dev_info(&dev->dev, "reg 0x%x: can't handle
BAR above 4GB (bus address %#010llx)\n",
                                 pos, (unsigned long long)l64);
                        goto out;
                }

also root bus has
pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0x804000000000-0x80400fffffff]
(bus address [0x0000-0xfffffff])
pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff]
(bus address [0x00000000-0x7effffff])
pci_bus 0000:00: root bus resource [bus 00-77]

and children device have
pci 0000:05:00.0: can't claim BAR 0 [mem
0x800100000000-0x800100001fff]: no compatible bridge window
pci 0000:06:00.0: can't claim BAR 0 [mem 0x800110000000-0x8001101fffff
pref]: no compatible bridge window
pci 0000:06:00.0: can't claim BAR 4 [mem 0x800110200000-0x800110203fff
pref]: no compatible bridge window
pci 0000:06:00.1: can't claim BAR 0 [mem 0x800110600000-0x8001107fffff
pref]: no compatible bridge window
pci 0000:06:00.1: can't claim BAR 4 [mem 0x800110404000-0x800110407fff
pref]: no compatible bridge window
pci 0000:07:00.0: can't claim BAR 1 [mem
0x800120000000-0x80012000ffff]: no compatible bridge window
pci 0000:07:00.0: can't claim BAR 3 [mem
0x800120040000-0x80012007ffff]: no compatible bridge window


looks like some root bus resource get dumped because it is out of range.

Also please make sure your config have

CONFIG_PCI_DEBUG=y

and capture serial console with "debug ignore_loglevel", so we check if
pci 0000:00:01.0 really have resource assigned.

Thanks

Yinghai

WARNING: multiple messages have this Message-ID (diff)
From: Yinghai Lu <yinghai@kernel.org>
To: David Ahern <david.ahern@oracle.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"sparclinux@vger.kernel.org" <sparclinux@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: d63e2e1f3df breaks sparc/T5-8
Date: Fri, 27 Mar 2015 21:01:54 +0000	[thread overview]
Message-ID: <CAE9FiQXAD1ncuJ=ZiOSR4xCKbamPJ-5JSqEx1Veiai5bZKBcGA@mail.gmail.com> (raw)
In-Reply-To: <551495EE.20201@oracle.com>

On Thu, Mar 26, 2015 at 4:27 PM, David Ahern <david.ahern@oracle.com> wrote:
> On 3/26/15 2:43 PM, Yinghai Lu wrote:
>>
>> Can you send out boot log with "debug ignore_loglevel"?
>
>
> attached

So the kernel config is sparc32 or sparc64 ?

pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address
0x110204000)


only could happen when dma_addr_t is 32bit.

in drivers/pci/probe.c::__pcie_read_base()
                if ((sizeof(dma_addr_t) < 8) && l) {
                        /* Above 32-bit boundary; try to reallocate */
                        res->flags |= IORESOURCE_UNSET;
                        res->start = 0;
                        res->end = sz64;
                        dev_info(&dev->dev, "reg 0x%x: can't handle
BAR above 4GB (bus address %#010llx)\n",
                                 pos, (unsigned long long)l64);
                        goto out;
                }

also root bus has
pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0x804000000000-0x80400fffffff]
(bus address [0x0000-0xfffffff])
pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff]
(bus address [0x00000000-0x7effffff])
pci_bus 0000:00: root bus resource [bus 00-77]

and children device have
pci 0000:05:00.0: can't claim BAR 0 [mem
0x800100000000-0x800100001fff]: no compatible bridge window
pci 0000:06:00.0: can't claim BAR 0 [mem 0x800110000000-0x8001101fffff
pref]: no compatible bridge window
pci 0000:06:00.0: can't claim BAR 4 [mem 0x800110200000-0x800110203fff
pref]: no compatible bridge window
pci 0000:06:00.1: can't claim BAR 0 [mem 0x800110600000-0x8001107fffff
pref]: no compatible bridge window
pci 0000:06:00.1: can't claim BAR 4 [mem 0x800110404000-0x800110407fff
pref]: no compatible bridge window
pci 0000:07:00.0: can't claim BAR 1 [mem
0x800120000000-0x80012000ffff]: no compatible bridge window
pci 0000:07:00.0: can't claim BAR 3 [mem
0x800120040000-0x80012007ffff]: no compatible bridge window


looks like some root bus resource get dumped because it is out of range.

Also please make sure your config have

CONFIG_PCI_DEBUG=y

and capture serial console with "debug ignore_loglevel", so we check if
pci 0000:00:01.0 really have resource assigned.

Thanks

Yinghai

  reply	other threads:[~2015-03-27 21:01 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-26 16:51 d63e2e1f3df breaks sparc/T5-8 David Ahern
2015-03-26 16:51 ` David Ahern
2015-03-26 20:43 ` Yinghai Lu
2015-03-26 20:43   ` Yinghai Lu
2015-03-26 23:27   ` David Ahern
2015-03-26 23:27     ` David Ahern
2015-03-27 21:01     ` Yinghai Lu [this message]
2015-03-27 21:01       ` Yinghai Lu
2015-03-27 21:50       ` David Miller
2015-03-27 21:50         ` David Miller
2015-03-27 22:51         ` Yinghai Lu
2015-03-27 22:51           ` Yinghai Lu
2015-03-29 13:30         ` Bjorn Helgaas
2015-03-29 18:32           ` David Miller
2015-03-29 18:32             ` David Miller
2015-04-03 15:45             ` Bjorn Helgaas
2015-04-03 15:45               ` Bjorn Helgaas
2015-04-03 16:48               ` David Miller
2015-04-03 16:48                 ` David Miller
2015-03-27 23:57       ` Yinghai Lu
2015-03-27 23:57         ` Yinghai Lu
2015-03-28  0:32         ` David Ahern
2015-03-28  0:32           ` David Ahern
2015-03-28  0:36           ` David Ahern
2015-03-28  0:36             ` David Ahern
2015-03-28  3:19             ` Yinghai Lu
2015-03-28  3:19               ` Yinghai Lu
2015-03-28  3:22               ` David Ahern
2015-03-28  3:22                 ` David Ahern
2015-03-28  3:27                 ` Yinghai Lu
2015-03-28  3:27                   ` Yinghai Lu
2015-03-28  3:45               ` David Ahern
2015-03-28  3:45                 ` David Ahern
2015-03-28  5:26                 ` Yinghai Lu
2015-03-28  5:26                   ` Yinghai Lu
2015-03-28 14:48                   ` David Ahern
2015-03-28 14:48                     ` David Ahern
2015-03-28 20:24                     ` Yinghai Lu
2015-03-28 20:24                       ` Yinghai Lu
2015-03-29 14:47                       ` David Ahern
2015-03-29 14:47                         ` David Ahern
2015-03-29 20:07                         ` Yinghai Lu
2015-03-29 20:07                           ` Yinghai Lu
2015-03-30 22:54                           ` David Ahern
2015-03-30 22:54                             ` David Ahern
2015-03-31  1:06                             ` Yinghai Lu
2015-03-31  1:06                               ` Yinghai Lu
2015-03-31  4:10                               ` David Ahern
2015-03-31  4:10                                 ` David Ahern
2015-03-31 16:53                                 ` Yinghai Lu
2015-03-31 16:53                                   ` Yinghai Lu
2015-03-31 17:04                                   ` David Ahern
2015-03-31 17:04                                     ` David Ahern
2015-03-31 20:28                                     ` Yinghai Lu
2015-03-31 20:28                                       ` Yinghai Lu
2015-03-31 22:29                                       ` David Ahern
2015-03-31 22:29                                         ` David Ahern
2015-03-31 22:38                                         ` Yinghai Lu
2015-03-31 22:38                                           ` Yinghai Lu
2015-03-31 22:42                                           ` David Ahern
2015-03-31 22:42                                             ` David Ahern
2015-03-31 15:06                               ` David Miller
2015-03-31 15:06                                 ` David Miller
2015-03-31 18:16                                 ` Yinghai Lu
2015-03-31 18:16                                   ` Yinghai Lu
2015-03-31 18:19                                   ` David Miller
2015-03-31 18:19                                     ` David Miller
2015-03-31 18:19                                     ` David Miller
2015-03-31 18:25                                     ` Yinghai Lu
2015-03-31 18:25                                       ` Yinghai Lu
2015-03-28  1:05         ` Sam Ravnborg
2015-03-28  1:05           ` Sam Ravnborg
2015-03-28  2:07           ` Yinghai Lu
2015-03-28  2:07             ` Yinghai Lu
2015-03-28  8:18             ` Sam Ravnborg
2015-03-28  8:18               ` Sam Ravnborg
2015-03-28 18:16         ` David Miller
2015-03-28 18:16           ` David Miller
2015-03-28 20:19           ` Yinghai Lu
2015-03-28 20:19             ` Yinghai Lu

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