From: Code Kipper <codekipper@gmail.com> To: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: linux-sunxi <linux-sunxi@googlegroups.com>, devicetree <devicetree@vger.kernel.org>, dmaengine@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org>, Maxime Ripard <maxime.ripard@free-electrons.com>, Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org> Subject: Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64 Date: Thu, 31 Aug 2017 13:44:05 +0200 [thread overview] Message-ID: <CAEKpxB=_CbbBem6EhA32P80esRhfCFoRPEv_rKKQauhzAdw_4Q@mail.gmail.com> (raw) In-Reply-To: <20170830233609.13855-4-stefan.bruens@rwth-aachen.de> On 31 August 2017 at 01:36, Stefan Brüns <stefan.bruens@rwth-aachen.de> wrote: > The A64 SoC has the same dma engine as the H3 (sun8i), with a > reduced amount of physical channels. Add the proper config data > and compatible string to support it. > > Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++ > drivers/dma/sun6i-dma.c | 7 +++++++ > 2 files changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index f96287d3043a..b86019238b77 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -494,6 +494,8 @@ > interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > clock-names = "ahb", "mod"; > + dmas = <&dma 23>, <&dma 23>; > + dma-names = "rx", "tx"; Hi Stefan, the dtsi parts should be in a separate patch > pinctrl-names = "default"; > pinctrl-0 = <&spi0_pins>; > resets = <&ccu RST_BUS_SPI0>; > @@ -509,6 +511,8 @@ > interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; > clock-names = "ahb", "mod"; > + dmas = <&dma 24>, <&dma 24>; > + dma-names = "rx", "tx"; > pinctrl-names = "default"; > pinctrl-0 = <&spi1_pins>; > resets = <&ccu RST_BUS_SPI1>; > diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c > index 5f4eee4513e5..6a17c5d63582 100644 > --- a/drivers/dma/sun6i-dma.c > +++ b/drivers/dma/sun6i-dma.c > @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { > .nr_max_vchans = 34, > .dmac_variant = DMAC_VARIANT_H3, > }; > + > +static struct sun6i_dma_config sun50i_a64_dma_cfg = { > + .nr_max_channels = 8, > + .nr_max_requests = 27, > + .nr_max_vchans = 38, > + .dmac_variant = DMAC_VARIANT_H3, > }; > > static const struct of_device_id sun6i_dma_match[] = { > @@ -1075,6 +1081,7 @@ static const struct of_device_id sun6i_dma_match[] = { > { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg }, > { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg }, > { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg }, > + { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg }, This all looks fine...it's similar to my patch here https://github.com/codekipper/linux-sunxi/commit/8c54d9852dfad6ceb478c579a1213f38fb12fa80 which I've been too lazy to post. I think the binding documentation should go with this patch and this should also be the 1st patch in the series, followed by the dtsi changes. BR, CK > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, sun6i_dma_match); > -- > 2.14.1 >
WARNING: multiple messages have this Message-ID (diff)
From: codekipper@gmail.com (Code Kipper) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64 Date: Thu, 31 Aug 2017 13:44:05 +0200 [thread overview] Message-ID: <CAEKpxB=_CbbBem6EhA32P80esRhfCFoRPEv_rKKQauhzAdw_4Q@mail.gmail.com> (raw) In-Reply-To: <20170830233609.13855-4-stefan.bruens@rwth-aachen.de> On 31 August 2017 at 01:36, Stefan Br?ns <stefan.bruens@rwth-aachen.de> wrote: > The A64 SoC has the same dma engine as the H3 (sun8i), with a > reduced amount of physical channels. Add the proper config data > and compatible string to support it. > > Signed-off-by: Stefan Br?ns <stefan.bruens@rwth-aachen.de> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++ > drivers/dma/sun6i-dma.c | 7 +++++++ > 2 files changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index f96287d3043a..b86019238b77 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -494,6 +494,8 @@ > interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > clock-names = "ahb", "mod"; > + dmas = <&dma 23>, <&dma 23>; > + dma-names = "rx", "tx"; Hi Stefan, the dtsi parts should be in a separate patch > pinctrl-names = "default"; > pinctrl-0 = <&spi0_pins>; > resets = <&ccu RST_BUS_SPI0>; > @@ -509,6 +511,8 @@ > interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; > clock-names = "ahb", "mod"; > + dmas = <&dma 24>, <&dma 24>; > + dma-names = "rx", "tx"; > pinctrl-names = "default"; > pinctrl-0 = <&spi1_pins>; > resets = <&ccu RST_BUS_SPI1>; > diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c > index 5f4eee4513e5..6a17c5d63582 100644 > --- a/drivers/dma/sun6i-dma.c > +++ b/drivers/dma/sun6i-dma.c > @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { > .nr_max_vchans = 34, > .dmac_variant = DMAC_VARIANT_H3, > }; > + > +static struct sun6i_dma_config sun50i_a64_dma_cfg = { > + .nr_max_channels = 8, > + .nr_max_requests = 27, > + .nr_max_vchans = 38, > + .dmac_variant = DMAC_VARIANT_H3, > }; > > static const struct of_device_id sun6i_dma_match[] = { > @@ -1075,6 +1081,7 @@ static const struct of_device_id sun6i_dma_match[] = { > { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg }, > { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg }, > { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg }, > + { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg }, This all looks fine...it's similar to my patch here https://github.com/codekipper/linux-sunxi/commit/8c54d9852dfad6ceb478c579a1213f38fb12fa80 which I've been too lazy to post. I think the binding documentation should go with this patch and this should also be the 1st patch in the series, followed by the dtsi changes. BR, CK > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, sun6i_dma_match); > -- > 2.14.1 >
next prev parent reply other threads:[~2017-08-31 11:44 UTC|newest] Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-08-30 23:36 [PATCH 0/3] dmaengine: Fix DMA on current allwinner SoCs, add A64 support Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-30 23:36 ` [PATCH 1/3] dmaengine: sun6i: Correct DMA support on H3 Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-31 14:51 ` Maxime Ripard 2017-08-31 14:51 ` Maxime Ripard 2017-09-01 3:04 ` Stefan Bruens 2017-09-01 3:04 ` Stefan Bruens 2017-09-01 3:04 ` Stefan Bruens 2017-09-01 13:35 ` Maxime Ripard 2017-09-01 13:35 ` Maxime Ripard 2017-09-01 14:42 ` Brüns, Stefan 2017-09-01 14:42 ` Brüns, Stefan 2017-09-01 14:42 ` Brüns, Stefan 2017-09-01 14:51 ` taskboxtester 2017-09-04 6:50 ` Maxime Ripard 2017-09-04 6:50 ` Maxime Ripard 2017-09-04 6:50 ` Maxime Ripard 2017-08-30 23:36 ` [PATCH 2/3] arm64: allwinner: a64: Add device node for DMA controller Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-09-11 22:00 ` Rob Herring 2017-09-11 22:00 ` Rob Herring 2017-09-11 22:00 ` Rob Herring 2017-08-30 23:36 ` [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64 Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-30 23:36 ` Stefan Brüns 2017-08-31 11:44 ` Code Kipper [this message] 2017-08-31 11:44 ` Code Kipper 2017-08-31 14:52 ` Maxime Ripard 2017-08-31 14:52 ` Maxime Ripard 2017-08-31 14:52 ` Maxime Ripard 2017-08-31 16:35 ` [linux-sunxi] " Code Kipper 2017-08-31 16:35 ` Code Kipper 2017-08-31 16:35 ` Code Kipper 2017-09-01 0:31 ` Andre Przywara 2017-09-01 0:31 ` Andre Przywara 2017-09-01 0:31 ` Andre Przywara 2017-09-01 1:19 ` Stefan Bruens 2017-09-01 1:19 ` Stefan Bruens 2017-09-01 1:19 ` Stefan Bruens 2017-09-01 22:32 ` André Przywara 2017-09-01 22:32 ` André Przywara 2017-09-02 0:38 ` Stefan Bruens 2017-09-02 0:38 ` Stefan Bruens 2017-09-02 0:38 ` Stefan Bruens 2017-09-02 2:02 ` Stefan Bruens 2017-09-02 2:02 ` Stefan Bruens 2017-09-02 2:02 ` Stefan Bruens 2017-09-03 23:14 ` André Przywara 2017-09-03 23:14 ` André Przywara 2017-09-03 23:14 ` André Przywara 2017-09-01 6:04 ` Maxime Ripard 2017-09-01 6:04 ` Maxime Ripard 2017-09-01 6:04 ` Maxime Ripard 2017-09-01 22:35 ` André Przywara 2017-09-01 22:35 ` André Przywara 2017-09-01 22:35 ` André Przywara 2017-09-04 7:04 ` Maxime Ripard 2017-09-04 7:04 ` Maxime Ripard 2017-09-04 7:04 ` Maxime Ripard 2017-09-04 8:14 ` André Przywara 2017-09-04 8:14 ` André Przywara 2017-09-08 14:39 ` Maxime Ripard 2017-09-08 14:39 ` Maxime Ripard 2017-09-08 14:57 ` Andre Przywara 2017-09-08 14:57 ` Andre Przywara
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