* [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
@ 2021-05-31 4:27 ` Alistair Francis
0 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2021-05-31 4:27 UTC (permalink / raw)
To: qemu-devel, qemu-riscv; +Cc: alistair.francis, bmeng.cn, palmer, alistair23
The is_32bit() check in translate.c expects a 64-bit guest to have a
64-bit misa value otherwise the macro check won't work. This patches
fixes that and fixes a Coverity issue at the same time.
Fixes: CID 1453107
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index e945352bca..a35a58df92 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -47,7 +47,7 @@ typedef struct DisasContext {
bool virt_enabled;
uint32_t opcode;
uint32_t mstatus_fs;
- uint32_t misa;
+ target_ulong misa;
uint32_t mem_idx;
/* Remember the rounding mode encoded in the previous fp instruction,
which we have already installed into env->fp_status. Or -1 for
--
2.31.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
@ 2021-05-31 4:27 ` Alistair Francis
0 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2021-05-31 4:27 UTC (permalink / raw)
To: qemu-devel, qemu-riscv; +Cc: bmeng.cn, palmer, alistair.francis, alistair23
The is_32bit() check in translate.c expects a 64-bit guest to have a
64-bit misa value otherwise the macro check won't work. This patches
fixes that and fixes a Coverity issue at the same time.
Fixes: CID 1453107
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index e945352bca..a35a58df92 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -47,7 +47,7 @@ typedef struct DisasContext {
bool virt_enabled;
uint32_t opcode;
uint32_t mstatus_fs;
- uint32_t misa;
+ target_ulong misa;
uint32_t mem_idx;
/* Remember the rounding mode encoded in the previous fp instruction,
which we have already installed into env->fp_status. Or -1 for
--
2.31.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
2021-05-31 4:27 ` Alistair Francis
@ 2021-06-01 11:45 ` Bin Meng
-1 siblings, 0 replies; 6+ messages in thread
From: Bin Meng @ 2021-06-01 11:45 UTC (permalink / raw)
To: Alistair Francis
Cc: Palmer Dabbelt, open list:RISC-V,
qemu-devel@nongnu.org Developers, Alistair Francis
On Mon, May 31, 2021 at 12:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> The is_32bit() check in translate.c expects a 64-bit guest to have a
> 64-bit misa value otherwise the macro check won't work. This patches
> fixes that and fixes a Coverity issue at the same time.
>
> Fixes: CID 1453107
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
@ 2021-06-01 11:45 ` Bin Meng
0 siblings, 0 replies; 6+ messages in thread
From: Bin Meng @ 2021-06-01 11:45 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V,
Palmer Dabbelt, Alistair Francis
On Mon, May 31, 2021 at 12:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> The is_32bit() check in translate.c expects a 64-bit guest to have a
> 64-bit misa value otherwise the macro check won't work. This patches
> fixes that and fixes a Coverity issue at the same time.
>
> Fixes: CID 1453107
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
2021-05-31 4:27 ` Alistair Francis
@ 2021-06-10 23:02 ` Alistair Francis
-1 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2021-06-10 23:02 UTC (permalink / raw)
To: Alistair Francis
Cc: Palmer Dabbelt, Bin Meng, open list:RISC-V,
qemu-devel@nongnu.org Developers
On Mon, May 31, 2021 at 2:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> The is_32bit() check in translate.c expects a 64-bit guest to have a
> 64-bit misa value otherwise the macro check won't work. This patches
> fixes that and fixes a Coverity issue at the same time.
>
> Fixes: CID 1453107
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index e945352bca..a35a58df92 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -47,7 +47,7 @@ typedef struct DisasContext {
> bool virt_enabled;
> uint32_t opcode;
> uint32_t mstatus_fs;
> - uint32_t misa;
> + target_ulong misa;
> uint32_t mem_idx;
> /* Remember the rounding mode encoded in the previous fp instruction,
> which we have already installed into env->fp_status. Or -1 for
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa
@ 2021-06-10 23:02 ` Alistair Francis
0 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2021-06-10 23:02 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V, Bin Meng,
Palmer Dabbelt
On Mon, May 31, 2021 at 2:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> The is_32bit() check in translate.c expects a 64-bit guest to have a
> 64-bit misa value otherwise the macro check won't work. This patches
> fixes that and fixes a Coverity issue at the same time.
>
> Fixes: CID 1453107
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index e945352bca..a35a58df92 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -47,7 +47,7 @@ typedef struct DisasContext {
> bool virt_enabled;
> uint32_t opcode;
> uint32_t mstatus_fs;
> - uint32_t misa;
> + target_ulong misa;
> uint32_t mem_idx;
> /* Remember the rounding mode encoded in the previous fp instruction,
> which we have already installed into env->fp_status. Or -1 for
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-06-10 23:04 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2021-05-31 4:27 [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa Alistair Francis
2021-05-31 4:27 ` Alistair Francis
2021-06-01 11:45 ` Bin Meng
2021-06-01 11:45 ` Bin Meng
2021-06-10 23:02 ` Alistair Francis
2021-06-10 23:02 ` Alistair Francis
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