* [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail
@ 2016-05-07 14:46 Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h Bin Meng
` (28 more replies)
0 siblings, 29 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
This series introduces initial ACPI support for Intel BayTrail.
Advanced Configuration and Power Interface (ACPI) aims to establish
industry-standard interfaces enabling OS-directed configuration, power
management, and thermal management of mobile, desktop, and server platforms.
Linux can boot without ACPI with "acpi=off" command line parameter, but
with ACPI the kernel gains the capabilities to handle power management.
For Windows, ACPI is a must-have firmware feature since Windows Vista.
CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
U-Boot. This requires Intel ACPI compiler to be installed on your host to
compile ACPI DSDT table written in ASL format to AML format. You can get
the compiler via "apt-get install iasl" if you are on Ubuntu or download
the source from acpica website to compile one by yourself.
Current ACPI support in U-Boot is not complete. More features will be added
in the future. The status as of today is:
* Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
* Support one static DSDT table only, compiled by Intel ACPI compiler.
* Support S0/S5, reboot and shutdown from OS.
* Support booting a pre-installed Ubuntu distribution via 'zboot' command.
* Support ACPI interrupts with SCI only.
Features not supported so far (to make it a complete ACPI solution):
* S3 (Suspend to RAM), S4 (Suspend to Disk).
* Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy interface.
* Install and boot Windows 8.1/10 from U-Boot with legacy interface.
Features that are optional:
* ACPI global NVS support. We may need it to simplify ASL code logic if
utilizing NVS variables. Most likely we will need this sooner or later.
* Dynamic AML bytecodes insertion at run-time. We may need this to support
SSDT table generation and DSDT fix up.
* SMI support. Since U-Boot is a modern bootloader, we don't want to bring
those legacy stuff into U-Boot. ACPI spec allows a system that does not
support SMI (a legacy-free system).
So far ACPI is enabled on BayTrail based boards. Testing was done by booting
a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
correctly and the board can respond a reboot/shutdown command from Ubuntu.
This series is available at u-boot-x86/acpi-working.
Changes in v2:
- Change to use IS_ENABLED()
- Change commit subject per review comments
- Update commit message to mention the reason of adding __packed
- Update the commit message per review comments
- Change 'orders' to 'order' in the commit subject
- Correct wrong indention in acpi_create_madt_lapics()
- Update several more places to use u32 in acpi_table.c
- Add comments before the 64 byte alignment for FACS
- New patch to clean up table header revisions
- New patch to return table length in acpi_create_madt_lapics()
- Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
chipset serial ports
- Fix SIO1 and SIO2 interrupt mapping in irqroute.h
- Use existing macros in FADT whenever possible
- Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
for consistency, and make it static
- Return table length in acpi_create_madt_irq_overrides() so that the
code logic in acpi_fill_madt() looks consistent (eg: current += ...)
- Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
- Update ACPI support status in more details: what's supported,
what's not supported, what's optional.
Bin Meng (28):
x86: Drop asm/acpi.h
x86: Fix build warning in tables.c when CONFIG_SEABIOS
x86: acpi: Fix compiler warnings in write_acpi_tables()
x86: irq: Reserve IRQ9 for ACPI in PIC mode
x86: irq: Enable SCI on IRQ9
x86: dts: Update to include ACTL register details
acpi: Change build log for ASL files
acpi: Explicitly spell out dsdt.c in the make rule
acpi: Specify U-Boot include path for ASL files
acpi: Output all errors/warnings/remarks when compiling ASL
x86: acpi: Remove unused codes
x86: acpi: Various changes to acpi_table.h
x86: acpi: Reorder code in acpi_table.h
x86: acpi: Remove acpi_create_ssdt_generator()
x86: acpi: Change fill_header()
x86: acpi: Adjust order in acpi_table.c
x86: acpi: Use u32 in table write routines
x86: acpi: Align FACS table to a 64 byte boundary
x86: acpi: Clean up table header revisions
x86: acpi: Add some generic ASL libraries
x86: acpi: Return table length in acpi_create_madt_lapics()
x86: baytrail: Add platform ASL files
x86: baytrail: Generate ACPI FADT/MADT tables
x86: baytrail: Enable ACPI table generation for all boards
x86: baytrail: Add .gitignore for ACPI enabled boards
x86: Remove acpi=off boot parameter when ACPI is on
x86: doc: Minor update for accuracy
x86: doc: Document ACPI support
arch/x86/cpu/baytrail/Makefile | 1 +
arch/x86/cpu/baytrail/acpi.c | 163 +++++++
arch/x86/cpu/irq.c | 30 ++
arch/x86/cpu/ivybridge/lpc.c | 1 -
arch/x86/cpu/ivybridge/model_206ax.c | 1 -
arch/x86/cpu/ivybridge/northbridge.c | 1 -
arch/x86/dts/bayleybay.dts | 1 +
arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
arch/x86/dts/crownbay.dts | 1 +
arch/x86/dts/galileo.dts | 1 +
arch/x86/dts/minnowmax.dts | 1 +
arch/x86/dts/qemu-x86_q35.dts | 2 +
arch/x86/include/asm/acpi.h | 24 -
arch/x86/include/asm/acpi/debug.asl | 136 ++++++
arch/x86/include/asm/acpi/globutil.asl | 113 +++++
arch/x86/include/asm/acpi/statdef.asl | 82 ++++
arch/x86/include/asm/acpi_table.h | 443 ++++++++-----------
.../include/asm/arch-baytrail/acpi/irq_helper.h | 111 +++++
.../include/asm/arch-baytrail/acpi/irqlinks.asl | 489 +++++++++++++++++++++
.../include/asm/arch-baytrail/acpi/irqroute.asl | 48 ++
arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | 27 ++
arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 121 +++++
.../include/asm/arch-baytrail/acpi/platform.asl | 33 ++
.../include/asm/arch-baytrail/acpi/sleepstates.asl | 13 +
.../asm/arch-baytrail/acpi/southcluster.asl | 211 +++++++++
arch/x86/include/asm/arch-baytrail/acpi/usb.asl | 34 ++
arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | 31 ++
arch/x86/include/asm/arch-baytrail/device.h | 74 ++++
arch/x86/include/asm/arch-baytrail/iomap.h | 70 +++
arch/x86/include/asm/arch-baytrail/irq.h | 86 ++++
arch/x86/include/asm/irq.h | 4 +
arch/x86/lib/acpi_table.c | 342 +++++++-------
arch/x86/lib/tables.c | 1 +
board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +
board/congatec/conga-qeval20-qa3-e3845/Makefile | 1 +
.../conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +
board/congatec/conga-qeval20-qa3-e3845/dsdt.asl | 14 +
board/intel/bayleybay/.gitignore | 3 +
board/intel/bayleybay/Makefile | 1 +
board/intel/bayleybay/acpi/mainboard.asl | 11 +
board/intel/bayleybay/dsdt.asl | 14 +
board/intel/minnowmax/.gitignore | 3 +
board/intel/minnowmax/Makefile | 1 +
board/intel/minnowmax/acpi/mainboard.asl | 11 +
board/intel/minnowmax/dsdt.asl | 14 +
configs/bayleybay_defconfig | 1 +
configs/conga-qeval20-qa3-e3845_defconfig | 1 +
configs/minnowmax_defconfig | 1 +
doc/README.x86 | 85 +++-
doc/device-tree-bindings/misc/intel,irq-router.txt | 5 +
include/configs/x86-common.h | 9 +-
scripts/Makefile.lib | 8 +-
52 files changed, 2388 insertions(+), 508 deletions(-)
create mode 100644 arch/x86/cpu/baytrail/acpi.c
delete mode 100644 arch/x86/include/asm/acpi.h
create mode 100644 arch/x86/include/asm/acpi/debug.asl
create mode 100644 arch/x86/include/asm/acpi/globutil.asl
create mode 100644 arch/x86/include/asm/acpi/statdef.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h
create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
create mode 100644 board/intel/bayleybay/.gitignore
create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
create mode 100644 board/intel/bayleybay/dsdt.asl
create mode 100644 board/intel/minnowmax/.gitignore
create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
create mode 100644 board/intel/minnowmax/dsdt.asl
--
1.8.2.1
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:45 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS Bin Meng
` (27 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Remove asm/acpi.h which is never used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/cpu/ivybridge/lpc.c | 1 -
arch/x86/cpu/ivybridge/model_206ax.c | 1 -
arch/x86/cpu/ivybridge/northbridge.c | 1 -
arch/x86/include/asm/acpi.h | 24 ------------------------
4 files changed, 27 deletions(-)
delete mode 100644 arch/x86/include/asm/acpi.h
diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index 88ab797..ff1faa5 100644
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -12,7 +12,6 @@
#include <fdtdec.h>
#include <rtc.h>
#include <pci.h>
-#include <asm/acpi.h>
#include <asm/intel_regs.h>
#include <asm/interrupt.h>
#include <asm/io.h>
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index cef4256..e710ac4 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -12,7 +12,6 @@
#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
-#include <asm/acpi.h>
#include <asm/cpu.h>
#include <asm/cpu_x86.h>
#include <asm/lapic.h>
diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c
index f7e0bc3..491f289 100644
--- a/arch/x86/cpu/ivybridge/northbridge.c
+++ b/arch/x86/cpu/ivybridge/northbridge.c
@@ -10,7 +10,6 @@
#include <common.h>
#include <dm.h>
#include <asm/msr.h>
-#include <asm/acpi.h>
#include <asm/cpu.h>
#include <asm/intel_regs.h>
#include <asm/io.h>
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
deleted file mode 100644
index 4872b92..0000000
--- a/arch/x86/include/asm/acpi.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * From coreboot
- *
- * Copyright (C) 2004 SUSE LINUX AG
- * Copyright (C) 2004 Nick Barker
- * Copyright (C) 2008-2009 coresystems GmbH
- * (Written by Stefan Reinauer <stepan@coresystems.de>)
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#ifndef __ASM_ACPI_H
-#define __ASM_ACPI_H
-
-#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
-#define ACPI_TABLE_CREATOR "U-BootAC" /* Must be exactly 8 bytes long! */
-#define OEM_ID "U-Boot" /* Must be exactly 6 bytes long! */
-#define ASLC "U-Bo" /* Must be exactly 4 bytes long! */
-
-/* 0 = S0, 1 = S1 ...*/
-int acpi_get_slp_type(void);
-void apci_set_slp_type(int type);
-
-#endif
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables() Bin Meng
` (26 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
The following build warning is seen in tables.c:
warning: implicit declaration of function 'memalign'
Add the missing header file to fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/lib/tables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index a156f2c..1213a9c 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <malloc.h>
#include <asm/sfi.h>
#include <asm/mpspec.h>
#include <asm/smbios.h>
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables()
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode Bin Meng
` (25 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Fix the following two build warnings in function 'write_acpi_tables':
warning: format '%lx' expects argument of type 'long unsigned int',
but argument 2 has type 'u32' [-Wformat=]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 790f6fb..0b1775c 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -353,7 +353,7 @@ u32 write_acpi_tables(u32 start)
/* Align ACPI tables to 16byte */
current = ALIGN(current, 16);
- debug("ACPI: Writing ACPI tables at %lx.\n", start);
+ debug("ACPI: Writing ACPI tables at %x.\n", start);
/* We need at least an RSDP and an RSDT Table */
rsdp = (struct acpi_rsdp *)current;
@@ -432,7 +432,7 @@ u32 write_acpi_tables(u32 start)
current = ALIGN(current, 16);
}
- debug("current = %lx\n", current);
+ debug("current = %x\n", current);
debug("ACPI: done.\n");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (2 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables() Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 05/28] x86: irq: Enable SCI on IRQ9 Bin Meng
` (24 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Reserve IRQ9 which is to be used as SCI interrupt number
for ACPI in PIC mode.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Change to use IS_ENABLED()
arch/x86/cpu/irq.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index 2950783..7586fc2 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -121,6 +121,11 @@ static int create_pirq_routing_table(struct udevice *dev)
priv->irq_mask = fdtdec_get_int(blob, node,
"intel,pirq-mask", PIRQ_BITMAP);
+ if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
+ /* Reserve IRQ9 for SCI */
+ priv->irq_mask &= ~(1 << 9);
+ }
+
if (priv->config == PIRQ_VIA_IBASE) {
int ibase_off;
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 05/28] x86: irq: Enable SCI on IRQ9
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (3 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details Bin Meng
` (23 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/cpu/irq.c | 25 ++++++++++++++++++++++
arch/x86/include/asm/irq.h | 4 ++++
doc/device-tree-bindings/misc/intel,irq-router.txt | 5 +++++
3 files changed, 34 insertions(+)
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index 7586fc2..bd7bd66 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -147,6 +147,9 @@ static int create_pirq_routing_table(struct udevice *dev)
priv->ibase &= ~0xf;
}
+ priv->actl_8bit = fdtdec_get_bool(blob, node, "intel,actl-8bit");
+ priv->actl_addr = fdtdec_get_int(blob, node, "intel,actl-addr", 0);
+
cell = fdt_getprop(blob, node, "intel,pirq-routing", &len);
if (!cell || len % sizeof(struct pirq_routing))
return -EINVAL;
@@ -216,6 +219,24 @@ static int create_pirq_routing_table(struct udevice *dev)
return 0;
}
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+static void irq_enable_sci(struct udevice *dev)
+{
+ struct irq_router *priv = dev_get_priv(dev);
+
+ if (priv->actl_8bit) {
+ /* Bit7 must be turned on to enable ACPI */
+ dm_pci_write_config8(dev->parent, priv->actl_addr, 0x80);
+ } else {
+ /* Write 0 to enable SCI on IRQ9 */
+ if (priv->config == PIRQ_VIA_PCI)
+ dm_pci_write_config32(dev->parent, priv->actl_addr, 0);
+ else
+ writel(0, priv->ibase + priv->actl_addr);
+ }
+}
+#endif
+
int irq_router_common_init(struct udevice *dev)
{
int ret;
@@ -229,6 +250,10 @@ int irq_router_common_init(struct udevice *dev)
pirq_route_irqs(dev, pirq_routing_table->slots,
get_irq_slot_count(pirq_routing_table));
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+ irq_enable_sci(dev);
+#endif
+
return 0;
}
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 5b9e673..ddb529e 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -34,6 +34,8 @@ enum pirq_config {
* IRQ N is available to be routed
* @lb_bdf: irq router's PCI bus/device/function number encoding
* @ibase: IBASE register block base address
+ * @actl_8bit: ACTL register width is 8-bit (for ICH series chipset)
+ * @actl_addr: ACTL register offset
*/
struct irq_router {
int config;
@@ -41,6 +43,8 @@ struct irq_router {
u16 irq_mask;
u32 bdf;
u32 ibase;
+ bool actl_8bit;
+ int actl_addr;
};
struct pirq_routing {
diff --git a/doc/device-tree-bindings/misc/intel,irq-router.txt b/doc/device-tree-bindings/misc/intel,irq-router.txt
index e4d8ead..04ad346 100644
--- a/doc/device-tree-bindings/misc/intel,irq-router.txt
+++ b/doc/device-tree-bindings/misc/intel,irq-router.txt
@@ -14,6 +14,11 @@ Required properties :
"ibase": IRQ routing is in the memory-mapped IBASE register block
- intel,ibase-offset : IBASE register offset in the interrupt router's PCI
configuration space, required only if intel,pirq-config = "ibase".
+- intel,actl-8bit : If ACTL (ACPI control) register width is 8-bit, this must
+ be specified. The 8-bit ACTL register is seen on ICH series chipset, like
+ ICH9/Panther Point/etc. On Atom chipset it is a 32-bit register.
+- intel,actl-addr : ACTL (ACPI control) register offset. ACTL can be either
+ in the interrupt router's PCI configuration space, or IBASE.
- intel,pirq-link : Specifies the PIRQ link information with two cells. The
first cell is the register offset that controls the first PIRQ link routing.
The second cell is the total number of PIRQ links the router supports.
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (4 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 05/28] x86: irq: Enable SCI on IRQ9 Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files Bin Meng
` (22 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
This updates all x86 boards that currently have IRQ router in the
dts files to include ACTL register details.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/dts/bayleybay.dts | 1 +
arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
arch/x86/dts/crownbay.dts | 1 +
arch/x86/dts/galileo.dts | 1 +
arch/x86/dts/minnowmax.dts | 1 +
arch/x86/dts/qemu-x86_q35.dts | 2 ++
6 files changed, 7 insertions(+)
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 4ea9262..444de1b 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -84,6 +84,7 @@
compatible = "intel,irq-router";
intel,pirq-config = "ibase";
intel,ibase-offset = <0x50>;
+ intel,actl-addr = <0>;
intel,pirq-link = <8 8>;
intel,pirq-mask = <0xdee0>;
intel,pirq-routing = <
diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index 478dece..624d66d 100644
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -88,6 +88,7 @@
compatible = "intel,irq-router";
intel,pirq-config = "ibase";
intel,ibase-offset = <0x50>;
+ intel,actl-addr = <0>;
intel,pirq-link = <8 8>;
intel,pirq-mask = <0xdee0>;
intel,pirq-routing = <
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 337513b..78a1ef4 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -154,6 +154,7 @@
irq-router {
compatible = "intel,queensbay-irq-router";
intel,pirq-config = "pci";
+ intel,actl-addr = <0x58>;
intel,pirq-link = <0x60 8>;
intel,pirq-mask = <0xcee0>;
intel,pirq-routing = <
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 21c3641..f784c50 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -88,6 +88,7 @@
irq-router {
compatible = "intel,quark-irq-router";
intel,pirq-config = "pci";
+ intel,actl-addr = <0x58>;
intel,pirq-link = <0x60 8>;
intel,pirq-mask = <0xdef8>;
intel,pirq-routing = <
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 60bd05a..a6c86c9 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -117,6 +117,7 @@
compatible = "intel,irq-router";
intel,pirq-config = "ibase";
intel,ibase-offset = <0x50>;
+ intel,actl-addr = <0>;
intel,pirq-link = <8 8>;
intel,pirq-mask = <0xdee0>;
intel,pirq-routing = <
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 5d601b3..0d462a9 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -69,6 +69,8 @@
irq-router {
compatible = "intel,irq-router";
intel,pirq-config = "pci";
+ intel,actl-8bit;
+ intel,actl-addr = <0x44>;
intel,pirq-link = <0x60 8>;
intel,pirq-mask = <0x0e40>;
intel,pirq-routing = <
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (5 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule Bin Meng
` (21 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Currently when compiling U-Boot with ASL file, the build log says:
ASL board/intel/bayleybay/dsdt.c
This looks odd as ASL compiler's input is ASL file, not C file.
Change the make rule to use $< instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
scripts/Makefile.lib | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index ad1d9b5..4f882f1 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -323,7 +323,7 @@ $(obj)/%.S: $(src)/%.ttf
# ACPI
# ---------------------------------------------------------------------------
-quiet_cmd_acpi_c_asl= ASL $@
+quiet_cmd_acpi_c_asl= ASL $<
cmd_acpi_c_asl= \
$(CPP) -x assembler-with-cpp -P -o $<.tmp $<; \
iasl -p $< -tc -va $<.tmp; \
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (6 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files Bin Meng
` (20 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Currently the make rule for dsdt.c uses a wildcard, as below:
$(obj)/%.c: $(src)/%.asl
To avoid any side effect, explicitly mention dsdt.c as this is
the file we intend to use for ACPI DSDT AML generation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
scripts/Makefile.lib | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 4f882f1..85b5819 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -329,7 +329,7 @@ cmd_acpi_c_asl= \
iasl -p $< -tc -va $<.tmp; \
mv $(patsubst %.asl,%.hex,$<) $@
-$(obj)/%.c: $(src)/%.asl
+$(obj)/dsdt.c: $(src)/dsdt.asl
$(call cmd,acpi_c_asl)
# Bzip2
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (7 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL Bin Meng
` (19 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
It will be much easier if we split the whole dsdt.asl file into
multiple smaller ASL parts and have access to U-Boot include files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
scripts/Makefile.lib | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 85b5819..5f0b050 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -325,7 +325,7 @@ $(obj)/%.S: $(src)/%.ttf
# ---------------------------------------------------------------------------
quiet_cmd_acpi_c_asl= ASL $<
cmd_acpi_c_asl= \
- $(CPP) -x assembler-with-cpp -P -o $<.tmp $<; \
+ $(CPP) -x assembler-with-cpp -P $(UBOOTINCLUDE) -o $<.tmp $<; \
iasl -p $< -tc -va $<.tmp; \
mv $(patsubst %.asl,%.hex,$<) $@
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (8 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes Bin Meng
` (18 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Remove -va option when invoking IASL compiler so that we can see
errors/warnings/remarks in the build log.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
scripts/Makefile.lib | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 5f0b050..44534e1 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -326,7 +326,7 @@ $(obj)/%.S: $(src)/%.ttf
quiet_cmd_acpi_c_asl= ASL $<
cmd_acpi_c_asl= \
$(CPP) -x assembler-with-cpp -P $(UBOOTINCLUDE) -o $<.tmp $<; \
- iasl -p $< -tc -va $<.tmp; \
+ iasl -p $< -tc $<.tmp; \
mv $(patsubst %.asl,%.hex,$<) $@
$(obj)/dsdt.c: $(src)/dsdt.asl
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (9 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h Bin Meng
` (17 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
- Remove #include <> header files.
- Remove APM_CNT register defines, which should not be here as
they are SMI related.
- Remove MP_IRQ_ defines as they are duplicates of the same ones
in asm/mpspec.h.
- Remove ACTL register defines, which should not be here as they
are chipset specific.
- Remove functional fixed hardware defines, which are not used.
- Remove dev_scope related defines, which are not used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Change commit subject per review comments
arch/x86/include/asm/acpi_table.h | 68 ---------------------------------------
1 file changed, 68 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 9856fa6..e82752a 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -6,11 +6,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
-#include <malloc.h>
-#include <asm/post.h>
-#include <linux/string.h>
-
#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
#define ACPI_TABLE_CREATOR "UBOOT " /* Must be 8 bytes long! */
#define OEM_ID "UBOOT " /* Must be 6 bytes long! */
@@ -19,42 +14,6 @@
#define OEM_REVISION 42
#define ASL_COMPILER_REVISION 42
-/* IO ports to generate SMIs */
-#define APM_CNT 0xb2
-#define APM_CNT_CST_CONTROL 0x85
-#define APM_CNT_PST_CONTROL 0x80
-#define APM_CNT_ACPI_DISABLE 0x1e
-#define APM_CNT_ACPI_ENABLE 0xe1
-#define APM_CNT_MBI_UPDATE 0xeb
-#define APM_CNT_GNVS_UPDATE 0xea
-#define APM_CNT_FINALIZE 0xcb
-#define APM_CNT_LEGACY 0xcc
-#define APM_ST 0xb3
-
-/* Multiple Processor Interrupts */
-#define MP_IRQ_POLARITY_DEFAULT 0x0
-#define MP_IRQ_POLARITY_HIGH 0x1
-#define MP_IRQ_POLARITY_LOW 0x3
-#define MP_IRQ_POLARITY_MASK 0x3
-#define MP_IRQ_TRIGGER_DEFAULT 0x0
-#define MP_IRQ_TRIGGER_EDGE 0x4
-#define MP_IRQ_TRIGGER_LEVEL 0xc
-#define MP_IRQ_TRIGGER_MASK 0xc
-
-/*
- * Interrupt assigned for SCI in order to
- * create the ACPI MADT IRQ override entry
- */
-#define ACTL 0x00
-#define SCIS_MASK 0x07
-#define SCIS_IRQ9 0x00
-#define SCIS_IRQ10 0x01
-#define SCIS_IRQ11 0x02
-#define SCIS_IRQ20 0x04
-#define SCIS_IRQ21 0x05
-#define SCIS_IRQ22 0x06
-#define SCIS_IRQ23 0x07
-
#define ACPI_REV_ACPI_1_0 1
#define ACPI_REV_ACPI_2_0 1
#define ACPI_REV_ACPI_3_0 2
@@ -105,14 +64,6 @@ enum acpi_address_space_type {
ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
};
-/* functional fixed hardware */
-#define ACPI_FFIXEDHW_VENDOR_INTEL 1 /* Intel */
-#define ACPI_FFIXEDHW_CLASS_HLT 0 /* C1 Halt */
-#define ACPI_FFIXEDHW_CLASS_IO_HLT 1 /* C1 I/O then Halt */
-#define ACPI_FFIXEDHW_CLASS_MWAIT 2 /* MWAIT Native C-state */
-#define ACPI_FFIXEDHW_FLAG_HW_COORD 1 /* Hardware Coordination bit */
-#define ACPI_FFIXEDHW_FLAG_BM_STS 2 /* BM_STS avoidance bit */
-
/* Access size definitions for Generic address structure */
enum acpi_address_space_size {
ACPI_ACCESS_SIZE_UNDEFINED = 0, /* Undefined (legacy reasons) */
@@ -172,25 +123,6 @@ struct acpi_madt {
u32 flags; /* Multiple APIC flags */
} acpi_madt_t;
-enum dev_scope_type {
- SCOPE_PCI_ENDPOINT = 1,
- SCOPE_PCI_SUB = 2,
- SCOPE_IOAPIC = 3,
- SCOPE_MSI_HPET = 4
-};
-
-typedef struct dev_scope {
- u8 type;
- u8 length;
- u8 reserved[2];
- u8 enumeration;
- u8 start_bus;
- struct {
- u8 dev;
- u8 fn;
- } path[0];
-} __packed dev_scope_t;
-
/* MADT: APIC Structure Type*/
enum acpi_apic_types {
LOCALAPIC = 0, /* Processor local APIC */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (10 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h Bin Meng
` (16 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
- Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
- Do not typedef acpi_header_t, instead use struct acpi_table_hader.
- Use a shorter name aslc_id and aslc-revision.
- Change MCFG base address to use 32-bit value pairs (_l and _h).
- Apply ACPI_APIC_ prefix to MADT APIC type macros and make
their names to be more readable.
- Apply __packed to struct acpi_madt_irqoverride and struct
acpi_madt_lapic_nmi tables, as they are not naturally aligned
by the compiler which leads to wrong sizeof(struct).
- Rename model to res1 as it is reserved after ACPI spec 1.0.
- Apply ACPI_ prefix to the PM profile macros and change them
to enum.
- Add ospm_flags to FACS structure which is defined since ACPI 4.0.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Update commit message to mention the reason of adding __packed
arch/x86/include/asm/acpi_table.h | 72 +++++++++++++++++++++------------------
arch/x86/lib/acpi_table.c | 71 ++++++++++++++++++++------------------
2 files changed, 75 insertions(+), 68 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index e82752a..418870e 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -6,10 +6,10 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
-#define ACPI_TABLE_CREATOR "UBOOT " /* Must be 8 bytes long! */
-#define OEM_ID "UBOOT " /* Must be 6 bytes long! */
-#define ASLC "INTL" /* Must be 4 bytes long! */
+#define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
+#define OEM_ID "U-BOOT" /* U-Boot */
+#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
+#define ASLC_ID "INTL" /* Intel ASL Compiler */
#define OEM_REVISION 42
#define ASL_COMPILER_REVISION 42
@@ -74,7 +74,7 @@ enum acpi_address_space_size {
};
/* Generic ACPI header, provided by (almost) all tables */
-typedef struct acpi_table_header {
+struct acpi_table_header {
char signature[4]; /* ACPI signature (4 ASCII characters) */
u32 length; /* Table length in bytes (incl. header) */
u8 revision; /* Table version (not ACPI version!) */
@@ -82,9 +82,9 @@ typedef struct acpi_table_header {
char oem_id[6]; /* OEM identification */
char oem_table_id[8]; /* OEM table identification */
u32 oem_revision; /* OEM revision number */
- char asl_compiler_id[4]; /* ASL compiler vendor ID */
- u32 asl_compiler_revision; /* ASL compiler revision number */
-} acpi_header_t;
+ char aslc_id[4]; /* ASL compiler vendor ID */
+ u32 aslc_revision; /* ASL compiler revision number */
+};
/* A maximum number of 32 ACPI tables ought to be enough for now */
#define MAX_ACPI_TABLES 32
@@ -108,8 +108,8 @@ struct acpi_mcfg {
};
struct acpi_mcfg_mmconfig {
- u32 base_address;
- u32 base_reserved;
+ u32 base_address_l;
+ u32 base_address_h;
u16 pci_segment_group_number;
u8 start_bus_number;
u8 end_bus_number;
@@ -125,17 +125,17 @@ struct acpi_madt {
/* MADT: APIC Structure Type*/
enum acpi_apic_types {
- LOCALAPIC = 0, /* Processor local APIC */
- IOAPIC, /* I/O APIC */
- IRQSOURCEOVERRIDE, /* Interrupt source override */
- NMITYPE, /* NMI source */
- LOCALNMITYPE, /* Local APIC NMI */
- LAPICADDRESSOVERRIDE, /* Local APIC address override */
- IOSAPIC, /* I/O SAPIC */
- LOCALSAPIC, /* Local SAPIC */
- PLATFORMIRQSOURCES, /* Platform interrupt sources */
- LOCALX2SAPIC, /* Processor local x2APIC */
- LOCALX2APICNMI, /* Local x2APIC NMI */
+ ACPI_APIC_LAPIC = 0, /* Processor local APIC */
+ ACPI_APIC_IOAPIC, /* I/O APIC */
+ ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
+ ACPI_APIC_NMI_SRC, /* NMI source */
+ ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
+ ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
+ ACPI_APIC_IOSAPIC, /* I/O SAPIC */
+ ACPI_APIC_LSAPIC, /* Local SAPIC */
+ ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
+ ACPI_APIC_LX2APIC, /* Processor local x2APIC */
+ ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
};
/* MADT: Processor Local APIC Structure */
@@ -153,7 +153,7 @@ struct acpi_madt_lapic {
/* bits 1-31: reserved */
/* MADT: Local APIC NMI Structure */
-struct acpi_madt_lapic_nmi {
+struct __packed acpi_madt_lapic_nmi {
u8 type; /* Type (4) */
u8 length; /* Length in bytes (6) */
u8 processor_id; /* ACPI processor ID */
@@ -172,7 +172,7 @@ struct acpi_madt_ioapic {
};
/* MADT: Interrupt Source Override Structure */
-struct acpi_madt_irqoverride {
+struct __packed acpi_madt_irqoverride {
u8 type; /* Type (2) */
u8 length; /* Length in bytes (10) */
u8 bus; /* ISA (0) */
@@ -186,7 +186,7 @@ struct __packed acpi_fadt {
struct acpi_table_header header;
u32 firmware_ctrl;
u32 dsdt;
- u8 model;
+ u8 res1;
u8 preferred_pm_profile;
u16 sci_int;
u32 smi_cmd;
@@ -281,15 +281,17 @@ struct __packed acpi_fadt {
#define ACPI_FADT_LEGACY_FREE 0x00
/* FADT Preferred Power Management Profile */
-#define PM_UNSPECIFIED 0
-#define PM_DESKTOP 1
-#define PM_MOBILE 2
-#define PM_WORKSTATION 3
-#define PM_ENTERPRISE_SERVER 4
-#define PM_SOHO_SERVER 5
-#define PM_APPLIANCE_PC 6
-#define PM_PERFORMANCE_SERVER 7
-#define PM_TABLET 8 /* ACPI 5.0 */
+enum acpi_pm_profile {
+ ACPI_PM_UNSPECIFIED = 0,
+ ACPI_PM_DESKTOP,
+ ACPI_PM_MOBILE,
+ ACPI_PM_WORKSTATION,
+ ACPI_PM_ENTERPRISE_SERVER,
+ ACPI_PM_SOHO_SERVER,
+ ACPI_PM_APPLIANCE_PC,
+ ACPI_PM_PERFORMANCE_SERVER,
+ ACPI_PM_TABLET
+};
/* FACS (Firmware ACPI Control Structure) */
struct acpi_facs {
@@ -302,7 +304,9 @@ struct acpi_facs {
u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
u8 version; /* ACPI 4.0: 2 */
- u8 resv[31]; /* FIXME: 4.0: ospm_flags */
+ u8 res1[3];
+ u32 ospm_flags; /* OSPM enabled flags */
+ u8 res2[24];
};
/* FACS flags */
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 0b1775c..75fa429 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -58,7 +58,8 @@ static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
rsdt->entry[i] = (u32)table;
/* Fix RSDT length or the kernel will assume invalid entries */
- rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i + 1));
+ rsdt->header.length = sizeof(struct acpi_table_header) +
+ (sizeof(u32) * (i + 1));
/* Re-calculate checksum */
rsdt->header.checksum = 0;
@@ -74,7 +75,7 @@ static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
xsdt->entry[i] = (u64)(u32)table;
/* Fix XSDT length */
- xsdt->header.length = sizeof(acpi_header_t) +
+ xsdt->header.length = sizeof(struct acpi_table_header) +
(sizeof(u64) * (i + 1));
/* Re-calculate checksum */
@@ -87,7 +88,7 @@ static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
u8 cpu, u8 apic)
{
- lapic->type = LOCALAPIC; /* Local APIC structure */
+ lapic->type = ACPI_APIC_LAPIC; /* Local APIC structure */
lapic->length = sizeof(struct acpi_madt_lapic);
lapic->flags = LOCAL_APIC_FLAG_ENABLED; /* Processor/LAPIC enabled */
lapic->processor_id = cpu;
@@ -115,7 +116,7 @@ unsigned long acpi_create_madt_lapics(unsigned long current)
int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
u32 gsi_base)
{
- ioapic->type = IOAPIC;
+ ioapic->type = ACPI_APIC_IOAPIC;
ioapic->length = sizeof(struct acpi_madt_ioapic);
ioapic->reserved = 0x00;
ioapic->gsi_base = gsi_base;
@@ -128,7 +129,7 @@ int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
u8 bus, u8 source, u32 gsirq, u16 flags)
{
- irqoverride->type = IRQSOURCEOVERRIDE;
+ irqoverride->type = ACPI_APIC_IRQ_SRC_OVERRIDE;
irqoverride->length = sizeof(struct acpi_madt_irqoverride);
irqoverride->bus = bus;
irqoverride->source = source;
@@ -141,7 +142,7 @@ int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
u8 cpu, u16 flags, u8 lint)
{
- lapic_nmi->type = LOCALNMITYPE;
+ lapic_nmi->type = ACPI_APIC_LAPIC_NMI;
lapic_nmi->length = sizeof(struct acpi_madt_lapic_nmi);
lapic_nmi->flags = flags;
lapic_nmi->processor_id = cpu;
@@ -150,17 +151,18 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
return lapic_nmi->length;
}
-static void fill_header(acpi_header_t *header, char *signature, int length)
+static void fill_header(struct acpi_table_header *header, char *signature,
+ int length)
{
memcpy(header->signature, signature, length);
memcpy(header->oem_id, OEM_ID, 6);
- memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
- memcpy(header->asl_compiler_id, ASLC, 4);
+ memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
+ memcpy(header->aslc_id, ASLC_ID, 4);
}
static void acpi_create_madt(struct acpi_madt *madt)
{
- acpi_header_t *header = &(madt->header);
+ struct acpi_table_header *header = &(madt->header);
unsigned long current = (unsigned long)madt + sizeof(struct acpi_madt);
memset((void *)madt, 0, sizeof(struct acpi_madt));
@@ -173,7 +175,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
header->revision = ACPI_REV_ACPI_2_0;
madt->lapic_addr = LAPIC_DEFAULT_BASE;
- madt->flags = PCAT_COMPAT;
+ madt->flags = ACPI_MADT_PCAT_COMPAT;
current = acpi_fill_madt(current);
@@ -187,8 +189,8 @@ static int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig,
u32 base, u16 seg_nr, u8 start, u8 end)
{
memset(mmconfig, 0, sizeof(*mmconfig));
- mmconfig->base_address = base;
- mmconfig->base_reserved = 0;
+ mmconfig->base_address_l = base;
+ mmconfig->base_address_h = 0;
mmconfig->pci_segment_group_number = seg_nr;
mmconfig->start_bus_number = start;
mmconfig->end_bus_number = end;
@@ -208,7 +210,7 @@ static unsigned long acpi_fill_mcfg(unsigned long current)
/* MCFG is defined in the PCI Firmware Specification 3.0 */
static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
{
- acpi_header_t *header = &(mcfg->header);
+ struct acpi_table_header *header = &(mcfg->header);
unsigned long current = (unsigned long)mcfg + sizeof(struct acpi_mcfg);
memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
@@ -244,7 +246,7 @@ static void acpi_create_facs(struct acpi_facs *facs)
static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
{
- acpi_header_t *header = &(rsdt->header);
+ struct acpi_table_header *header = &(rsdt->header);
/* Fill out header fields */
fill_header(header, "RSDT", 4);
@@ -262,7 +264,7 @@ static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
{
- acpi_header_t *header = &(xsdt->header);
+ struct acpi_table_header *header = &(xsdt->header);
/* Fill out header fields */
fill_header(header, "XSDT", 4);
@@ -309,12 +311,13 @@ static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
sizeof(struct acpi_rsdp));
}
-static void acpi_create_ssdt_generator(acpi_header_t *ssdt,
+static void acpi_create_ssdt_generator(struct acpi_table_header *ssdt,
const char *oem_table_id)
{
- unsigned long current = (unsigned long)ssdt + sizeof(acpi_header_t);
+ unsigned long current = (unsigned long)ssdt +
+ sizeof(struct acpi_table_header);
- memset((void *)ssdt, 0, sizeof(acpi_header_t));
+ memset((void *)ssdt, 0, sizeof(struct acpi_table_header));
memcpy(&ssdt->signature, "SSDT", 4);
/* Access size in ACPI 2.0c/3.0/4.0/5.0 */
@@ -322,9 +325,9 @@ static void acpi_create_ssdt_generator(acpi_header_t *ssdt,
memcpy(&ssdt->oem_id, OEM_ID, 6);
memcpy(&ssdt->oem_table_id, oem_table_id, 8);
ssdt->oem_revision = OEM_REVISION;
- memcpy(&ssdt->asl_compiler_id, ASLC, 4);
- ssdt->asl_compiler_revision = ASL_COMPILER_REVISION;
- ssdt->length = sizeof(acpi_header_t);
+ memcpy(&ssdt->aslc_id, ASLC_ID, 4);
+ ssdt->aslc_revision = ASL_COMPILER_REVISION;
+ ssdt->length = sizeof(struct acpi_table_header);
/* (Re)calculate length and checksum */
ssdt->length = current - (unsigned long)ssdt;
@@ -342,11 +345,11 @@ u32 write_acpi_tables(u32 start)
struct acpi_rsdt *rsdt;
struct acpi_xsdt *xsdt;
struct acpi_facs *facs;
- acpi_header_t *dsdt;
+ struct acpi_table_header *dsdt;
struct acpi_fadt *fadt;
struct acpi_mcfg *mcfg;
struct acpi_madt *madt;
- acpi_header_t *ssdt;
+ struct acpi_table_header *ssdt;
current = start;
@@ -381,14 +384,14 @@ u32 write_acpi_tables(u32 start)
acpi_create_facs(facs);
debug("ACPI: * DSDT\n");
- dsdt = (acpi_header_t *)current;
- memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
- if (dsdt->length >= sizeof(acpi_header_t)) {
- current += sizeof(acpi_header_t);
+ dsdt = (struct acpi_table_header *)current;
+ memcpy(dsdt, &AmlCode, sizeof(struct acpi_table_header));
+ if (dsdt->length >= sizeof(struct acpi_table_header)) {
+ current += sizeof(struct acpi_table_header);
memcpy((char *)current,
- (char *)&AmlCode + sizeof(acpi_header_t),
- dsdt->length - sizeof(acpi_header_t));
- current += dsdt->length - sizeof(acpi_header_t);
+ (char *)&AmlCode + sizeof(struct acpi_table_header),
+ dsdt->length - sizeof(struct acpi_table_header));
+ current += dsdt->length - sizeof(struct acpi_table_header);
/* (Re)calculate length and checksum */
dsdt->length = current - (unsigned long)dsdt;
@@ -424,9 +427,9 @@ u32 write_acpi_tables(u32 start)
current = ALIGN(current, 16);
debug("ACPI: * SSDT\n");
- ssdt = (acpi_header_t *)current;
- acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
- if (ssdt->length > sizeof(acpi_header_t)) {
+ ssdt = (struct acpi_table_header *)current;
+ acpi_create_ssdt_generator(ssdt, OEM_TABLE_ID);
+ if (ssdt->length > sizeof(struct acpi_table_header)) {
current += ssdt->length;
acpi_add_table(rsdp, ssdt);
current = ALIGN(current, 16);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (11 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator() Bin Meng
` (15 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Reorder the ACPI tables appearance by following the order:
RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
table flag defines accordingly.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Update the commit message per review comments
arch/x86/include/asm/acpi_table.h | 347 +++++++++++++++++++-------------------
1 file changed, 169 insertions(+), 178 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 418870e..9175e7a 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -2,6 +2,7 @@
* Based on acpi.c from coreboot
*
* Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -11,33 +12,9 @@
#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
#define ASLC_ID "INTL" /* Intel ASL Compiler */
-#define OEM_REVISION 42
-#define ASL_COMPILER_REVISION 42
-
-#define ACPI_REV_ACPI_1_0 1
-#define ACPI_REV_ACPI_2_0 1
-#define ACPI_REV_ACPI_3_0 2
-#define ACPI_REV_ACPI_4_0 3
-#define ACPI_REV_ACPI_5_0 5
-
#define ACPI_RSDP_REV_ACPI_1_0 0
#define ACPI_RSDP_REV_ACPI_2_0 2
-typedef struct acpi_gen_regaddr {
- u8 space_id; /* Address space ID */
- u8 bit_width; /* Register size in bits */
- u8 bit_offset; /* Register bit offset */
- union {
- /* Reserved in ACPI 2.0 - 2.0b */
- u8 resv;
- /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
- u8 access_size;
- };
- u32 addrl; /* Register address, low 32 bits */
- u32 addrh; /* Register address, high 32 bits */
-} acpi_addr_t;
-
-
/*
* RSDP (Root System Description Pointer)
* Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
@@ -46,7 +23,7 @@ struct acpi_rsdp {
char signature[8]; /* RSDP signature */
u8 checksum; /* Checksum of the first 20 bytes */
char oem_id[6]; /* OEM ID */
- u8 revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
+ u8 revision; /* 0 for ACPI 1.0, others 2 */
u32 rsdt_address; /* Physical address of RSDT (32 bits) */
u32 length; /* Total RSDP length (incl. extended part) */
u64 xsdt_address; /* Physical address of XSDT (64 bits) */
@@ -54,24 +31,11 @@ struct acpi_rsdp {
u8 reserved[3];
};
-enum acpi_address_space_type {
- ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
- ACPI_ADDRESS_SPACE_IO, /* System I/O */
- ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
- ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
- ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
- ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
- ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
-};
-
-/* Access size definitions for Generic address structure */
-enum acpi_address_space_size {
- ACPI_ACCESS_SIZE_UNDEFINED = 0, /* Undefined (legacy reasons) */
- ACPI_ACCESS_SIZE_BYTE_ACCESS = 1,
- ACPI_ACCESS_SIZE_WORD_ACCESS = 2,
- ACPI_ACCESS_SIZE_DWORD_ACCESS = 3,
- ACPI_ACCESS_SIZE_QWORD_ACCESS = 4
-};
+#define ACPI_REV_ACPI_1_0 1
+#define ACPI_REV_ACPI_2_0 1
+#define ACPI_REV_ACPI_3_0 2
+#define ACPI_REV_ACPI_4_0 3
+#define ACPI_REV_ACPI_5_0 5
/* Generic ACPI header, provided by (almost) all tables */
struct acpi_table_header {
@@ -87,7 +51,7 @@ struct acpi_table_header {
};
/* A maximum number of 32 ACPI tables ought to be enough for now */
-#define MAX_ACPI_TABLES 32
+#define MAX_ACPI_TABLES 32
/* RSDT (Root System Description Table) */
struct acpi_rsdt {
@@ -101,84 +65,80 @@ struct acpi_xsdt {
u64 entry[MAX_ACPI_TABLES];
};
-/* MCFG (PCI Express MMIO config space BAR description table) */
-struct acpi_mcfg {
- struct acpi_table_header header;
- u8 reserved[8];
-};
-
-struct acpi_mcfg_mmconfig {
- u32 base_address_l;
- u32 base_address_h;
- u16 pci_segment_group_number;
- u8 start_bus_number;
- u8 end_bus_number;
- u8 reserved[4];
+/* FADT Preferred Power Management Profile */
+enum acpi_pm_profile {
+ ACPI_PM_UNSPECIFIED = 0,
+ ACPI_PM_DESKTOP,
+ ACPI_PM_MOBILE,
+ ACPI_PM_WORKSTATION,
+ ACPI_PM_ENTERPRISE_SERVER,
+ ACPI_PM_SOHO_SERVER,
+ ACPI_PM_APPLIANCE_PC,
+ ACPI_PM_PERFORMANCE_SERVER,
+ ACPI_PM_TABLET
};
-/* MADT (Multiple APIC Description Table) */
-struct acpi_madt {
- struct acpi_table_header header;
- u32 lapic_addr; /* Local APIC address */
- u32 flags; /* Multiple APIC flags */
-} acpi_madt_t;
-
-/* MADT: APIC Structure Type*/
-enum acpi_apic_types {
- ACPI_APIC_LAPIC = 0, /* Processor local APIC */
- ACPI_APIC_IOAPIC, /* I/O APIC */
- ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
- ACPI_APIC_NMI_SRC, /* NMI source */
- ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
- ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
- ACPI_APIC_IOSAPIC, /* I/O SAPIC */
- ACPI_APIC_LSAPIC, /* Local SAPIC */
- ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
- ACPI_APIC_LX2APIC, /* Processor local x2APIC */
- ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
-};
+/* FADT flags for p_lvl2_lat and p_lvl3_lat */
+#define ACPI_FADT_C2_NOT_SUPPORTED 101
+#define ACPI_FADT_C3_NOT_SUPPORTED 1001
-/* MADT: Processor Local APIC Structure */
-struct acpi_madt_lapic {
- u8 type; /* Type (0) */
- u8 length; /* Length in bytes (8) */
- u8 processor_id; /* ACPI processor ID */
- u8 apic_id; /* Local APIC ID */
- u32 flags; /* Local APIC flags */
-};
+/* FADT Boot Architecture Flags */
+#define ACPI_FADT_LEGACY_FREE 0x00
+#define ACPI_FADT_LEGACY_DEVICES (1 << 0)
+#define ACPI_FADT_8042 (1 << 1)
+#define ACPI_FADT_VGA_NOT_PRESENT (1 << 2)
+#define ACPI_FADT_MSI_NOT_SUPPORTED (1 << 3)
+#define ACPI_FADT_NO_PCIE_ASPM_CONTROL (1 << 4)
-#define LOCAL_APIC_FLAG_ENABLED (1 << 0)
-/* bits 1-31: reserved */
-#define PCAT_COMPAT (1 << 0)
-/* bits 1-31: reserved */
+/* FADT Feature Flags */
+#define ACPI_FADT_WBINVD (1 << 0)
+#define ACPI_FADT_WBINVD_FLUSH (1 << 1)
+#define ACPI_FADT_C1_SUPPORTED (1 << 2)
+#define ACPI_FADT_C2_MP_SUPPORTED (1 << 3)
+#define ACPI_FADT_POWER_BUTTON (1 << 4)
+#define ACPI_FADT_SLEEP_BUTTON (1 << 5)
+#define ACPI_FADT_FIXED_RTC (1 << 6)
+#define ACPI_FADT_S4_RTC_WAKE (1 << 7)
+#define ACPI_FADT_32BIT_TIMER (1 << 8)
+#define ACPI_FADT_DOCKING_SUPPORTED (1 << 9)
+#define ACPI_FADT_RESET_REGISTER (1 << 10)
+#define ACPI_FADT_SEALED_CASE (1 << 11)
+#define ACPI_FADT_HEADLESS (1 << 12)
+#define ACPI_FADT_SLEEP_TYPE (1 << 13)
+#define ACPI_FADT_PCI_EXPRESS_WAKE (1 << 14)
+#define ACPI_FADT_PLATFORM_CLOCK (1 << 15)
+#define ACPI_FADT_S4_RTC_VALID (1 << 16)
+#define ACPI_FADT_REMOTE_POWER_ON (1 << 17)
+#define ACPI_FADT_APIC_CLUSTER (1 << 18)
+#define ACPI_FADT_APIC_PHYSICAL (1 << 19)
+#define ACPI_FADT_HW_REDUCED_ACPI (1 << 20)
+#define ACPI_FADT_LOW_PWR_IDLE_S0 (1 << 21)
-/* MADT: Local APIC NMI Structure */
-struct __packed acpi_madt_lapic_nmi {
- u8 type; /* Type (4) */
- u8 length; /* Length in bytes (6) */
- u8 processor_id; /* ACPI processor ID */
- u16 flags; /* MPS INTI flags */
- u8 lint; /* Local APIC LINT# */
+enum acpi_address_space_type {
+ ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
+ ACPI_ADDRESS_SPACE_IO, /* System I/O */
+ ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
+ ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
+ ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
+ ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
+ ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
};
-/* MADT: I/O APIC Structure */
-struct acpi_madt_ioapic {
- u8 type; /* Type (1) */
- u8 length; /* Length in bytes (12) */
- u8 ioapic_id; /* I/O APIC ID */
- u8 reserved;
- u32 ioapic_addr; /* I/O APIC address */
- u32 gsi_base; /* Global system interrupt base */
+enum acpi_address_space_size {
+ ACPI_ACCESS_SIZE_UNDEFINED = 0,
+ ACPI_ACCESS_SIZE_BYTE_ACCESS,
+ ACPI_ACCESS_SIZE_WORD_ACCESS,
+ ACPI_ACCESS_SIZE_DWORD_ACCESS,
+ ACPI_ACCESS_SIZE_QWORD_ACCESS
};
-/* MADT: Interrupt Source Override Structure */
-struct __packed acpi_madt_irqoverride {
- u8 type; /* Type (2) */
- u8 length; /* Length in bytes (10) */
- u8 bus; /* ISA (0) */
- u8 source; /* Bus-relative int. source (IRQ) */
- u32 gsirq; /* Global system interrupt */
- u16 flags; /* MPS INTI flags */
+struct acpi_gen_regaddr {
+ u8 space_id; /* Address space ID */
+ u8 bit_width; /* Register size in bits */
+ u8 bit_offset; /* Register bit offset */
+ u8 access_size; /* Access size */
+ u32 addrl; /* Register address, low 32 bits */
+ u32 addrh; /* Register address, high 32 bits */
};
/* FADT (Fixed ACPI Description Table) */
@@ -241,78 +201,109 @@ struct __packed acpi_fadt {
struct acpi_gen_regaddr x_gpe1_blk;
};
-/* Flags for p_lvl2_lat and p_lvl3_lat */
-#define ACPI_FADT_C2_NOT_SUPPORTED 101
-#define ACPI_FADT_C3_NOT_SUPPORTED 1001
-
-/* FADT Feature Flags */
-#define ACPI_FADT_WBINVD (1 << 0)
-#define ACPI_FADT_WBINVD_FLUSH (1 << 1)
-#define ACPI_FADT_C1_SUPPORTED (1 << 2)
-#define ACPI_FADT_C2_MP_SUPPORTED (1 << 3)
-#define ACPI_FADT_POWER_BUTTON (1 << 4)
-#define ACPI_FADT_SLEEP_BUTTON (1 << 5)
-#define ACPI_FADT_FIXED_RTC (1 << 6)
-#define ACPI_FADT_S4_RTC_WAKE (1 << 7)
-#define ACPI_FADT_32BIT_TIMER (1 << 8)
-#define ACPI_FADT_DOCKING_SUPPORTED (1 << 9)
-#define ACPI_FADT_RESET_REGISTER (1 << 10)
-#define ACPI_FADT_SEALED_CASE (1 << 11)
-#define ACPI_FADT_HEADLESS (1 << 12)
-#define ACPI_FADT_SLEEP_TYPE (1 << 13)
-#define ACPI_FADT_PCI_EXPRESS_WAKE (1 << 14)
-#define ACPI_FADT_PLATFORM_CLOCK (1 << 15)
-#define ACPI_FADT_S4_RTC_VALID (1 << 16)
-#define ACPI_FADT_REMOTE_POWER_ON (1 << 17)
-#define ACPI_FADT_APIC_CLUSTER (1 << 18)
-#define ACPI_FADT_APIC_PHYSICAL (1 << 19)
-/* Bits 20-31: reserved ACPI 3.0 & 4.0 */
-#define ACPI_FADT_HW_REDUCED_ACPI (1 << 20)
-#define ACPI_FADT_LOW_PWR_IDLE_S0 (1 << 21)
-/* bits 22-31: reserved ACPI 5.0 */
-
-/* FADT Boot Architecture Flags */
-#define ACPI_FADT_LEGACY_DEVICES (1 << 0)
-#define ACPI_FADT_8042 (1 << 1)
-#define ACPI_FADT_VGA_NOT_PRESENT (1 << 2)
-#define ACPI_FADT_MSI_NOT_SUPPORTED (1 << 3)
-#define ACPI_FADT_NO_PCIE_ASPM_CONTROL (1 << 4)
-/* No legacy devices (including 8042) */
-#define ACPI_FADT_LEGACY_FREE 0x00
-
-/* FADT Preferred Power Management Profile */
-enum acpi_pm_profile {
- ACPI_PM_UNSPECIFIED = 0,
- ACPI_PM_DESKTOP,
- ACPI_PM_MOBILE,
- ACPI_PM_WORKSTATION,
- ACPI_PM_ENTERPRISE_SERVER,
- ACPI_PM_SOHO_SERVER,
- ACPI_PM_APPLIANCE_PC,
- ACPI_PM_PERFORMANCE_SERVER,
- ACPI_PM_TABLET
-};
+/* FACS flags */
+#define ACPI_FACS_S4BIOS_F (1 << 0)
+#define ACPI_FACS_64BIT_WAKE_F (1 << 1)
/* FACS (Firmware ACPI Control Structure) */
struct acpi_facs {
- char signature[4]; /* "FACS" */
- u32 length; /* Length in bytes (>= 64) */
- u32 hardware_signature; /* Hardware signature */
- u32 firmware_waking_vector; /* Firmware waking vector */
- u32 global_lock; /* Global lock */
- u32 flags; /* FACS flags */
- u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
- u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
- u8 version; /* ACPI 4.0: 2 */
+ char signature[4]; /* "FACS" */
+ u32 length; /* Length in bytes (>= 64) */
+ u32 hardware_signature; /* Hardware signature */
+ u32 firmware_waking_vector; /* Firmware waking vector */
+ u32 global_lock; /* Global lock */
+ u32 flags; /* FACS flags */
+ u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
+ u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
+ u8 version; /* Version 2 */
u8 res1[3];
- u32 ospm_flags; /* OSPM enabled flags */
+ u32 ospm_flags; /* OSPM enabled flags */
u8 res2[24];
};
-/* FACS flags */
-#define ACPI_FACS_S4BIOS_F (1 << 0)
-#define ACPI_FACS_64BIT_WAKE_F (1 << 1)
-/* Bits 31..2: reserved */
+/* MADT flags */
+#define ACPI_MADT_PCAT_COMPAT (1 << 0)
+
+/* MADT (Multiple APIC Description Table) */
+struct acpi_madt {
+ struct acpi_table_header header;
+ u32 lapic_addr; /* Local APIC address */
+ u32 flags; /* Multiple APIC flags */
+};
+
+/* MADT: APIC Structure Type*/
+enum acpi_apic_types {
+ ACPI_APIC_LAPIC = 0, /* Processor local APIC */
+ ACPI_APIC_IOAPIC, /* I/O APIC */
+ ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
+ ACPI_APIC_NMI_SRC, /* NMI source */
+ ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
+ ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
+ ACPI_APIC_IOSAPIC, /* I/O SAPIC */
+ ACPI_APIC_LSAPIC, /* Local SAPIC */
+ ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
+ ACPI_APIC_LX2APIC, /* Processor local x2APIC */
+ ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
+};
+
+/* MADT: Processor Local APIC Structure */
+
+#define LOCAL_APIC_FLAG_ENABLED (1 << 0)
+
+struct acpi_madt_lapic {
+ u8 type; /* Type (0) */
+ u8 length; /* Length in bytes (8) */
+ u8 processor_id; /* ACPI processor ID */
+ u8 apic_id; /* Local APIC ID */
+ u32 flags; /* Local APIC flags */
+};
+
+/* MADT: I/O APIC Structure */
+struct acpi_madt_ioapic {
+ u8 type; /* Type (1) */
+ u8 length; /* Length in bytes (12) */
+ u8 ioapic_id; /* I/O APIC ID */
+ u8 reserved;
+ u32 ioapic_addr; /* I/O APIC address */
+ u32 gsi_base; /* Global system interrupt base */
+};
+
+/* MADT: Interrupt Source Override Structure */
+struct __packed acpi_madt_irqoverride {
+ u8 type; /* Type (2) */
+ u8 length; /* Length in bytes (10) */
+ u8 bus; /* ISA (0) */
+ u8 source; /* Bus-relative int. source (IRQ) */
+ u32 gsirq; /* Global system interrupt */
+ u16 flags; /* MPS INTI flags */
+};
+
+/* MADT: Local APIC NMI Structure */
+struct __packed acpi_madt_lapic_nmi {
+ u8 type; /* Type (4) */
+ u8 length; /* Length in bytes (6) */
+ u8 processor_id; /* ACPI processor ID */
+ u16 flags; /* MPS INTI flags */
+ u8 lint; /* Local APIC LINT# */
+};
+
+/* MCFG (PCI Express MMIO config space BAR description table) */
+struct acpi_mcfg {
+ struct acpi_table_header header;
+ u8 reserved[8];
+};
+
+struct acpi_mcfg_mmconfig {
+ u32 base_address_l;
+ u32 base_address_h;
+ u16 pci_segment_group_number;
+ u8 start_bus_number;
+ u8 end_bus_number;
+ u8 reserved[4];
+};
+
+#define OEM_REVISION 42
+#define ASL_COMPILER_REVISION 42
/* These can be used by the target port */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator()
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (12 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header() Bin Meng
` (14 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
This acpi_create_ssdt_generator() currently does nothing.
Remove this for now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/include/asm/acpi_table.h | 3 ---
arch/x86/lib/acpi_table.c | 33 ---------------------------------
2 files changed, 36 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 9175e7a..c6688ea 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -302,9 +302,6 @@ struct acpi_mcfg_mmconfig {
u8 reserved[4];
};
-#define OEM_REVISION 42
-#define ASL_COMPILER_REVISION 42
-
/* These can be used by the target port */
unsigned long acpi_create_madt_lapics(unsigned long current);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 75fa429..62fe39d 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -311,29 +311,6 @@ static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
sizeof(struct acpi_rsdp));
}
-static void acpi_create_ssdt_generator(struct acpi_table_header *ssdt,
- const char *oem_table_id)
-{
- unsigned long current = (unsigned long)ssdt +
- sizeof(struct acpi_table_header);
-
- memset((void *)ssdt, 0, sizeof(struct acpi_table_header));
-
- memcpy(&ssdt->signature, "SSDT", 4);
- /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
- ssdt->revision = ACPI_REV_ACPI_3_0;
- memcpy(&ssdt->oem_id, OEM_ID, 6);
- memcpy(&ssdt->oem_table_id, oem_table_id, 8);
- ssdt->oem_revision = OEM_REVISION;
- memcpy(&ssdt->aslc_id, ASLC_ID, 4);
- ssdt->aslc_revision = ASL_COMPILER_REVISION;
- ssdt->length = sizeof(struct acpi_table_header);
-
- /* (Re)calculate length and checksum */
- ssdt->length = current - (unsigned long)ssdt;
- ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length);
-}
-
/*
* QEMU's version of write_acpi_tables is defined in
* arch/x86/cpu/qemu/fw_cfg.c
@@ -349,7 +326,6 @@ u32 write_acpi_tables(u32 start)
struct acpi_fadt *fadt;
struct acpi_mcfg *mcfg;
struct acpi_madt *madt;
- struct acpi_table_header *ssdt;
current = start;
@@ -426,15 +402,6 @@ u32 write_acpi_tables(u32 start)
}
current = ALIGN(current, 16);
- debug("ACPI: * SSDT\n");
- ssdt = (struct acpi_table_header *)current;
- acpi_create_ssdt_generator(ssdt, OEM_TABLE_ID);
- if (ssdt->length > sizeof(struct acpi_table_header)) {
- current += ssdt->length;
- acpi_add_table(rsdp, ssdt);
- current = ALIGN(current, 16);
- }
-
debug("current = %x\n", current);
debug("ACPI: done.\n");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header()
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (13 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator() Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c Bin Meng
` (13 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Rename fill_header() to acpi_fill_header() for consistency.
Change its signature to remove the 'length' parameter and
make it a public API.
Also remove the unnecessary include files, and improve the
AmlCode[] comment a little bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/include/asm/acpi_table.h | 1 +
arch/x86/lib/acpi_table.c | 22 ++++++++--------------
2 files changed, 9 insertions(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index c6688ea..5a829de 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -304,6 +304,7 @@ struct acpi_mcfg_mmconfig {
/* These can be used by the target port */
+void acpi_fill_header(struct acpi_table_header *header, char *signature);
unsigned long acpi_create_madt_lapics(unsigned long current);
int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
u32 gsi_base);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 62fe39d..97d90f7 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -10,18 +10,13 @@
#include <cpu.h>
#include <dm.h>
#include <dm/uclass-internal.h>
-#include <dm/lists.h>
#include <asm/acpi_table.h>
-#include <asm/cpu.h>
-#include <asm/ioapic.h>
#include <asm/lapic.h>
#include <asm/tables.h>
-#include <asm/pci.h>
/*
- * IASL compiles the dsdt entries and
- * writes the hex values to AmlCode array.
- * CamelCase cannot be handled here.
+ * IASL compiles the dsdt entries and writes the hex values
+ * to a C array AmlCode[] (see dsdt.c).
*/
extern const unsigned char AmlCode[];
@@ -151,10 +146,9 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
return lapic_nmi->length;
}
-static void fill_header(struct acpi_table_header *header, char *signature,
- int length)
+void acpi_fill_header(struct acpi_table_header *header, char *signature)
{
- memcpy(header->signature, signature, length);
+ memcpy(header->signature, signature, 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
memcpy(header->aslc_id, ASLC_ID, 4);
@@ -168,7 +162,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
memset((void *)madt, 0, sizeof(struct acpi_madt));
/* Fill out header fields */
- fill_header(header, "APIC", 4);
+ acpi_fill_header(header, "APIC");
header->length = sizeof(struct acpi_madt);
/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
@@ -216,7 +210,7 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
/* Fill out header fields */
- fill_header(header, "MCFG", 4);
+ acpi_fill_header(header, "MCFG");
header->length = sizeof(struct acpi_mcfg);
/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
@@ -249,7 +243,7 @@ static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
struct acpi_table_header *header = &(rsdt->header);
/* Fill out header fields */
- fill_header(header, "RSDT", 4);
+ acpi_fill_header(header, "RSDT");
header->length = sizeof(struct acpi_rsdt);
/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
@@ -267,7 +261,7 @@ static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
struct acpi_table_header *header = &(xsdt->header);
/* Fill out header fields */
- fill_header(header, "XSDT", 4);
+ acpi_fill_header(header, "XSDT");
header->length = sizeof(struct acpi_xsdt);
/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (14 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header() Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines Bin Meng
` (12 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Rearrange the routine order a little bit, to follow the order
in which ACPI table is defined in acpi_table.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Change 'orders' to 'order' in the commit subject
- Correct wrong indention in acpi_create_madt_lapics()
arch/x86/include/asm/acpi_table.h | 14 +--
arch/x86/lib/acpi_table.c | 236 +++++++++++++++++++-------------------
2 files changed, 126 insertions(+), 124 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 5a829de..ad39902 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -305,14 +305,14 @@ struct acpi_mcfg_mmconfig {
/* These can be used by the target port */
void acpi_fill_header(struct acpi_table_header *header, char *signature);
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt);
unsigned long acpi_create_madt_lapics(unsigned long current);
-int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
- u32 gsi_base);
+int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
+ u32 addr, u32 gsi_base);
int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
- u8 bus, u8 source, u32 gsirq, u16 flags);
+ u8 bus, u8 source, u32 gsirq, u16 flags);
+int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
+ u8 cpu, u16 flags, u8 lint);
unsigned long acpi_fill_madt(unsigned long current);
-void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
- void *dsdt);
-int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u8 cpu,
- u16 flags, u8 lint);
u32 write_acpi_tables(u32 start);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 97d90f7..c2009ef 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -2,6 +2,7 @@
* Based on acpi.c from coreboot
*
* Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -20,10 +21,85 @@
*/
extern const unsigned char AmlCode[];
+static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
+ struct acpi_xsdt *xsdt)
+{
+ memset(rsdp, 0, sizeof(struct acpi_rsdp));
+
+ memcpy(rsdp->signature, RSDP_SIG, 8);
+ memcpy(rsdp->oem_id, OEM_ID, 6);
+
+ rsdp->length = sizeof(struct acpi_rsdp);
+ rsdp->rsdt_address = (u32)rsdt;
+
+ /*
+ * Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2
+ *
+ * Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
+ * If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
+ * revision 0)
+ */
+ if (xsdt == NULL) {
+ rsdp->revision = ACPI_RSDP_REV_ACPI_1_0;
+ } else {
+ rsdp->xsdt_address = (u64)(u32)xsdt;
+ rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
+ }
+
+ /* Calculate checksums */
+ rsdp->checksum = table_compute_checksum((void *)rsdp, 20);
+ rsdp->ext_checksum = table_compute_checksum((void *)rsdp,
+ sizeof(struct acpi_rsdp));
+}
+
+void acpi_fill_header(struct acpi_table_header *header, char *signature)
+{
+ memcpy(header->signature, signature, 4);
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
+ memcpy(header->aslc_id, ASLC_ID, 4);
+}
+
+static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
+{
+ struct acpi_table_header *header = &(rsdt->header);
+
+ /* Fill out header fields */
+ acpi_fill_header(header, "RSDT");
+ header->length = sizeof(struct acpi_rsdt);
+
+ /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
+ header->revision = ACPI_REV_ACPI_2_0;
+
+ /* Entries are filled in later, we come with an empty set */
+
+ /* Fix checksum */
+ header->checksum = table_compute_checksum((void *)rsdt,
+ sizeof(struct acpi_rsdt));
+}
+
+static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
+{
+ struct acpi_table_header *header = &(xsdt->header);
+
+ /* Fill out header fields */
+ acpi_fill_header(header, "XSDT");
+ header->length = sizeof(struct acpi_xsdt);
+
+ /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
+ header->revision = ACPI_REV_ACPI_2_0;
+
+ /* Entries are filled in later, we come with an empty set */
+
+ /* Fix checksum */
+ header->checksum = table_compute_checksum((void *)xsdt,
+ sizeof(struct acpi_xsdt));
+}
+
/**
-* Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
-* and checksum.
-*/
+ * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
+ * and checksum.
+ */
static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
{
int i, entries_num;
@@ -54,12 +130,12 @@ static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
/* Fix RSDT length or the kernel will assume invalid entries */
rsdt->header.length = sizeof(struct acpi_table_header) +
- (sizeof(u32) * (i + 1));
+ (sizeof(u32) * (i + 1));
/* Re-calculate checksum */
rsdt->header.checksum = 0;
rsdt->header.checksum = table_compute_checksum((u8 *)rsdt,
- rsdt->header.length);
+ rsdt->header.length);
/*
* And now the same thing for the XSDT. We use the same index as for
@@ -71,7 +147,7 @@ static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
/* Fix XSDT length */
xsdt->header.length = sizeof(struct acpi_table_header) +
- (sizeof(u64) * (i + 1));
+ (sizeof(u64) * (i + 1));
/* Re-calculate checksum */
xsdt->header.checksum = 0;
@@ -80,12 +156,27 @@ static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
}
}
+static void acpi_create_facs(struct acpi_facs *facs)
+{
+ memset((void *)facs, 0, sizeof(struct acpi_facs));
+
+ memcpy(facs->signature, "FACS", 4);
+ facs->length = sizeof(struct acpi_facs);
+ facs->hardware_signature = 0;
+ facs->firmware_waking_vector = 0;
+ facs->global_lock = 0;
+ facs->flags = 0;
+ facs->x_firmware_waking_vector_l = 0;
+ facs->x_firmware_waking_vector_h = 0;
+ facs->version = 1;
+}
+
static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
- u8 cpu, u8 apic)
+ u8 cpu, u8 apic)
{
- lapic->type = ACPI_APIC_LAPIC; /* Local APIC structure */
+ lapic->type = ACPI_APIC_LAPIC;
lapic->length = sizeof(struct acpi_madt_lapic);
- lapic->flags = LOCAL_APIC_FLAG_ENABLED; /* Processor/LAPIC enabled */
+ lapic->flags = LOCAL_APIC_FLAG_ENABLED;
lapic->processor_id = cpu;
lapic->apic_id = apic;
@@ -104,12 +195,13 @@ unsigned long acpi_create_madt_lapics(unsigned long current)
current += acpi_create_madt_lapic(
(struct acpi_madt_lapic *)current,
plat->cpu_id, plat->cpu_id);
- }
- return current;
+ }
+
+ return current;
}
-int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
- u32 gsi_base)
+int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
+ u32 addr, u32 gsi_base)
{
ioapic->type = ACPI_APIC_IOAPIC;
ioapic->length = sizeof(struct acpi_madt_ioapic);
@@ -122,7 +214,7 @@ int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
}
int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
- u8 bus, u8 source, u32 gsirq, u16 flags)
+ u8 bus, u8 source, u32 gsirq, u16 flags)
{
irqoverride->type = ACPI_APIC_IRQ_SRC_OVERRIDE;
irqoverride->length = sizeof(struct acpi_madt_irqoverride);
@@ -135,7 +227,7 @@ int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
}
int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
- u8 cpu, u16 flags, u8 lint)
+ u8 cpu, u16 flags, u8 lint)
{
lapic_nmi->type = ACPI_APIC_LAPIC_NMI;
lapic_nmi->length = sizeof(struct acpi_madt_lapic_nmi);
@@ -146,14 +238,6 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
return lapic_nmi->length;
}
-void acpi_fill_header(struct acpi_table_header *header, char *signature)
-{
- memcpy(header->signature, signature, 4);
- memcpy(header->oem_id, OEM_ID, 6);
- memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
- memcpy(header->aslc_id, ASLC_ID, 4);
-}
-
static void acpi_create_madt(struct acpi_madt *madt)
{
struct acpi_table_header *header = &(madt->header);
@@ -180,7 +264,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
}
static int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig,
- u32 base, u16 seg_nr, u8 start, u8 end)
+ u32 base, u16 seg_nr, u8 start, u8 end)
{
memset(mmconfig, 0, sizeof(*mmconfig));
mmconfig->base_address_l = base;
@@ -196,7 +280,7 @@ static unsigned long acpi_fill_mcfg(unsigned long current)
{
current += acpi_create_mcfg_mmconfig
((struct acpi_mcfg_mmconfig *)current,
- CONFIG_PCIE_ECAM_BASE, 0x0, 0x0, 255);
+ CONFIG_PCIE_ECAM_BASE, 0x0, 0x0, 255);
return current;
}
@@ -223,88 +307,6 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
header->checksum = table_compute_checksum((void *)mcfg, header->length);
}
-static void acpi_create_facs(struct acpi_facs *facs)
-{
- memset((void *)facs, 0, sizeof(struct acpi_facs));
-
- memcpy(facs->signature, "FACS", 4);
- facs->length = sizeof(struct acpi_facs);
- facs->hardware_signature = 0;
- facs->firmware_waking_vector = 0;
- facs->global_lock = 0;
- facs->flags = 0;
- facs->x_firmware_waking_vector_l = 0;
- facs->x_firmware_waking_vector_h = 0;
- facs->version = 1; /* ACPI 1.0: 0, ACPI 2.0/3.0: 1, ACPI 4.0: 2 */
-}
-
-static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
-{
- struct acpi_table_header *header = &(rsdt->header);
-
- /* Fill out header fields */
- acpi_fill_header(header, "RSDT");
- header->length = sizeof(struct acpi_rsdt);
-
- /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
- header->revision = ACPI_REV_ACPI_2_0;
-
- /* Entries are filled in later, we come with an empty set */
-
- /* Fix checksum */
- header->checksum = table_compute_checksum((void *)rsdt,
- sizeof(struct acpi_rsdt));
-}
-
-static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
-{
- struct acpi_table_header *header = &(xsdt->header);
-
- /* Fill out header fields */
- acpi_fill_header(header, "XSDT");
- header->length = sizeof(struct acpi_xsdt);
-
- /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
- header->revision = ACPI_REV_ACPI_2_0;
-
- /* Entries are filled in later, we come with an empty set */
-
- /* Fix checksum */
- header->checksum = table_compute_checksum((void *)xsdt,
- sizeof(struct acpi_xsdt));
-}
-
-static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
- struct acpi_xsdt *xsdt)
-{
- memset(rsdp, 0, sizeof(struct acpi_rsdp));
-
- memcpy(rsdp->signature, RSDP_SIG, 8);
- memcpy(rsdp->oem_id, OEM_ID, 6);
-
- rsdp->length = sizeof(struct acpi_rsdp);
- rsdp->rsdt_address = (u32)rsdt;
-
- /*
- * Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2
- *
- * Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
- * If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
- * revision 0)
- */
- if (xsdt == NULL) {
- rsdp->revision = ACPI_RSDP_REV_ACPI_1_0;
- } else {
- rsdp->xsdt_address = (u64)(u32)xsdt;
- rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
- }
-
- /* Calculate checksums */
- rsdp->checksum = table_compute_checksum((void *)rsdp, 20);
- rsdp->ext_checksum = table_compute_checksum((void *)rsdp,
- sizeof(struct acpi_rsdp));
-}
-
/*
* QEMU's version of write_acpi_tables is defined in
* arch/x86/cpu/qemu/fw_cfg.c
@@ -323,7 +325,7 @@ u32 write_acpi_tables(u32 start)
current = start;
- /* Align ACPI tables to 16byte */
+ /* Align ACPI tables to 16 byte */
current = ALIGN(current, 16);
debug("ACPI: Writing ACPI tables at %x.\n", start);
@@ -378,15 +380,6 @@ u32 write_acpi_tables(u32 start)
acpi_create_fadt(fadt, facs, dsdt);
acpi_add_table(rsdp, fadt);
- debug("ACPI: * MCFG\n");
- mcfg = (struct acpi_mcfg *)current;
- acpi_create_mcfg(mcfg);
- if (mcfg->header.length > sizeof(struct acpi_mcfg)) {
- current += mcfg->header.length;
- current = ALIGN(current, 16);
- acpi_add_table(rsdp, mcfg);
- }
-
debug("ACPI: * MADT\n");
madt = (struct acpi_madt *)current;
acpi_create_madt(madt);
@@ -396,6 +389,15 @@ u32 write_acpi_tables(u32 start)
}
current = ALIGN(current, 16);
+ debug("ACPI: * MCFG\n");
+ mcfg = (struct acpi_mcfg *)current;
+ acpi_create_mcfg(mcfg);
+ if (mcfg->header.length > sizeof(struct acpi_mcfg)) {
+ current += mcfg->header.length;
+ current = ALIGN(current, 16);
+ acpi_add_table(rsdp, mcfg);
+ }
+
debug("current = %x\n", current);
debug("ACPI: done.\n");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (15 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary Bin Meng
` (11 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Use u32 instead of unsigned long in the table write routines, as
other routines do.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- Update several more places to use u32 in acpi_table.c
arch/x86/include/asm/acpi_table.h | 4 ++--
arch/x86/lib/acpi_table.c | 14 +++++++-------
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index ad39902..44f528e 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -307,12 +307,12 @@ struct acpi_mcfg_mmconfig {
void acpi_fill_header(struct acpi_table_header *header, char *signature);
void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
void *dsdt);
-unsigned long acpi_create_madt_lapics(unsigned long current);
+u32 acpi_create_madt_lapics(u32 current);
int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
u32 addr, u32 gsi_base);
int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
u8 bus, u8 source, u32 gsirq, u16 flags);
int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
u8 cpu, u16 flags, u8 lint);
-unsigned long acpi_fill_madt(unsigned long current);
+u32 acpi_fill_madt(u32 current);
u32 write_acpi_tables(u32 start);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index c2009ef..7cde9c8 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -183,7 +183,7 @@ static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
return lapic->length;
}
-unsigned long acpi_create_madt_lapics(unsigned long current)
+u32 acpi_create_madt_lapics(u32 current)
{
struct udevice *dev;
@@ -241,7 +241,7 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
static void acpi_create_madt(struct acpi_madt *madt)
{
struct acpi_table_header *header = &(madt->header);
- unsigned long current = (unsigned long)madt + sizeof(struct acpi_madt);
+ u32 current = (u32)madt + sizeof(struct acpi_madt);
memset((void *)madt, 0, sizeof(struct acpi_madt));
@@ -258,7 +258,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
current = acpi_fill_madt(current);
/* (Re)calculate length and checksum */
- header->length = current - (unsigned long)madt;
+ header->length = current - (u32)madt;
header->checksum = table_compute_checksum((void *)madt, header->length);
}
@@ -276,7 +276,7 @@ static int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig,
return sizeof(struct acpi_mcfg_mmconfig);
}
-static unsigned long acpi_fill_mcfg(unsigned long current)
+static u32 acpi_fill_mcfg(u32 current)
{
current += acpi_create_mcfg_mmconfig
((struct acpi_mcfg_mmconfig *)current,
@@ -289,7 +289,7 @@ static unsigned long acpi_fill_mcfg(unsigned long current)
static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
{
struct acpi_table_header *header = &(mcfg->header);
- unsigned long current = (unsigned long)mcfg + sizeof(struct acpi_mcfg);
+ u32 current = (u32)mcfg + sizeof(struct acpi_mcfg);
memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
@@ -303,7 +303,7 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
current = acpi_fill_mcfg(current);
/* (Re)calculate length and checksum */
- header->length = current - (unsigned long)mcfg;
+ header->length = current - (u32)mcfg;
header->checksum = table_compute_checksum((void *)mcfg, header->length);
}
@@ -366,7 +366,7 @@ u32 write_acpi_tables(u32 start)
current += dsdt->length - sizeof(struct acpi_table_header);
/* (Re)calculate length and checksum */
- dsdt->length = current - (unsigned long)dsdt;
+ dsdt->length = current - (u32)dsdt;
dsdt->checksum = 0;
dsdt->checksum = table_compute_checksum((void *)dsdt,
dsdt->length);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (16 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions Bin Meng
` (10 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Per ACPI spec, the FACS table address must be aligned to a 64 byte
boundary (Windows checks this, but Linux does not).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Add comments before the 64 byte alignment for FACS
arch/x86/lib/acpi_table.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 7cde9c8..056d012 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -339,7 +339,11 @@ u32 write_acpi_tables(u32 start)
current = ALIGN(current, 16);
xsdt = (struct acpi_xsdt *)current;
current += sizeof(struct acpi_xsdt);
- current = ALIGN(current, 16);
+ /*
+ * Per ACPI spec, the FACS table address must be aligned to a 64 byte
+ * boundary (Windows checks this, but Linux does not).
+ */
+ current = ALIGN(current, 64);
/* clear all table memory */
memset((void *)start, 0, current - start);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (17 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries Bin Meng
` (9 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
The comment of initializing table header revision says:
/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
which might mislead it may increase per ACPI spec revision.
However this is not the case. It's actually a fixed number
as defined in ACPI spec, and in the laest ACPI spec 6.1,
some table header revisions are still 1. Clean these up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- New patch to clean up table header revisions
arch/x86/include/asm/acpi_table.h | 6 ------
arch/x86/lib/acpi_table.c | 16 ++++------------
2 files changed, 4 insertions(+), 18 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 44f528e..b450c43 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -31,12 +31,6 @@ struct acpi_rsdp {
u8 reserved[3];
};
-#define ACPI_REV_ACPI_1_0 1
-#define ACPI_REV_ACPI_2_0 1
-#define ACPI_REV_ACPI_3_0 2
-#define ACPI_REV_ACPI_4_0 3
-#define ACPI_REV_ACPI_5_0 5
-
/* Generic ACPI header, provided by (almost) all tables */
struct acpi_table_header {
char signature[4]; /* ACPI signature (4 ASCII characters) */
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 056d012..201b16e 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -67,9 +67,7 @@ static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
/* Fill out header fields */
acpi_fill_header(header, "RSDT");
header->length = sizeof(struct acpi_rsdt);
-
- /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
- header->revision = ACPI_REV_ACPI_2_0;
+ header->revision = 1;
/* Entries are filled in later, we come with an empty set */
@@ -85,9 +83,7 @@ static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
/* Fill out header fields */
acpi_fill_header(header, "XSDT");
header->length = sizeof(struct acpi_xsdt);
-
- /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
- header->revision = ACPI_REV_ACPI_2_0;
+ header->revision = 1;
/* Entries are filled in later, we come with an empty set */
@@ -248,9 +244,7 @@ static void acpi_create_madt(struct acpi_madt *madt)
/* Fill out header fields */
acpi_fill_header(header, "APIC");
header->length = sizeof(struct acpi_madt);
-
- /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
- header->revision = ACPI_REV_ACPI_2_0;
+ header->revision = 4;
madt->lapic_addr = LAPIC_DEFAULT_BASE;
madt->flags = ACPI_MADT_PCAT_COMPAT;
@@ -296,9 +290,7 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
/* Fill out header fields */
acpi_fill_header(header, "MCFG");
header->length = sizeof(struct acpi_mcfg);
-
- /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
- header->revision = ACPI_REV_ACPI_2_0;
+ header->revision = 1;
current = acpi_fill_mcfg(current);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (18 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics() Bin Meng
` (8 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
This adds several generic ASL libraries that can be included by
other ASL files, which are:
- debug.asl: for debug output using POST I/O port and legacy serial port
- globutil.asl: for string compare routines
- statdef.asl: for _STA status values
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
arch/x86/include/asm/acpi/debug.asl | 136 +++++++++++++++++++++++++++++++++
arch/x86/include/asm/acpi/globutil.asl | 113 +++++++++++++++++++++++++++
arch/x86/include/asm/acpi/statdef.asl | 82 ++++++++++++++++++++
3 files changed, 331 insertions(+)
create mode 100644 arch/x86/include/asm/acpi/debug.asl
create mode 100644 arch/x86/include/asm/acpi/globutil.asl
create mode 100644 arch/x86/include/asm/acpi/statdef.asl
diff --git a/arch/x86/include/asm/acpi/debug.asl b/arch/x86/include/asm/acpi/debug.asl
new file mode 100644
index 0000000..8e7b603
--- /dev/null
+++ b/arch/x86/include/asm/acpi/debug.asl
@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/arch/x86/acpi/debug.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* POST register region */
+OperationRegion(X80, SystemIO, 0x80, 1)
+Field(X80, ByteAcc, NoLock, Preserve)
+{
+ P80, 8
+}
+
+/* Legacy serial port register region */
+OperationRegion(CREG, SystemIO, 0x3F8, 8)
+Field(CREG, ByteAcc, NoLock, Preserve)
+{
+ CDAT, 8,
+ CDLM, 8,
+ , 8,
+ CLCR, 8,
+ CMCR, 8,
+ CLSR, 8
+}
+
+/* DINI - Initialize the serial port to 115200 8-N-1 */
+Method(DINI)
+{
+ Store(0x83, CLCR)
+ Store(0x01, CDAT) /* 115200 baud (low) */
+ Store(0x00, CDLM) /* 115200 baud (high) */
+ Store(0x03, CLCR) /* word=8 stop=1 parity=none */
+ Store(0x03, CMCR) /* DTR=1 RTS=1 out1/2=Off loop=Off */
+ Store(0x00, CDLM) /* turn off interrupts */
+}
+
+/* THRE - Wait for serial port transmitter holding register to go empty */
+Method(THRE)
+{
+ And(CLSR, 0x20, Local0)
+ While (LEqual(Local0, Zero)) {
+ And(CLSR, 0x20, Local0)
+ }
+}
+
+/* OUTX - Send a single raw character */
+Method(OUTX, 1)
+{
+ THRE()
+ Store(Arg0, CDAT)
+}
+
+/* OUTC - Send a single character, expanding LF into CR/LF */
+Method(OUTC, 1)
+{
+ If (LEqual(Arg0, 0x0a)) {
+ OUTX(0x0d)
+ }
+ OUTX(Arg0)
+}
+
+/* DBGN - Send a single hex nibble */
+Method(DBGN, 1)
+{
+ And(Arg0, 0x0f, Local0)
+ If (LLess(Local0, 10)) {
+ Add(Local0, 0x30, Local0)
+ } Else {
+ Add(Local0, 0x37, Local0)
+ }
+ OUTC(Local0)
+}
+
+/* DBGB - Send a hex byte */
+Method(DBGB, 1)
+{
+ ShiftRight(Arg0, 4, Local0)
+ DBGN(Local0)
+ DBGN(Arg0)
+}
+
+/* DBGW - Send a hex word */
+Method(DBGW, 1)
+{
+ ShiftRight(Arg0, 8, Local0)
+ DBGB(Local0)
+ DBGB(Arg0)
+}
+
+/* DBGD - Send a hex dword */
+Method(DBGD, 1)
+{
+ ShiftRight(Arg0, 16, Local0)
+ DBGW(Local0)
+ DBGW(Arg0)
+}
+
+/* Get a char from a string */
+Method(GETC, 2)
+{
+ CreateByteField(Arg0, Arg1, DBGC)
+ Return (DBGC)
+}
+
+/* DBGO - Send either a string or an integer */
+Method(DBGO, 1, Serialized)
+{
+ If (LEqual(ObjectType(Arg0), 1)) {
+ If (LGreater(Arg0, 0xffff)) {
+ DBGD(Arg0)
+ } Else {
+ If (LGreater(Arg0, 0xff)) {
+ DBGW(Arg0)
+ } Else {
+ DBGB(Arg0)
+ }
+ }
+ } Else {
+ Name(BDBG, Buffer(80) {})
+ Store(Arg0, BDBG)
+ Store(0, Local1)
+ While (One) {
+ Store(GETC(BDBG, Local1), Local0)
+ If (LEqual(Local0, 0)) {
+ Return (Zero)
+ }
+ OUTC(Local0)
+ Increment(Local1)
+ }
+ }
+
+ Return (Zero)
+}
diff --git a/arch/x86/include/asm/acpi/globutil.asl b/arch/x86/include/asm/acpi/globutil.asl
new file mode 100644
index 0000000..46381b6
--- /dev/null
+++ b/arch/x86/include/asm/acpi/globutil.asl
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/arch/x86/acpi/globutil.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+Method(MIN, 2)
+{
+ If (LLess(Arg0, Arg1)) {
+ Return (Arg0)
+ } Else {
+ Return (Arg1)
+ }
+}
+
+Method(SLEN, 1)
+{
+ Store(Arg0, Local0)
+ Return (Sizeof(Local0))
+}
+
+Method(S2BF, 1, Serialized)
+{
+ Add(SLEN(Arg0), One, Local0)
+ Name(BUFF, Buffer(Local0) {})
+ Store(Arg0, BUFF)
+ Return (BUFF)
+}
+
+/*
+ * SCMP - Strong string compare
+ *
+ * Checks both length and content
+ */
+Method(SCMP, 2)
+{
+ Store(S2BF(Arg0), Local0)
+ Store(S2BF(Arg1), Local1)
+ Store(Zero, Local4)
+ Store(SLEN(Arg0), Local5)
+ Store(SLEN(Arg1), Local6)
+ Store(MIN(Local5, Local6), Local7)
+
+ While (LLess(Local4, Local7)) {
+ Store(Derefof(Index(Local0, Local4)), Local2)
+ Store(Derefof(Index(Local1, Local4)), Local3)
+ If (LGreater(Local2, Local3)) {
+ Return (One)
+ } Else {
+ If (LLess(Local2, Local3)) {
+ Return (Ones)
+ }
+ }
+ Increment(Local4)
+ }
+
+ If (LLess(Local4, Local5)) {
+ Return (One)
+ } Else {
+ If (LLess(Local4, Local6)) {
+ Return (Ones)
+ } Else {
+ Return (Zero)
+ }
+ }
+}
+
+/*
+ * WCMP - Weak string compare
+ *
+ * Checks to find Arg1 at beginning of Arg0.
+ * Fails if length(Arg0) < length(Arg1).
+ * Returns 0 on fail, 1 on pass.
+ */
+Method(WCMP, 2)
+{
+ Store(S2BF(Arg0), Local0)
+ Store(S2BF(Arg1), Local1)
+ If (LLess(SLEN(Arg0), SLEN(Arg1))) {
+ Return (Zero)
+ }
+ Store(Zero, Local2)
+ Store(SLEN(Arg1), Local3)
+
+ While (LLess(Local2, Local3)) {
+ If (LNotEqual(Derefof(Index(Local0, Local2)),
+ Derefof(Index(Local1, Local2)))) {
+ Return (Zero)
+ }
+ Increment(Local2)
+ }
+
+ Return (One)
+}
+
+/*
+ * I2BM - Returns Bit Map
+ *
+ * Arg0 = IRQ Number (0-15)
+ */
+Method(I2BM, 1)
+{
+ Store(0, Local0)
+ If (LNotEqual(Arg0, 0)) {
+ Store(1, Local1)
+ ShiftLeft(Local1, Arg0, Local0)
+ }
+
+ Return (Local0)
+}
diff --git a/arch/x86/include/asm/acpi/statdef.asl b/arch/x86/include/asm/acpi/statdef.asl
new file mode 100644
index 0000000..e8cff10
--- /dev/null
+++ b/arch/x86/include/asm/acpi/statdef.asl
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/arch/x86/acpi/statdef.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Status and notification definitions */
+
+#define STA_MISSING 0x00
+#define STA_PRESENT 0x01
+#define STA_ENABLED 0x03
+#define STA_DISABLED 0x09
+#define STA_INVISIBLE 0x0b
+#define STA_UNAVAILABLE 0x0d
+#define STA_VISIBLE 0x0f
+
+/* SMBus status codes */
+#define SMB_OK 0x00
+#define SMB_UNKNOWN_FAIL 0x07
+#define SMB_DEV_ADDR_NAK 0x10
+#define SMB_DEVICE_ERROR 0x11
+#define SMB_DEV_CMD_DENIED 0x12
+#define SMB_UNKNOWN_ERR 0x13
+#define SMB_DEV_ACC_DENIED 0x17
+#define SMB_TIMEOUT 0x18
+#define SMB_HST_UNSUPP_PROTOCOL 0x19
+#define SMB_BUSY 0x1a
+#define SMB_PKT_CHK_ERROR 0x1f
+
+/* Device Object Notification Values */
+#define NOTIFY_BUS_CHECK 0x00
+#define NOTIFY_DEVICE_CHECK 0x01
+#define NOTIFY_DEVICE_WAKE 0x02
+#define NOTIFY_EJECT_REQUEST 0x03
+#define NOTIFY_DEVICE_CHECK_JR 0x04
+#define NOTIFY_FREQUENCY_ERROR 0x05
+#define NOTIFY_BUS_MODE 0x06
+#define NOTIFY_POWER_FAULT 0x07
+#define NOTIFY_CAPABILITIES 0x08
+#define NOTIFY_PLD_CHECK 0x09
+#define NOTIFY_SLIT_UPDATE 0x0b
+#define NOTIFY_SRA_UPDATE 0x0d
+
+/* Battery Device Notification Values */
+#define NOTIFY_BAT_STATUSCHG 0x80
+#define NOTIFY_BAT_INFOCHG 0x81
+#define NOTIFY_BAT_MAINTDATA 0x82
+
+/* Power Source Object Notification Values */
+#define NOTIFY_PWR_STATUSCHG 0x80
+#define NOTIFY_PWR_INFOCHG 0x81
+
+/* Thermal Zone Object Notification Values */
+#define NOTIFY_TZ_STATUSCHG 0x80
+#define NOTIFY_TZ_TRIPPTCHG 0x81
+#define NOTIFY_TZ_DEVLISTCHG 0x82
+#define NOTIFY_TZ_RELTBLCHG 0x83
+
+/* Power Button Notification Values */
+#define NOTIFY_POWER_BUTTON 0x80
+
+/* Sleep Button Notification Values */
+#define NOTIFY_SLEEP_BUTTON 0x80
+
+/* Lid Notification Values */
+#define NOTIFY_LID_STATUSCHG 0x80
+
+/* Processor Device Notification Values */
+#define NOTIFY_CPU_PPCCHG 0x80
+#define NOTIFY_CPU_CSTATECHG 0x81
+#define NOTIFY_CPU_THROTLCHG 0x82
+
+/* User Presence Device Notification Values */
+#define NOTIFY_USR_PRESNCECHG 0x80
+
+/* Ambient Light Sensor Notification Values */
+#define NOTIFY_ALS_ILLUMCHG 0x80
+#define NOTIFY_ALS_COLORTMPCHG 0x81
+#define NOTIFY_ALS_RESPCHG 0x82
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics()
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (19 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files Bin Meng
` (7 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Like other MADT table write routines, make acpi_create_madt_lapics()
return how many bytes it has written instead of the table end addr.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- New patch to return table length in acpi_create_madt_lapics()
arch/x86/include/asm/acpi_table.h | 2 +-
arch/x86/lib/acpi_table.c | 8 +++++---
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index b450c43..ff4802a 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -301,7 +301,7 @@ struct acpi_mcfg_mmconfig {
void acpi_fill_header(struct acpi_table_header *header, char *signature);
void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
void *dsdt);
-u32 acpi_create_madt_lapics(u32 current);
+int acpi_create_madt_lapics(u32 current);
int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
u32 addr, u32 gsi_base);
int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 201b16e..83cb8b5 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -179,21 +179,23 @@ static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
return lapic->length;
}
-u32 acpi_create_madt_lapics(u32 current)
+int acpi_create_madt_lapics(u32 current)
{
struct udevice *dev;
+ int length = 0;
for (uclass_find_first_device(UCLASS_CPU, &dev);
dev;
uclass_find_next_device(&dev)) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
- current += acpi_create_madt_lapic(
+ length += acpi_create_madt_lapic(
(struct acpi_madt_lapic *)current,
plat->cpu_id, plat->cpu_id);
+ current += length;
}
- return current;
+ return length;
}
int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (20 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics() Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables Bin Meng
` (6 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
This adds basic BayTrail platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.
Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
now. They will be added in the future.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
chipset serial ports
- Fix SIO1 and SIO2 interrupt mapping in irqroute.h
.../include/asm/arch-baytrail/acpi/irq_helper.h | 111 +++++
.../include/asm/arch-baytrail/acpi/irqlinks.asl | 489 +++++++++++++++++++++
.../include/asm/arch-baytrail/acpi/irqroute.asl | 48 ++
arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | 27 ++
arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 121 +++++
.../include/asm/arch-baytrail/acpi/platform.asl | 33 ++
.../include/asm/arch-baytrail/acpi/sleepstates.asl | 13 +
.../asm/arch-baytrail/acpi/southcluster.asl | 211 +++++++++
arch/x86/include/asm/arch-baytrail/acpi/usb.asl | 34 ++
arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | 31 ++
arch/x86/include/asm/arch-baytrail/device.h | 74 ++++
arch/x86/include/asm/arch-baytrail/iomap.h | 70 +++
arch/x86/include/asm/arch-baytrail/irq.h | 86 ++++
13 files changed, 1348 insertions(+)
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h b/arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
new file mode 100644
index 0000000..2c3585a
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2014 Sage Electronics Engineering, LLC.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/include/soc/irq_helper.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * This file intentionally gets included multiple times, to set pic and apic
+ * modes, so should not have guard statements added.
+ */
+
+/*
+ * This file will use irqroute.asl and irqroute.h to generate the ACPI IRQ
+ * routing for the platform being compiled.
+ *
+ * This method uses #defines in irqroute.h along with the macros contained
+ * in this file to generate an IRQ routing for each PCI device in the system.
+ */
+
+#undef PCI_DEV_PIRQ_ROUTES
+#undef PCI_DEV_PIRQ_ROUTE
+#undef ACPI_DEV_IRQ
+#undef PCIE_BRIDGE_DEV
+#undef RP_IRQ_ROUTES
+#undef ROOTPORT_METHODS
+#undef ROOTPORT_IRQ_ROUTES
+#undef RP_METHOD
+
+#if defined(PIC_MODE)
+
+#define ACPI_DEV_IRQ(dev_, pin_, pin_name_) \
+ Package() { ## dev_ ## ffff, pin_, \_SB.PCI0.LPCB.LNK ## pin_name_, 0 }
+
+#define RP_IRQ_ROUTES(prefix_, func_, a_, b_, c_, d_) \
+Name(prefix_ ## func_ ## P, Package() \
+{ \
+ ACPI_DEV_IRQ(0x0000, 0, a_), \
+ ACPI_DEV_IRQ(0x0000, 1, b_), \
+ ACPI_DEV_IRQ(0x0000, 2, c_), \
+ ACPI_DEV_IRQ(0x0000, 3, d_), \
+})
+
+/* define as blank so ROOTPORT_METHODS only gets inserted once */
+#define ROOTPORT_METHODS(prefix_, dev_)
+
+#else /* defined(PIC_MODE) */
+
+#define ACPI_DEV_IRQ(dev_, pin_, pin_name_) \
+ Package() { ## dev_ ## ffff, pin_, 0, PIRQ ## pin_name_ ## _APIC_IRQ }
+
+#define RP_IRQ_ROUTES(prefix_, func_, a_, b_, c_, d_) \
+Name(prefix_ ## func_ ## A, Package() \
+{ \
+ ACPI_DEV_IRQ(0x0000, 0, a_), \
+ ACPI_DEV_IRQ(0x0000, 1, b_), \
+ ACPI_DEV_IRQ(0x0000, 2, c_), \
+ ACPI_DEV_IRQ(0x0000, 3, d_), \
+})
+
+#define ROOTPORT_METHODS(prefix_, dev_) \
+ RP_METHOD(prefix_, dev_, 0) \
+ RP_METHOD(prefix_, dev_, 1) \
+ RP_METHOD(prefix_, dev_, 2) \
+ RP_METHOD(prefix_, dev_, 3) \
+ RP_METHOD(prefix_, dev_, 4) \
+ RP_METHOD(prefix_, dev_, 5) \
+ RP_METHOD(prefix_, dev_, 6) \
+ RP_METHOD(prefix_, dev_, 7)
+
+#endif /* defined(PIC_MODE) */
+
+#define PCI_DEV_PIRQ_ROUTE(dev_, a_, b_, c_, d_) \
+ ACPI_DEV_IRQ(dev_, 0, a_), \
+ ACPI_DEV_IRQ(dev_, 1, b_), \
+ ACPI_DEV_IRQ(dev_, 2, c_), \
+ ACPI_DEV_IRQ(dev_, 3, d_)
+
+#define PCIE_BRIDGE_DEV(prefix_, dev_, a_, b_, c_, d_) \
+ ROOTPORT_IRQ_ROUTES(prefix_, a_, b_, c_, d_) \
+ ROOTPORT_METHODS(prefix_, dev_)
+
+#define ROOTPORT_IRQ_ROUTES(prefix_, a_, b_, c_, d_) \
+ RP_IRQ_ROUTES(prefix_, 0, a_, b_, c_, d_) \
+ RP_IRQ_ROUTES(prefix_, 1, b_, c_, d_, a_) \
+ RP_IRQ_ROUTES(prefix_, 2, c_, d_, a_, b_) \
+ RP_IRQ_ROUTES(prefix_, 3, d_, a_, b_, c_) \
+ RP_IRQ_ROUTES(prefix_, 4, a_, b_, c_, d_) \
+ RP_IRQ_ROUTES(prefix_, 5, b_, c_, d_, a_) \
+ RP_IRQ_ROUTES(prefix_, 6, c_, d_, a_, b_) \
+ RP_IRQ_ROUTES(prefix_, 7, d_, a_, b_, c_)
+
+#define RP_METHOD(prefix_, dev_, func_)\
+Device (prefix_ ## 0 ## func_) \
+{ \
+ Name(_ADR, dev_ ## 000 ## func_) \
+ Name(_PRW, Package() { 0, 0 }) \
+ Method(_PRT) { \
+ If (PICM) { \
+ Return (prefix_ ## func_ ## A) \
+ } Else { \
+ Return (prefix_ ## func_ ## P) \
+ } \
+ } \
+}
+
+/* SoC specific PIRQ route configuration */
+#include "irqroute.h"
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl b/arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
new file mode 100644
index 0000000..aa72085
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
@@ -0,0 +1,489 @@
+/*
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/irqlinks.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+Scope (\)
+{
+ /* Intel Legacy Block */
+ OperationRegion(ILBS, SystemMemory, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
+ Field(ILBS, AnyAcc, NoLock, Preserve) {
+ Offset (0x8),
+ PRTA, 8,
+ PRTB, 8,
+ PRTC, 8,
+ PRTD, 8,
+ PRTE, 8,
+ PRTF, 8,
+ PRTG, 8,
+ PRTH, 8,
+ }
+}
+
+Device (LNKA)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 1)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTA)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLA, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLA, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTA */
+ ShiftLeft(1, And(PRTA, 0x0f), IRQ0)
+
+ Return (RTLA)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTA)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTA, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKB)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 2)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTB)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLB, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLB, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTB */
+ ShiftLeft(1, And(PRTB, 0x0f), IRQ0)
+
+ Return (RTLB)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTB)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTB, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKC)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 3)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTC)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLC, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLC, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTC */
+ ShiftLeft(1, And(PRTC, 0x0f), IRQ0)
+
+ Return (RTLC)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTC)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTC, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKD)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 4)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTD)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLD, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLD, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTD */
+ ShiftLeft(1, And(PRTD, 0x0f), IRQ0)
+
+ Return (RTLD)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTD)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTD, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKE)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 5)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTE)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLE, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLE, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTE */
+ ShiftLeft(1, And(PRTE, 0x0f), IRQ0)
+
+ Return (RTLE)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTE)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTE, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKF)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 6)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTF)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLF, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLF, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTF */
+ ShiftLeft(1, And(PRTF, 0x0f), IRQ0)
+
+ Return (RTLF)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTF)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTF, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKG)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 7)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTG)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLG, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLG, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTG */
+ ShiftLeft(1, And(PRTG, 0x0f), IRQ0)
+
+ Return (RTLG)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTG)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTG, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
+
+Device (LNKH)
+{
+ Name(_HID, EISAID("PNP0C0F"))
+ Name(_UID, 8)
+
+ /* Disable method */
+ Method(_DIS, 0, Serialized)
+ {
+ Store(0x80, PRTH)
+ }
+
+ /* Possible Resource Settings for this Link */
+ Name(_PRS, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) { 5, 6, 7, 10, 11, 12, 14, 15 }
+ })
+
+ /* Current Resource Settings for this link */
+ Method(_CRS, 0, Serialized)
+ {
+ Name(RTLH, ResourceTemplate()
+ {
+ IRQ(Level, ActiveLow, Shared) {}
+ })
+ CreateWordField(RTLH, 1, IRQ0)
+
+ /* Clear the WordField */
+ Store(Zero, IRQ0)
+
+ /* Set the bit from PRTH */
+ ShiftLeft(1, And(PRTH, 0x0f), IRQ0)
+
+ Return (RTLH)
+ }
+
+ /* Set Resource Setting for this IRQ link */
+ Method(_SRS, 1, Serialized)
+ {
+ CreateWordField(Arg0, 1, IRQ0)
+
+ /* Which bit is set? */
+ FindSetRightBit(IRQ0, Local0)
+
+ Decrement(Local0)
+ Store(Local0, PRTH)
+ }
+
+ /* Status */
+ Method(_STA, 0, Serialized)
+ {
+ If (And(PRTH, 0x80)) {
+ Return (STA_DISABLED)
+ } Else {
+ Return (STA_INVISIBLE)
+ }
+ }
+}
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl b/arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
new file mode 100644
index 0000000..64d3820
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/irqroute.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+Name(\PICM, 0)
+
+/*
+ * The _PIC method is called by the OS to choose between interrupt
+ * routing via the i8259 interrupt controller or the APIC.
+ *
+ * _PIC is called with a parameter of 0 for i8259 configuration and
+ * with a parameter of 1 for Local APIC/IOAPIC configuration.
+ */
+Method(\_PIC, 1)
+{
+ /* Remember the OS' IRQ routing choice */
+ Store(Arg0, PICM)
+}
+
+/* PCI interrupt routing */
+Method(_PRT) {
+ If (PICM) {
+ Return (Package() {
+ #undef PIC_MODE
+ #include "irq_helper.h"
+ PCI_DEV_PIRQ_ROUTES
+ })
+ } Else {
+ Return (Package() {
+ #define PIC_MODE
+ #include "irq_helper.h"
+ PCI_DEV_PIRQ_ROUTES
+ })
+ }
+
+}
+
+/* PCIe downstream ports interrupt routing */
+PCIE_BRIDGE_IRQ_ROUTES
+#undef PIC_MODE
+#include "irq_helper.h"
+PCIE_BRIDGE_IRQ_ROUTES
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h b/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
new file mode 100644
index 0000000..d746314
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/arch/device.h>
+
+#define PCI_DEV_PIRQ_ROUTES \
+ PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(EMMC_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SDIO_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SD_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(LPE_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(MMC45_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(TXE_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(EHCI_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D)
+
+#define PCIE_BRIDGE_IRQ_ROUTES \
+ PCIE_BRIDGE_DEV(RP, PCIE_DEV, A, B, C, D)
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
new file mode 100644
index 0000000..1dca977
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/lpc.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Intel LPC Bus Device - 0:1f.0 */
+
+Device (LPCB)
+{
+ Name(_ADR, 0x001f0000)
+
+ #include "irqlinks.asl"
+
+ /* Firmware Hub */
+ Device (FWH)
+ {
+ Name(_HID, EISAID("INT0800"))
+ Name(_CRS, ResourceTemplate()
+ {
+ Memory32Fixed(ReadOnly, 0xff000000, 0x01000000)
+ })
+ }
+
+ /* 8259 Interrupt Controller */
+ Device (PIC)
+ {
+ Name(_HID, EISAID("PNP0000"))
+ Name(_CRS, ResourceTemplate()
+ {
+ IO(Decode16, 0x20, 0x20, 0x01, 0x02)
+ IO(Decode16, 0x24, 0x24, 0x01, 0x02)
+ IO(Decode16, 0x28, 0x28, 0x01, 0x02)
+ IO(Decode16, 0x2c, 0x2c, 0x01, 0x02)
+ IO(Decode16, 0x30, 0x30, 0x01, 0x02)
+ IO(Decode16, 0x34, 0x34, 0x01, 0x02)
+ IO(Decode16, 0x38, 0x38, 0x01, 0x02)
+ IO(Decode16, 0x3c, 0x3c, 0x01, 0x02)
+ IO(Decode16, 0xa0, 0xa0, 0x01, 0x02)
+ IO(Decode16, 0xa4, 0xa4, 0x01, 0x02)
+ IO(Decode16, 0xa8, 0xa8, 0x01, 0x02)
+ IO(Decode16, 0xac, 0xac, 0x01, 0x02)
+ IO(Decode16, 0xb0, 0xb0, 0x01, 0x02)
+ IO(Decode16, 0xb4, 0xb4, 0x01, 0x02)
+ IO(Decode16, 0xb8, 0xb8, 0x01, 0x02)
+ IO(Decode16, 0xbc, 0xbc, 0x01, 0x02)
+ IO(Decode16, 0x4d0, 0x4d0, 0x01, 0x02)
+ IRQNoFlags () { 2 }
+ })
+ }
+
+ /* 8254 timer */
+ Device (TIMR)
+ {
+ Name(_HID, EISAID("PNP0100"))
+ Name(_CRS, ResourceTemplate()
+ {
+ IO(Decode16, 0x40, 0x40, 0x01, 0x04)
+ IO(Decode16, 0x50, 0x50, 0x10, 0x04)
+ IRQNoFlags() { 0 }
+ })
+ }
+
+ /* HPET */
+ Device (HPET)
+ {
+ Name(_HID, EISAID("PNP0103"))
+ Name(_CID, 0x010CD041)
+ Name(_CRS, ResourceTemplate()
+ {
+ Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, HPET_BASE_SIZE)
+ })
+
+ Method(_STA)
+ {
+ Return (STA_VISIBLE)
+ }
+ }
+
+ /* Real Time Clock */
+ Device (RTC)
+ {
+ Name(_HID, EISAID("PNP0B00"))
+ Name(_CRS, ResourceTemplate()
+ {
+ IO(Decode16, 0x70, 0x70, 1, 8)
+ /*
+ * Disable as Windows doesn't like it, and systems
+ * don't seem to use it
+ */
+ /* IRQNoFlags() { 8 } */
+ })
+ }
+
+ /* LPC device: Resource consumption */
+ Device (LDRC)
+ {
+ Name(_HID, EISAID("PNP0C02"))
+ Name(_UID, 2)
+
+ Name(RBUF, ResourceTemplate()
+ {
+ IO(Decode16, 0x61, 0x61, 0x1, 0x01) /* NMI Status */
+ IO(Decode16, 0x63, 0x63, 0x1, 0x01) /* CPU Reserved */
+ IO(Decode16, 0x65, 0x65, 0x1, 0x01) /* CPU Reserved */
+ IO(Decode16, 0x67, 0x67, 0x1, 0x01) /* CPU Reserved */
+ IO(Decode16, 0x80, 0x80, 0x1, 0x01) /* Port 80 Post */
+ IO(Decode16, 0x92, 0x92, 0x1, 0x01) /* CPU Reserved */
+ IO(Decode16, 0xb2, 0xb2, 0x1, 0x02) /* SWSMI */
+ })
+
+ Method(_CRS, 0, NotSerialized)
+ {
+ Return (RBUF)
+ }
+ }
+}
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/platform.asl b/arch/x86/include/asm/arch-baytrail/acpi/platform.asl
new file mode 100644
index 0000000..bd72842
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/platform.asl
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/acpi/statdef.asl>
+#include <asm/arch/iomap.h>
+#include <asm/arch/irq.h>
+
+/*
+ * The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0.
+ */
+Method(_PTS, 1)
+{
+}
+
+/* The _WAK method is called on system wakeup */
+Method(_WAK, 1)
+{
+ Return (Package() {0, 0})
+}
+
+/* TODO: add CPU ASL support */
+
+Scope (\_SB)
+{
+ #include "southcluster.asl"
+}
+
+/* Chipset specific sleep states */
+#include "sleepstates.asl"
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl b/arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
new file mode 100644
index 0000000..eb5ae76
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/sleepstates.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+Name(\_S0, Package() {0x0, 0x0, 0x0, 0x0})
+Name(\_S3, Package() {0x5, 0x0, 0x0, 0x0})
+Name(\_S4, Package() {0x6, 0x0, 0x0, 0x0})
+Name(\_S5, Package() {0x7, 0x0, 0x0, 0x0})
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl b/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
new file mode 100644
index 0000000..34d3951
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/southcluster.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+Device (PCI0)
+{
+ Name(_HID, EISAID("PNP0A08")) /* PCIe */
+ Name(_CID, EISAID("PNP0A03")) /* PCI */
+
+ Name(_ADR, 0)
+ Name(_BBN, 0)
+
+ Name(MCRS, ResourceTemplate()
+ {
+ /* Bus Numbers */
+ WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
+
+ /* IO Region 0 */
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+ 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
+
+ /* PCI Config Space */
+ IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
+
+ /* IO Region 1 */
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+ 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
+
+ /* VGA memory (0xa0000-0xbffff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
+ 0x00020000, , , ASEG)
+
+ /* OPROM reserved (0xc0000-0xc3fff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
+ 0x00004000, , , OPR0)
+
+ /* OPROM reserved (0xc4000-0xc7fff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
+ 0x00004000, , , OPR1)
+
+ /* OPROM reserved (0xc8000-0xcbfff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
+ 0x00004000, , , OPR2)
+
+ /* OPROM reserved (0xcc000-0xcffff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
+ 0x00004000, , , OPR3)
+
+ /* OPROM reserved (0xd0000-0xd3fff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
+ 0x00004000, , , OPR4)
+
+ /* OPROM reserved (0xd4000-0xd7fff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
+ 0x00004000, , , OPR5)
+
+ /* OPROM reserved (0xd8000-0xdbfff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
+ 0x00004000, , , OPR6)
+
+ /* OPROM reserved (0xdc000-0xdffff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
+ 0x00004000, , , OPR7)
+
+ /* BIOS Extension (0xe0000-0xe3fff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
+ 0x00004000, , , ESG0)
+
+ /* BIOS Extension (0xe4000-0xe7fff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
+ 0x00004000, , , ESG1)
+
+ /* BIOS Extension (0xe8000-0xebfff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
+ 0x00004000, , , ESG2)
+
+ /* BIOS Extension (0xec000-0xeffff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000ec000, 0x000effff, 0x00000000,
+ 0x00004000, , , ESG3)
+
+ /* System BIOS (0xf0000-0xfffff) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
+ 0x00010000, , , FSEG)
+
+ /* PCI Memory Region (TOLM-CONFIG_MMCONF_BASE_ADDRESS) */
+ DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, , , PMEM)
+
+ /* High PCI Memory Region */
+ QwordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, , , UMEM)
+ })
+
+ Method(_CRS, 0, Serialized)
+ {
+ /* Update PCI resource area */
+ CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
+ CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
+ CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
+
+ /*
+ * Hardcode TOLM to 2GB for now as BayTrail FSP uses this value.
+ *
+ * TODO: for generic usage, read TOLM value from register, or
+ * from global NVS (not implemented by U-Boot yet).
+ */
+ Store(0x80000000, PMIN)
+ Store(Subtract(MCFG_BASE_ADDRESS, 1), PMAX)
+ Add(Subtract(PMAX, PMIN), 1, PLEN)
+
+ /* Update High PCI resource area */
+ CreateQwordField(MCRS, ^UMEM._MIN, UMIN)
+ CreateQwordField(MCRS, ^UMEM._MAX, UMAX)
+ CreateQwordField(MCRS, ^UMEM._LEN, ULEN)
+
+ /* Set base address to 48GB and allocate 16GB for PCI space */
+ Store(0xc00000000, UMIN)
+ Store(0x400000000, ULEN)
+ Add(UMIN, Subtract(ULEN, 1), UMAX)
+
+ Return (MCRS)
+ }
+
+ /* Device Resource Consumption */
+ Device (PDRC)
+ {
+ Name(_HID, EISAID("PNP0C02"))
+ Name(_UID, 1)
+
+ Name(PDRS, ResourceTemplate() {
+ Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
+ Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE)
+ Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE)
+ Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE)
+ Memory32Fixed(ReadWrite, PUNIT_BASE_ADDRESS, PUNIT_BASE_SIZE)
+ Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
+ Memory32Fixed(ReadWrite, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE)
+ Memory32Fixed(ReadWrite, MPHY_BASE_ADDRESS, MPHY_BASE_SIZE)
+ })
+
+ /* Current Resource Settings */
+ Method(_CRS, 0, Serialized)
+ {
+ Return (PDRS)
+ }
+ }
+
+ Method(_OSC, 4)
+ {
+ /* Check for proper GUID */
+ If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
+ /* Let OS control everything */
+ Return (Arg3)
+ } Else {
+ /* Unrecognized UUID */
+ CreateDWordField(Arg3, 0, CDW1)
+ Or(CDW1, 4, CDW1)
+ Return (Arg3)
+ }
+ }
+
+ /* LPC Bridge 0:1f.0 */
+ #include "lpc.asl"
+
+ /* USB EHCI 0:1d.0 */
+ #include "usb.asl"
+
+ /* USB XHCI 0:14.0 */
+ #include "xhci.asl"
+
+ /* IRQ routing for each PCI device */
+ #include "irqroute.asl"
+}
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/usb.asl b/arch/x86/include/asm/arch-baytrail/acpi/usb.asl
new file mode 100644
index 0000000..311f471
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/usb.asl
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/usb.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* EHCI Controller 0:1d.0 */
+
+Device (EHC1)
+{
+ Name(_ADR, 0x001d0000)
+
+ /* Power Resources for Wake */
+ Name(_PRW, Package() { 13, 4 })
+
+ /* Highest D state in S3 state */
+ Name(_S3D, 2)
+
+ /* Highest D state in S4 state */
+ Name(_S4D, 2)
+
+ Device (HUB7)
+ {
+ Name(_ADR, 0x00000000)
+
+ Device(PRT1) { Name(_ADR, 1) } /* USB Port 0 */
+ Device(PRT2) { Name(_ADR, 2) } /* USB Port 1 */
+ Device(PRT3) { Name(_ADR, 3) } /* USB Port 2 */
+ Device(PRT4) { Name(_ADR, 4) } /* USB Port 3 */
+ }
+}
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/xhci.asl b/arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
new file mode 100644
index 0000000..a5a4404
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/acpi/xhci.asl
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* XHCI Controller 0:14.0 */
+
+Device (XHCI)
+{
+ Name(_ADR, 0x00140000)
+
+ /* Power Resources for Wake */
+ Name(_PRW, Package() { 13, 3 })
+
+ /* Highest D state in S3 state */
+ Name(_S3D, 3)
+
+ Device (RHUB)
+ {
+ Name(_ADR, 0x00000000)
+
+ Device (PRT1) { Name(_ADR, 1) } /* USB Port 0 */
+ Device (PRT2) { Name(_ADR, 2) } /* USB Port 1 */
+ Device (PRT3) { Name(_ADR, 3) } /* USB Port 2 */
+ Device (PRT4) { Name(_ADR, 4) } /* USB Port 3 */
+ }
+}
diff --git a/arch/x86/include/asm/arch-baytrail/device.h b/arch/x86/include/asm/arch-baytrail/device.h
new file mode 100644
index 0000000..798d35b
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/device.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/include/soc/pci_devs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _DEVICE_H_
+#define _DEVICE_H_
+
+/*
+ * Internal PCI device numbers within the SoC.
+ *
+ * Note it must start with 0x_ prefix, as the device number macro will be
+ * included in the ACPI ASL files (see irq_helper.h and irq_route.h).
+ */
+
+/* SoC transaction router */
+#define SOC_DEV 0x00
+
+/* Graphics and Display */
+#define GFX_DEV 0x02
+
+/* MIPI */
+#define MIPI_DEV 0x03
+
+/* EMMC Port */
+#define EMMC_DEV 0x10
+
+/* SDIO Port */
+#define SDIO_DEV 0x11
+
+/* SD Port */
+#define SD_DEV 0x12
+
+/* SATA */
+#define SATA_DEV 0x13
+
+/* xHCI */
+#define XHCI_DEV 0x14
+
+/* LPE Audio */
+#define LPE_DEV 0x15
+
+/* OTG */
+#define OTG_DEV 0x16
+
+/* MMC45 Port */
+#define MMC45_DEV 0x17
+
+/* Serial IO 1 */
+#define SIO1_DEV 0x18
+
+/* Trusted Execution Engine */
+#define TXE_DEV 0x1a
+
+/* HD Audio */
+#define HDA_DEV 0x1b
+
+/* PCIe Ports */
+#define PCIE_DEV 0x1c
+
+/* EHCI */
+#define EHCI_DEV 0x1d
+
+/* Serial IO 2 */
+#define SIO2_DEV 0x1e
+
+/* Platform Controller Unit */
+#define PCU_DEV 0x1f
+
+#endif /* _DEVICE_H_ */
diff --git a/arch/x86/include/asm/arch-baytrail/iomap.h b/arch/x86/include/asm/arch-baytrail/iomap.h
new file mode 100644
index 0000000..62a9105
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/iomap.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/include/soc/iomap.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _BAYTRAIL_IOMAP_H_
+#define _BAYTRAIL_IOMAP_H_
+
+/* Memory Mapped IO bases */
+
+/* PCI Configuration Space */
+#define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE
+#define MCFG_BASE_SIZE 0x10000000
+
+/* Temporary Base Address */
+#define TEMP_BASE_ADDRESS 0xfd000000
+
+/* Transactions in this range will abort */
+#define ABORT_BASE_ADDRESS 0xfeb00000
+#define ABORT_BASE_SIZE 0x00100000
+
+/* High Performance Event Timer */
+#define HPET_BASE_ADDRESS 0xfed00000
+#define HPET_BASE_SIZE 0x400
+
+/* SPI Bus */
+#define SPI_BASE_ADDRESS 0xfed01000
+#define SPI_BASE_SIZE 0x400
+
+/* Power Management Controller */
+#define PMC_BASE_ADDRESS 0xfed03000
+#define PMC_BASE_SIZE 0x400
+
+/* Power Management Unit */
+#define PUNIT_BASE_ADDRESS 0xfed05000
+#define PUNIT_BASE_SIZE 0x800
+
+/* Intel Legacy Block */
+#define ILB_BASE_ADDRESS 0xfed08000
+#define ILB_BASE_SIZE 0x400
+
+/* IO Memory */
+#define IO_BASE_ADDRESS 0xfed0c000
+#define IO_BASE_OFFSET_GPSCORE 0x0000
+#define IO_BASE_OFFSET_GPNCORE 0x1000
+#define IO_BASE_OFFSET_GPSSUS 0x2000
+#define IO_BASE_SIZE 0x4000
+
+/* Root Complex Base Address */
+#define RCBA_BASE_ADDRESS 0xfed1c000
+#define RCBA_BASE_SIZE 0x400
+
+/* MODPHY */
+#define MPHY_BASE_ADDRESS 0xfef00000
+#define MPHY_BASE_SIZE 0x100000
+
+/* IO Port bases */
+#define ACPI_BASE_ADDRESS 0x0400
+#define ACPI_BASE_SIZE 0x80
+
+#define GPIO_BASE_ADDRESS 0x0500
+#define GPIO_BASE_SIZE 0x100
+
+#define SMBUS_BASE_ADDRESS 0xefa0
+
+#endif /* _BAYTRAIL_IOMAP_H_ */
diff --git a/arch/x86/include/asm/arch-baytrail/irq.h b/arch/x86/include/asm/arch-baytrail/irq.h
new file mode 100644
index 0000000..cd66f83
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/irq.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Modified from coreboot src/soc/intel/baytrail/include/soc/irq.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _BAYTRAIL_IRQ_H_
+#define _BAYTRAIL_IRQ_H_
+
+#define PIRQA_APIC_IRQ 16
+#define PIRQB_APIC_IRQ 17
+#define PIRQC_APIC_IRQ 18
+#define PIRQD_APIC_IRQ 19
+#define PIRQE_APIC_IRQ 20
+#define PIRQF_APIC_IRQ 21
+#define PIRQG_APIC_IRQ 22
+#define PIRQH_APIC_IRQ 23
+
+/* The below IRQs are for when devices are in ACPI mode */
+#define LPE_DMA0_IRQ 24
+#define LPE_DMA1_IRQ 25
+#define LPE_SSP0_IRQ 26
+#define LPE_SSP1_IRQ 27
+#define LPE_SSP2_IRQ 28
+#define LPE_IPC2HOST_IRQ 29
+#define LPSS_I2C1_IRQ 32
+#define LPSS_I2C2_IRQ 33
+#define LPSS_I2C3_IRQ 34
+#define LPSS_I2C4_IRQ 35
+#define LPSS_I2C5_IRQ 36
+#define LPSS_I2C6_IRQ 37
+#define LPSS_I2C7_IRQ 38
+#define LPSS_HSUART1_IRQ 39
+#define LPSS_HSUART2_IRQ 40
+#define LPSS_SPI_IRQ 41
+#define LPSS_DMA1_IRQ 42
+#define LPSS_DMA2_IRQ 43
+#define SCC_EMMC_IRQ 44
+#define SCC_SDIO_IRQ 46
+#define SCC_SD_IRQ 47
+#define GPIO_NC_IRQ 48
+#define GPIO_SC_IRQ 49
+#define GPIO_SUS_IRQ 50
+/* GPIO direct / dedicated IRQs */
+#define GPIO_S0_DED_IRQ_0 51
+#define GPIO_S0_DED_IRQ_1 52
+#define GPIO_S0_DED_IRQ_2 53
+#define GPIO_S0_DED_IRQ_3 54
+#define GPIO_S0_DED_IRQ_4 55
+#define GPIO_S0_DED_IRQ_5 56
+#define GPIO_S0_DED_IRQ_6 57
+#define GPIO_S0_DED_IRQ_7 58
+#define GPIO_S0_DED_IRQ_8 59
+#define GPIO_S0_DED_IRQ_9 60
+#define GPIO_S0_DED_IRQ_10 61
+#define GPIO_S0_DED_IRQ_11 62
+#define GPIO_S0_DED_IRQ_12 63
+#define GPIO_S0_DED_IRQ_13 64
+#define GPIO_S0_DED_IRQ_14 65
+#define GPIO_S0_DED_IRQ_15 66
+#define GPIO_S5_DED_IRQ_0 67
+#define GPIO_S5_DED_IRQ_1 68
+#define GPIO_S5_DED_IRQ_2 69
+#define GPIO_S5_DED_IRQ_3 70
+#define GPIO_S5_DED_IRQ_4 71
+#define GPIO_S5_DED_IRQ_5 72
+#define GPIO_S5_DED_IRQ_6 73
+#define GPIO_S5_DED_IRQ_7 74
+#define GPIO_S5_DED_IRQ_8 75
+#define GPIO_S5_DED_IRQ_9 76
+#define GPIO_S5_DED_IRQ_10 77
+#define GPIO_S5_DED_IRQ_11 78
+#define GPIO_S5_DED_IRQ_12 79
+#define GPIO_S5_DED_IRQ_13 80
+#define GPIO_S5_DED_IRQ_14 81
+#define GPIO_S5_DED_IRQ_15 82
+/* DIRQs - Two levels of expansion to evaluate to numeric constants for ASL */
+#define _GPIO_S0_DED_IRQ(slot) GPIO_S0_DED_IRQ_##slot
+#define _GPIO_S5_DED_IRQ(slot) GPIO_S5_DED_IRQ_##slot
+#define GPIO_S0_DED_IRQ(slot) _GPIO_S0_DED_IRQ(slot)
+#define GPIO_S5_DED_IRQ(slot) _GPIO_S5_DED_IRQ(slot)
+
+#endif /* _BAYTRAIL_IRQ_H_ */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (21 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards Bin Meng
` (5 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
FADT/MADT tables are platform specific. Generate them for BayTrail.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- Use existing macros in FADT whenever possible
- Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
for consistency, and make it static
- Return table length in acpi_create_madt_irq_overrides() so that the
code logic in acpi_fill_madt() looks consistent (eg: current += ...)
arch/x86/cpu/baytrail/Makefile | 1 +
arch/x86/cpu/baytrail/acpi.c | 163 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 164 insertions(+)
create mode 100644 arch/x86/cpu/baytrail/acpi.c
diff --git a/arch/x86/cpu/baytrail/Makefile b/arch/x86/cpu/baytrail/Makefile
index 5be5491..a0216f3 100644
--- a/arch/x86/cpu/baytrail/Makefile
+++ b/arch/x86/cpu/baytrail/Makefile
@@ -8,3 +8,4 @@ obj-y += cpu.o
obj-y += early_uart.o
obj-y += fsp_configs.o
obj-y += valleyview.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
new file mode 100644
index 0000000..1d54f7d
--- /dev/null
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/acpi_table.h>
+#include <asm/ioapic.h>
+#include <asm/mpspec.h>
+#include <asm/tables.h>
+#include <asm/arch/iomap.h>
+
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt)
+{
+ struct acpi_table_header *header = &(fadt->header);
+ u16 pmbase = ACPI_BASE_ADDRESS;
+
+ memset((void *)fadt, 0, sizeof(struct acpi_fadt));
+
+ acpi_fill_header(header, "FACP");
+ header->length = sizeof(struct acpi_fadt);
+ header->revision = 4;
+
+ fadt->firmware_ctrl = (u32)facs;
+ fadt->dsdt = (u32)dsdt;
+ fadt->preferred_pm_profile = ACPI_PM_MOBILE;
+ fadt->sci_int = 9;
+ fadt->smi_cmd = 0;
+ fadt->acpi_enable = 0;
+ fadt->acpi_disable = 0;
+ fadt->s4bios_req = 0;
+ fadt->pstate_cnt = 0;
+ fadt->pm1a_evt_blk = pmbase;
+ fadt->pm1b_evt_blk = 0x0;
+ fadt->pm1a_cnt_blk = pmbase + 0x4;
+ fadt->pm1b_cnt_blk = 0x0;
+ fadt->pm2_cnt_blk = pmbase + 0x50;
+ fadt->pm_tmr_blk = pmbase + 0x8;
+ fadt->gpe0_blk = pmbase + 0x20;
+ fadt->gpe1_blk = 0;
+ fadt->pm1_evt_len = 4;
+ fadt->pm1_cnt_len = 2;
+ fadt->pm2_cnt_len = 1;
+ fadt->pm_tmr_len = 4;
+ fadt->gpe0_blk_len = 8;
+ fadt->gpe1_blk_len = 0;
+ fadt->gpe1_base = 0;
+ fadt->cst_cnt = 0;
+ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
+ fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
+ fadt->flush_size = 0;
+ fadt->flush_stride = 0;
+ fadt->duty_offset = 1;
+ fadt->duty_width = 0;
+ fadt->day_alrm = 0x0d;
+ fadt->mon_alrm = 0x00;
+ fadt->century = 0x00;
+ fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
+ fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+ ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
+ ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_RESET_REGISTER |
+ ACPI_FADT_PLATFORM_CLOCK;
+
+ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->reset_reg.bit_width = 8;
+ fadt->reset_reg.bit_offset = 0;
+ fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
+ fadt->reset_reg.addrl = IO_PORT_RESET;
+ fadt->reset_reg.addrh = 0;
+ fadt->reset_value = SYS_RST | RST_CPU;
+
+ fadt->x_firmware_ctl_l = (u32)facs;
+ fadt->x_firmware_ctl_h = 0;
+ fadt->x_dsdt_l = (u32)dsdt;
+ fadt->x_dsdt_h = 0;
+
+ fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
+ fadt->x_pm1a_evt_blk.bit_offset = 0;
+ fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
+ fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
+ fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+ fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_pm1b_evt_blk.bit_width = 0;
+ fadt->x_pm1b_evt_blk.bit_offset = 0;
+ fadt->x_pm1b_evt_blk.access_size = 0;
+ fadt->x_pm1b_evt_blk.addrl = 0x0;
+ fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+ fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
+ fadt->x_pm1a_cnt_blk.bit_offset = 0;
+ fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
+ fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
+ fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+ fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_pm1b_cnt_blk.bit_width = 0;
+ fadt->x_pm1b_cnt_blk.bit_offset = 0;
+ fadt->x_pm1b_cnt_blk.access_size = 0;
+ fadt->x_pm1b_cnt_blk.addrl = 0x0;
+ fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+ fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
+ fadt->x_pm2_cnt_blk.bit_offset = 0;
+ fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
+ fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
+ fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+ fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
+ fadt->x_pm_tmr_blk.bit_offset = 0;
+ fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
+ fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
+ fadt->x_pm_tmr_blk.addrh = 0x0;
+
+ fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8;
+ fadt->x_gpe0_blk.bit_offset = 0;
+ fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
+ fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
+ fadt->x_gpe0_blk.addrh = 0x0;
+
+ fadt->x_gpe1_blk.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->x_gpe1_blk.bit_width = 0;
+ fadt->x_gpe1_blk.bit_offset = 0;
+ fadt->x_gpe1_blk.access_size = 0;
+ fadt->x_gpe1_blk.addrl = 0x0;
+ fadt->x_gpe1_blk.addrh = 0x0;
+
+ header->checksum = table_compute_checksum(fadt, header->length);
+}
+
+static int acpi_create_madt_irq_overrides(u32 current)
+{
+ struct acpi_madt_irqoverride *irqovr;
+ u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
+ int length = 0;
+
+ irqovr = (void *)current;
+ length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
+
+ irqovr = (void *)(current + length);
+ length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
+
+ return length;
+}
+
+u32 acpi_fill_madt(u32 current)
+{
+ current += acpi_create_madt_lapics(current);
+
+ current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
+ 2, IO_APIC_ADDR, 0);
+
+ current += acpi_create_madt_irq_overrides(current);
+
+ return current;
+}
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (22 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards Bin Meng
` (4 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
board/congatec/conga-qeval20-qa3-e3845/Makefile | 1 +
board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +++++++++++++
board/congatec/conga-qeval20-qa3-e3845/dsdt.asl | 14 ++++++++++++++
board/intel/bayleybay/Makefile | 1 +
board/intel/bayleybay/acpi/mainboard.asl | 11 +++++++++++
board/intel/bayleybay/dsdt.asl | 14 ++++++++++++++
board/intel/minnowmax/Makefile | 1 +
board/intel/minnowmax/acpi/mainboard.asl | 11 +++++++++++
board/intel/minnowmax/dsdt.asl | 14 ++++++++++++++
configs/bayleybay_defconfig | 1 +
configs/conga-qeval20-qa3-e3845_defconfig | 1 +
configs/minnowmax_defconfig | 1 +
12 files changed, 83 insertions(+)
create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
create mode 100644 board/intel/bayleybay/dsdt.asl
create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
create mode 100644 board/intel/minnowmax/dsdt.asl
diff --git a/board/congatec/conga-qeval20-qa3-e3845/Makefile b/board/congatec/conga-qeval20-qa3-e3845/Makefile
index 23b8748..b784510 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Makefile
+++ b/board/congatec/conga-qeval20-qa3-e3845/Makefile
@@ -5,3 +5,4 @@
#
obj-y += conga-qeval20-qa3.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
new file mode 100644
index 0000000..eace459
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
+
+/* TODO: Need add Winbond SuperIO chipset W83627 ASL codes */
diff --git a/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
new file mode 100644
index 0000000..6042011
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/bayleybay/Makefile b/board/intel/bayleybay/Makefile
index 88b5aad..52dda7d 100644
--- a/board/intel/bayleybay/Makefile
+++ b/board/intel/bayleybay/Makefile
@@ -5,3 +5,4 @@
#
obj-y += bayleybay.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/bayleybay/acpi/mainboard.asl b/board/intel/bayleybay/acpi/mainboard.asl
new file mode 100644
index 0000000..21785ea
--- /dev/null
+++ b/board/intel/bayleybay/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/bayleybay/dsdt.asl b/board/intel/bayleybay/dsdt.asl
new file mode 100644
index 0000000..6042011
--- /dev/null
+++ b/board/intel/bayleybay/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/minnowmax/Makefile b/board/intel/minnowmax/Makefile
index 1a61432..73e5a8f 100644
--- a/board/intel/minnowmax/Makefile
+++ b/board/intel/minnowmax/Makefile
@@ -5,3 +5,4 @@
#
obj-y += minnowmax.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/minnowmax/acpi/mainboard.asl b/board/intel/minnowmax/acpi/mainboard.asl
new file mode 100644
index 0000000..21785ea
--- /dev/null
+++ b/board/intel/minnowmax/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/minnowmax/dsdt.asl b/board/intel/minnowmax/dsdt.asl
new file mode 100644
index 0000000..6042011
--- /dev/null
+++ b/board/intel/minnowmax/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index dfafb0b..465394e 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -9,6 +9,7 @@ CONFIG_HAVE_VGA_BIOS=y
CONFIG_VGA_BIOS_ADDR=0xfffa0000
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig
index 24a927d..044045d 100644
--- a/configs/conga-qeval20-qa3-e3845_defconfig
+++ b/configs/conga-qeval20-qa3-e3845_defconfig
@@ -8,6 +8,7 @@ CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index efb9c1e..cebd660 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -8,6 +8,7 @@ CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (23 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on Bin Meng
` (3 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +++
board/intel/bayleybay/.gitignore | 3 +++
board/intel/minnowmax/.gitignore | 3 +++
3 files changed, 9 insertions(+)
create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
create mode 100644 board/intel/bayleybay/.gitignore
create mode 100644 board/intel/minnowmax/.gitignore
diff --git a/board/congatec/conga-qeval20-qa3-e3845/.gitignore b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
new file mode 100644
index 0000000..6eb8a54
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/bayleybay/.gitignore b/board/intel/bayleybay/.gitignore
new file mode 100644
index 0000000..6eb8a54
--- /dev/null
+++ b/board/intel/bayleybay/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/minnowmax/.gitignore b/board/intel/minnowmax/.gitignore
new file mode 100644
index 0000000..6eb8a54
--- /dev/null
+++ b/board/intel/minnowmax/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (24 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy Bin Meng
` (2 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Remove the kernel boot parameter acpi=off so that kernel can turn on
ACPI support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2: None
include/configs/x86-common.h | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index ea815c2..1e0f451 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -207,14 +207,19 @@
#define CONFIG_HOSTNAME x86
#define CONFIG_BOOTFILE "bzImage"
#define CONFIG_LOADADDR 0x1000000
-#define CONFIG_RAMDISK_ADDR 0x4000000
+#define CONFIG_RAMDISK_ADDR 0x4000000
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+#define CONFIG_OTHBOOTARGS "othbootargs=\0"
+#else
+#define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0"
+#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_STD_DEVICES_SETTINGS \
"pciconfighost=1\0" \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
- "othbootargs=acpi=off\0" \
+ CONFIG_OTHBOOTARGS \
"ramdiskaddr=0x4000000\0" \
"ramdiskfile=initramfs.gz\0"
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (25 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 14:46 ` [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support Bin Meng
2016-05-07 18:45 ` [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Simon Glass
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
in x86-common.h
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
- Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
doc/README.x86 | 41 ++++++++++++++++++-----------------------
1 file changed, 18 insertions(+), 23 deletions(-)
diff --git a/doc/README.x86 b/doc/README.x86
index c5c3010..732d375 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -23,7 +23,8 @@ In this case, known as bare mode, from the fact that it runs on the
'bare metal', U-Boot acts like a BIOS replacement. The following platforms
are supported:
- - Bayley Bay
+ - Bayley Bay CRB
+ - Congatec QEVAL 2.0 & conga-QA3/E3845
- Cougar Canyon 2 CRB
- Crown Bay CRB
- Galileo
@@ -412,18 +413,19 @@ If you want to check both consoles, use '-serial stdio'.
Multicore is also supported by QEMU via '-smp n' where n is the number of cores
to instantiate. Note, the maximum supported CPU number in QEMU is 255.
-The fw_cfg interface in QEMU also provides information about kernel data, initrd,
-command-line arguments and more. U-Boot supports directly accessing these informtion
-from fw_cfg interface, this saves the time of loading them from hard disk or
-network again, through emulated devices. To use it , simply providing them in
-QEMU command line:
+The fw_cfg interface in QEMU also provides information about kernel data,
+initrd, command-line arguments and more. U-Boot supports directly accessing
+these informtion from fw_cfg interface, which saves the time of loading them
+from hard disk or network again, through emulated devices. To use it , simply
+providing them in QEMU command line:
$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage
-append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
Note: -initrd and -smp are both optional
-Then start QEMU, in U-Boot command line use the following U-Boot command to setup kernel:
+Then start QEMU, in U-Boot command line use the following U-Boot command to
+setup kernel:
=> qfw
qfw - QEMU firmware interface
@@ -437,8 +439,8 @@ qfw <command>
=> qfw load
loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
-Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then, 'zboot'
-can be used to boot the kernel:
+Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then,
+'zboot' can be used to boot the kernel:
=> zboot 02000000 - 04000000 1b1ab50
@@ -490,8 +492,8 @@ Booting Ubuntu
--------------
As an example of how to set up your boot flow with U-Boot, here are
instructions for starting Ubuntu from U-Boot. These instructions have been
-tested on Minnowboard MAX with a SATA driver but are equally applicable on
-other platforms and other media. There are really only four steps and its a
+tested on Minnowboard MAX with a SATA drive but are equally applicable on
+other platforms and other media. There are really only four steps and it's a
very simple script, but a more detailed explanation is provided here for
completeness.
@@ -499,7 +501,7 @@ Note: It is possible to set up U-Boot to boot automatically using syslinux.
It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
GUID. If you figure these out, please post patches to this README.
-Firstly, you will need Ubunutu installed on an available disk. It should be
+Firstly, you will need Ubuntu installed on an available disk. It should be
possible to make U-Boot start a USB start-up disk but for now let's assume
that you used another boot loader to install Ubuntu.
@@ -659,7 +661,7 @@ U-Boot:
Loading bzImage at address 100000 (5805728 bytes)
Magic signature found
Initial RAM disk at linear address 0x04000000, size 19215259 bytes
- Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
+ Kernel command line: "root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
Starting kernel ...
@@ -679,13 +681,14 @@ above commands into a script since then it will be faster.
240,329 ahci
1,422,704 vesa display
-Now the kernel actually starts:
+Now the kernel actually starts: (if you want to examine kernel boot up message
+on the serial console, append "console=ttyS0,115200" to the kernel command line)
[ 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Initializing cgroup subsys cpuacct
[ 0.000000] Linux version 3.13.0-58-generic (buildd at allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
- [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
+ [ 0.000000] Command line: root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro console=ttyS0,115200
It continues for a long time. Along the way you will see it pick up your
ramdisk:
@@ -736,14 +739,6 @@ If you want to put this in a script you can use something like this:
The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
command.
-You will also need to add this to your board configuration file, e.g.
-include/configs/minnowmax.h:
-
- #define CONFIG_BOOTDELAY 2
-
-Now when you reset your board it wait a few seconds (in case you want to
-interrupt) and then should boot straight into Ubuntu.
-
You can also bake this behaviour into your build by hard-coding the
environment variables if you add this to minnowmax.h:
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (26 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy Bin Meng
@ 2016-05-07 14:46 ` Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-07 18:45 ` [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Simon Glass
28 siblings, 1 reply; 87+ messages in thread
From: Bin Meng @ 2016-05-07 14:46 UTC (permalink / raw)
To: u-boot
Remove ACPI from the TODO list and add a new section to document
current ACPI support in U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- Update ACPI support status in more details: what's supported,
what's not supported, what's optional.
doc/README.x86 | 44 +++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/doc/README.x86 b/doc/README.x86
index 732d375..ce806ee 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -958,12 +958,52 @@ transformations. Remember to add attribution to coreboot for new files added
to U-Boot. This should go at the top of each file and list the coreboot
filename where the code originated.
+ACPI Support Status
+-------------------
+Advanced Configuration and Power Interface (ACPI) [16] aims to establish
+industry-standard interfaces enabling OS-directed configuration, power
+management, and thermal management of mobile, desktop, and server platforms.
+
+Linux can boot without ACPI with "acpi=off" command line parameter, but
+with ACPI the kernel gains the capabilities to handle power management.
+For Windows, ACPI is a must-have firmware feature since Windows Vista.
+CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
+U-Boot. This requires Intel ACPI compiler to be installed on your host to
+compile ACPI DSDT table written in ASL format to AML format. You can get
+the compiler via "apt-get install iasl" if you are on Ubuntu or download
+the source from [17] to compile one by yourself.
+
+Current ACPI support in U-Boot is not complete. More features will be added
+in the future. The status as of today is:
+
+ * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
+ * Support one static DSDT table only, compiled by Intel ACPI compiler.
+ * Support S0/S5, reboot and shutdown from OS.
+ * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
+ * Support ACPI interrupts with SCI only.
+
+Features not supported so far (to make it a complete ACPI solution):
+ * S3 (Suspend to RAM), S4 (Suspend to Disk).
+ * Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy interface.
+ * Install and boot Windows 8.1/10 from U-Boot with legacy interface.
+
+Features that are optional:
+ * ACPI global NVS support. We may need it to simplify ASL code logic if
+ utilizing NVS variables. Most likely we will need this sooner or later.
+ * Dynamic AML bytecodes insertion at run-time. We may need this to support
+ SSDT table generation and DSDT fix up.
+ * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
+ those legacy stuff into U-Boot. ACPI spec allows a system that does not
+ support SMI (a legacy-free system).
+
+So far ACPI is enabled on BayTrail based boards. Testing was done by booting
+a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
+correctly and the board can respond a reboot/shutdown command from Ubuntu.
TODO List
---------
- Audio
- Chrome OS verified boot
-- SMI and ACPI support, to provide platform info and facilities to Linux
References
----------
@@ -982,3 +1022,5 @@ References
[13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
[14] http://www.seabios.org/SeaBIOS
[15] doc/device-tree-bindings/misc/intel,irq-router.txt
+[16] http://www.acpi.info
+[17] https://www.acpica.org/downloads
--
1.8.2.1
^ permalink raw reply related [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
` (27 preceding siblings ...)
2016-05-07 14:46 ` [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support Bin Meng
@ 2016-05-07 18:45 ` Simon Glass
2016-05-08 1:27 ` Bin Meng
28 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:45 UTC (permalink / raw)
To: u-boot
Hi Bin,
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> This series introduces initial ACPI support for Intel BayTrail.
>
> Advanced Configuration and Power Interface (ACPI) aims to establish
> industry-standard interfaces enabling OS-directed configuration, power
> management, and thermal management of mobile, desktop, and server platforms.
>
> Linux can boot without ACPI with "acpi=off" command line parameter, but
> with ACPI the kernel gains the capabilities to handle power management.
> For Windows, ACPI is a must-have firmware feature since Windows Vista.
> CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
> U-Boot. This requires Intel ACPI compiler to be installed on your host to
> compile ACPI DSDT table written in ASL format to AML format. You can get
> the compiler via "apt-get install iasl" if you are on Ubuntu or download
> the source from acpica website to compile one by yourself.
>
> Current ACPI support in U-Boot is not complete. More features will be added
> in the future. The status as of today is:
>
> * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
> * Support one static DSDT table only, compiled by Intel ACPI compiler.
> * Support S0/S5, reboot and shutdown from OS.
> * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
> * Support ACPI interrupts with SCI only.
>
> Features not supported so far (to make it a complete ACPI solution):
> * S3 (Suspend to RAM), S4 (Suspend to Disk).
> * Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy interface.
> * Install and boot Windows 8.1/10 from U-Boot with legacy interface.
>
> Features that are optional:
> * ACPI global NVS support. We may need it to simplify ASL code logic if
> utilizing NVS variables. Most likely we will need this sooner or later.
> * Dynamic AML bytecodes insertion at run-time. We may need this to support
> SSDT table generation and DSDT fix up.
> * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
> those legacy stuff into U-Boot. ACPI spec allows a system that does not
> support SMI (a legacy-free system).
>
> So far ACPI is enabled on BayTrail based boards. Testing was done by booting
> a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
> correctly and the board can respond a reboot/shutdown command from Ubuntu.
It's great to see this - a big step forward!
A few general comments:
- when building, the Intel ACPI tools output some non-warning info -
can you quieten this down? It should not appear when 'make -s' is used
- is it OK to enable other tables along with ACPI? The docs seem to be
silent on this point
- for me Ubuntu does not offer an option in the GUI to restart...I can
do it from the command line. On my normal desktop I see a power button
in the top right. I wonder why this doesn't work on minnowmax?
>
> This series is available at u-boot-x86/acpi-working.
>
> Changes in v2:
> - Change to use IS_ENABLED()
> - Change commit subject per review comments
> - Update commit message to mention the reason of adding __packed
> - Update the commit message per review comments
> - Change 'orders' to 'order' in the commit subject
> - Correct wrong indention in acpi_create_madt_lapics()
> - Update several more places to use u32 in acpi_table.c
> - Add comments before the 64 byte alignment for FACS
> - New patch to clean up table header revisions
> - New patch to return table length in acpi_create_madt_lapics()
> - Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
> chipset serial ports
> - Fix SIO1 and SIO2 interrupt mapping in irqroute.h
> - Use existing macros in FADT whenever possible
> - Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
> for consistency, and make it static
> - Return table length in acpi_create_madt_irq_overrides() so that the
> code logic in acpi_fill_madt() looks consistent (eg: current += ...)
> - Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
> - Update ACPI support status in more details: what's supported,
> what's not supported, what's optional.
>
> Bin Meng (28):
> x86: Drop asm/acpi.h
> x86: Fix build warning in tables.c when CONFIG_SEABIOS
> x86: acpi: Fix compiler warnings in write_acpi_tables()
> x86: irq: Reserve IRQ9 for ACPI in PIC mode
> x86: irq: Enable SCI on IRQ9
> x86: dts: Update to include ACTL register details
> acpi: Change build log for ASL files
> acpi: Explicitly spell out dsdt.c in the make rule
> acpi: Specify U-Boot include path for ASL files
> acpi: Output all errors/warnings/remarks when compiling ASL
> x86: acpi: Remove unused codes
> x86: acpi: Various changes to acpi_table.h
> x86: acpi: Reorder code in acpi_table.h
> x86: acpi: Remove acpi_create_ssdt_generator()
> x86: acpi: Change fill_header()
> x86: acpi: Adjust order in acpi_table.c
> x86: acpi: Use u32 in table write routines
> x86: acpi: Align FACS table to a 64 byte boundary
> x86: acpi: Clean up table header revisions
> x86: acpi: Add some generic ASL libraries
> x86: acpi: Return table length in acpi_create_madt_lapics()
> x86: baytrail: Add platform ASL files
> x86: baytrail: Generate ACPI FADT/MADT tables
> x86: baytrail: Enable ACPI table generation for all boards
> x86: baytrail: Add .gitignore for ACPI enabled boards
> x86: Remove acpi=off boot parameter when ACPI is on
> x86: doc: Minor update for accuracy
> x86: doc: Document ACPI support
>
> arch/x86/cpu/baytrail/Makefile | 1 +
> arch/x86/cpu/baytrail/acpi.c | 163 +++++++
> arch/x86/cpu/irq.c | 30 ++
> arch/x86/cpu/ivybridge/lpc.c | 1 -
> arch/x86/cpu/ivybridge/model_206ax.c | 1 -
> arch/x86/cpu/ivybridge/northbridge.c | 1 -
> arch/x86/dts/bayleybay.dts | 1 +
> arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
> arch/x86/dts/crownbay.dts | 1 +
> arch/x86/dts/galileo.dts | 1 +
> arch/x86/dts/minnowmax.dts | 1 +
> arch/x86/dts/qemu-x86_q35.dts | 2 +
> arch/x86/include/asm/acpi.h | 24 -
> arch/x86/include/asm/acpi/debug.asl | 136 ++++++
> arch/x86/include/asm/acpi/globutil.asl | 113 +++++
> arch/x86/include/asm/acpi/statdef.asl | 82 ++++
> arch/x86/include/asm/acpi_table.h | 443 ++++++++-----------
> .../include/asm/arch-baytrail/acpi/irq_helper.h | 111 +++++
> .../include/asm/arch-baytrail/acpi/irqlinks.asl | 489 +++++++++++++++++++++
> .../include/asm/arch-baytrail/acpi/irqroute.asl | 48 ++
> arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | 27 ++
> arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 121 +++++
> .../include/asm/arch-baytrail/acpi/platform.asl | 33 ++
> .../include/asm/arch-baytrail/acpi/sleepstates.asl | 13 +
> .../asm/arch-baytrail/acpi/southcluster.asl | 211 +++++++++
> arch/x86/include/asm/arch-baytrail/acpi/usb.asl | 34 ++
> arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | 31 ++
> arch/x86/include/asm/arch-baytrail/device.h | 74 ++++
> arch/x86/include/asm/arch-baytrail/iomap.h | 70 +++
> arch/x86/include/asm/arch-baytrail/irq.h | 86 ++++
> arch/x86/include/asm/irq.h | 4 +
> arch/x86/lib/acpi_table.c | 342 +++++++-------
> arch/x86/lib/tables.c | 1 +
> board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +
> board/congatec/conga-qeval20-qa3-e3845/Makefile | 1 +
> .../conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +
> board/congatec/conga-qeval20-qa3-e3845/dsdt.asl | 14 +
> board/intel/bayleybay/.gitignore | 3 +
> board/intel/bayleybay/Makefile | 1 +
> board/intel/bayleybay/acpi/mainboard.asl | 11 +
> board/intel/bayleybay/dsdt.asl | 14 +
> board/intel/minnowmax/.gitignore | 3 +
> board/intel/minnowmax/Makefile | 1 +
> board/intel/minnowmax/acpi/mainboard.asl | 11 +
> board/intel/minnowmax/dsdt.asl | 14 +
> configs/bayleybay_defconfig | 1 +
> configs/conga-qeval20-qa3-e3845_defconfig | 1 +
> configs/minnowmax_defconfig | 1 +
> doc/README.x86 | 85 +++-
> doc/device-tree-bindings/misc/intel,irq-router.txt | 5 +
> include/configs/x86-common.h | 9 +-
> scripts/Makefile.lib | 8 +-
> 52 files changed, 2388 insertions(+), 508 deletions(-)
> create mode 100644 arch/x86/cpu/baytrail/acpi.c
> delete mode 100644 arch/x86/include/asm/acpi.h
> create mode 100644 arch/x86/include/asm/acpi/debug.asl
> create mode 100644 arch/x86/include/asm/acpi/globutil.asl
> create mode 100644 arch/x86/include/asm/acpi/statdef.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h
> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
> create mode 100644 board/intel/bayleybay/.gitignore
> create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
> create mode 100644 board/intel/bayleybay/dsdt.asl
> create mode 100644 board/intel/minnowmax/.gitignore
> create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
> create mode 100644 board/intel/minnowmax/dsdt.asl
>
> --
> 1.8.2.1
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h
2016-05-07 14:46 ` [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h Bin Meng
@ 2016-05-07 18:45 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:45 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Remove asm/acpi.h which is never used.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/ivybridge/lpc.c | 1 -
> arch/x86/cpu/ivybridge/model_206ax.c | 1 -
> arch/x86/cpu/ivybridge/northbridge.c | 1 -
> arch/x86/include/asm/acpi.h | 24 ------------------------
> 4 files changed, 27 deletions(-)
> delete mode 100644 arch/x86/include/asm/acpi.h
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS
2016-05-07 14:46 ` [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> The following build warning is seen in tables.c:
>
> warning: implicit declaration of function 'memalign'
>
> Add the missing header file to fix it.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/lib/tables.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables()
2016-05-07 14:46 ` [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables() Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Fix the following two build warnings in function 'write_acpi_tables':
>
> warning: format '%lx' expects argument of type 'long unsigned int',
> but argument 2 has type 'u32' [-Wformat=]
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/lib/acpi_table.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
(nit - you could remove the period in 'Writing ACPI tables')
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode
2016-05-07 14:46 ` [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Reserve IRQ9 which is to be used as SCI interrupt number
> for ACPI in PIC mode.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
>
> ---
>
> Changes in v2:
> - Change to use IS_ENABLED()
>
> arch/x86/cpu/irq.c | 5 +++++
> 1 file changed, 5 insertions(+)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details
2016-05-07 14:46 ` [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> This updates all x86 boards that currently have IRQ router in the
> dts files to include ACTL register details.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/dts/bayleybay.dts | 1 +
> arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
> arch/x86/dts/crownbay.dts | 1 +
> arch/x86/dts/galileo.dts | 1 +
> arch/x86/dts/minnowmax.dts | 1 +
> arch/x86/dts/qemu-x86_q35.dts | 2 ++
> 6 files changed, 7 insertions(+)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files
2016-05-07 14:46 ` [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Currently when compiling U-Boot with ASL file, the build log says:
>
> ASL board/intel/bayleybay/dsdt.c
>
> This looks odd as ASL compiler's input is ASL file, not C file.
> Change the make rule to use >lt; instead.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> scripts/Makefile.lib | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule
2016-05-07 14:46 ` [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Currently the make rule for dsdt.c uses a wildcard, as below:
>
> $(obj)/%.c: $(src)/%.asl
>
> To avoid any side effect, explicitly mention dsdt.c as this is
> the file we intend to use for ACPI DSDT AML generation.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> scripts/Makefile.lib | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files
2016-05-07 14:46 ` [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> It will be much easier if we split the whole dsdt.asl file into
> multiple smaller ASL parts and have access to U-Boot include files.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> scripts/Makefile.lib | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL
2016-05-07 14:46 ` [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Remove -va option when invoking IASL compiler so that we can see
> errors/warnings/remarks in the build log.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> scripts/Makefile.lib | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
But note that a 'make -s' build without V=1 should not print output in
normal operation.
- Simon
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes
2016-05-07 14:46 ` [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> - Remove #include <> header files.
> - Remove APM_CNT register defines, which should not be here as
> they are SMI related.
> - Remove MP_IRQ_ defines as they are duplicates of the same ones
> in asm/mpspec.h.
> - Remove ACTL register defines, which should not be here as they
> are chipset specific.
> - Remove functional fixed hardware defines, which are not used.
> - Remove dev_scope related defines, which are not used.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
>
> ---
>
> Changes in v2:
> - Change commit subject per review comments
>
> arch/x86/include/asm/acpi_table.h | 68 ---------------------------------------
> 1 file changed, 68 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h
2016-05-07 14:46 ` [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> - Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
> - Do not typedef acpi_header_t, instead use struct acpi_table_hader.
> - Use a shorter name aslc_id and aslc-revision.
> - Change MCFG base address to use 32-bit value pairs (_l and _h).
> - Apply ACPI_APIC_ prefix to MADT APIC type macros and make
> their names to be more readable.
> - Apply __packed to struct acpi_madt_irqoverride and struct
> acpi_madt_lapic_nmi tables, as they are not naturally aligned
> by the compiler which leads to wrong sizeof(struct).
> - Rename model to res1 as it is reserved after ACPI spec 1.0.
> - Apply ACPI_ prefix to the PM profile macros and change them
> to enum.
> - Add ospm_flags to FACS structure which is defined since ACPI 4.0.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
>
> ---
>
> Changes in v2:
> - Update commit message to mention the reason of adding __packed
>
> arch/x86/include/asm/acpi_table.h | 72 +++++++++++++++++++++------------------
> arch/x86/lib/acpi_table.c | 71 ++++++++++++++++++++------------------
> 2 files changed, 75 insertions(+), 68 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h
2016-05-07 14:46 ` [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Reorder the ACPI tables appearance by following the order:
> RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
> table flag defines accordingly.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
>
> ---
>
> Changes in v2:
> - Update the commit message per review comments
>
> arch/x86/include/asm/acpi_table.h | 347 +++++++++++++++++++-------------------
> 1 file changed, 169 insertions(+), 178 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator()
2016-05-07 14:46 ` [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator() Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> This acpi_create_ssdt_generator() currently does nothing.
> Remove this for now.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/include/asm/acpi_table.h | 3 ---
> arch/x86/lib/acpi_table.c | 33 ---------------------------------
> 2 files changed, 36 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header()
2016-05-07 14:46 ` [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header() Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Rename fill_header() to acpi_fill_header() for consistency.
> Change its signature to remove the 'length' parameter and
> make it a public API.
>
> Also remove the unnecessary include files, and improve the
> AmlCode[] comment a little bit.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/include/asm/acpi_table.h | 1 +
> arch/x86/lib/acpi_table.c | 22 ++++++++--------------
> 2 files changed, 9 insertions(+), 14 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c
2016-05-07 14:46 ` [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Rearrange the routine order a little bit, to follow the order
> in which ACPI table is defined in acpi_table.h.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2:
> - Change 'orders' to 'order' in the commit subject
> - Correct wrong indention in acpi_create_madt_lapics()
>
> arch/x86/include/asm/acpi_table.h | 14 +--
> arch/x86/lib/acpi_table.c | 236 +++++++++++++++++++-------------------
> 2 files changed, 126 insertions(+), 124 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines
2016-05-07 14:46 ` [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 4:26 ` Bin Meng
2016-05-08 8:18 ` Bin Meng
0 siblings, 2 replies; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Use u32 instead of unsigned long in the table write routines, as
> other routines do.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Update several more places to use u32 in acpi_table.c
>
> arch/x86/include/asm/acpi_table.h | 4 ++--
> arch/x86/lib/acpi_table.c | 14 +++++++-------
> 2 files changed, 9 insertions(+), 9 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
I guess this will be 32-bit even if U-Boot is built for 64-bit mode?
- Simon
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary
2016-05-07 14:46 ` [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary Bin Meng
@ 2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:46 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Per ACPI spec, the FACS table address must be aligned to a 64 byte
> boundary (Windows checks this, but Linux does not).
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
>
> ---
>
> Changes in v2:
> - Add comments before the 64 byte alignment for FACS
>
> arch/x86/lib/acpi_table.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions
2016-05-07 14:46 ` [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> The comment of initializing table header revision says:
>
> /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
>
> which might mislead it may increase per ACPI spec revision.
> However this is not the case. It's actually a fixed number
> as defined in ACPI spec, and in the laest ACPI spec 6.1,
> some table header revisions are still 1. Clean these up.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - New patch to clean up table header revisions
>
> arch/x86/include/asm/acpi_table.h | 6 ------
> arch/x86/lib/acpi_table.c | 16 ++++------------
> 2 files changed, 4 insertions(+), 18 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries
2016-05-07 14:46 ` [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> This adds several generic ASL libraries that can be included by
> other ASL files, which are:
>
> - debug.asl: for debug output using POST I/O port and legacy serial port
> - globutil.asl: for string compare routines
> - statdef.asl: for _STA status values
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> arch/x86/include/asm/acpi/debug.asl | 136 +++++++++++++++++++++++++++++++++
> arch/x86/include/asm/acpi/globutil.asl | 113 +++++++++++++++++++++++++++
> arch/x86/include/asm/acpi/statdef.asl | 82 ++++++++++++++++++++
> 3 files changed, 331 insertions(+)
> create mode 100644 arch/x86/include/asm/acpi/debug.asl
> create mode 100644 arch/x86/include/asm/acpi/globutil.asl
> create mode 100644 arch/x86/include/asm/acpi/statdef.asl
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics()
2016-05-07 14:46 ` [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics() Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Like other MADT table write routines, make acpi_create_madt_lapics()
> return how many bytes it has written instead of the table end addr.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - New patch to return table length in acpi_create_madt_lapics()
>
> arch/x86/include/asm/acpi_table.h | 2 +-
> arch/x86/lib/acpi_table.c | 8 +++++---
> 2 files changed, 6 insertions(+), 4 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files
2016-05-07 14:46 ` [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> This adds basic BayTrail platform ASL files. They are intended to be
> included in dsdt.asl of any board that is based on this platform.
>
> Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
> now. They will be added in the future.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
> chipset serial ports
> - Fix SIO1 and SIO2 interrupt mapping in irqroute.h
>
> .../include/asm/arch-baytrail/acpi/irq_helper.h | 111 +++++
> .../include/asm/arch-baytrail/acpi/irqlinks.asl | 489 +++++++++++++++++++++
> .../include/asm/arch-baytrail/acpi/irqroute.asl | 48 ++
> arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | 27 ++
> arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 121 +++++
> .../include/asm/arch-baytrail/acpi/platform.asl | 33 ++
> .../include/asm/arch-baytrail/acpi/sleepstates.asl | 13 +
> .../asm/arch-baytrail/acpi/southcluster.asl | 211 +++++++++
> arch/x86/include/asm/arch-baytrail/acpi/usb.asl | 34 ++
> arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | 31 ++
> arch/x86/include/asm/arch-baytrail/device.h | 74 ++++
> arch/x86/include/asm/arch-baytrail/iomap.h | 70 +++
> arch/x86/include/asm/arch-baytrail/irq.h | 86 ++++
> 13 files changed, 1348 insertions(+)
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
> create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
> create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables
2016-05-07 14:46 ` [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> FADT/MADT tables are platform specific. Generate them for BayTrail.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Use existing macros in FADT whenever possible
> - Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
> for consistency, and make it static
> - Return table length in acpi_create_madt_irq_overrides() so that the
> code logic in acpi_fill_madt() looks consistent (eg: current += ...)
>
> arch/x86/cpu/baytrail/Makefile | 1 +
> arch/x86/cpu/baytrail/acpi.c | 163 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 164 insertions(+)
> create mode 100644 arch/x86/cpu/baytrail/acpi.c
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards
2016-05-07 14:46 ` [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Enable ACPI table generation by creating a DSDT table for all baytrail
> boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> board/congatec/conga-qeval20-qa3-e3845/Makefile | 1 +
> board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +++++++++++++
> board/congatec/conga-qeval20-qa3-e3845/dsdt.asl | 14 ++++++++++++++
> board/intel/bayleybay/Makefile | 1 +
> board/intel/bayleybay/acpi/mainboard.asl | 11 +++++++++++
> board/intel/bayleybay/dsdt.asl | 14 ++++++++++++++
> board/intel/minnowmax/Makefile | 1 +
> board/intel/minnowmax/acpi/mainboard.asl | 11 +++++++++++
> board/intel/minnowmax/dsdt.asl | 14 ++++++++++++++
> configs/bayleybay_defconfig | 1 +
> configs/conga-qeval20-qa3-e3845_defconfig | 1 +
> configs/minnowmax_defconfig | 1 +
> 12 files changed, 83 insertions(+)
> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
> create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
> create mode 100644 board/intel/bayleybay/dsdt.asl
> create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
> create mode 100644 board/intel/minnowmax/dsdt.asl
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards
2016-05-07 14:46 ` [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +++
> board/intel/bayleybay/.gitignore | 3 +++
> board/intel/minnowmax/.gitignore | 3 +++
> 3 files changed, 9 insertions(+)
> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
> create mode 100644 board/intel/bayleybay/.gitignore
> create mode 100644 board/intel/minnowmax/.gitignore
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on
2016-05-07 14:46 ` [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Remove the kernel boot parameter acpi=off so that kernel can turn on
> ACPI support.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v2: None
>
> include/configs/x86-common.h | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy
2016-05-07 14:46 ` [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> This updates the doc for the following places:
> - Mention CRB for Bayley Bay
> - Mention Congatec QEVAL 2.0 & conga-QA3/E3845
> - Limit part of the QEMU paragraphs to 80 cols
> - Correct some typos (drive, it's, Ubuntu)
> - Add description for "console=ttyS0,115200"
> - Remove CONFIG_BOOTDELAY description which is already
> in x86-common.h
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
>
> ---
>
> Changes in v2:
> - Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
>
> doc/README.x86 | 41 ++++++++++++++++++-----------------------
> 1 file changed, 18 insertions(+), 23 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support
2016-05-07 14:46 ` [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support Bin Meng
@ 2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
0 siblings, 1 reply; 87+ messages in thread
From: Simon Glass @ 2016-05-07 18:47 UTC (permalink / raw)
To: u-boot
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
> Remove ACPI from the TODO list and add a new section to document
> current ACPI support in U-Boot.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Update ACPI support status in more details: what's supported,
> what's not supported, what's optional.
>
> doc/README.x86 | 44 +++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 43 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail
2016-05-07 18:45 ` [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Simon Glass
@ 2016-05-08 1:27 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 1:27 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Sun, May 8, 2016 at 2:45 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This series introduces initial ACPI support for Intel BayTrail.
>>
>> Advanced Configuration and Power Interface (ACPI) aims to establish
>> industry-standard interfaces enabling OS-directed configuration, power
>> management, and thermal management of mobile, desktop, and server platforms.
>>
>> Linux can boot without ACPI with "acpi=off" command line parameter, but
>> with ACPI the kernel gains the capabilities to handle power management.
>> For Windows, ACPI is a must-have firmware feature since Windows Vista.
>> CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
>> U-Boot. This requires Intel ACPI compiler to be installed on your host to
>> compile ACPI DSDT table written in ASL format to AML format. You can get
>> the compiler via "apt-get install iasl" if you are on Ubuntu or download
>> the source from acpica website to compile one by yourself.
>>
>> Current ACPI support in U-Boot is not complete. More features will be added
>> in the future. The status as of today is:
>>
>> * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
>> * Support one static DSDT table only, compiled by Intel ACPI compiler.
>> * Support S0/S5, reboot and shutdown from OS.
>> * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
>> * Support ACPI interrupts with SCI only.
>>
>> Features not supported so far (to make it a complete ACPI solution):
>> * S3 (Suspend to RAM), S4 (Suspend to Disk).
>> * Install and boot Ubuntu 14.04 (or above) from U-Boot with legacy interface.
>> * Install and boot Windows 8.1/10 from U-Boot with legacy interface.
>>
>> Features that are optional:
>> * ACPI global NVS support. We may need it to simplify ASL code logic if
>> utilizing NVS variables. Most likely we will need this sooner or later.
>> * Dynamic AML bytecodes insertion at run-time. We may need this to support
>> SSDT table generation and DSDT fix up.
>> * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
>> those legacy stuff into U-Boot. ACPI spec allows a system that does not
>> support SMI (a legacy-free system).
>>
>> So far ACPI is enabled on BayTrail based boards. Testing was done by booting
>> a pre-installed Ubuntu 14.04 from a SATA drive. Most devices seem to work
>> correctly and the board can respond a reboot/shutdown command from Ubuntu.
>
> It's great to see this - a big step forward!
>
Thanks for the review.
> A few general comments:
> - when building, the Intel ACPI tools output some non-warning info -
> can you quieten this down? It should not appear when 'make -s' is used
Sure.
> - is it OK to enable other tables along with ACPI? The docs seem to be
> silent on this point
I believe other tables are optional, as Linux can boot now. But maybe
there are some tables that Windows need. I will continue working on
this.
> - for me Ubuntu does not offer an option in the GUI to restart...I can
> do it from the command line. On my normal desktop I see a power button
> in the top right. I wonder why this doesn't work on minnowmax?
>
Maybe there are some issues with your installation? I can see a power
button in the top right on my minnowmax. I installed Ubuntun 14.04.4
64-bit OS (http://releases.ubuntu.com/14.04/ubuntu-14.04.4-desktop-amd64.iso)
with the original UEFI BIOS on the board.
[snip]
Regards,
Bin
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 4:26 ` Bin Meng
2016-05-08 8:18 ` Bin Meng
1 sibling, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 4:26 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Use u32 instead of unsigned long in the table write routines, as
>> other routines do.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Update several more places to use u32 in acpi_table.c
>>
>> arch/x86/include/asm/acpi_table.h | 4 ++--
>> arch/x86/lib/acpi_table.c | 14 +++++++-------
>> 2 files changed, 9 insertions(+), 9 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> I guess this will be 32-bit even if U-Boot is built for 64-bit mode?
>
Yes, as all pointers are below 4G with our current implementation.
Regards,
Bin
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h
2016-05-07 18:45 ` Simon Glass
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:45 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Remove asm/acpi.h which is never used.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/cpu/ivybridge/lpc.c | 1 -
>> arch/x86/cpu/ivybridge/model_206ax.c | 1 -
>> arch/x86/cpu/ivybridge/northbridge.c | 1 -
>> arch/x86/include/asm/acpi.h | 24 ------------------------
>> 4 files changed, 27 deletions(-)
>> delete mode 100644 arch/x86/include/asm/acpi.h
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> The following build warning is seen in tables.c:
>>
>> warning: implicit declaration of function 'memalign'
>>
>> Add the missing header file to fix it.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/lib/tables.c | 1 +
>> 1 file changed, 1 insertion(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables()
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Fix the following two build warnings in function 'write_acpi_tables':
>>
>> warning: format '%lx' expects argument of type 'long unsigned int',
>> but argument 2 has type 'u32' [-Wformat=]
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/lib/acpi_table.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> (nit - you could remove the period in 'Writing ACPI tables')
Fixed nits and
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Reserve IRQ9 which is to be used as SCI interrupt number
>> for ACPI in PIC mode.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>>
>> ---
>>
>> Changes in v2:
>> - Change to use IS_ENABLED()
>>
>> arch/x86/cpu/irq.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 05/28] x86: irq: Enable SCI on IRQ9
2016-05-07 14:46 ` [U-Boot] [PATCH v2 05/28] x86: irq: Enable SCI on IRQ9 Bin Meng
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sat, May 7, 2016 at 10:46 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> By default SCI is disabled after power on. ACTL is the register to
> enable SCI and route it to PIC/APIC. To support both ACPI in PIC
> mode and APIC mode, configure SCI to use IRQ9.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Tested-by: Stefan Roese <sr@denx.de>
> ---
Change to use IS_ENABLED() and remove the #ifdef around the function body, and
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This updates all x86 boards that currently have IRQ router in the
>> dts files to include ACTL register details.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/dts/bayleybay.dts | 1 +
>> arch/x86/dts/conga-qeval20-qa3-e3845.dts | 1 +
>> arch/x86/dts/crownbay.dts | 1 +
>> arch/x86/dts/galileo.dts | 1 +
>> arch/x86/dts/minnowmax.dts | 1 +
>> arch/x86/dts/qemu-x86_q35.dts | 2 ++
>> 6 files changed, 7 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:17 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:17 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Currently when compiling U-Boot with ASL file, the build log says:
>>
>> ASL board/intel/bayleybay/dsdt.c
>>
>> This looks odd as ASL compiler's input is ASL file, not C file.
>> Change the make rule to use >lt; instead.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> scripts/Makefile.lib | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Currently the make rule for dsdt.c uses a wildcard, as below:
>>
>> $(obj)/%.c: $(src)/%.asl
>>
>> To avoid any side effect, explicitly mention dsdt.c as this is
>> the file we intend to use for ACPI DSDT AML generation.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> scripts/Makefile.lib | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> It will be much easier if we split the whole dsdt.asl file into
>> multiple smaller ASL parts and have access to U-Boot include files.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> scripts/Makefile.lib | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Remove -va option when invoking IASL compiler so that we can see
>> errors/warnings/remarks in the build log.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> scripts/Makefile.lib | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> But note that a 'make -s' build without V=1 should not print output in
> normal operation.
>
> - Simon
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> - Remove #include <> header files.
>> - Remove APM_CNT register defines, which should not be here as
>> they are SMI related.
>> - Remove MP_IRQ_ defines as they are duplicates of the same ones
>> in asm/mpspec.h.
>> - Remove ACTL register defines, which should not be here as they
>> are chipset specific.
>> - Remove functional fixed hardware defines, which are not used.
>> - Remove dev_scope related defines, which are not used.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>>
>> ---
>>
>> Changes in v2:
>> - Change commit subject per review comments
>>
>> arch/x86/include/asm/acpi_table.h | 68 ---------------------------------------
>> 1 file changed, 68 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> - Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
>> - Do not typedef acpi_header_t, instead use struct acpi_table_hader.
>> - Use a shorter name aslc_id and aslc-revision.
>> - Change MCFG base address to use 32-bit value pairs (_l and _h).
>> - Apply ACPI_APIC_ prefix to MADT APIC type macros and make
>> their names to be more readable.
>> - Apply __packed to struct acpi_madt_irqoverride and struct
>> acpi_madt_lapic_nmi tables, as they are not naturally aligned
>> by the compiler which leads to wrong sizeof(struct).
>> - Rename model to res1 as it is reserved after ACPI spec 1.0.
>> - Apply ACPI_ prefix to the PM profile macros and change them
>> to enum.
>> - Add ospm_flags to FACS structure which is defined since ACPI 4.0.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>>
>> ---
>>
>> Changes in v2:
>> - Update commit message to mention the reason of adding __packed
>>
>> arch/x86/include/asm/acpi_table.h | 72 +++++++++++++++++++++------------------
>> arch/x86/lib/acpi_table.c | 71 ++++++++++++++++++++------------------
>> 2 files changed, 75 insertions(+), 68 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Reorder the ACPI tables appearance by following the order:
>> RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
>> table flag defines accordingly.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>>
>> ---
>>
>> Changes in v2:
>> - Update the commit message per review comments
>>
>> arch/x86/include/asm/acpi_table.h | 347 +++++++++++++++++++-------------------
>> 1 file changed, 169 insertions(+), 178 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator()
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This acpi_create_ssdt_generator() currently does nothing.
>> Remove this for now.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/include/asm/acpi_table.h | 3 ---
>> arch/x86/lib/acpi_table.c | 33 ---------------------------------
>> 2 files changed, 36 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header()
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Rename fill_header() to acpi_fill_header() for consistency.
>> Change its signature to remove the 'length' parameter and
>> make it a public API.
>>
>> Also remove the unnecessary include files, and improve the
>> AmlCode[] comment a little bit.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/include/asm/acpi_table.h | 1 +
>> arch/x86/lib/acpi_table.c | 22 ++++++++--------------
>> 2 files changed, 9 insertions(+), 14 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Rearrange the routine order a little bit, to follow the order
>> in which ACPI table is defined in acpi_table.h.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2:
>> - Change 'orders' to 'order' in the commit subject
>> - Correct wrong indention in acpi_create_madt_lapics()
>>
>> arch/x86/include/asm/acpi_table.h | 14 +--
>> arch/x86/lib/acpi_table.c | 236 +++++++++++++++++++-------------------
>> 2 files changed, 126 insertions(+), 124 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines
2016-05-07 18:46 ` Simon Glass
2016-05-08 4:26 ` Bin Meng
@ 2016-05-08 8:18 ` Bin Meng
1 sibling, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Use u32 instead of unsigned long in the table write routines, as
>> other routines do.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Update several more places to use u32 in acpi_table.c
>>
>> arch/x86/include/asm/acpi_table.h | 4 ++--
>> arch/x86/lib/acpi_table.c | 14 +++++++-------
>> 2 files changed, 9 insertions(+), 9 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary
2016-05-07 18:46 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Per ACPI spec, the FACS table address must be aligned to a 64 byte
>> boundary (Windows checks this, but Linux does not).
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>>
>> ---
>>
>> Changes in v2:
>> - Add comments before the 64 byte alignment for FACS
>>
>> arch/x86/lib/acpi_table.c | 6 +++++-
>> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> The comment of initializing table header revision says:
>>
>> /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
>>
>> which might mislead it may increase per ACPI spec revision.
>> However this is not the case. It's actually a fixed number
>> as defined in ACPI spec, and in the laest ACPI spec 6.1,
>> some table header revisions are still 1. Clean these up.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - New patch to clean up table header revisions
>>
>> arch/x86/include/asm/acpi_table.h | 6 ------
>> arch/x86/lib/acpi_table.c | 16 ++++------------
>> 2 files changed, 4 insertions(+), 18 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:18 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:18 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This adds several generic ASL libraries that can be included by
>> other ASL files, which are:
>>
>> - debug.asl: for debug output using POST I/O port and legacy serial port
>> - globutil.asl: for string compare routines
>> - statdef.asl: for _STA status values
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> arch/x86/include/asm/acpi/debug.asl | 136 +++++++++++++++++++++++++++++++++
>> arch/x86/include/asm/acpi/globutil.asl | 113 +++++++++++++++++++++++++++
>> arch/x86/include/asm/acpi/statdef.asl | 82 ++++++++++++++++++++
>> 3 files changed, 331 insertions(+)
>> create mode 100644 arch/x86/include/asm/acpi/debug.asl
>> create mode 100644 arch/x86/include/asm/acpi/globutil.asl
>> create mode 100644 arch/x86/include/asm/acpi/statdef.asl
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics()
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Like other MADT table write routines, make acpi_create_madt_lapics()
>> return how many bytes it has written instead of the table end addr.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - New patch to return table length in acpi_create_madt_lapics()
>>
>> arch/x86/include/asm/acpi_table.h | 2 +-
>> arch/x86/lib/acpi_table.c | 8 +++++---
>> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This adds basic BayTrail platform ASL files. They are intended to be
>> included in dsdt.asl of any board that is based on this platform.
>>
>> Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
>> now. They will be added in the future.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Reserve IRQ3 and IRQ4 in the IRQ links to support external SuperIO
>> chipset serial ports
>> - Fix SIO1 and SIO2 interrupt mapping in irqroute.h
>>
>> .../include/asm/arch-baytrail/acpi/irq_helper.h | 111 +++++
>> .../include/asm/arch-baytrail/acpi/irqlinks.asl | 489 +++++++++++++++++++++
>> .../include/asm/arch-baytrail/acpi/irqroute.asl | 48 ++
>> arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | 27 ++
>> arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 121 +++++
>> .../include/asm/arch-baytrail/acpi/platform.asl | 33 ++
>> .../include/asm/arch-baytrail/acpi/sleepstates.asl | 13 +
>> .../asm/arch-baytrail/acpi/southcluster.asl | 211 +++++++++
>> arch/x86/include/asm/arch-baytrail/acpi/usb.asl | 34 ++
>> arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | 31 ++
>> arch/x86/include/asm/arch-baytrail/device.h | 74 ++++
>> arch/x86/include/asm/arch-baytrail/iomap.h | 70 +++
>> arch/x86/include/asm/arch-baytrail/irq.h | 86 ++++
>> 13 files changed, 1348 insertions(+)
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irq_helper.h
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqlinks.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/irqroute.h
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/platform.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/sleepstates.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/usb.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/acpi/xhci.asl
>> create mode 100644 arch/x86/include/asm/arch-baytrail/device.h
>> create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h
>> create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h
>
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> FADT/MADT tables are platform specific. Generate them for BayTrail.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Use existing macros in FADT whenever possible
>> - Rename acpi_madt_irq_overrides() to acpi_create_madt_irq_overrides()
>> for consistency, and make it static
>> - Return table length in acpi_create_madt_irq_overrides() so that the
>> code logic in acpi_fill_madt() looks consistent (eg: current += ...)
>>
>> arch/x86/cpu/baytrail/Makefile | 1 +
>> arch/x86/cpu/baytrail/acpi.c | 163 +++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 164 insertions(+)
>> create mode 100644 arch/x86/cpu/baytrail/acpi.c
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Enable ACPI table generation by creating a DSDT table for all baytrail
>> boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> board/congatec/conga-qeval20-qa3-e3845/Makefile | 1 +
>> board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl | 13 +++++++++++++
>> board/congatec/conga-qeval20-qa3-e3845/dsdt.asl | 14 ++++++++++++++
>> board/intel/bayleybay/Makefile | 1 +
>> board/intel/bayleybay/acpi/mainboard.asl | 11 +++++++++++
>> board/intel/bayleybay/dsdt.asl | 14 ++++++++++++++
>> board/intel/minnowmax/Makefile | 1 +
>> board/intel/minnowmax/acpi/mainboard.asl | 11 +++++++++++
>> board/intel/minnowmax/dsdt.asl | 14 ++++++++++++++
>> configs/bayleybay_defconfig | 1 +
>> configs/conga-qeval20-qa3-e3845_defconfig | 1 +
>> configs/minnowmax_defconfig | 1 +
>> 12 files changed, 83 insertions(+)
>> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
>> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
>> create mode 100644 board/intel/bayleybay/acpi/mainboard.asl
>> create mode 100644 board/intel/bayleybay/dsdt.asl
>> create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
>> create mode 100644 board/intel/minnowmax/dsdt.asl
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> board/congatec/conga-qeval20-qa3-e3845/.gitignore | 3 +++
>> board/intel/bayleybay/.gitignore | 3 +++
>> board/intel/minnowmax/.gitignore | 3 +++
>> 3 files changed, 9 insertions(+)
>> create mode 100644 board/congatec/conga-qeval20-qa3-e3845/.gitignore
>> create mode 100644 board/intel/bayleybay/.gitignore
>> create mode 100644 board/intel/minnowmax/.gitignore
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Remove the kernel boot parameter acpi=off so that kernel can turn on
>> ACPI support.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v2: None
>>
>> include/configs/x86-common.h | 9 +++++++--
>> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This updates the doc for the following places:
>> - Mention CRB for Bayley Bay
>> - Mention Congatec QEVAL 2.0 & conga-QA3/E3845
>> - Limit part of the QEMU paragraphs to 80 cols
>> - Correct some typos (drive, it's, Ubuntu)
>> - Add description for "console=ttyS0,115200"
>> - Remove CONFIG_BOOTDELAY description which is already
>> in x86-common.h
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Reviewed-by: Stefan Roese <sr@denx.de>
>> Tested-by: Stefan Roese <sr@denx.de>
>>
>> ---
>>
>> Changes in v2:
>> - Update support board list, adding Congatec QEVAL 2.0 & conga-QA3/E3845
>>
>> doc/README.x86 | 41 ++++++++++++++++++-----------------------
>> 1 file changed, 18 insertions(+), 23 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
* [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support
2016-05-07 18:47 ` Simon Glass
@ 2016-05-08 8:19 ` Bin Meng
0 siblings, 0 replies; 87+ messages in thread
From: Bin Meng @ 2016-05-08 8:19 UTC (permalink / raw)
To: u-boot
On Sun, May 8, 2016 at 2:47 AM, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Remove ACPI from the TODO list and add a new section to document
>> current ACPI support in U-Boot.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Update ACPI support status in more details: what's supported,
>> what's not supported, what's optional.
>>
>> doc/README.x86 | 44 +++++++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 43 insertions(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
applied to u-boot-x86/next, thanks!
^ permalink raw reply [flat|nested] 87+ messages in thread
end of thread, other threads:[~2016-05-08 8:19 UTC | newest]
Thread overview: 87+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-05-07 14:46 [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 01/28] x86: Drop asm/acpi.h Bin Meng
2016-05-07 18:45 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 02/28] x86: Fix build warning in tables.c when CONFIG_SEABIOS Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 03/28] x86: acpi: Fix compiler warnings in write_acpi_tables() Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 04/28] x86: irq: Reserve IRQ9 for ACPI in PIC mode Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 05/28] x86: irq: Enable SCI on IRQ9 Bin Meng
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 06/28] x86: dts: Update to include ACTL register details Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 07/28] acpi: Change build log for ASL files Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:17 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 08/28] acpi: Explicitly spell out dsdt.c in the make rule Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 09/28] acpi: Specify U-Boot include path for ASL files Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 10/28] acpi: Output all errors/warnings/remarks when compiling ASL Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 11/28] x86: acpi: Remove unused codes Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 12/28] x86: acpi: Various changes to acpi_table.h Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 13/28] x86: acpi: Reorder code in acpi_table.h Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 14/28] x86: acpi: Remove acpi_create_ssdt_generator() Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 15/28] x86: acpi: Change fill_header() Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 16/28] x86: acpi: Adjust order in acpi_table.c Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 17/28] x86: acpi: Use u32 in table write routines Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 4:26 ` Bin Meng
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 18/28] x86: acpi: Align FACS table to a 64 byte boundary Bin Meng
2016-05-07 18:46 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 19/28] x86: acpi: Clean up table header revisions Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 20/28] x86: acpi: Add some generic ASL libraries Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:18 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 21/28] x86: acpi: Return table length in acpi_create_madt_lapics() Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 22/28] x86: baytrail: Add platform ASL files Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 23/28] x86: baytrail: Generate ACPI FADT/MADT tables Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 24/28] x86: baytrail: Enable ACPI table generation for all boards Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 25/28] x86: baytrail: Add .gitignore for ACPI enabled boards Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 26/28] x86: Remove acpi=off boot parameter when ACPI is on Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 27/28] x86: doc: Minor update for accuracy Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 14:46 ` [U-Boot] [PATCH v2 28/28] x86: doc: Document ACPI support Bin Meng
2016-05-07 18:47 ` Simon Glass
2016-05-08 8:19 ` Bin Meng
2016-05-07 18:45 ` [U-Boot] [PATCH v2 00/28] x86: Initial ACPI support for Intel BayTrail Simon Glass
2016-05-08 1:27 ` Bin Meng
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