All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 1/2] serial: Add riscv_sbi console support
@ 2020-05-20  5:33 Kongou Hikari
  2020-05-20  5:33 ` [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support Kongou Hikari
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Kongou Hikari @ 2020-05-20  5:33 UTC (permalink / raw)
  To: u-boot

  - This patch supports debug serial and console from SBI syscall.

Signed-off-by: Kongou Hikari <hikari@nucleisys.com>
---
 drivers/serial/Kconfig            |  17 +++++
 drivers/serial/Makefile           |   1 +
 drivers/serial/serial_riscv_sbi.c | 104 ++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/serial/serial_riscv_sbi.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 90e3983170..60dcf9bc9a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -388,12 +388,20 @@ config DEBUG_UART_MTK
 	  driver will be available until the real driver model serial is
 	  running.
 
+
+config DEBUG_UART_RISCV_SBI
+    bool "RISC-V SBI CONSOLE"
+    depends on RISCV_SBI_CONSOLE
+    help
+      Select this to enable a debug UART using RISC-V SBI console driver.
+
 endchoice
 
 config DEBUG_UART_BASE
 	hex "Base address of UART"
 	depends on DEBUG_UART
 	default 0 if DEBUG_UART_SANDBOX
+	default 0 if DEBUG_UART_RISCV_SBI
 	help
 	  This is the base address of your UART for memory-mapped UARTs.
 
@@ -404,6 +412,7 @@ config DEBUG_UART_CLOCK
 	int "UART input clock"
 	depends on DEBUG_UART
 	default 0 if DEBUG_UART_SANDBOX
+	default 0 if DEBUG_UART_RISCV_SBI
 	help
 	  The UART input clock determines the speed of the internal UART
 	  circuitry. The baud rate is derived from this by dividing the input
@@ -481,6 +490,14 @@ config ALTERA_JTAG_UART_BYPASS
 	  output will wait forever until a JTAG terminal is connected. If you
 	  not are sure, say Y.
 
+config RISCV_SBI_CONSOLE
+	bool "RISC-V SBI console support"
+	depends on RISCV
+	help
+	  This enables support for console via RISC-V SBI calls.
+
+	  If you don't know what do to here, say Y.
+
 config ALTERA_UART
 	bool "Altera UART support"
 	depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index e4a92bbbb7..15b2a3ea6f 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_MXC_UART) += serial_mxc.o
 obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
 obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
 obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o
+obj-$(CONFIG_RISCV_SBI_CONSOLE) += serial_riscv_sbi.o
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
 endif
diff --git a/drivers/serial/serial_riscv_sbi.c b/drivers/serial/serial_riscv_sbi.c
new file mode 100644
index 0000000000..add11be04e
--- /dev/null
+++ b/drivers/serial/serial_riscv_sbi.c
@@ -0,0 +1,104 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2008 David Gibson, IBM Corporation
+ * Copyright (C) 2012 Regents of the University of California
+ * Copyright (C) 2020 Nuclei System Technologies
+ * Copyright (C) 2020 Ruigang Wan <rgwan@nucleisys.com>
+ */
+
+#include <common.h>
+#include <serial.h>
+#include <errno.h>
+#include <dm.h>
+#include <fdtdec.h>
+
+#include <asm/sbi.h>
+
+
+#ifdef CONFIG_DEBUG_UART_RISCV_SBI
+
+#include <debug_uart.h>
+
+
+static inline void _debug_uart_init(void)
+{
+	//Nothing
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+	sbi_console_putchar(ch);
+}
+
+DEBUG_UART_FUNCS
+
+#endif
+
+static int sbi_tty_pending_char = -1;
+
+static int sbi_tty_put(struct udevice *dev, const char ch)
+{
+
+	sbi_console_putchar(ch);
+
+	return 0;
+}
+
+static int sbi_tty_get(struct udevice *dev)
+{
+	int c;
+	if (sbi_tty_pending_char != -1)
+	{
+		c = sbi_tty_pending_char;
+		sbi_tty_pending_char = -1;
+	}
+	else
+	{
+		c = sbi_console_getchar();
+		if (c < 0)
+			return -EAGAIN;
+	}
+
+	return c;
+}
+
+static int sbi_tty_setbrg(struct udevice *dev, int baudrate)
+{
+	return 0;
+}
+
+static int sbi_tty_pending(struct udevice *dev, bool input)
+{
+	int c;
+	if (input)
+	{
+		if (sbi_tty_pending_char != -1)
+			return 1;
+
+		c = sbi_console_getchar();
+		if(c < 0)
+			return 0;
+		sbi_tty_pending_char = c;
+		return 1;
+	}
+	return 0;
+}
+
+static const struct udevice_id serial_riscv_sbi_ids[] = {
+	{ .compatible = "sbi,console" },
+	{ }
+};
+
+const struct dm_serial_ops serial_riscv_sbi_ops = {
+	.putc = sbi_tty_put,
+	.pending = sbi_tty_pending,
+	.getc = sbi_tty_get,
+	.setbrg = sbi_tty_setbrg,
+};
+
+U_BOOT_DRIVER(serial_riscv_sbi) = {
+	.name	= "serial_riscv_sbi",
+	.id	= UCLASS_SERIAL,
+	.of_match = serial_riscv_sbi_ids,
+	.ops	= &serial_riscv_sbi_ops,
+};
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support
  2020-05-20  5:33 [PATCH 1/2] serial: Add riscv_sbi console support Kongou Hikari
@ 2020-05-20  5:33 ` Kongou Hikari
  2020-05-21  8:15   ` Bin Meng
  2020-05-21  8:10 ` [PATCH 1/2] serial: Add riscv_sbi console support Bin Meng
  2020-05-21 19:37 ` Sean Anderson
  2 siblings, 1 reply; 5+ messages in thread
From: Kongou Hikari @ 2020-05-20  5:33 UTC (permalink / raw)
  To: u-boot

---
 arch/riscv/Kconfig              |   4 +
 arch/riscv/dts/Makefile         |   1 +
 arch/riscv/dts/nuclei-hbird.dts | 132 ++++++++++++++++++++++++++++++++
 board/nuclei/hbird/Kconfig      |  53 +++++++++++++
 board/nuclei/hbird/MAINTAINERS  |   6 ++
 board/nuclei/hbird/Makefile     |   5 ++
 board/nuclei/hbird/hbird.c      |  27 +++++++
 configs/nuclei_hbird_defconfig  |  20 +++++
 include/configs/nuclei-hbird.h  |  46 +++++++++++
 9 files changed, 294 insertions(+)
 create mode 100644 arch/riscv/dts/nuclei-hbird.dts
 create mode 100644 board/nuclei/hbird/Kconfig
 create mode 100644 board/nuclei/hbird/MAINTAINERS
 create mode 100644 board/nuclei/hbird/Makefile
 create mode 100644 board/nuclei/hbird/hbird.c
 create mode 100644 configs/nuclei_hbird_defconfig
 create mode 100644 include/configs/nuclei-hbird.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fb5fe5afff..b2807c33d7 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -11,6 +11,9 @@ choice
 config TARGET_AX25_AE350
 	bool "Support ax25-ae350"
 
+config TARGET_NUCLEI_HBIRD
+	bool "Support Nuclei HBird"
+
 config TARGET_MICROCHIP_ICICLE
 	bool "Support Microchip PolarFire-SoC Icicle Board"
 
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/nuclei/hbird/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4f30e6936f..da86846f11 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_NUCLEI_HBIRD) += nuclei-hbird.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/riscv/dts/nuclei-hbird.dts b/arch/riscv/dts/nuclei-hbird.dts
new file mode 100644
index 0000000000..39d76b63ba
--- /dev/null
+++ b/arch/riscv/dts/nuclei-hbird.dts
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 22020 Nuclei System Technologies */
+
+/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
+#define RTCCLK_FREQ		32768
+
+/dts-v1/;
+
+/ {
+  #address-cells = <2>;
+  #size-cells = <2>;
+  compatible = "nuclei,ux600";
+  model = "nuclei,ux600";
+
+  chosen {
+     bootargs = "earlycon=sbi";
+     stdout-path = "serial0";
+  };
+
+  cpus {
+    #address-cells = <1>;
+    #size-cells = <0>;
+    timebase-frequency = <RTCCLK_FREQ>;
+    cpu0: cpu at 0 {
+      device_type = "cpu";
+      reg = <0>;
+      status = "okay";
+      compatible = "riscv";
+      riscv,isa = "rv64imac";
+      mmu-type = "riscv,sv39";
+      clock-frequency = <8000000>;
+      cpu0_intc: interrupt-controller {
+        #interrupt-cells = <1>;
+        interrupt-controller;
+        compatible = "riscv,cpu-intc";
+      };
+    };
+  };
+
+  memory at A0000000 {
+    device_type = "memory";
+    reg = <0x0 0xA0000000 0x0 0x10000000>;
+  };
+
+  soc {
+    #address-cells = <2>;
+    #size-cells = <2>;
+    compatible = "nuclei,ux600", "simple-bus";
+    ranges;
+  };
+
+	hfclk: hfclk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <8000000>;
+		clock-output-names = "hfclk";
+	};
+
+  console {
+		u-boot,dm-pre-reloc;
+		compatible = "sbi,console";
+  };
+
+  plic0: interrupt-controller at 8000000 {
+		#interrupt-cells = <1>;
+		compatible = "riscv,plic0";
+		interrupt-controller;
+        riscv,ndev = <53>;
+		interrupts-extended =
+			<&cpu0_intc 11 &cpu0_intc 9>;
+		reg = <0x0 0x8000000 0x0 0x4000000>;
+	};
+
+	uart0: serial at 10013000 {
+        compatible = "sifive,uart0";
+        reg = <0x0 0x10013000 0x0 0x1000>;
+        interrupt-parent = <&plic0>;
+        interrupts = <4>;
+        status = "disabled";
+	};
+
+	uart1: serial at 10023000 {
+        compatible = "sifive,uart0";
+        reg = <0x0 0x10023000 0x0 0x1000>;
+        interrupt-parent = <&plic0>;
+        interrupts = <5>;
+        status = "okay";
+	};
+
+		qspi0: spi at 10014000 {
+			compatible = "sifive,spi0";
+			reg = <0x0 0x10014000 0x0 0x1000>;
+			#interrupt-parent = <&plic0>;
+			#interrupts = <51>;
+			clocks = <&hfclk>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "okay";
+
+			flash at 0 {
+				compatible = "gd25q32", "jedec,spi-nor";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+		//		m25p,fast-read;
+				#spi-tx-bus-width = <1>;
+				#spi-rx-bus-width = <1>;
+			};
+		};
+
+		qspi2: spi at 10034000 {
+			compatible = "sifive,spi0";
+			reg = <0x0 0x10034000 0x0 0x1000>;
+			#interrupt-parent = <&plic0>;
+			#interrupts = <6>;
+			clocks = <&hfclk>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "okay";
+
+			mmc at 0 {
+				compatible = "mmc-spi-slot";
+				reg = <0>;
+				spi-max-frequency = <8000000>;
+				voltage-ranges = <3300 3300>;
+				disable-wp;
+			};
+		};
+
+
+};
diff --git a/board/nuclei/hbird/Kconfig b/board/nuclei/hbird/Kconfig
new file mode 100644
index 0000000000..697182ba02
--- /dev/null
+++ b/board/nuclei/hbird/Kconfig
@@ -0,0 +1,53 @@
+if TARGET_NUCLEI_HBIRD
+
+config SYS_BOARD
+	default "hbird"
+
+config SYS_VENDOR
+	default "nuclei"
+
+config SYS_CPU
+	default "generic"
+
+config SYS_CONFIG_NAME
+	default "nuclei-hbird"
+
+config SYS_TEXT_BASE
+	default 0xA0000000 if !RISCV_SMODE
+	default 0xA0200000 if RISCV_SMODE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select GENERIC_RISCV
+	imply CMD_DHCP
+	imply CMD_EXT2
+	imply CMD_EXT4
+	imply CMD_FAT
+	imply CMD_FS_GENERIC
+	imply CMD_NET
+	imply CMD_PING
+	imply CMD_SF
+	imply CLK_SIFIVE
+	imply CLK_SIFIVE_FU540_PRCI
+	imply DOS_PARTITION
+	imply IP_DYN
+	imply MACB
+	imply MII
+	imply NET_RANDOM_ETHADDR
+	imply PHY_LIB
+	imply PHY_MSCC
+	imply SIFIVE_SERIAL
+	imply SPI
+	imply SPI_SIFIVE
+	imply SPI_FLASH
+	imply SPI_FLASH_ISSI
+	imply MMC
+	imply MMC_SPI
+	imply MMC_BROKEN_CD
+	imply CMD_MMC
+	imply DM_GPIO
+	imply SIFIVE_GPIO
+	imply CMD_GPIO
+	imply SMP
+
+endif
diff --git a/board/nuclei/hbird/MAINTAINERS b/board/nuclei/hbird/MAINTAINERS
new file mode 100644
index 0000000000..c88e1286f0
--- /dev/null
+++ b/board/nuclei/hbird/MAINTAINERS
@@ -0,0 +1,6 @@
+Nuclei HBird Platform
+M:	Ruigang Wan <rgwan@nucleisys.com>
+S:	Maintained
+F:	board/nuclei/hbird/
+F:	include/configs/nuclei-hbird.h
+F:	configs/hbird_defconfig
diff --git a/board/nuclei/hbird/Makefile b/board/nuclei/hbird/Makefile
new file mode 100644
index 0000000000..aa76c44da5
--- /dev/null
+++ b/board/nuclei/hbird/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2020 Nuclei System Technologies
+
+obj-y	+= hbird.o
diff --git a/board/nuclei/hbird/hbird.c b/board/nuclei/hbird/hbird.c
new file mode 100644
index 0000000000..7c8250b474
--- /dev/null
+++ b/board/nuclei/hbird/hbird.c
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 Nuclei System Technologies
+ *
+ * Authors:
+ *   Ruigang Wan <rgwan@nucleisys.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+
+
+int board_init(void)
+{
+	/* Set Pinmux to enable QSPI2 for SD boot */
+	writel (0x01, (void *)0x10034000);
+	writel (0xec000000, (void *)0x10012008);
+	writel (0x10000000, (void *)0x10012004);
+	writel (0xfc030000, (void *)0x10012038);
+	writel (0x00, (void *)0x10034000); /* NUSPI Prescaler = 4 */
+	__asm__ __volatile__ ("fence w,o" : : : "memory");
+
+	printf ("Board: Initialized\n");
+	return 0;
+}
diff --git a/configs/nuclei_hbird_defconfig b/configs/nuclei_hbird_defconfig
new file mode 100644
index 0000000000..2c4607aaae
--- /dev/null
+++ b/configs/nuclei_hbird_defconfig
@@ -0,0 +1,20 @@
+CONFIG_RISCV=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_TARGET_NUCLEI_HBIRD=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_MISC_INIT_R=n
+CONFIG_RISCV_SBI_CONSOLE=y
+CONFIG_SBI_V01=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_OF_BOARD_FIXUP=y
+CONFIG_DEFAULT_DEVICE_TREE="nuclei-hbird"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_FAT_WRITE=y
+
diff --git a/include/configs/nuclei-hbird.h b/include/configs/nuclei-hbird.h
new file mode 100644
index 0000000000..51134adaf9
--- /dev/null
+++ b/include/configs/nuclei-hbird.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2020 Nuclei System Technology
+ *
+ * Authors:
+ *   Ruigang Wan <rgwan@nucleisys.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_SDRAM_BASE		0xA0000000
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
+
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
+
+#define CONFIG_SYS_MALLOC_LEN		SZ_8M
+
+#define CONFIG_SYS_BOOTM_LEN		SZ_64M
+
+#define CONFIG_STANDALONE_LOAD_ADDR	0xA0200000
+
+/* Environment options */
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 0)
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
+	"kernel_addr_r=0xA4000000\0" \
+	"fdt_addr_r=0xA8000000\0" \
+	"scriptaddr=0xA8100000\0" \
+	"pxefile_addr_r=0xA8200000\0" \
+	"ramdisk_addr_r=0xA8300000\0" \
+	BOOTENV
+
+#define CONFIG_PREBOOT \
+	"setenv fdt_addr ${fdtcontroladdr};" \
+	"fdt addr ${fdtcontroladdr};"
+
+#endif /* __CONFIG_H */
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 1/2] serial: Add riscv_sbi console support
  2020-05-20  5:33 [PATCH 1/2] serial: Add riscv_sbi console support Kongou Hikari
  2020-05-20  5:33 ` [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support Kongou Hikari
@ 2020-05-21  8:10 ` Bin Meng
  2020-05-21 19:37 ` Sean Anderson
  2 siblings, 0 replies; 5+ messages in thread
From: Bin Meng @ 2020-05-21  8:10 UTC (permalink / raw)
  To: u-boot

Hi,

On Wed, May 20, 2020 at 7:16 PM Kongou Hikari <hikari@nucleisys.com> wrote:
>
>   - This patch supports debug serial and console from SBI syscall.
>
> Signed-off-by: Kongou Hikari <hikari@nucleisys.com>
> ---
>  drivers/serial/Kconfig            |  17 +++++
>  drivers/serial/Makefile           |   1 +
>  drivers/serial/serial_riscv_sbi.c | 104 ++++++++++++++++++++++++++++++
>  3 files changed, 122 insertions(+)
>  create mode 100644 drivers/serial/serial_riscv_sbi.c
>

The SBI calls sbi_console_getchar & sbi_console_putchar are marked as
legacy calls, and in U-Boot we default to use SBI v0.2

There is not a big value of adding that to the mainline IMHO.

Regards,
Bin

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support
  2020-05-20  5:33 ` [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support Kongou Hikari
@ 2020-05-21  8:15   ` Bin Meng
  0 siblings, 0 replies; 5+ messages in thread
From: Bin Meng @ 2020-05-21  8:15 UTC (permalink / raw)
  To: u-boot

On Wed, May 20, 2020 at 7:15 PM Kongou Hikari <hikari@nucleisys.com> wrote:

Please add commit message to have a brief introduction of this new board.

>
> ---
>  arch/riscv/Kconfig              |   4 +
>  arch/riscv/dts/Makefile         |   1 +
>  arch/riscv/dts/nuclei-hbird.dts | 132 ++++++++++++++++++++++++++++++++
>  board/nuclei/hbird/Kconfig      |  53 +++++++++++++
>  board/nuclei/hbird/MAINTAINERS  |   6 ++
>  board/nuclei/hbird/Makefile     |   5 ++
>  board/nuclei/hbird/hbird.c      |  27 +++++++
>  configs/nuclei_hbird_defconfig  |  20 +++++
>  include/configs/nuclei-hbird.h  |  46 +++++++++++
>  9 files changed, 294 insertions(+)
>  create mode 100644 arch/riscv/dts/nuclei-hbird.dts
>  create mode 100644 board/nuclei/hbird/Kconfig
>  create mode 100644 board/nuclei/hbird/MAINTAINERS
>  create mode 100644 board/nuclei/hbird/Makefile
>  create mode 100644 board/nuclei/hbird/hbird.c
>  create mode 100644 configs/nuclei_hbird_defconfig
>  create mode 100644 include/configs/nuclei-hbird.h
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index fb5fe5afff..b2807c33d7 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -11,6 +11,9 @@ choice
>  config TARGET_AX25_AE350
>         bool "Support ax25-ae350"
>
> +config TARGET_NUCLEI_HBIRD
> +       bool "Support Nuclei HBird"

Please insert this by following the alphabetical order

> +
>  config TARGET_MICROCHIP_ICICLE
>         bool "Support Microchip PolarFire-SoC Icicle Board"
>
> @@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
>  source "board/emulation/qemu-riscv/Kconfig"
>  source "board/microchip/mpfs_icicle/Kconfig"
>  source "board/sifive/fu540/Kconfig"
> +source "board/nuclei/hbird/Kconfig"

ditto

>
>  # platform-specific options below
>  source "arch/riscv/cpu/ax25/Kconfig"
> diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
> index 4f30e6936f..da86846f11 100644
> --- a/arch/riscv/dts/Makefile
> +++ b/arch/riscv/dts/Makefile
> @@ -2,6 +2,7 @@
>
>  dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
>  dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
> +dtb-$(CONFIG_TARGET_NUCLEI_HBIRD) += nuclei-hbird.dtb
>
>  targets += $(dtb-y)
>
> diff --git a/arch/riscv/dts/nuclei-hbird.dts b/arch/riscv/dts/nuclei-hbird.dts
> new file mode 100644
> index 0000000000..39d76b63ba
> --- /dev/null
> +++ b/arch/riscv/dts/nuclei-hbird.dts
> @@ -0,0 +1,132 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/* Copyright (c) 22020 Nuclei System Technologies */
> +
> +/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
> +#define RTCCLK_FREQ            32768
> +
> +/dts-v1/;
> +
> +/ {
> +  #address-cells = <2>;
> +  #size-cells = <2>;
> +  compatible = "nuclei,ux600";
> +  model = "nuclei,ux600";
> +

The indentation looks wrong. Needs to have tab for a level of indentation.

> +  chosen {
> +     bootargs = "earlycon=sbi";
> +     stdout-path = "serial0";
> +  };
> +
> +  cpus {
> +    #address-cells = <1>;
> +    #size-cells = <0>;
> +    timebase-frequency = <RTCCLK_FREQ>;
> +    cpu0: cpu at 0 {
> +      device_type = "cpu";
> +      reg = <0>;
> +      status = "okay";
> +      compatible = "riscv";
> +      riscv,isa = "rv64imac";
> +      mmu-type = "riscv,sv39";
> +      clock-frequency = <8000000>;
> +      cpu0_intc: interrupt-controller {
> +        #interrupt-cells = <1>;
> +        interrupt-controller;
> +        compatible = "riscv,cpu-intc";
> +      };
> +    };
> +  };
> +
> +  memory at A0000000 {
> +    device_type = "memory";
> +    reg = <0x0 0xA0000000 0x0 0x10000000>;
> +  };
> +
> +  soc {
> +    #address-cells = <2>;
> +    #size-cells = <2>;
> +    compatible = "nuclei,ux600", "simple-bus";
> +    ranges;
> +  };
> +
> +       hfclk: hfclk {
> +               #clock-cells = <0>;
> +               compatible = "fixed-clock";
> +               clock-frequency = <8000000>;
> +               clock-output-names = "hfclk";
> +       };
> +
> +  console {
> +               u-boot,dm-pre-reloc;
> +               compatible = "sbi,console";
> +  };
> +
> +  plic0: interrupt-controller at 8000000 {
> +               #interrupt-cells = <1>;
> +               compatible = "riscv,plic0";
> +               interrupt-controller;
> +        riscv,ndev = <53>;
> +               interrupts-extended =
> +                       <&cpu0_intc 11 &cpu0_intc 9>;
> +               reg = <0x0 0x8000000 0x0 0x4000000>;
> +       };
> +
> +       uart0: serial at 10013000 {
> +        compatible = "sifive,uart0";
> +        reg = <0x0 0x10013000 0x0 0x1000>;
> +        interrupt-parent = <&plic0>;
> +        interrupts = <4>;
> +        status = "disabled";
> +       };
> +
> +       uart1: serial at 10023000 {
> +        compatible = "sifive,uart0";
> +        reg = <0x0 0x10023000 0x0 0x1000>;
> +        interrupt-parent = <&plic0>;
> +        interrupts = <5>;
> +        status = "okay";
> +       };
> +
> +               qspi0: spi at 10014000 {
> +                       compatible = "sifive,spi0";
> +                       reg = <0x0 0x10014000 0x0 0x1000>;
> +                       #interrupt-parent = <&plic0>;
> +                       #interrupts = <51>;
> +                       clocks = <&hfclk>;
> +                       num-cs = <1>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "okay";
> +
> +                       flash at 0 {
> +                               compatible = "gd25q32", "jedec,spi-nor";
> +                               reg = <0>;
> +                               spi-max-frequency = <1000000>;
> +               //              m25p,fast-read;

Why is this commented out?

> +                               #spi-tx-bus-width = <1>;
> +                               #spi-rx-bus-width = <1>;
> +                       };
> +               };
> +
> +               qspi2: spi at 10034000 {
> +                       compatible = "sifive,spi0";
> +                       reg = <0x0 0x10034000 0x0 0x1000>;
> +                       #interrupt-parent = <&plic0>;
> +                       #interrupts = <6>;
> +                       clocks = <&hfclk>;
> +                       num-cs = <1>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "okay";
> +
> +                       mmc at 0 {
> +                               compatible = "mmc-spi-slot";
> +                               reg = <0>;
> +                               spi-max-frequency = <8000000>;
> +                               voltage-ranges = <3300 3300>;
> +                               disable-wp;
> +                       };
> +               };
> +
> +
> +};
> diff --git a/board/nuclei/hbird/Kconfig b/board/nuclei/hbird/Kconfig
> new file mode 100644
> index 0000000000..697182ba02
> --- /dev/null
> +++ b/board/nuclei/hbird/Kconfig
> @@ -0,0 +1,53 @@
> +if TARGET_NUCLEI_HBIRD
> +
> +config SYS_BOARD
> +       default "hbird"
> +
> +config SYS_VENDOR
> +       default "nuclei"
> +
> +config SYS_CPU
> +       default "generic"
> +
> +config SYS_CONFIG_NAME
> +       default "nuclei-hbird"
> +
> +config SYS_TEXT_BASE
> +       default 0xA0000000 if !RISCV_SMODE
> +       default 0xA0200000 if RISCV_SMODE

Does this board run U-Boot under which mode? Or both modes?

> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> +       def_bool y
> +       select GENERIC_RISCV
> +       imply CMD_DHCP
> +       imply CMD_EXT2
> +       imply CMD_EXT4
> +       imply CMD_FAT
> +       imply CMD_FS_GENERIC
> +       imply CMD_NET
> +       imply CMD_PING
> +       imply CMD_SF
> +       imply CLK_SIFIVE
> +       imply CLK_SIFIVE_FU540_PRCI
> +       imply DOS_PARTITION
> +       imply IP_DYN
> +       imply MACB
> +       imply MII
> +       imply NET_RANDOM_ETHADDR
> +       imply PHY_LIB
> +       imply PHY_MSCC
> +       imply SIFIVE_SERIAL
> +       imply SPI
> +       imply SPI_SIFIVE
> +       imply SPI_FLASH
> +       imply SPI_FLASH_ISSI
> +       imply MMC
> +       imply MMC_SPI
> +       imply MMC_BROKEN_CD
> +       imply CMD_MMC
> +       imply DM_GPIO
> +       imply SIFIVE_GPIO
> +       imply CMD_GPIO
> +       imply SMP
> +
> +endif
> diff --git a/board/nuclei/hbird/MAINTAINERS b/board/nuclei/hbird/MAINTAINERS
> new file mode 100644
> index 0000000000..c88e1286f0
> --- /dev/null
> +++ b/board/nuclei/hbird/MAINTAINERS
> @@ -0,0 +1,6 @@
> +Nuclei HBird Platform
> +M:     Ruigang Wan <rgwan@nucleisys.com>
> +S:     Maintained
> +F:     board/nuclei/hbird/
> +F:     include/configs/nuclei-hbird.h
> +F:     configs/hbird_defconfig
> diff --git a/board/nuclei/hbird/Makefile b/board/nuclei/hbird/Makefile
> new file mode 100644
> index 0000000000..aa76c44da5
> --- /dev/null
> +++ b/board/nuclei/hbird/Makefile
> @@ -0,0 +1,5 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2020 Nuclei System Technologies
> +
> +obj-y  += hbird.o
> diff --git a/board/nuclei/hbird/hbird.c b/board/nuclei/hbird/hbird.c
> new file mode 100644
> index 0000000000..7c8250b474
> --- /dev/null
> +++ b/board/nuclei/hbird/hbird.c
> @@ -0,0 +1,27 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019 Nuclei System Technologies
> + *
> + * Authors:
> + *   Ruigang Wan <rgwan@nucleisys.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <linux/delay.h>
> +#include <linux/io.h>
> +
> +
> +int board_init(void)
> +{
> +       /* Set Pinmux to enable QSPI2 for SD boot */
> +       writel (0x01, (void *)0x10034000);
> +       writel (0xec000000, (void *)0x10012008);
> +       writel (0x10000000, (void *)0x10012004);
> +       writel (0xfc030000, (void *)0x10012038);
> +       writel (0x00, (void *)0x10034000); /* NUSPI Prescaler = 4 */

Please do not use hardcoded magic numbers.

> +       __asm__ __volatile__ ("fence w,o" : : : "memory");
> +
> +       printf ("Board: Initialized\n");

This should probably be turned to a debug output.

> +       return 0;
> +}
> diff --git a/configs/nuclei_hbird_defconfig b/configs/nuclei_hbird_defconfig
> new file mode 100644
> index 0000000000..2c4607aaae
> --- /dev/null
> +++ b/configs/nuclei_hbird_defconfig
> @@ -0,0 +1,20 @@
> +CONFIG_RISCV=y
> +CONFIG_ENV_SIZE=0x20000
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_TARGET_NUCLEI_HBIRD=y
> +CONFIG_ARCH_RV64I=y
> +CONFIG_RISCV_SMODE=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_FIT=y
> +CONFIG_MISC_INIT_R=n
> +CONFIG_RISCV_SBI_CONSOLE=y
> +CONFIG_SBI_V01=y

Can we switch to SBI_V02?

> +CONFIG_DISPLAY_CPUINFO=y
> +CONFIG_DISPLAY_BOARDINFO=y
> +CONFIG_OF_BOARD_FIXUP=y
> +CONFIG_DEFAULT_DEVICE_TREE="nuclei-hbird"
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_DM_MTD=y
> +CONFIG_CMD_SPI=y
> +CONFIG_FAT_WRITE=y
> +
> diff --git a/include/configs/nuclei-hbird.h b/include/configs/nuclei-hbird.h
> new file mode 100644
> index 0000000000..51134adaf9
> --- /dev/null
> +++ b/include/configs/nuclei-hbird.h
> @@ -0,0 +1,46 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (c) 2020 Nuclei System Technology
> + *
> + * Authors:
> + *   Ruigang Wan <rgwan@nucleisys.com>
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <linux/sizes.h>
> +
> +#define CONFIG_SYS_SDRAM_BASE          0xA0000000
> +#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + SZ_2M)
> +
> +#define CONFIG_SYS_LOAD_ADDR           (CONFIG_SYS_SDRAM_BASE + SZ_2M)
> +
> +#define CONFIG_SYS_MALLOC_LEN          SZ_8M
> +
> +#define CONFIG_SYS_BOOTM_LEN           SZ_64M
> +
> +#define CONFIG_STANDALONE_LOAD_ADDR    0xA0200000
> +
> +/* Environment options */
> +
> +#define BOOT_TARGET_DEVICES(func) \
> +       func(MMC, mmc, 0)
> +
> +#include <config_distro_bootcmd.h>
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> +       "fdt_high=0xffffffffffffffff\0" \
> +       "initrd_high=0xffffffffffffffff\0" \
> +       "kernel_addr_r=0xA4000000\0" \
> +       "fdt_addr_r=0xA8000000\0" \
> +       "scriptaddr=0xA8100000\0" \
> +       "pxefile_addr_r=0xA8200000\0" \
> +       "ramdisk_addr_r=0xA8300000\0" \
> +       BOOTENV
> +
> +#define CONFIG_PREBOOT \
> +       "setenv fdt_addr ${fdtcontroladdr};" \
> +       "fdt addr ${fdtcontroladdr};"
> +
> +#endif /* __CONFIG_H */

Regards,
Bin

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] serial: Add riscv_sbi console support
  2020-05-20  5:33 [PATCH 1/2] serial: Add riscv_sbi console support Kongou Hikari
  2020-05-20  5:33 ` [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support Kongou Hikari
  2020-05-21  8:10 ` [PATCH 1/2] serial: Add riscv_sbi console support Bin Meng
@ 2020-05-21 19:37 ` Sean Anderson
  2 siblings, 0 replies; 5+ messages in thread
From: Sean Anderson @ 2020-05-21 19:37 UTC (permalink / raw)
  To: u-boot

Hi,

There are a couple instances where your code is not formatted in the
correct style [1]. You can use tools/checkpatch.pl to help you fix
these.

[1] https://www.denx.de/wiki/U-Boot/CodingStyle

On 5/20/20 1:33 AM, Kongou Hikari wrote:
>   - This patch supports debug serial and console from SBI syscall.
> 
> Signed-off-by: Kongou Hikari <hikari@nucleisys.com>
> ---
>  drivers/serial/Kconfig            |  17 +++++
>  drivers/serial/Makefile           |   1 +
>  drivers/serial/serial_riscv_sbi.c | 104 ++++++++++++++++++++++++++++++
>  3 files changed, 122 insertions(+)
>  create mode 100644 drivers/serial/serial_riscv_sbi.c
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 90e3983170..60dcf9bc9a 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -388,12 +388,20 @@ config DEBUG_UART_MTK
>  	  driver will be available until the real driver model serial is
>  	  running.
>  
> +
> +config DEBUG_UART_RISCV_SBI
> +    bool "RISC-V SBI CONSOLE"
> +    depends on RISCV_SBI_CONSOLE
> +    help
> +      Select this to enable a debug UART using RISC-V SBI console driver.
> +
>  endchoice
>  
>  config DEBUG_UART_BASE
>  	hex "Base address of UART"
>  	depends on DEBUG_UART
>  	default 0 if DEBUG_UART_SANDBOX
> +	default 0 if DEBUG_UART_RISCV_SBI
>  	help
>  	  This is the base address of your UART for memory-mapped UARTs.
>  
> @@ -404,6 +412,7 @@ config DEBUG_UART_CLOCK
>  	int "UART input clock"
>  	depends on DEBUG_UART
>  	default 0 if DEBUG_UART_SANDBOX
> +	default 0 if DEBUG_UART_RISCV_SBI
>  	help
>  	  The UART input clock determines the speed of the internal UART
>  	  circuitry. The baud rate is derived from this by dividing the input
> @@ -481,6 +490,14 @@ config ALTERA_JTAG_UART_BYPASS
>  	  output will wait forever until a JTAG terminal is connected. If you
>  	  not are sure, say Y.
>  
> +config RISCV_SBI_CONSOLE
> +	bool "RISC-V SBI console support"
> +	depends on RISCV
> +	help
> +	  This enables support for console via RISC-V SBI calls.
> +
> +	  If you don't know what do to here, say Y.
> +
>  config ALTERA_UART
>  	bool "Altera UART support"
>  	depends on DM_SERIAL
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index e4a92bbbb7..15b2a3ea6f 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -46,6 +46,7 @@ obj-$(CONFIG_MXC_UART) += serial_mxc.o
>  obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
>  obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
>  obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o
> +obj-$(CONFIG_RISCV_SBI_CONSOLE) += serial_riscv_sbi.o
>  ifdef CONFIG_SPL_BUILD
>  obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
>  endif
> diff --git a/drivers/serial/serial_riscv_sbi.c b/drivers/serial/serial_riscv_sbi.c
> new file mode 100644
> index 0000000000..add11be04e
> --- /dev/null
> +++ b/drivers/serial/serial_riscv_sbi.c
> @@ -0,0 +1,104 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2008 David Gibson, IBM Corporation
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2020 Nuclei System Technologies
> + * Copyright (C) 2020 Ruigang Wan <rgwan@nucleisys.com>
> + */
> +
> +#include <common.h>

The following includes should be sorted alphabetially

> +#include <serial.h>
> +#include <errno.h>
> +#include <dm.h>
> +#include <fdtdec.h>
> +
> +#include <asm/sbi.h>
> +
> +

I believe it's conventional to put the debug uart at the end of a file.

> +#ifdef CONFIG_DEBUG_UART_RISCV_SBI
> +

This include should probably be at the top and outside of this ifdef.

> +#include <debug_uart.h>
> +
> +
> +static inline void _debug_uart_init(void)
> +{

Don't use C++-style comments, except in SPDX identifiers.

> +	//Nothing
> +}
> +
> +static inline void _debug_uart_putc(int ch)
> +{
> +	sbi_console_putchar(ch);
> +}
> +
> +DEBUG_UART_FUNCS
> +
> +#endif
> +
> +static int sbi_tty_pending_char = -1;
> +
> +static int sbi_tty_put(struct udevice *dev, const char ch)
> +{
> +
> +	sbi_console_putchar(ch);
> +
> +	return 0;
> +}
> +
> +static int sbi_tty_get(struct udevice *dev)
> +{
> +	int c;

There should be a blank line here.

> +	if (sbi_tty_pending_char != -1)

Opening braces go on the same line as statement; the only exception are
functions. For example,

if (foo) {

} else {

}

> +	{
> +		c = sbi_tty_pending_char;
> +		sbi_tty_pending_char = -1;
> +	}
> +	else
> +	{
> +		c = sbi_console_getchar();
> +		if (c < 0)
> +			return -EAGAIN;
> +	}
> +
> +	return c;
> +}
> +
> +static int sbi_tty_setbrg(struct udevice *dev, int baudrate)
> +{
> +	return 0;
> +}
> +
> +static int sbi_tty_pending(struct udevice *dev, bool input)
> +{
> +	int c;
> +	if (input)
> +	{
> +		if (sbi_tty_pending_char != -1)
> +			return 1;
> +
> +		c = sbi_console_getchar();
> +		if(c < 0)
> +			return 0;
> +		sbi_tty_pending_char = c;
> +		return 1;
> +	}
> +	return 0;
> +}
> +
> +static const struct udevice_id serial_riscv_sbi_ids[] = {
> +	{ .compatible = "sbi,console" },
> +	{ }
> +};
> +

This should also be static.

> +const struct dm_serial_ops serial_riscv_sbi_ops = {
> +	.putc = sbi_tty_put,
> +	.pending = sbi_tty_pending,
> +	.getc = sbi_tty_get,
> +	.setbrg = sbi_tty_setbrg,
> +};
> +
> +U_BOOT_DRIVER(serial_riscv_sbi) = {
> +	.name	= "serial_riscv_sbi",
> +	.id	= UCLASS_SERIAL,
> +	.of_match = serial_riscv_sbi_ids,
> +	.ops	= &serial_riscv_sbi_ops,
> +};
> 

--Sean

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-05-21 19:37 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-20  5:33 [PATCH 1/2] serial: Add riscv_sbi console support Kongou Hikari
2020-05-20  5:33 ` [PATCH 2/2] riscv: Add Nuclei Hummingbird (UX600) platform support Kongou Hikari
2020-05-21  8:15   ` Bin Meng
2020-05-21  8:10 ` [PATCH 1/2] serial: Add riscv_sbi console support Bin Meng
2020-05-21 19:37 ` Sean Anderson

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.