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From: Bin Meng <bmeng.cn@gmail.com>
To: Pragnesh Patel <pragnesh.patel@sifive.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
	Qemu-block <qemu-block@nongnu.org>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	"Alistair Francis" <alistair.francis@wdc.com>
Subject: Re: [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support
Date: Sat, 2 Jan 2021 21:36:38 +0800	[thread overview]
Message-ID: <CAEUhbmWghZ-P4e_=Z3RN=f4XXoo50LjQ0kW1wavLUXZPVpjwNA@mail.gmail.com> (raw)
In-Reply-To: <CAN8ut8KyJbvM+1MB923VmUTm7+E7jEsTuR3TKazFkxBnnc9YCQ@mail.gmail.com>

Hi Pragnesh,

On Sat, Jan 2, 2021 at 9:30 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
>
> Hi Bin,
>
> On Sat, Jan 2, 2021 at 6:46 PM Bin Meng <bmeng.cn@gmail.com> wrote:
> >
> > Hi Pragnesh,
> >
> > On Sat, Jan 2, 2021 at 8:27 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
> > >
> > > Hi BIn,
> > >
> > > 1) Please rebase this series on master.
> >
> > I remember I rebased it on master already.
>
> It shows below,
>
> pragneshp:sifive-qemu$ git am hw-riscv-sifive_u-Add-missing-SPI-support.patch
> Applying: hw/block: m25p80: Add ISSI SPI flash support
> error: patch failed: hw/block/m25p80.c:1134
> error: hw/block/m25p80.c: patch does not apply
> Patch failed at 0001 hw/block: m25p80: Add ISSI SPI flash support
> Use 'git am --show-current-patch' to see the failed patch
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> pragneshp:sifive-qemu$

Ah, I see. The branch I generated the series has some patches of SST
and i.MX6 SPI patches I previously worked on and it has some changes
in m25p80.c. Will generate the patches from a clean qemu/master.

>
>
> >
> > >
> > > 2) When i tried to boot from SD card image it shows below,
> > >
> > > pragneshp:sifive-qemu$ ./build/riscv64-softmmu/qemu-system-riscv64 -M
> > > sifive_u,msel=11 -m 4G -nographic -bios
> > > ~/opensource/u-boot/spl/u-boot-spl.bin -device
> > > sd-card,spi=true,drive=mycard -drive
> > > file=~/opensource/u-boot/fsbl.gpt,id=mycard,format=raw,if=none
> >
> > The command is not correct. Please check the commit message of:
> > [18/22] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card
> >
> > The command should be:
> >
> > $ qemu-system-riscv64 -nographic -M sifive_u,msel=11 -smp 5 -m 8G \
> >     -bios u-boot-spl.bin -drive file=sdcard.img,if=sd
> >
> > Note the memory should be 8G and the SD card is already connected by
> > the sifive_u machine codes. No need to create it via "-device
> > sd-card".
>
> Ok my bad. it's working now. thanks for the clarification.

Good to know it's working on your side.

Regards,
Bin


WARNING: multiple messages have this Message-ID (diff)
From: Bin Meng <bmeng.cn@gmail.com>
To: Pragnesh Patel <pragnesh.patel@sifive.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	Qemu-block <qemu-block@nongnu.org>,
	"open list:RISC-V" <qemu-riscv@nongnu.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	"Bin Meng" <bin.meng@windriver.com>
Subject: Re: [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support
Date: Sat, 2 Jan 2021 21:36:38 +0800	[thread overview]
Message-ID: <CAEUhbmWghZ-P4e_=Z3RN=f4XXoo50LjQ0kW1wavLUXZPVpjwNA@mail.gmail.com> (raw)
In-Reply-To: <CAN8ut8KyJbvM+1MB923VmUTm7+E7jEsTuR3TKazFkxBnnc9YCQ@mail.gmail.com>

Hi Pragnesh,

On Sat, Jan 2, 2021 at 9:30 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
>
> Hi Bin,
>
> On Sat, Jan 2, 2021 at 6:46 PM Bin Meng <bmeng.cn@gmail.com> wrote:
> >
> > Hi Pragnesh,
> >
> > On Sat, Jan 2, 2021 at 8:27 PM Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
> > >
> > > Hi BIn,
> > >
> > > 1) Please rebase this series on master.
> >
> > I remember I rebased it on master already.
>
> It shows below,
>
> pragneshp:sifive-qemu$ git am hw-riscv-sifive_u-Add-missing-SPI-support.patch
> Applying: hw/block: m25p80: Add ISSI SPI flash support
> error: patch failed: hw/block/m25p80.c:1134
> error: hw/block/m25p80.c: patch does not apply
> Patch failed at 0001 hw/block: m25p80: Add ISSI SPI flash support
> Use 'git am --show-current-patch' to see the failed patch
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> pragneshp:sifive-qemu$

Ah, I see. The branch I generated the series has some patches of SST
and i.MX6 SPI patches I previously worked on and it has some changes
in m25p80.c. Will generate the patches from a clean qemu/master.

>
>
> >
> > >
> > > 2) When i tried to boot from SD card image it shows below,
> > >
> > > pragneshp:sifive-qemu$ ./build/riscv64-softmmu/qemu-system-riscv64 -M
> > > sifive_u,msel=11 -m 4G -nographic -bios
> > > ~/opensource/u-boot/spl/u-boot-spl.bin -device
> > > sd-card,spi=true,drive=mycard -drive
> > > file=~/opensource/u-boot/fsbl.gpt,id=mycard,format=raw,if=none
> >
> > The command is not correct. Please check the commit message of:
> > [18/22] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card
> >
> > The command should be:
> >
> > $ qemu-system-riscv64 -nographic -M sifive_u,msel=11 -smp 5 -m 8G \
> >     -bios u-boot-spl.bin -drive file=sdcard.img,if=sd
> >
> > Note the memory should be 8G and the SD card is already connected by
> > the sifive_u machine codes. No need to create it via "-device
> > sd-card".
>
> Ok my bad. it's working now. thanks for the clarification.

Good to know it's working on your side.

Regards,
Bin


  reply	other threads:[~2021-01-02 13:38 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-31 11:29 [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support Bin Meng
2020-12-31 11:29 ` [PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support Bin Meng
2021-01-04 16:00   ` Francisco Iglesias
2021-01-04 16:00     ` Francisco Iglesias
2021-01-04 23:30     ` Bin Meng
2021-01-04 23:30       ` Bin Meng
2020-12-31 11:29 ` [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information Bin Meng
2021-01-05 21:16   ` Alistair Francis
2021-01-05 21:16     ` Alistair Francis
2020-12-31 11:29 ` [PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence Bin Meng
2021-01-02 13:49   ` Pragnesh Patel
2021-01-02 13:49     ` Pragnesh Patel
2020-12-31 11:29 ` [PATCH 04/22] hw/sd: sd: Support CMD59 for SPI mode Bin Meng
2021-01-02 13:50   ` Pragnesh Patel
2021-01-02 13:50     ` Pragnesh Patel
2020-12-31 11:29 ` [PATCH 05/22] hw/sd: sd: Drop sd_crc16() Bin Meng
2021-01-02 13:53   ` Pragnesh Patel
2021-01-02 13:53     ` Pragnesh Patel
2021-01-14 11:51   ` Philippe Mathieu-Daudé
2020-12-31 11:29 ` [PATCH 06/22] util: Add CRC16 (CCITT) calculation routines Bin Meng
2021-01-14 20:20   ` Alistair Francis
2021-01-14 20:20     ` Alistair Francis
2020-12-31 11:29 ` [PATCH 07/22] hw/sd: ssi-sd: Suffix a data block with CRC16 Bin Meng
2021-01-13 16:54   ` Alistair Francis
2021-01-13 16:54     ` Alistair Francis
2020-12-31 11:29 ` [PATCH 08/22] hw/sd: ssi-sd: Support multiple block read (CMD18) Bin Meng
2021-01-13 16:59   ` Alistair Francis
2021-01-13 16:59     ` Alistair Francis
2020-12-31 11:29 ` [PATCH 09/22] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer Bin Meng
2021-01-13 17:00   ` Alistair Francis
2021-01-13 17:00     ` Alistair Francis
2021-01-14 11:40   ` Philippe Mathieu-Daudé
2020-12-31 11:29 ` [PATCH 10/22] hw/sd: sd: Remove duplicated codes in single/multiple block read/write Bin Meng
2021-01-13 17:02   ` Alistair Francis
2021-01-13 17:02     ` Alistair Francis
2020-12-31 11:29 ` [PATCH 11/22] hw/sd: sd: Allow single/multiple block write for SPI mode Bin Meng
2021-01-13 17:03   ` Alistair Francis
2021-01-13 17:03     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 12/22] hw/sd: sd.h: Cosmetic change of using spaces Bin Meng
2021-01-13 17:59   ` Alistair Francis
2021-01-13 17:59     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 13/22] hw/sd: Introduce receive_ready() callback Bin Meng
2021-01-13 17:22   ` Alistair Francis
2021-01-13 17:22     ` Alistair Francis
2021-01-14 11:44   ` Philippe Mathieu-Daudé
2020-12-31 11:30 ` [PATCH 14/22] hw/sd: ssi-sd: Support single block write Bin Meng
2021-01-13 18:07   ` Alistair Francis
2021-01-13 18:07     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 15/22] hw/sd: ssi-sd: Support multiple " Bin Meng
2021-01-13 18:11   ` Alistair Francis
2021-01-13 18:11     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 16/22] hw/ssi: Add SiFive SPI controller support Bin Meng
2021-01-13 18:28   ` Alistair Francis
2021-01-13 18:28     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 17/22] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash Bin Meng
2021-01-13 18:30   ` Alistair Francis
2021-01-13 18:30     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 18/22] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card Bin Meng
2021-01-13 18:32   ` Alistair Francis
2021-01-13 18:32     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 19/22] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value Bin Meng
2021-01-13 18:33   ` Alistair Francis
2021-01-13 18:33     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 20/22] docs/system: Sort targets in alphabetical order Bin Meng
2021-01-13 18:33   ` Alistair Francis
2021-01-13 18:33     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 21/22] docs/system: Add RISC-V documentation Bin Meng
2021-01-14  0:11   ` Alistair Francis
2021-01-14  0:11     ` Alistair Francis
2020-12-31 11:30 ` [PATCH 22/22] docs/system: riscv: Add documentation for sifive_u machine Bin Meng
2021-01-14  0:11   ` Alistair Francis
2021-01-14  0:11     ` Alistair Francis
2021-01-02 12:26 ` [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support Pragnesh Patel
2021-01-02 12:26   ` Pragnesh Patel
2021-01-02 13:15   ` Bin Meng
2021-01-02 13:15     ` Bin Meng
2021-01-02 13:30     ` Pragnesh Patel
2021-01-02 13:30       ` Pragnesh Patel
2021-01-02 13:36       ` Bin Meng [this message]
2021-01-02 13:36         ` Bin Meng

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