[PATCH v3 0/7] MIPS: ath79: cleanup AR724X PCI support code

[PATCH v3 0/7] MIPS: ath79: cleanup AR724X PCI support code

[Gabor Juhos]

This patch-set contains patches to clean up the recently 
introduced code for the AR724X PCI controller. This is required
allow to add support for the AR71XX PCI controller. 

Gabor Juhos (7):
  MIPS: ath79: separate common PCI code
  MIPS: ath79: rename pci-ath724x.h
  MIPS: ath79: make ath724x_pcibios_init visible for external code
  MIPS: ath79: add a common PCI registration function
  MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name
  MIPS: ath79: replace ath724x to ar724x
  MIPS: ath79: use io-accessor macros in pci-ar724x.c

 arch/mips/ath79/Makefile                       |    1 +
 arch/mips/ath79/mach-ubnt-xm.c                 |    7 +-
 arch/mips/ath79/pci.c                          |   60 ++++++++
 arch/mips/ath79/pci.h                          |   27 ++++
 arch/mips/include/asm/mach-ath79/pci-ath724x.h |   21 ---
 arch/mips/include/asm/mach-ath79/pci.h         |   20 +++
 arch/mips/pci/Makefile                         |    2 +-
 arch/mips/pci/pci-ar724x.c                     |  149 ++++++++++++++++++++
 arch/mips/pci/pci-ath724x.c                    |  174 ------------------------
 9 files changed, 262 insertions(+), 199 deletions(-)
 create mode 100644 arch/mips/ath79/pci.c
 create mode 100644 arch/mips/ath79/pci.h
 delete mode 100644 arch/mips/include/asm/mach-ath79/pci-ath724x.h
 create mode 100644 arch/mips/include/asm/mach-ath79/pci.h
 create mode 100644 arch/mips/pci/pci-ar724x.c
 delete mode 100644 arch/mips/pci/pci-ath724x.c

-- 
1.7.2.1

[PATCH v3 1/7] MIPS: ath79: separate common PCI code

[Gabor Juhos]

The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
are common functions and only instance one of them
can be present in a single kernel.

Currently these functions can be built only if the
CONFIG_SOC_AR724X option is selected. However the
ath79 platform contain support for the AR71XX SoCs,.
The AR71XX SoCs have a differnet PCI controller,
and those will require a different code.

Move the common PCI code into a separeate file in
order to be able to use that with other SoCs as
well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - no changes
v2: - no changes
---
 arch/mips/ath79/Makefile    |    1 +
 arch/mips/ath79/pci.c       |   46 +++++++++++++++++++++++++++++++++++++++++++
 arch/mips/pci/pci-ath724x.c |   34 -------------------------------
 3 files changed, 47 insertions(+), 34 deletions(-)
 create mode 100644 arch/mips/ath79/pci.c

diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile
index 3b911e09..221a76a9 100644
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -11,6 +11,7 @@
 obj-y	:= prom.o setup.o irq.o common.o clock.o gpio.o
 
 obj-$(CONFIG_EARLY_PRINTK)		+= early_printk.o
+obj-$(CONFIG_PCI)			+= pci.o
 
 #
 # Devices
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
new file mode 100644
index 0000000..8db076e
--- /dev/null
+++ b/arch/mips/ath79/pci.c
@@ -0,0 +1,46 @@
+/*
+ *  Atheros AR71XX/AR724X specific PCI setup code
+ *
+ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/pci.h>
+#include <asm/mach-ath79/pci-ath724x.h>
+
+static struct ath724x_pci_data *pci_data;
+static int pci_data_size;
+
+void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
+{
+	pci_data	= data;
+	pci_data_size	= size;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
+{
+	unsigned int devfn = dev->devfn;
+	int irq = -1;
+
+	if (devfn > pci_data_size - 1)
+		return irq;
+
+	irq = pci_data[devfn].irq;
+
+	return irq;
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+	unsigned int devfn = dev->devfn;
+
+	if (devfn > pci_data_size - 1)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	dev->dev.platform_data = pci_data[devfn].pdata;
+
+	return PCIBIOS_SUCCESSFUL;
+}
diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c
index a4dd24a..1e810be 100644
--- a/arch/mips/pci/pci-ath724x.c
+++ b/arch/mips/pci/pci-ath724x.c
@@ -9,7 +9,6 @@
  */
 
 #include <linux/pci.h>
-#include <asm/mach-ath79/pci-ath724x.h>
 
 #define reg_read(_phys)		(*(unsigned int *) KSEG1ADDR(_phys))
 #define reg_write(_phys, _val)	((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
@@ -19,8 +18,6 @@
 #define ATH724X_PCI_MEM_SIZE	0x08000000
 
 static DEFINE_SPINLOCK(ath724x_pci_lock);
-static struct ath724x_pci_data *pci_data;
-static int pci_data_size;
 
 static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 			    int size, uint32_t *value)
@@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci_controller = {
 	.mem_resource	= &ath724x_mem_resource,
 };
 
-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
-{
-	pci_data	= data;
-	pci_data_size	= size;
-}
-
-int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
-{
-	unsigned int devfn = dev->devfn;
-	int irq = -1;
-
-	if (devfn > pci_data_size - 1)
-		return irq;
-
-	irq = pci_data[devfn].irq;
-
-	return irq;
-}
-
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-	unsigned int devfn = dev->devfn;
-
-	if (devfn > pci_data_size - 1)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	dev->dev.platform_data = pci_data[devfn].pdata;
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
 static int __init ath724x_pcibios_init(void)
 {
 	register_pci_controller(&ath724x_pci_controller);
-- 
1.7.2.1

[PATCH v3 2/7] MIPS: ath79: rename pci-ath724x.h

[Gabor Juhos]

The declared function in this header file is used by the
ath79 platform code only. Move the header to the platform
directory.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - move include "pci.h" out of the #ifdef CONFIG_PCI section
v2: - no changes
---
 arch/mips/ath79/mach-ubnt-xm.c                     |    2 +-
 arch/mips/ath79/pci.c                              |    2 +-
 .../asm/mach-ath79/pci-ath724x.h => ath79/pci.h}   |    0
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename arch/mips/{include/asm/mach-ath79/pci-ath724x.h => ath79/pci.h} (100%)

diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c
index 3c311a5..a043500 100644
--- a/arch/mips/ath79/mach-ubnt-xm.c
+++ b/arch/mips/ath79/mach-ubnt-xm.c
@@ -15,13 +15,13 @@
 
 #ifdef CONFIG_PCI
 #include <linux/ath9k_platform.h>
-#include <asm/mach-ath79/pci-ath724x.h>
 #endif /* CONFIG_PCI */
 
 #include "machtypes.h"
 #include "dev-gpio-buttons.h"
 #include "dev-leds-gpio.h"
 #include "dev-spi.h"
+#include "pci.h"
 
 #define UBNT_XM_GPIO_LED_L1		0
 #define UBNT_XM_GPIO_LED_L2		1
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
index 8db076e..4957428 100644
--- a/arch/mips/ath79/pci.c
+++ b/arch/mips/ath79/pci.c
@@ -9,7 +9,7 @@
  */
 
 #include <linux/pci.h>
-#include <asm/mach-ath79/pci-ath724x.h>
+#include "pci.h"
 
 static struct ath724x_pci_data *pci_data;
 static int pci_data_size;
diff --git a/arch/mips/include/asm/mach-ath79/pci-ath724x.h b/arch/mips/ath79/pci.h
similarity index 100%
rename from arch/mips/include/asm/mach-ath79/pci-ath724x.h
rename to arch/mips/ath79/pci.h
-- 
1.7.2.1

[PATCH v3 3/7] MIPS: ath79: make ath724x_pcibios_init visible for external code

[Gabor Juhos]

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - no changes
v2: - fix a typo in my e-mail address
---
 arch/mips/include/asm/mach-ath79/pci.h |   20 ++++++++++++++++++++
 arch/mips/pci/pci-ath724x.c            |    3 ++-
 2 files changed, 22 insertions(+), 1 deletions(-)
 create mode 100644 arch/mips/include/asm/mach-ath79/pci.h

diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h
new file mode 100644
index 0000000..7ef8a49
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/pci.h
@@ -0,0 +1,20 @@
+/*
+ *  Atheros 724x PCI support
+ *
+ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_PCI_H
+#define __ASM_MACH_ATH79_PCI_H
+
+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
+int ath724x_pcibios_init(void);
+#else
+static inline int ath724x_pcibios_init(void) { return 0 };
+#endif
+
+#endif /* __ASM_MACH_ATH79_PCI_H */
diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c
index 1e810be..be01b7f 100644
--- a/arch/mips/pci/pci-ath724x.c
+++ b/arch/mips/pci/pci-ath724x.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/pci.h>
+#include <asm/mach-ath79/pci.h>
 
 #define reg_read(_phys)		(*(unsigned int *) KSEG1ADDR(_phys))
 #define reg_write(_phys, _val)	((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
@@ -130,7 +131,7 @@ static struct pci_controller ath724x_pci_controller = {
 	.mem_resource	= &ath724x_mem_resource,
 };
 
-static int __init ath724x_pcibios_init(void)
+int __init ath724x_pcibios_init(void)
 {
 	register_pci_controller(&ath724x_pci_controller);
 
-- 
1.7.2.1

[PATCH v3 4/7] MIPS: ath79: add a common PCI registration function

[Gabor Juhos]

The current code unconditionally registers the AR724X
specific PCI controller, even if the kernel is running
on a different SoC.

Add a common function for PCI controller registration,
and only register the AR724X PCI controller if the kernel
is running on an AR724X SoC.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - fix compile error if CONFIG_PCI is not defined
    - add __init annotation to ath79_register_pci

v2: - no changes
---
 arch/mips/ath79/mach-ubnt-xm.c |    1 +
 arch/mips/ath79/pci.c          |   14 ++++++++++++++
 arch/mips/ath79/pci.h          |    6 ++++++
 arch/mips/pci/pci-ath724x.c    |    2 --
 4 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c
index a043500..edbc093 100644
--- a/arch/mips/ath79/mach-ubnt-xm.c
+++ b/arch/mips/ath79/mach-ubnt-xm.c
@@ -111,6 +111,7 @@ static void __init ubnt_xm_init(void)
 	ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
 #endif /* CONFIG_PCI */
 
+	ath79_register_pci();
 }
 
 MIPS_MACHINE(ATH79_MACH_UBNT_XM,
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
index 4957428..342363b 100644
--- a/arch/mips/ath79/pci.c
+++ b/arch/mips/ath79/pci.c
@@ -9,6 +9,8 @@
  */
 
 #include <linux/pci.h>
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/pci.h>
 #include "pci.h"
 
 static struct ath724x_pci_data *pci_data;
@@ -44,3 +46,15 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
 
 	return PCIBIOS_SUCCESSFUL;
 }
+
+int __init ath79_register_pci(void)
+{
+	int ret;
+
+	if (soc_is_ar724x())
+		ret = ath724x_pcibios_init();
+	else
+		ret = -ENODEV;
+
+	return ret;
+}
diff --git a/arch/mips/ath79/pci.h b/arch/mips/ath79/pci.h
index 454885f..787fac2 100644
--- a/arch/mips/ath79/pci.h
+++ b/arch/mips/ath79/pci.h
@@ -18,4 +18,10 @@ struct ath724x_pci_data {
 
 void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
 
+#ifdef CONFIG_PCI
+int ath79_register_pci(void);
+#else
+static inline int ath79_register_pci(void) { return 0; }
+#endif
+
 #endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c
index be01b7f..ebefc16 100644
--- a/arch/mips/pci/pci-ath724x.c
+++ b/arch/mips/pci/pci-ath724x.c
@@ -137,5 +137,3 @@ int __init ath724x_pcibios_init(void)
 
 	return PCIBIOS_SUCCESSFUL;
 }
-
-arch_initcall(ath724x_pcibios_init);
-- 
1.7.2.1

[PATCH v3 5/7] MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name

[Gabor Juhos]

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - no changes
v2: - no changes
---
 arch/mips/pci/Makefile                        |    2 +-
 arch/mips/pci/{pci-ath724x.c => pci-ar724x.c} |    0
 2 files changed, 1 insertions(+), 1 deletions(-)
 rename arch/mips/pci/{pci-ath724x.c => pci-ar724x.c} (100%)

diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index c3ac4b0..172277c 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -19,7 +19,7 @@ obj-$(CONFIG_BCM47XX)		+= pci-bcm47xx.o
 obj-$(CONFIG_BCM63XX)		+= pci-bcm63xx.o fixup-bcm63xx.o \
 					ops-bcm63xx.o
 obj-$(CONFIG_MIPS_ALCHEMY)	+= pci-alchemy.o
-obj-$(CONFIG_SOC_AR724X)	+= pci-ath724x.o
+obj-$(CONFIG_SOC_AR724X)	+= pci-ar724x.o
 
 #
 # These are still pretty much in the old state, watch, go blind.
diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ar724x.c
similarity index 100%
rename from arch/mips/pci/pci-ath724x.c
rename to arch/mips/pci/pci-ar724x.c
-- 
1.7.2.1

[PATCH v3 6/7] MIPS: ath79: replace ath724x to ar724x

[Gabor Juhos]

Replace the 'ath724x' to 'ar724x' in function, variable and
structure names to reflect the name of the real SoC.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - no changes
v2: - no changes
---
 arch/mips/ath79/mach-ubnt-xm.c         |    4 +-
 arch/mips/ath79/pci.c                  |    6 ++--
 arch/mips/ath79/pci.h                  |   10 +++---
 arch/mips/include/asm/mach-ath79/pci.h |    4 +-
 arch/mips/pci/pci-ar724x.c             |   62 ++++++++++++++++----------------
 5 files changed, 43 insertions(+), 43 deletions(-)

diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c
index edbc093..3266ee0 100644
--- a/arch/mips/ath79/mach-ubnt-xm.c
+++ b/arch/mips/ath79/mach-ubnt-xm.c
@@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ubnt_xm_spi_data = {
 #ifdef CONFIG_PCI
 static struct ath9k_platform_data ubnt_xm_eeprom_data;
 
-static struct ath724x_pci_data ubnt_xm_pci_data[] = {
+static struct ar724x_pci_data ubnt_xm_pci_data[] = {
 	{
 		.irq	= UBNT_XM_PCI_IRQ,
 		.pdata	= &ubnt_xm_eeprom_data,
@@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void)
 	memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
 	       sizeof(ubnt_xm_eeprom_data.eeprom_data));
 
-	ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
+	ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
 #endif /* CONFIG_PCI */
 
 	ath79_register_pci();
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
index 342363b..9989495c 100644
--- a/arch/mips/ath79/pci.c
+++ b/arch/mips/ath79/pci.c
@@ -13,10 +13,10 @@
 #include <asm/mach-ath79/pci.h>
 #include "pci.h"
 
-static struct ath724x_pci_data *pci_data;
+static struct ar724x_pci_data *pci_data;
 static int pci_data_size;
 
-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
 {
 	pci_data	= data;
 	pci_data_size	= size;
@@ -52,7 +52,7 @@ int __init ath79_register_pci(void)
 	int ret;
 
 	if (soc_is_ar724x())
-		ret = ath724x_pcibios_init();
+		ret = ar724x_pcibios_init();
 	else
 		ret = -ENODEV;
 
diff --git a/arch/mips/ath79/pci.h b/arch/mips/ath79/pci.h
index 787fac2..e0601c4 100644
--- a/arch/mips/ath79/pci.h
+++ b/arch/mips/ath79/pci.h
@@ -8,15 +8,15 @@
  *  by the Free Software Foundation.
  */
 
-#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
-#define __ASM_MACH_ATH79_PCI_ATH724X_H
+#ifndef _ATH79_PCI_H
+#define _ATH79_PCI_H
 
-struct ath724x_pci_data {
+struct ar724x_pci_data {
 	int irq;
 	void *pdata;
 };
 
-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
 
 #ifdef CONFIG_PCI
 int ath79_register_pci(void);
@@ -24,4 +24,4 @@ int ath79_register_pci(void);
 static inline int ath79_register_pci(void) { return 0; }
 #endif
 
-#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
+#endif /* _ATH79_PCI_H */
diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h
index 7ef8a49..0aaf41f 100644
--- a/arch/mips/include/asm/mach-ath79/pci.h
+++ b/arch/mips/include/asm/mach-ath79/pci.h
@@ -12,9 +12,9 @@
 #define __ASM_MACH_ATH79_PCI_H
 
 #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
-int ath724x_pcibios_init(void);
+int ar724x_pcibios_init(void);
 #else
-static inline int ath724x_pcibios_init(void) { return 0 };
+static inline int ar724x_pcibios_init(void) { return 0 };
 #endif
 
 #endif /* __ASM_MACH_ATH79_PCI_H */
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index ebefc16..772d12c 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -14,13 +14,13 @@
 #define reg_read(_phys)		(*(unsigned int *) KSEG1ADDR(_phys))
 #define reg_write(_phys, _val)	((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
 
-#define ATH724X_PCI_DEV_BASE	0x14000000
-#define ATH724X_PCI_MEM_BASE	0x10000000
-#define ATH724X_PCI_MEM_SIZE	0x08000000
+#define AR724X_PCI_DEV_BASE	0x14000000
+#define AR724X_PCI_MEM_BASE	0x10000000
+#define AR724X_PCI_MEM_SIZE	0x08000000
 
-static DEFINE_SPINLOCK(ath724x_pci_lock);
+static DEFINE_SPINLOCK(ar724x_pci_lock);
 
-static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
+static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 			    int size, uint32_t *value)
 {
 	unsigned long flags, addr, tval, mask;
@@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 	if (where & (size - 1))
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	spin_lock_irqsave(&ath724x_pci_lock, flags);
+	spin_lock_irqsave(&ar724x_pci_lock, flags);
 
 	switch (size) {
 	case 1:
 		addr = where & ~3;
 		mask = 0xff000000 >> ((where % 4) * 8);
-		tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
+		tval = reg_read(AR724X_PCI_DEV_BASE + addr);
 		tval = tval & ~mask;
 		*value = (tval >> ((4 - (where % 4))*8));
 		break;
 	case 2:
 		addr = where & ~3;
 		mask = 0xffff0000 >> ((where % 4)*8);
-		tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
+		tval = reg_read(AR724X_PCI_DEV_BASE + addr);
 		tval = tval & ~mask;
 		*value = (tval >> ((4 - (where % 4))*8));
 		break;
 	case 4:
-		*value = reg_read(ATH724X_PCI_DEV_BASE + where);
+		*value = reg_read(AR724X_PCI_DEV_BASE + where);
 		break;
 	default:
-		spin_unlock_irqrestore(&ath724x_pci_lock, flags);
+		spin_unlock_irqrestore(&ar724x_pci_lock, flags);
 
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	spin_unlock_irqrestore(&ath724x_pci_lock, flags);
+	spin_unlock_irqrestore(&ar724x_pci_lock, flags);
 
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
+static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 			     int size, uint32_t value)
 {
 	unsigned long flags, tval, addr, mask;
@@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 	if (where & (size - 1))
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	spin_lock_irqsave(&ath724x_pci_lock, flags);
+	spin_lock_irqsave(&ar724x_pci_lock, flags);
 
 	switch (size) {
 	case 1:
-		addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
+		addr = (AR724X_PCI_DEV_BASE + where) & ~3;
 		mask = 0xff000000 >> ((where % 4)*8);
 		tval = reg_read(addr);
 		tval = tval & ~mask;
@@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 		reg_write(addr, tval);
 		break;
 	case 2:
-		addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
+		addr = (AR724X_PCI_DEV_BASE + where) & ~3;
 		mask = 0xffff0000 >> ((where % 4)*8);
 		tval = reg_read(addr);
 		tval = tval & ~mask;
@@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 		reg_write(addr, tval);
 		break;
 	case 4:
-		reg_write((ATH724X_PCI_DEV_BASE + where), value);
+		reg_write((AR724X_PCI_DEV_BASE + where), value);
 		break;
 	default:
-		spin_unlock_irqrestore(&ath724x_pci_lock, flags);
+		spin_unlock_irqrestore(&ar724x_pci_lock, flags);
 
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	spin_unlock_irqrestore(&ath724x_pci_lock, flags);
+	spin_unlock_irqrestore(&ar724x_pci_lock, flags);
 
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static struct pci_ops ath724x_pci_ops = {
-	.read	= ath724x_pci_read,
-	.write	= ath724x_pci_write,
+static struct pci_ops ar724x_pci_ops = {
+	.read	= ar724x_pci_read,
+	.write	= ar724x_pci_write,
 };
 
-static struct resource ath724x_io_resource = {
+static struct resource ar724x_io_resource = {
 	.name   = "PCI IO space",
 	.start  = 0,
 	.end    = 0,
 	.flags  = IORESOURCE_IO,
 };
 
-static struct resource ath724x_mem_resource = {
+static struct resource ar724x_mem_resource = {
 	.name   = "PCI memory space",
-	.start  = ATH724X_PCI_MEM_BASE,
-	.end    = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
+	.start  = AR724X_PCI_MEM_BASE,
+	.end    = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
 	.flags  = IORESOURCE_MEM,
 };
 
-static struct pci_controller ath724x_pci_controller = {
-	.pci_ops        = &ath724x_pci_ops,
-	.io_resource    = &ath724x_io_resource,
-	.mem_resource	= &ath724x_mem_resource,
+static struct pci_controller ar724x_pci_controller = {
+	.pci_ops        = &ar724x_pci_ops,
+	.io_resource    = &ar724x_io_resource,
+	.mem_resource	= &ar724x_mem_resource,
 };
 
-int __init ath724x_pcibios_init(void)
+int __init ar724x_pcibios_init(void)
 {
-	register_pci_controller(&ath724x_pci_controller);
+	register_pci_controller(&ar724x_pci_controller);
 
 	return PCIBIOS_SUCCESSFUL;
 }
-- 
1.7.2.1

[PATCH v3 7/7] MIPS: ath79: use io-accessor macros in pci-ar724x.c

[Gabor Juhos]

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
v3: - no changes
v2: - remove 'ret' variable from ar724x_pcibios_init
---
 arch/mips/pci/pci-ar724x.c |   38 ++++++++++++++++++++++++--------------
 1 files changed, 24 insertions(+), 14 deletions(-)

diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 772d12c..22f5e5b 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -11,19 +11,19 @@
 #include <linux/pci.h>
 #include <asm/mach-ath79/pci.h>
 
-#define reg_read(_phys)		(*(unsigned int *) KSEG1ADDR(_phys))
-#define reg_write(_phys, _val)	((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
-
-#define AR724X_PCI_DEV_BASE	0x14000000
+#define AR724X_PCI_CFG_BASE	0x14000000
+#define AR724X_PCI_CFG_SIZE	0x1000
 #define AR724X_PCI_MEM_BASE	0x10000000
 #define AR724X_PCI_MEM_SIZE	0x08000000
 
 static DEFINE_SPINLOCK(ar724x_pci_lock);
+static void __iomem *ar724x_pci_devcfg_base;
 
 static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 			    int size, uint32_t *value)
 {
 	unsigned long flags, addr, tval, mask;
+	void __iomem *base;
 
 	if (devfn)
 		return PCIBIOS_DEVICE_NOT_FOUND;
@@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 	if (where & (size - 1))
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
+	base = ar724x_pci_devcfg_base;
+
 	spin_lock_irqsave(&ar724x_pci_lock, flags);
 
 	switch (size) {
 	case 1:
 		addr = where & ~3;
 		mask = 0xff000000 >> ((where % 4) * 8);
-		tval = reg_read(AR724X_PCI_DEV_BASE + addr);
+		tval = __raw_readl(base + addr);
 		tval = tval & ~mask;
 		*value = (tval >> ((4 - (where % 4))*8));
 		break;
 	case 2:
 		addr = where & ~3;
 		mask = 0xffff0000 >> ((where % 4)*8);
-		tval = reg_read(AR724X_PCI_DEV_BASE + addr);
+		tval = __raw_readl(base + addr);
 		tval = tval & ~mask;
 		*value = (tval >> ((4 - (where % 4))*8));
 		break;
 	case 4:
-		*value = reg_read(AR724X_PCI_DEV_BASE + where);
+		*value = __raw_readl(base + where);
 		break;
 	default:
 		spin_unlock_irqrestore(&ar724x_pci_lock, flags);
@@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 			     int size, uint32_t value)
 {
 	unsigned long flags, tval, addr, mask;
+	void __iomem *base;
 
 	if (devfn)
 		return PCIBIOS_DEVICE_NOT_FOUND;
@@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 	if (where & (size - 1))
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
+	base = ar724x_pci_devcfg_base;
+
 	spin_lock_irqsave(&ar724x_pci_lock, flags);
 
 	switch (size) {
 	case 1:
-		addr = (AR724X_PCI_DEV_BASE + where) & ~3;
+		addr = where & ~3;
 		mask = 0xff000000 >> ((where % 4)*8);
-		tval = reg_read(addr);
+		tval = __raw_readl(base + addr);
 		tval = tval & ~mask;
 		tval |= (value << ((4 - (where % 4))*8)) & mask;
-		reg_write(addr, tval);
+		__raw_writel(tval, base + addr);
 		break;
 	case 2:
-		addr = (AR724X_PCI_DEV_BASE + where) & ~3;
+		addr = where & ~3;
 		mask = 0xffff0000 >> ((where % 4)*8);
-		tval = reg_read(addr);
+		tval = __raw_readl(base + addr);
 		tval = tval & ~mask;
 		tval |= (value << ((4 - (where % 4))*8)) & mask;
-		reg_write(addr, tval);
+		__raw_writel(tval, base + addr);
 		break;
 	case 4:
-		reg_write((AR724X_PCI_DEV_BASE + where), value);
+		__raw_writel(value, (base + where));
 		break;
 	default:
 		spin_unlock_irqrestore(&ar724x_pci_lock, flags);
@@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_controller = {
 
 int __init ar724x_pcibios_init(void)
 {
+	ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
+					 AR724X_PCI_CFG_SIZE);
+	if (ar724x_pci_devcfg_base == NULL)
+		return -ENOMEM;
+
 	register_pci_controller(&ar724x_pci_controller);
 
 	return PCIBIOS_SUCCESSFUL;
-- 
1.7.2.1

Re: [PATCH v3 4/7] MIPS: ath79: add a common PCI registration function

[Sergei Shtylyov]

Hello.

On 21-11-2011 1:39, Gabor Juhos wrote:

> The current code unconditionally registers the AR724X
> specific PCI controller, even if the kernel is running
> on a different SoC.

> Add a common function for PCI controller registration,
> and only register the AR724X PCI controller if the kernel
> is running on an AR724X SoC.

> Signed-off-by: Gabor Juhos<juhosg@openwrt.org>
> ---
> v3: - fix compile error if CONFIG_PCI is not defined
>      - add __init annotation to ath79_register_pci

> v2: - no changes
[...]

> diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
> index 4957428..342363b 100644
> --- a/arch/mips/ath79/pci.c
> +++ b/arch/mips/ath79/pci.c

> @@ -44,3 +46,15 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
>
>   	return PCIBIOS_SUCCESSFUL;
>   }
> +
> +int __init ath79_register_pci(void)
> +{
> +	int ret;
> +
> +	if (soc_is_ar724x())
> +		ret = ath724x_pcibios_init();
> +	else
> +		ret = -ENODEV;

    Why not return right away and save 4 lines of code?

> +
> +	return ret;
> +}

WBR, Sergei

Re: [PATCH v3 3/7] MIPS: ath79: make ath724x_pcibios_init visible for external code

[Sergei Shtylyov]

Hello.

On 21-11-2011 1:39, Gabor Juhos wrote:

> Signed-off-by: Gabor Juhos<juhosg@openwrt.org>
> ---
> v3: - no changes
> v2: - fix a typo in my e-mail address
[...]

> diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h
> new file mode 100644
> index 0000000..7ef8a49
> --- /dev/null
> +++ b/arch/mips/include/asm/mach-ath79/pci.h
> @@ -0,0 +1,20 @@
> +/*
> + *  Atheros 724x PCI support
> + *
> + *  Copyright (C) 2011 René Bolldorf<xsecute@googlemail.com>

    No signoff from him? He seems to be the original author...

WBR, Sergei

Re: [PATCH v3 3/7] MIPS: ath79: make ath724x_pcibios_init visible for external code

[Gabor Juhos]

Hi Sergei,

>> --- /dev/null
>> +++ b/arch/mips/include/asm/mach-ath79/pci.h
>> @@ -0,0 +1,20 @@
>> +/*
>> + *  Atheros 724x PCI support
>> + *
>> + *  Copyright (C) 2011 René Bolldorf<xsecute@googlemail.com>
> 
>    No signoff from him? He seems to be the original author...

I have added him to CC, so he can ACK/NACK the patch. However I'm not aware of
any rule which states that each patch must be signed off by the original authors
of the modified code.

I have missed something?

-Gabor

Re: [PATCH v3 4/7] MIPS: ath79: add a common PCI registration function

[Gabor Juhos]

Hi Sergei,

2011.11.21. 11:17 keltezéssel, Sergei Shtylyov írta:
> Hello.
> 
> On 21-11-2011 1:39, Gabor Juhos wrote:
> 
>> The current code unconditionally registers the AR724X
>> specific PCI controller, even if the kernel is running
>> on a different SoC.
> 

<...>

>>   }
>> +
>> +int __init ath79_register_pci(void)
>> +{
>> +    int ret;
>> +
>> +    if (soc_is_ar724x())
>> +        ret = ath724x_pcibios_init();
>> +    else
>> +        ret = -ENODEV;
> 
>    Why not return right away and save 4 lines of code?

Because I have more patches which will need the if-else statement. Apart from
that, you are right it is not needed here. I will remove it from the current patch.

-Gabor

Re: [PATCH v3 2/7] MIPS: ath79: rename pci-ath724x.h

[René Bolldorf]

Acked-by: Rene Bolldorf <xsecute@googlemail.com>

On Sun, Nov 20, 2011 at 10:39 PM, Gabor Juhos <juhosg@openwrt.org> wrote:
> The declared function in this header file is used by the
> ath79 platform code only. Move the header to the platform
> directory.
>
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
> v3: - move include "pci.h" out of the #ifdef CONFIG_PCI section
> v2: - no changes
> ---
>  arch/mips/ath79/mach-ubnt-xm.c                     |    2 +-
>  arch/mips/ath79/pci.c                              |    2 +-
>  .../asm/mach-ath79/pci-ath724x.h => ath79/pci.h}   |    0
>  3 files changed, 2 insertions(+), 2 deletions(-)
>  rename arch/mips/{include/asm/mach-ath79/pci-ath724x.h => ath79/pci.h} (100%)
>
> diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c
> index 3c311a5..a043500 100644
> --- a/arch/mips/ath79/mach-ubnt-xm.c
> +++ b/arch/mips/ath79/mach-ubnt-xm.c
> @@ -15,13 +15,13 @@
>
>  #ifdef CONFIG_PCI
>  #include <linux/ath9k_platform.h>
> -#include <asm/mach-ath79/pci-ath724x.h>
>  #endif /* CONFIG_PCI */
>
>  #include "machtypes.h"
>  #include "dev-gpio-buttons.h"
>  #include "dev-leds-gpio.h"
>  #include "dev-spi.h"
> +#include "pci.h"
>
>  #define UBNT_XM_GPIO_LED_L1            0
>  #define UBNT_XM_GPIO_LED_L2            1
> diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
> index 8db076e..4957428 100644
> --- a/arch/mips/ath79/pci.c
> +++ b/arch/mips/ath79/pci.c
> @@ -9,7 +9,7 @@
>  */
>
>  #include <linux/pci.h>
> -#include <asm/mach-ath79/pci-ath724x.h>
> +#include "pci.h"
>
>  static struct ath724x_pci_data *pci_data;
>  static int pci_data_size;
> diff --git a/arch/mips/include/asm/mach-ath79/pci-ath724x.h b/arch/mips/ath79/pci.h
> similarity index 100%
> rename from arch/mips/include/asm/mach-ath79/pci-ath724x.h
> rename to arch/mips/ath79/pci.h
> --
> 1.7.2.1
>
>

Re: [PATCH v3 5/7] MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name

[René Bolldorf]

Acked-by: Rene Bolldorf <xsecute@googlemail.com>

On Sun, Nov 20, 2011 at 10:39 PM, Gabor Juhos <juhosg@openwrt.org> wrote:
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
> v3: - no changes
> v2: - no changes
> ---
>  arch/mips/pci/Makefile                        |    2 +-
>  arch/mips/pci/{pci-ath724x.c => pci-ar724x.c} |    0
>  2 files changed, 1 insertions(+), 1 deletions(-)
>  rename arch/mips/pci/{pci-ath724x.c => pci-ar724x.c} (100%)
>
> diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
> index c3ac4b0..172277c 100644
> --- a/arch/mips/pci/Makefile
> +++ b/arch/mips/pci/Makefile
> @@ -19,7 +19,7 @@ obj-$(CONFIG_BCM47XX)         += pci-bcm47xx.o
>  obj-$(CONFIG_BCM63XX)          += pci-bcm63xx.o fixup-bcm63xx.o \
>                                        ops-bcm63xx.o
>  obj-$(CONFIG_MIPS_ALCHEMY)     += pci-alchemy.o
> -obj-$(CONFIG_SOC_AR724X)       += pci-ath724x.o
> +obj-$(CONFIG_SOC_AR724X)       += pci-ar724x.o
>
>  #
>  # These are still pretty much in the old state, watch, go blind.
> diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ar724x.c
> similarity index 100%
> rename from arch/mips/pci/pci-ath724x.c
> rename to arch/mips/pci/pci-ar724x.c
> --
> 1.7.2.1
>
>

Re: [PATCH v3 1/7] MIPS: ath79: separate common PCI code

[René Bolldorf]

Acked-by: Rene Bolldorf <xsecute@googlemail.com>

On Sun, Nov 20, 2011 at 10:39 PM, Gabor Juhos <juhosg@openwrt.org> wrote:
> The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
> are common functions and only instance one of them
> can be present in a single kernel.
>
> Currently these functions can be built only if the
> CONFIG_SOC_AR724X option is selected. However the
> ath79 platform contain support for the AR71XX SoCs,.
> The AR71XX SoCs have a differnet PCI controller,
> and those will require a different code.
>
> Move the common PCI code into a separeate file in
> order to be able to use that with other SoCs as
> well.
>
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
> v3: - no changes
> v2: - no changes
> ---
>  arch/mips/ath79/Makefile    |    1 +
>  arch/mips/ath79/pci.c       |   46 +++++++++++++++++++++++++++++++++++++++++++
>  arch/mips/pci/pci-ath724x.c |   34 -------------------------------
>  3 files changed, 47 insertions(+), 34 deletions(-)
>  create mode 100644 arch/mips/ath79/pci.c
>
> diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile
> index 3b911e09..221a76a9 100644
> --- a/arch/mips/ath79/Makefile
> +++ b/arch/mips/ath79/Makefile
> @@ -11,6 +11,7 @@
>  obj-y  := prom.o setup.o irq.o common.o clock.o gpio.o
>
>  obj-$(CONFIG_EARLY_PRINTK)             += early_printk.o
> +obj-$(CONFIG_PCI)                      += pci.o
>
>  #
>  # Devices
> diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
> new file mode 100644
> index 0000000..8db076e
> --- /dev/null
> +++ b/arch/mips/ath79/pci.c
> @@ -0,0 +1,46 @@
> +/*
> + *  Atheros AR71XX/AR724X specific PCI setup code
> + *
> + *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
> + *
> + *  This program is free software; you can redistribute it and/or modify it
> + *  under the terms of the GNU General Public License version 2 as published
> + *  by the Free Software Foundation.
> + */
> +
> +#include <linux/pci.h>
> +#include <asm/mach-ath79/pci-ath724x.h>
> +
> +static struct ath724x_pci_data *pci_data;
> +static int pci_data_size;
> +
> +void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
> +{
> +       pci_data        = data;
> +       pci_data_size   = size;
> +}
> +
> +int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
> +{
> +       unsigned int devfn = dev->devfn;
> +       int irq = -1;
> +
> +       if (devfn > pci_data_size - 1)
> +               return irq;
> +
> +       irq = pci_data[devfn].irq;
> +
> +       return irq;
> +}
> +
> +int pcibios_plat_dev_init(struct pci_dev *dev)
> +{
> +       unsigned int devfn = dev->devfn;
> +
> +       if (devfn > pci_data_size - 1)
> +               return PCIBIOS_DEVICE_NOT_FOUND;
> +
> +       dev->dev.platform_data = pci_data[devfn].pdata;
> +
> +       return PCIBIOS_SUCCESSFUL;
> +}
> diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c
> index a4dd24a..1e810be 100644
> --- a/arch/mips/pci/pci-ath724x.c
> +++ b/arch/mips/pci/pci-ath724x.c
> @@ -9,7 +9,6 @@
>  */
>
>  #include <linux/pci.h>
> -#include <asm/mach-ath79/pci-ath724x.h>
>
>  #define reg_read(_phys)                (*(unsigned int *) KSEG1ADDR(_phys))
>  #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
> @@ -19,8 +18,6 @@
>  #define ATH724X_PCI_MEM_SIZE   0x08000000
>
>  static DEFINE_SPINLOCK(ath724x_pci_lock);
> -static struct ath724x_pci_data *pci_data;
> -static int pci_data_size;
>
>  static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
>                            int size, uint32_t *value)
> @@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci_controller = {
>        .mem_resource   = &ath724x_mem_resource,
>  };
>
> -void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
> -{
> -       pci_data        = data;
> -       pci_data_size   = size;
> -}
> -
> -int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
> -{
> -       unsigned int devfn = dev->devfn;
> -       int irq = -1;
> -
> -       if (devfn > pci_data_size - 1)
> -               return irq;
> -
> -       irq = pci_data[devfn].irq;
> -
> -       return irq;
> -}
> -
> -int pcibios_plat_dev_init(struct pci_dev *dev)
> -{
> -       unsigned int devfn = dev->devfn;
> -
> -       if (devfn > pci_data_size - 1)
> -               return PCIBIOS_DEVICE_NOT_FOUND;
> -
> -       dev->dev.platform_data = pci_data[devfn].pdata;
> -
> -       return PCIBIOS_SUCCESSFUL;
> -}
> -
>  static int __init ath724x_pcibios_init(void)
>  {
>        register_pci_controller(&ath724x_pci_controller);
> --
> 1.7.2.1
>
>

Re: [PATCH v3 7/7] MIPS: ath79: use io-accessor macros in pci-ar724x.c

[René Bolldorf]

Acked-by: Rene Bolldorf <xsecute@googlemail.com>

On Sun, Nov 20, 2011 at 10:39 PM, Gabor Juhos <juhosg@openwrt.org> wrote:
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
> v3: - no changes
> v2: - remove 'ret' variable from ar724x_pcibios_init
> ---
>  arch/mips/pci/pci-ar724x.c |   38 ++++++++++++++++++++++++--------------
>  1 files changed, 24 insertions(+), 14 deletions(-)
>
> diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
> index 772d12c..22f5e5b 100644
> --- a/arch/mips/pci/pci-ar724x.c
> +++ b/arch/mips/pci/pci-ar724x.c
> @@ -11,19 +11,19 @@
>  #include <linux/pci.h>
>  #include <asm/mach-ath79/pci.h>
>
> -#define reg_read(_phys)                (*(unsigned int *) KSEG1ADDR(_phys))
> -#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
> -
> -#define AR724X_PCI_DEV_BASE    0x14000000
> +#define AR724X_PCI_CFG_BASE    0x14000000
> +#define AR724X_PCI_CFG_SIZE    0x1000
>  #define AR724X_PCI_MEM_BASE    0x10000000
>  #define AR724X_PCI_MEM_SIZE    0x08000000
>
>  static DEFINE_SPINLOCK(ar724x_pci_lock);
> +static void __iomem *ar724x_pci_devcfg_base;
>
>  static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
>                            int size, uint32_t *value)
>  {
>        unsigned long flags, addr, tval, mask;
> +       void __iomem *base;
>
>        if (devfn)
>                return PCIBIOS_DEVICE_NOT_FOUND;
> @@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
>        if (where & (size - 1))
>                return PCIBIOS_BAD_REGISTER_NUMBER;
>
> +       base = ar724x_pci_devcfg_base;
> +
>        spin_lock_irqsave(&ar724x_pci_lock, flags);
>
>        switch (size) {
>        case 1:
>                addr = where & ~3;
>                mask = 0xff000000 >> ((where % 4) * 8);
> -               tval = reg_read(AR724X_PCI_DEV_BASE + addr);
> +               tval = __raw_readl(base + addr);
>                tval = tval & ~mask;
>                *value = (tval >> ((4 - (where % 4))*8));
>                break;
>        case 2:
>                addr = where & ~3;
>                mask = 0xffff0000 >> ((where % 4)*8);
> -               tval = reg_read(AR724X_PCI_DEV_BASE + addr);
> +               tval = __raw_readl(base + addr);
>                tval = tval & ~mask;
>                *value = (tval >> ((4 - (where % 4))*8));
>                break;
>        case 4:
> -               *value = reg_read(AR724X_PCI_DEV_BASE + where);
> +               *value = __raw_readl(base + where);
>                break;
>        default:
>                spin_unlock_irqrestore(&ar724x_pci_lock, flags);
> @@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
>                             int size, uint32_t value)
>  {
>        unsigned long flags, tval, addr, mask;
> +       void __iomem *base;
>
>        if (devfn)
>                return PCIBIOS_DEVICE_NOT_FOUND;
> @@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
>        if (where & (size - 1))
>                return PCIBIOS_BAD_REGISTER_NUMBER;
>
> +       base = ar724x_pci_devcfg_base;
> +
>        spin_lock_irqsave(&ar724x_pci_lock, flags);
>
>        switch (size) {
>        case 1:
> -               addr = (AR724X_PCI_DEV_BASE + where) & ~3;
> +               addr = where & ~3;
>                mask = 0xff000000 >> ((where % 4)*8);
> -               tval = reg_read(addr);
> +               tval = __raw_readl(base + addr);
>                tval = tval & ~mask;
>                tval |= (value << ((4 - (where % 4))*8)) & mask;
> -               reg_write(addr, tval);
> +               __raw_writel(tval, base + addr);
>                break;
>        case 2:
> -               addr = (AR724X_PCI_DEV_BASE + where) & ~3;
> +               addr = where & ~3;
>                mask = 0xffff0000 >> ((where % 4)*8);
> -               tval = reg_read(addr);
> +               tval = __raw_readl(base + addr);
>                tval = tval & ~mask;
>                tval |= (value << ((4 - (where % 4))*8)) & mask;
> -               reg_write(addr, tval);
> +               __raw_writel(tval, base + addr);
>                break;
>        case 4:
> -               reg_write((AR724X_PCI_DEV_BASE + where), value);
> +               __raw_writel(value, (base + where));
>                break;
>        default:
>                spin_unlock_irqrestore(&ar724x_pci_lock, flags);
> @@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_controller = {
>
>  int __init ar724x_pcibios_init(void)
>  {
> +       ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
> +                                        AR724X_PCI_CFG_SIZE);
> +       if (ar724x_pci_devcfg_base == NULL)
> +               return -ENOMEM;
> +
>        register_pci_controller(&ar724x_pci_controller);
>
>        return PCIBIOS_SUCCESSFUL;
> --
> 1.7.2.1
>
>

Re: [PATCH v3 6/7] MIPS: ath79: replace ath724x to ar724x

[René Bolldorf]

Acked-by: Rene Bolldorf <xsecute@googlemail.com>

On Sun, Nov 20, 2011 at 10:39 PM, Gabor Juhos <juhosg@openwrt.org> wrote:
> Replace the 'ath724x' to 'ar724x' in function, variable and
> structure names to reflect the name of the real SoC.
>
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
> v3: - no changes
> v2: - no changes
> ---
>  arch/mips/ath79/mach-ubnt-xm.c         |    4 +-
>  arch/mips/ath79/pci.c                  |    6 ++--
>  arch/mips/ath79/pci.h                  |   10 +++---
>  arch/mips/include/asm/mach-ath79/pci.h |    4 +-
>  arch/mips/pci/pci-ar724x.c             |   62 ++++++++++++++++----------------
>  5 files changed, 43 insertions(+), 43 deletions(-)
>
> diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c
> index edbc093..3266ee0 100644
> --- a/arch/mips/ath79/mach-ubnt-xm.c
> +++ b/arch/mips/ath79/mach-ubnt-xm.c
> @@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ubnt_xm_spi_data = {
>  #ifdef CONFIG_PCI
>  static struct ath9k_platform_data ubnt_xm_eeprom_data;
>
> -static struct ath724x_pci_data ubnt_xm_pci_data[] = {
> +static struct ar724x_pci_data ubnt_xm_pci_data[] = {
>        {
>                .irq    = UBNT_XM_PCI_IRQ,
>                .pdata  = &ubnt_xm_eeprom_data,
> @@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void)
>        memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
>               sizeof(ubnt_xm_eeprom_data.eeprom_data));
>
> -       ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
> +       ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
>  #endif /* CONFIG_PCI */
>
>        ath79_register_pci();
> diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
> index 342363b..9989495c 100644
> --- a/arch/mips/ath79/pci.c
> +++ b/arch/mips/ath79/pci.c
> @@ -13,10 +13,10 @@
>  #include <asm/mach-ath79/pci.h>
>  #include "pci.h"
>
> -static struct ath724x_pci_data *pci_data;
> +static struct ar724x_pci_data *pci_data;
>  static int pci_data_size;
>
> -void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
> +void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
>  {
>        pci_data        = data;
>        pci_data_size   = size;
> @@ -52,7 +52,7 @@ int __init ath79_register_pci(void)
>        int ret;
>
>        if (soc_is_ar724x())
> -               ret = ath724x_pcibios_init();
> +               ret = ar724x_pcibios_init();
>        else
>                ret = -ENODEV;
>
> diff --git a/arch/mips/ath79/pci.h b/arch/mips/ath79/pci.h
> index 787fac2..e0601c4 100644
> --- a/arch/mips/ath79/pci.h
> +++ b/arch/mips/ath79/pci.h
> @@ -8,15 +8,15 @@
>  *  by the Free Software Foundation.
>  */
>
> -#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
> -#define __ASM_MACH_ATH79_PCI_ATH724X_H
> +#ifndef _ATH79_PCI_H
> +#define _ATH79_PCI_H
>
> -struct ath724x_pci_data {
> +struct ar724x_pci_data {
>        int irq;
>        void *pdata;
>  };
>
> -void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
> +void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
>
>  #ifdef CONFIG_PCI
>  int ath79_register_pci(void);
> @@ -24,4 +24,4 @@ int ath79_register_pci(void);
>  static inline int ath79_register_pci(void) { return 0; }
>  #endif
>
> -#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
> +#endif /* _ATH79_PCI_H */
> diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h
> index 7ef8a49..0aaf41f 100644
> --- a/arch/mips/include/asm/mach-ath79/pci.h
> +++ b/arch/mips/include/asm/mach-ath79/pci.h
> @@ -12,9 +12,9 @@
>  #define __ASM_MACH_ATH79_PCI_H
>
>  #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
> -int ath724x_pcibios_init(void);
> +int ar724x_pcibios_init(void);
>  #else
> -static inline int ath724x_pcibios_init(void) { return 0 };
> +static inline int ar724x_pcibios_init(void) { return 0 };
>  #endif
>
>  #endif /* __ASM_MACH_ATH79_PCI_H */
> diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
> index ebefc16..772d12c 100644
> --- a/arch/mips/pci/pci-ar724x.c
> +++ b/arch/mips/pci/pci-ar724x.c
> @@ -14,13 +14,13 @@
>  #define reg_read(_phys)                (*(unsigned int *) KSEG1ADDR(_phys))
>  #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
>
> -#define ATH724X_PCI_DEV_BASE   0x14000000
> -#define ATH724X_PCI_MEM_BASE   0x10000000
> -#define ATH724X_PCI_MEM_SIZE   0x08000000
> +#define AR724X_PCI_DEV_BASE    0x14000000
> +#define AR724X_PCI_MEM_BASE    0x10000000
> +#define AR724X_PCI_MEM_SIZE    0x08000000
>
> -static DEFINE_SPINLOCK(ath724x_pci_lock);
> +static DEFINE_SPINLOCK(ar724x_pci_lock);
>
> -static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
> +static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
>                            int size, uint32_t *value)
>  {
>        unsigned long flags, addr, tval, mask;
> @@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
>        if (where & (size - 1))
>                return PCIBIOS_BAD_REGISTER_NUMBER;
>
> -       spin_lock_irqsave(&ath724x_pci_lock, flags);
> +       spin_lock_irqsave(&ar724x_pci_lock, flags);
>
>        switch (size) {
>        case 1:
>                addr = where & ~3;
>                mask = 0xff000000 >> ((where % 4) * 8);
> -               tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
> +               tval = reg_read(AR724X_PCI_DEV_BASE + addr);
>                tval = tval & ~mask;
>                *value = (tval >> ((4 - (where % 4))*8));
>                break;
>        case 2:
>                addr = where & ~3;
>                mask = 0xffff0000 >> ((where % 4)*8);
> -               tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
> +               tval = reg_read(AR724X_PCI_DEV_BASE + addr);
>                tval = tval & ~mask;
>                *value = (tval >> ((4 - (where % 4))*8));
>                break;
>        case 4:
> -               *value = reg_read(ATH724X_PCI_DEV_BASE + where);
> +               *value = reg_read(AR724X_PCI_DEV_BASE + where);
>                break;
>        default:
> -               spin_unlock_irqrestore(&ath724x_pci_lock, flags);
> +               spin_unlock_irqrestore(&ar724x_pci_lock, flags);
>
>                return PCIBIOS_BAD_REGISTER_NUMBER;
>        }
>
> -       spin_unlock_irqrestore(&ath724x_pci_lock, flags);
> +       spin_unlock_irqrestore(&ar724x_pci_lock, flags);
>
>        return PCIBIOS_SUCCESSFUL;
>  }
>
> -static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
> +static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
>                             int size, uint32_t value)
>  {
>        unsigned long flags, tval, addr, mask;
> @@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
>        if (where & (size - 1))
>                return PCIBIOS_BAD_REGISTER_NUMBER;
>
> -       spin_lock_irqsave(&ath724x_pci_lock, flags);
> +       spin_lock_irqsave(&ar724x_pci_lock, flags);
>
>        switch (size) {
>        case 1:
> -               addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
> +               addr = (AR724X_PCI_DEV_BASE + where) & ~3;
>                mask = 0xff000000 >> ((where % 4)*8);
>                tval = reg_read(addr);
>                tval = tval & ~mask;
> @@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
>                reg_write(addr, tval);
>                break;
>        case 2:
> -               addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
> +               addr = (AR724X_PCI_DEV_BASE + where) & ~3;
>                mask = 0xffff0000 >> ((where % 4)*8);
>                tval = reg_read(addr);
>                tval = tval & ~mask;
> @@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
>                reg_write(addr, tval);
>                break;
>        case 4:
> -               reg_write((ATH724X_PCI_DEV_BASE + where), value);
> +               reg_write((AR724X_PCI_DEV_BASE + where), value);
>                break;
>        default:
> -               spin_unlock_irqrestore(&ath724x_pci_lock, flags);
> +               spin_unlock_irqrestore(&ar724x_pci_lock, flags);
>
>                return PCIBIOS_BAD_REGISTER_NUMBER;
>        }
>
> -       spin_unlock_irqrestore(&ath724x_pci_lock, flags);
> +       spin_unlock_irqrestore(&ar724x_pci_lock, flags);
>
>        return PCIBIOS_SUCCESSFUL;
>  }
>
> -static struct pci_ops ath724x_pci_ops = {
> -       .read   = ath724x_pci_read,
> -       .write  = ath724x_pci_write,
> +static struct pci_ops ar724x_pci_ops = {
> +       .read   = ar724x_pci_read,
> +       .write  = ar724x_pci_write,
>  };
>
> -static struct resource ath724x_io_resource = {
> +static struct resource ar724x_io_resource = {
>        .name   = "PCI IO space",
>        .start  = 0,
>        .end    = 0,
>        .flags  = IORESOURCE_IO,
>  };
>
> -static struct resource ath724x_mem_resource = {
> +static struct resource ar724x_mem_resource = {
>        .name   = "PCI memory space",
> -       .start  = ATH724X_PCI_MEM_BASE,
> -       .end    = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
> +       .start  = AR724X_PCI_MEM_BASE,
> +       .end    = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
>        .flags  = IORESOURCE_MEM,
>  };
>
> -static struct pci_controller ath724x_pci_controller = {
> -       .pci_ops        = &ath724x_pci_ops,
> -       .io_resource    = &ath724x_io_resource,
> -       .mem_resource   = &ath724x_mem_resource,
> +static struct pci_controller ar724x_pci_controller = {
> +       .pci_ops        = &ar724x_pci_ops,
> +       .io_resource    = &ar724x_io_resource,
> +       .mem_resource   = &ar724x_mem_resource,
>  };
>
> -int __init ath724x_pcibios_init(void)
> +int __init ar724x_pcibios_init(void)
>  {
> -       register_pci_controller(&ath724x_pci_controller);
> +       register_pci_controller(&ar724x_pci_controller);
>
>        return PCIBIOS_SUCCESSFUL;
>  }
> --
> 1.7.2.1
>
>

Re: [PATCH v3 3/7] MIPS: ath79: make ath724x_pcibios_init visible for external code

[René Bolldorf]

The sob tag is only for persons that are involved in the development
of the patch.

Acked-by: Rene Bolldorf <xsecute@googlemail.com>

On Mon, Nov 21, 2011 at 12:53 PM, Gabor Juhos <juhosg@openwrt.org> wrote:
> Hi Sergei,
>
>>> --- /dev/null
>>> +++ b/arch/mips/include/asm/mach-ath79/pci.h
>>> @@ -0,0 +1,20 @@
>>> +/*
>>> + *  Atheros 724x PCI support
>>> + *
>>> + *  Copyright (C) 2011 René Bolldorf<xsecute@googlemail.com>
>>
>>    No signoff from him? He seems to be the original author...
>
> I have added him to CC, so he can ACK/NACK the patch. However I'm not aware of
> any rule which states that each patch must be signed off by the original authors
> of the modified code.
>
> I have missed something?
>
> -Gabor
>

Re: [PATCH v3 3/7] MIPS: ath79: make ath724x_pcibios_init visible for external code

[Ralf Baechle]

On Mon, Nov 21, 2011 at 02:58:50PM +0100, René Bolldorf wrote:

> The sob tag is only for persons that are involved in the development
> of the patch.
> 
> Acked-by: Rene Bolldorf <xsecute@googlemail.com>

Since the header file in question was taken from a patch that you had
signed off, it would have been acceptable for Gábor to add a SoB line
for you to this patch in addition to his own.

Documentation/SubmittinPatches defines the semantics of SoB as:

 < ------------ snip snap snop ----------- >

        Developer's Certificate of Origin 1.1

        By making a contribution to this project, I certify that:

        (a) The contribution was created in whole or in part by me and I
            have the right to submit it under the open source license
            indicated in the file; or

        (b) The contribution is based upon previous work that, to the best
            of my knowledge, is covered under an appropriate open source
            license and I have the right under that license to submit that
            work with modifications, whether created in whole or in part
            by me, under the same open source license (unless I am
            permitted to submit under a different license), as indicated
            in the file; or

        (c) The contribution was provided directly to me by some other
            person who certified (a), (b) or (c) and I have not modified
            it.

        (d) I understand and agree that this project and the contribution
            are public and that a record of the contribution (including all
            personal information I submit with it, including my sign-off) is
            maintained indefinitely and may be redistributed consistent with
            this project or the open source license(s) involved.

then you just add a line saying

        Signed-off-by: Random J Developer <random@developer.example.org>

 < ------------ snip snap snop ----------- >

I'm normally accept non-trivial patches with just a single SoB line though
I might ask for the original author(s)' SoB in some cases or might just
complain missing SoBs and apply a patch anyway if it's trivial which means
like 10 lines of not quite rocket science content.

  Ralf