* [Qemu-devel] [PATCH] cadence_uart: enable tx/rx on reset
@ 2012-10-22 14:20 Josh Cartwright
2012-10-23 3:30 ` Peter Crosthwaite
0 siblings, 1 reply; 2+ messages in thread
From: Josh Cartwright @ 2012-10-22 14:20 UTC (permalink / raw)
To: Peter Crosthwaite; +Cc: qemu-devel
Change the cadence_uart such that tx/rx is enabled on reset. Assuming
both are enabled makes debugging early Linux kernel bootup a little bit
easier.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
---
I've used this patch mostly for my own testing, but it may be of general
use. On a real system, I would expect the bootloader to leave the uart
in an enabled state, but I'm not using a bootloader for my testing :).
hw/cadence_uart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/cadence_uart.c b/hw/cadence_uart.c
index f8afc4e..2fb21a6 100644
--- a/hw/cadence_uart.c
+++ b/hw/cadence_uart.c
@@ -421,7 +421,7 @@ static const MemoryRegionOps uart_ops = {
static void cadence_uart_reset(UartState *s)
{
- s->r[R_CR] = 0x00000128;
+ s->r[R_CR] = UART_CR_RX_EN | UART_CR_TX_EN | UART_CR_STOPBRK;
s->r[R_IMR] = 0;
s->r[R_CISR] = 0;
s->r[R_RTRIG] = 0x00000020;
--
1.7.12.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] cadence_uart: enable tx/rx on reset
2012-10-22 14:20 [Qemu-devel] [PATCH] cadence_uart: enable tx/rx on reset Josh Cartwright
@ 2012-10-23 3:30 ` Peter Crosthwaite
0 siblings, 0 replies; 2+ messages in thread
From: Peter Crosthwaite @ 2012-10-23 3:30 UTC (permalink / raw)
To: Josh Cartwright; +Cc: Peter Maydell, qemu-devel
On Tue, Oct 23, 2012 at 12:20 AM, Josh Cartwright
<josh.cartwright@ni.com> wrote:
> Change the cadence_uart such that tx/rx is enabled on reset. Assuming
> both are enabled makes debugging early Linux kernel bootup a little bit
> easier.
>
> Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
> ---
>
> I've used this patch mostly for my own testing, but it may be of general
> use. On a real system, I would expect the bootloader to leave the uart
> in an enabled state, but I'm not using a bootloader for my testing :).
>
The difficulty here is QEMU needs to support modelling firmware as
well - QEMU should be usable to test boot-loaders themselves. For this
to work, its preferable that the hardware come out of reset in the
actual hardware reset state rather that the boot hand-off state. If
you need to accurately model the Linux boot-loader process, you can
always pass your actual boot-loader image as the guest to QEMU then
boot Linux as you would the real hardware.
The reverse case is a bigger problem. If our hardware comes out of
reset in the Linux bootstrap state then QEMU cant be used to
accurately model boot-loaders or standalone firmware apps (or anything
non-Linux).
If we want to do this as part of the QEMU arm-Linux boot-loader, then
I think the boot-loader itself should explicitly enable the UART TX.
Currently there is no mechanism for implementing this so its a greater
issue that goes beyond Zynq.
Peter, is there any precedent for this out in the ARM machine models
that you know of?
Regards,
Peter
> hw/cadence_uart.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/cadence_uart.c b/hw/cadence_uart.c
> index f8afc4e..2fb21a6 100644
> --- a/hw/cadence_uart.c
> +++ b/hw/cadence_uart.c
> @@ -421,7 +421,7 @@ static const MemoryRegionOps uart_ops = {
>
> static void cadence_uart_reset(UartState *s)
> {
> - s->r[R_CR] = 0x00000128;
> + s->r[R_CR] = UART_CR_RX_EN | UART_CR_TX_EN | UART_CR_STOPBRK;
> s->r[R_IMR] = 0;
> s->r[R_CISR] = 0;
> s->r[R_RTRIG] = 0x00000020;
> --
> 1.7.12.4
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2012-10-23 3:30 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-10-22 14:20 [Qemu-devel] [PATCH] cadence_uart: enable tx/rx on reset Josh Cartwright
2012-10-23 3:30 ` Peter Crosthwaite
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.