[U-Boot] BDI2000 configuration for P2020DS

[U-Boot] BDI2000 configuration for P2020DS

[Ira W. Snyder]

Hi everyone,

Does anyone have a BDI2000 configuration for the P2020DS that they could
share with me?

The documentation Freescale sent me claims that U-Boot is in a 4MB SPI
flash, however, the U-Boot that came with the board is unable to
initialize the SPI subsystem per their instructions.

=> sf probe 0
SF: Unsupported Manufacturer 00
Failed to initialize SPI flash at 0:0

I thought I'd use the BDI2000 to dump a copy of their U-Boot before I
replace it with my own, just for good measure.

Thank you,
Ira

[U-Boot] BDI2000 configuration for P2020DS

[Wolfgang Denk]

Dear "Ira W. Snyder",

In message <20110714185958.GE19312@ovro.caltech.edu> you wrote:
> 
> Does anyone have a BDI2000 configuration for the P2020DS that they could
> share with me?

Abatron ships a p2020ds.cfg with their firmware for the BDI.  Do you
think this is not working or not good enough?

> The documentation Freescale sent me claims that U-Boot is in a 4MB SPI
> flash, however, the U-Boot that came with the board is unable to
> initialize the SPI subsystem per their instructions.
...
> I thought I'd use the BDI2000 to dump a copy of their U-Boot before I
> replace it with my own, just for good measure.

Well, if it's really in SPI flash, then the BDI will not help you to
dump it.  The BDI cannot access SPI flash directly.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"A complex system that works is invariably found to have evolved from
a simple system that worked."             - John Gall, _Systemantics_

[U-Boot] BDI2000 configuration for P2020DS

[Ira W. Snyder]

On Thu, Jul 14, 2011 at 09:45:37PM +0200, Wolfgang Denk wrote:
> Dear "Ira W. Snyder",
> 
> In message <20110714185958.GE19312@ovro.caltech.edu> you wrote:
> > 
> > Does anyone have a BDI2000 configuration for the P2020DS that they could
> > share with me?
> 
> Abatron ships a p2020ds.cfg with their firmware for the BDI.  Do you
> think this is not working or not good enough?
> 

It says, right at the top:

; The values used to configure the memory controller
; are the ones U-boot uses to setup my system.
; Your system may need different ones !!!
;
; This configuration is not usable for U-boot debugging.
; Use it to debug example code loaded into SDRAM.

I'm hoping for a configuration that can program the flash on a bricked
board. Then I can flash anything I want without fear of rendering an
expensive board useless.

> > The documentation Freescale sent me claims that U-Boot is in a 4MB SPI
> > flash, however, the U-Boot that came with the board is unable to
> > initialize the SPI subsystem per their instructions.
> ...
> > I thought I'd use the BDI2000 to dump a copy of their U-Boot before I
> > replace it with my own, just for good measure.
> 
> Well, if it's really in SPI flash, then the BDI will not help you to
> dump it.  The BDI cannot access SPI flash directly.
> 

Thanks for the information.
Ira

[U-Boot] BDI2000 configuration for P2020DS

[McClintock Matthew-B29882]

On Thu, Jul 14, 2011 at 1:59 PM, Ira W. Snyder <iws@ovro.caltech.edu> wrote:
> The documentation Freescale sent me claims that U-Boot is in a 4MB SPI
> flash, however, the U-Boot that came with the board is unable to
> initialize the SPI subsystem per their instructions.
>
> => sf probe 0
> SF: Unsupported Manufacturer 00
> Failed to initialize SPI flash at 0:0

SPI is working for me. What version of u-boot are you running? Can you
paste your boot log?

-M

[U-Boot] BDI2000 configuration for P2020DS

[Wolfgang Denk]

Dear "Ira W. Snyder",

In message <20110714195525.GF19312@ovro.caltech.edu> you wrote:
>
> It says, right at the top:
> 
> ; The values used to configure the memory controller
> ; are the ones U-boot uses to setup my system.
> ; Your system may need different ones !!!
> ;
> ; This configuration is not usable for U-boot debugging.
> ; Use it to debug example code loaded into SDRAM.

Correct.  For U-Boot debugging, you will normally remove / comment out
all such config stuff anyway.  Please see the manual.

> I'm hoping for a configuration that can program the flash on a bricked
> board. Then I can flash anything I want without fear of rendering an
> expensive board useless.

If your code is really in SPI flash then you need to be able to
initialize the RAM and load and start U-Boot theree, because the BDI
cannot write SPI flash directly.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Pray: To ask that the laws of the universe be annulled in behalf of a
single petitioner confessedly unworthy.              - Ambrose Bierce

[U-Boot] BDI2000 configuration for P2020DS

[Ira W. Snyder]

On Thu, Jul 14, 2011 at 08:16:13PM +0000, McClintock Matthew-B29882 wrote:
> On Thu, Jul 14, 2011 at 1:59 PM, Ira W. Snyder <iws@ovro.caltech.edu> wrote:
> > The documentation Freescale sent me claims that U-Boot is in a 4MB SPI
> > flash, however, the U-Boot that came with the board is unable to
> > initialize the SPI subsystem per their instructions.
> >
> > => sf probe 0
> > SF: Unsupported Manufacturer 00
> > Failed to initialize SPI flash at 0:0
> 
> SPI is working for me. What version of u-boot are you running? Can you
> paste your boot log?
> 

I'm using the U-Boot that came on the board: 2009.11-V100R00. I have not
changed any DIP switches. My boot log is below.

Thanks for the help,
Ira


U-Boot 2009.11-V100R00 (Dec 09 2010 - 14:39:42)

CPU0:  P2020E, Version: 2.0, (0x80ea0020)
Core:  E500, Version: 5.0, (0x80211050)
Clock Configuration:
       CPU0:1200 MHz, CPU1:1200 MHz, 
       CCB:600  MHz,
       DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:37.500 MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
I2C:   ready
SPI:   ready
DRAM:   2 GB
L2:    512 KB enabled
MMC:  FSL_ESDHC: 0
SF: Unsupported manufacturer 00
*** Warning - bad CRC, using default environment

EEPROM: NXID v0
EEPROM: COMX

    PCIE3 connected to Slot0 as Root Complex (base addr ffe08000)
    PCIE3 on bus 00 - 00

    PCIE2 connected to Slot 1 as Root Complex (base addr ffe09000)
    PCIE2 on bus 01 - 01

    PCIE1 connected to Slot 2 as Root Complex (base addr ffe0a000)
    Current Status: LSR-11, LTSSM-16, PEX width-x1, Clock-2.5GT/s
               Scanning PCI bus 03
        03  00  18ca  0027  0300  00
    PCIE1 on bus 02 - 03

In:    serial
Out:   serial
Err:   serial
Net:   eTSEC1, eTSEC2, eTSEC3
Hit any key to stop autoboot:  0 
=> 
=> sf probe 0
SF: Unsupported manufacturer 00
Failed to initialize SPI flash at 0:0
=> printenv
ramboot=setenv bootargs root=/dev/ram rw DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $tftppath/$ramdiskfile;tftp $loadaddr $tftppath/$bootfile;tftp $fdtaddr $tftppath/$fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $tftppath/$bootfile;tftp $fdtaddr $tftppath/$fdtfile;bootm $loadaddr - $fdtaddr
bootdelay=10
baudrate=115200
loads_echo=1
ipaddr=192.168.0.250
serverip=192.168.0.197
rootpath=/local/tftpboot/COMX-P2020/current/rootfs_nfs
gatewayip=192.168.0.1
netmask=255.255.255.0
hostname=COMX-P2020
bootfile=uImage
loadaddr=1000000
bootcmd=run sdboot
sdboot=setenv bootargs root=/dev/mmcblk0p2 rw rootdelay=$rootdelaysecond DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs; mmcinfo;ext2load mmc 0:2 $loadaddr /boot/$bootfile;ext2load mmc 0:2 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr
sdfatboot=setenv bootargs root=/dev/ram rw rootdelay=$rootdelaysecond DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs; mmcinfo;fatload mmc 0:1 $loadaddr $bootfile;fatload mmc 0:1 $fdtaddr $fdtfile;fatload mmc 0:1 $ramdiskaddr $ramdiskfile;bootm $loadaddr $ramdiskaddr $fdtaddr
usbboot=setenv bootargs root=/dev/sda1 rw rootdelay=$rootdelaysecond DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr
usbfatboot=setenv bootargs root=/dev/ram rw DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs; usb start; fatload usb 0:2 $loadaddr $bootfile; fatload usb 0:2 $fdtaddr $fdtfile; fatload usb 0:2 $ramdiskaddr $ramdiskfile; bootm $loadaddr $ramdiskaddr $fdtaddr
usbext2boot=setenv bootargs root=/dev/ram rw DVO_OUTPUT=$DVO_OUTPUT console=$consoledev,$baudrate $othbootargs; usb start; ext2load usb 0:4 $loadaddr $bootfile; ext2load usb 0:4 $fdtaddr $fdtfile; ext2load usb 0:4 $ramdiskaddr $ramdiskfile; bootm $loadaddr $ramdiskaddr $fdtaddr
upgradespi=sf probe 0;setenv startaddr 0;setenv erasesize a0000;tftp 1000000 $tftppath/$uboot_spi;sf erase $startaddr $erasesize;sf write 1000000 $startaddr $filesize;sf erase 100000 120000
clearspienv=sf probe 0;sf erase 100000 20000
othbootargs=ramdisk_size=700000 cache-sram-size=0x10000
netdev=eth0
rootdelaysecond=15
uboot_nor=u-boot-nor.bin
uboot_spi=u-boot-spi.bin
uboot_sd=u-boot-sd.bin
consoledev=ttyS0
ramdiskaddr=2000000
ramdiskfile=rootfs-dev.ext2.img
fdtaddr=c00000
fdtfile=comx.dtb
tftppath=COMX-P2020/current
DVO_OUTPUT=enable
ethaddr=EC:9E:CD:01:4D:B4
eth1addr=EC:9E:CD:01:4D:B5
eth2addr=EC:9E:CD:01:4D:B6
ethact=eTSEC1

Environment size: 2804/8188 bytes

[U-Boot] BDI2000 configuration for P2020DS

[McClintock Matthew-B29882]

On Thu, Jul 14, 2011 at 3:41 PM, Ira W. Snyder <iws@ovro.caltech.edu> wrote:
> I'm using the U-Boot that came on the board: 2009.11-V100R00. I have not
> changed any DIP switches. My boot log is below.

I think this version is missing stuff for SPI to work. Can you try a
newer version? This board should support an altbank so you can test
the image without erasing the current one. You could also try applying
commit 9c4d8767 to your tree as well.

-M