stm32f7 / stmmac dma soft reset hangs

stm32f7 / stmmac dma soft reset hangs

[Christopher Friedt]

Hi list!

I've been tracing down an ethernet issue on the stm32f746-discovery
board. Several additional device tree entries were required, so there
may be a patch forthcoming for those in the near future, but then the
ethernet mac seemed to fail on dma initialization[1] after
smmac_open() is called.

The code below [2] always returns -EBUSY. It's a bit puzzling. U-Boot
first resets the dma, then clears a portselect bit and then waits for
the reset to finish [3], but that portselect does not even seem to be
a part of the register map of the stm32f746 according to the reference
manual [4] (possibly part of a different register in this silicon
spin?).

Just thought I would see if anyone on the list has any thoughts on the
matter, or if perhaps anyone from ST is on the list too and has some
thoughts.

Cheers,

C

[1]
[  179.344820] stm32-dwmac 40028000.ethernet: Failed to reset the dma
[  179.351340] stm32-dwmac 40028000.ethernet eth0: stmmac_hw_setup:
DMA engine initialization failed
[  179.360540] stm32-dwmac 40028000.ethernet eth0: stmmac_open: Hw setup failed

[2]
int dwmac_dma_reset(void __iomem *ioaddr)
{
u32 value = readl(ioaddr + DMA_BUS_MODE);
int err;

/* DMA SW reset */
value |= DMA_BUS_MODE_SFT_RESET;
writel(value, ioaddr + DMA_BUS_MODE);

err = readl_poll_timeout(ioaddr + DMA_BUS_MODE, value,
!(value & DMA_BUS_MODE_SFT_RESET),
10000, 100000);
if (err)
return -EBUSY;

return 0;
}

[3]
       /*
         * When a MII PHY is used, we must set the PS bit for the DMA
         * reset to succeed.
         */
        if (priv->phydev->interface == PHY_INTERFACE_MODE_MII)
                writel(readl(&mac_p->conf) | MII_PORTSELECT, &mac_p->conf);
        else
                writel(readl(&mac_p->conf) & ~MII_PORTSELECT, &mac_p->conf);

[4]
https://goo.gl/oxei9o