From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Anand Moon <linux.amoon@gmail.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-amlogic@lists.infradead.org,
Linux Kernel <linux-kernel@vger.kernel.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>
Subject: Re: [PATCHv1 3/3] clk: meson: g12a: set cpu clock divider flags too CLK_IS_CRITICAL
Date: Thu, 20 Feb 2020 22:15:06 +0100 [thread overview]
Message-ID: <CAFBinCCSosE1XfwbKZOR9G+DVYg8zFcKShmTNWUhh1e8W0VoAQ@mail.gmail.com> (raw)
In-Reply-To: <CANAwSgSaQgU=H3h0S9deT11HA8z9R=Fhy5Kawii9tSBxKf2Wgw@mail.gmail.com>
Hi Anand,
On Mon, Feb 17, 2020 at 2:30 PM Anand Moon <linux.amoon@gmail.com> wrote:
[...]
> > > @@ -681,7 +682,7 @@ static struct clk_regmap g12b_cpub_clk = {
> > > &g12a_sys_pll.hw
> > > },
> > > .num_parents = 2,
> > > - .flags = CLK_SET_RATE_PARENT,
> > > + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
> >
> > Why not. Neil what do you think of this ?
> > If nothing is claiming this clock and enabling it then I suppose it
> > could make sense.
> >
> I would like core developers to handle this.
> Sorry for the noise.
can you please resend this patch with only the change to g12b_cpub_clk?
I have no G12B board myself so it would be great if you could take care of this!
Martin
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Anand Moon <linux.amoon@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-amlogic@lists.infradead.org,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCHv1 3/3] clk: meson: g12a: set cpu clock divider flags too CLK_IS_CRITICAL
Date: Thu, 20 Feb 2020 22:15:06 +0100 [thread overview]
Message-ID: <CAFBinCCSosE1XfwbKZOR9G+DVYg8zFcKShmTNWUhh1e8W0VoAQ@mail.gmail.com> (raw)
In-Reply-To: <CANAwSgSaQgU=H3h0S9deT11HA8z9R=Fhy5Kawii9tSBxKf2Wgw@mail.gmail.com>
Hi Anand,
On Mon, Feb 17, 2020 at 2:30 PM Anand Moon <linux.amoon@gmail.com> wrote:
[...]
> > > @@ -681,7 +682,7 @@ static struct clk_regmap g12b_cpub_clk = {
> > > &g12a_sys_pll.hw
> > > },
> > > .num_parents = 2,
> > > - .flags = CLK_SET_RATE_PARENT,
> > > + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
> >
> > Why not. Neil what do you think of this ?
> > If nothing is claiming this clock and enabling it then I suppose it
> > could make sense.
> >
> I would like core developers to handle this.
> Sorry for the noise.
can you please resend this patch with only the change to g12b_cpub_clk?
I have no G12B board myself so it would be great if you could take care of this!
Martin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Anand Moon <linux.amoon@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-amlogic@lists.infradead.org,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCHv1 3/3] clk: meson: g12a: set cpu clock divider flags too CLK_IS_CRITICAL
Date: Thu, 20 Feb 2020 22:15:06 +0100 [thread overview]
Message-ID: <CAFBinCCSosE1XfwbKZOR9G+DVYg8zFcKShmTNWUhh1e8W0VoAQ@mail.gmail.com> (raw)
In-Reply-To: <CANAwSgSaQgU=H3h0S9deT11HA8z9R=Fhy5Kawii9tSBxKf2Wgw@mail.gmail.com>
Hi Anand,
On Mon, Feb 17, 2020 at 2:30 PM Anand Moon <linux.amoon@gmail.com> wrote:
[...]
> > > @@ -681,7 +682,7 @@ static struct clk_regmap g12b_cpub_clk = {
> > > &g12a_sys_pll.hw
> > > },
> > > .num_parents = 2,
> > > - .flags = CLK_SET_RATE_PARENT,
> > > + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
> >
> > Why not. Neil what do you think of this ?
> > If nothing is claiming this clock and enabling it then I suppose it
> > could make sense.
> >
> I would like core developers to handle this.
> Sorry for the noise.
can you please resend this patch with only the change to g12b_cpub_clk?
I have no G12B board myself so it would be great if you could take care of this!
Martin
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2020-02-20 21:15 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-16 17:34 [PATCHv1 0/3] Odroid N2 failes to boot using upstream kernel using microSD card Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-16 17:34 ` [PATCHv1 1/3] arm64: dts: meson: Add missing regulator linked to VDDAO_3V3 regulator to FLASH_VDD Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-16 17:34 ` [PATCHv1 2/3] arm64: dts: meson: Add missing regulator linked to VCCV5 regulator to VDDIO_C/TF_IO Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-17 7:49 ` Jerome Brunet
2020-02-17 7:49 ` Jerome Brunet
2020-02-17 7:49 ` Jerome Brunet
2020-02-16 17:34 ` [PATCHv1 3/3] clk: meson: g12a: set cpu clock divider flags too CLK_IS_CRITICAL Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-16 17:34 ` Anand Moon
2020-02-17 8:02 ` Jerome Brunet
2020-02-17 8:02 ` Jerome Brunet
2020-02-17 8:02 ` Jerome Brunet
2020-02-17 8:51 ` Anand Moon
2020-02-17 8:51 ` Anand Moon
2020-02-17 8:51 ` Anand Moon
2020-02-17 13:30 ` Anand Moon
2020-02-17 13:30 ` Anand Moon
2020-02-17 13:30 ` Anand Moon
2020-02-20 21:15 ` Martin Blumenstingl [this message]
2020-02-20 21:15 ` Martin Blumenstingl
2020-02-20 21:15 ` Martin Blumenstingl
2020-02-23 13:34 ` Anand Moon
2020-02-23 13:34 ` Anand Moon
2020-02-23 13:34 ` Anand Moon
2020-02-24 9:31 ` Jerome Brunet
2020-02-24 9:31 ` Jerome Brunet
2020-02-24 9:31 ` Jerome Brunet
2020-02-24 10:17 ` Anand Moon
2020-02-24 10:17 ` Anand Moon
2020-02-24 10:17 ` Anand Moon
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