* [PATCH] drm/radeon: deprecate and remove KFD interface
@ 2017-10-30 13:16 Christian König
[not found] ` <1509369381-16062-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2017-10-30 13:16 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Christian König <christian.koenig@amd.com>
To quote Felix: "For testing KV with current user mode stack, please use
amdgpu. I don't expect this to work with radeon and I'm not planning to spend
any effort on making radeon work with a current user mode stack."
Only compile tested, but should be straight forward.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdkfd/Kconfig | 2 +-
drivers/gpu/drm/radeon/Makefile | 3 +-
drivers/gpu/drm/radeon/cik.c | 14 +-
drivers/gpu/drm/radeon/cikd.h | 2 -
drivers/gpu/drm/radeon/radeon.h | 3 -
drivers/gpu/drm/radeon/radeon_drv.c | 10 -
drivers/gpu/drm/radeon/radeon_kfd.c | 901 ------------------------------------
drivers/gpu/drm/radeon/radeon_kfd.h | 47 --
drivers/gpu/drm/radeon/radeon_kms.c | 7 -
9 files changed, 4 insertions(+), 985 deletions(-)
delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.c
delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.h
diff --git a/drivers/gpu/drm/amd/amdkfd/Kconfig b/drivers/gpu/drm/amd/amdkfd/Kconfig
index e13c67c..bc5a294 100644
--- a/drivers/gpu/drm/amd/amdkfd/Kconfig
+++ b/drivers/gpu/drm/amd/amdkfd/Kconfig
@@ -4,6 +4,6 @@
config HSA_AMD
tristate "HSA kernel driver for AMD GPU devices"
- depends on (DRM_RADEON || DRM_AMDGPU) && AMD_IOMMU_V2 && X86_64
+ depends on DRM_AMDGPU && AMD_IOMMU_V2 && X86_64
help
Enable this if you want to use HSA features on AMD GPU devices.
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index be16c63..cf3e598 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -102,8 +102,7 @@ radeon-y += \
radeon-y += \
radeon_vce.o \
vce_v1_0.o \
- vce_v2_0.o \
- radeon_kfd.o
+ vce_v2_0.o
radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
radeon-$(CONFIG_ACPI) += radeon_acpi.o
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 3cb6c55..898f9a0 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -33,7 +33,6 @@
#include "cik_blit_shaders.h"
#include "radeon_ucode.h"
#include "clearstate_ci.h"
-#include "radeon_kfd.h"
#define SH_MEM_CONFIG_GFX_DEFAULT \
ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED)
@@ -5684,10 +5683,9 @@ int cik_vm_init(struct radeon_device *rdev)
/*
* number of VMs
* VMID 0 is reserved for System
- * radeon graphics/compute will use VMIDs 1-7
- * amdkfd will use VMIDs 8-15
+ * radeon graphics/compute will use VMIDs 1-15
*/
- rdev->vm_manager.nvm = RADEON_NUM_OF_VMIDS;
+ rdev->vm_manager.nvm = 16;
/* base offset of vram pages */
if (rdev->flags & RADEON_IS_IGP) {
u64 tmp = RREG32(MC_VM_FB_OFFSET);
@@ -7589,9 +7587,6 @@ int cik_irq_process(struct radeon_device *rdev)
/* wptr/rptr are in bytes! */
ring_index = rptr / 4;
- radeon_kfd_interrupt(rdev,
- (const void *) &rdev->ih.ring[ring_index]);
-
src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;
src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;
ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff;
@@ -8486,10 +8481,6 @@ static int cik_startup(struct radeon_device *rdev)
if (r)
return r;
- r = radeon_kfd_resume(rdev);
- if (r)
- return r;
-
return 0;
}
@@ -8538,7 +8529,6 @@ int cik_resume(struct radeon_device *rdev)
*/
int cik_suspend(struct radeon_device *rdev)
{
- radeon_kfd_suspend(rdev);
radeon_pm_suspend(rdev);
radeon_audio_fini(rdev);
radeon_vm_manager_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index e210154..cda16fc 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -30,8 +30,6 @@
#define CIK_RB_BITMAP_WIDTH_PER_SH 2
#define HAWAII_RB_BITMAP_WIDTH_PER_SH 4
-#define RADEON_NUM_OF_VMIDS 8
-
/* DIDT IND registers */
#define DIDT_SQ_CTRL0 0x0
# define DIDT_CTRL_EN (1 << 0)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ec63bc5..d94741b 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -2456,9 +2456,6 @@ struct radeon_device {
u64 vram_pin_size;
u64 gart_pin_size;
- /* amdkfd interface */
- struct kfd_dev *kfd;
-
struct mutex mn_lock;
DECLARE_HASHTABLE(mn_hash, 7);
};
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index f4becad..31dd04f 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -43,7 +43,6 @@
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
-#include "radeon_kfd.h"
/*
* KMS wrapper.
@@ -338,14 +337,6 @@ static int radeon_pci_probe(struct pci_dev *pdev,
{
int ret;
- /*
- * Initialize amdkfd before starting radeon. If it was not loaded yet,
- * defer radeon probing
- */
- ret = radeon_kfd_init();
- if (ret == -EPROBE_DEFER)
- return ret;
-
if (vga_switcheroo_client_probe_defer(pdev))
return -EPROBE_DEFER;
@@ -645,7 +636,6 @@ static int __init radeon_init(void)
static void __exit radeon_exit(void)
{
- radeon_kfd_fini();
pci_unregister_driver(pdriver);
radeon_unregister_atpx_handler();
}
diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c
deleted file mode 100644
index 385b4d7..0000000
--- a/drivers/gpu/drm/radeon/radeon_kfd.c
+++ /dev/null
@@ -1,901 +0,0 @@
-/*
- * Copyright 2014 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/module.h>
-#include <linux/fdtable.h>
-#include <linux/uaccess.h>
-#include <drm/drmP.h>
-#include "radeon.h"
-#include "cikd.h"
-#include "cik_reg.h"
-#include "radeon_kfd.h"
-#include "radeon_ucode.h"
-#include <linux/firmware.h>
-#include "cik_structs.h"
-
-#define CIK_PIPE_PER_MEC (4)
-
-static const uint32_t watchRegs[MAX_WATCH_ADDRESSES * ADDRESS_WATCH_REG_MAX] = {
- TCP_WATCH0_ADDR_H, TCP_WATCH0_ADDR_L, TCP_WATCH0_CNTL,
- TCP_WATCH1_ADDR_H, TCP_WATCH1_ADDR_L, TCP_WATCH1_CNTL,
- TCP_WATCH2_ADDR_H, TCP_WATCH2_ADDR_L, TCP_WATCH2_CNTL,
- TCP_WATCH3_ADDR_H, TCP_WATCH3_ADDR_L, TCP_WATCH3_CNTL
-};
-
-struct kgd_mem {
- struct radeon_bo *bo;
- uint64_t gpu_addr;
- void *cpu_ptr;
-};
-
-
-static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
- void **mem_obj, uint64_t *gpu_addr,
- void **cpu_ptr);
-
-static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
-
-static uint64_t get_vmem_size(struct kgd_dev *kgd);
-static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
-
-static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
-
-static int alloc_pasid(unsigned int bits);
-static void free_pasid(unsigned int pasid);
-
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
-
-/*
- * Register access functions
- */
-
-static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
- uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
- uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
-
-static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
- unsigned int vmid);
-
-static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
- uint32_t hpd_size, uint64_t hpd_gpu_addr);
-static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id);
-static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
- uint32_t queue_id, uint32_t __user *wptr,
- uint32_t wptr_shift, uint32_t wptr_mask,
- struct mm_struct *mm);
-static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
-static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
- uint32_t pipe_id, uint32_t queue_id);
-
-static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
- unsigned int timeout, uint32_t pipe_id,
- uint32_t queue_id);
-static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
-static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
- unsigned int timeout);
-static int kgd_address_watch_disable(struct kgd_dev *kgd);
-static int kgd_address_watch_execute(struct kgd_dev *kgd,
- unsigned int watch_point_id,
- uint32_t cntl_val,
- uint32_t addr_hi,
- uint32_t addr_lo);
-static int kgd_wave_control_execute(struct kgd_dev *kgd,
- uint32_t gfx_index_val,
- uint32_t sq_cmd);
-static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
- unsigned int watch_point_id,
- unsigned int reg_offset);
-
-static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid);
-static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
- uint8_t vmid);
-static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid);
-
-static const struct kfd2kgd_calls kfd2kgd = {
- .init_gtt_mem_allocation = alloc_gtt_mem,
- .free_gtt_mem = free_gtt_mem,
- .get_vmem_size = get_vmem_size,
- .get_gpu_clock_counter = get_gpu_clock_counter,
- .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
- .alloc_pasid = alloc_pasid,
- .free_pasid = free_pasid,
- .program_sh_mem_settings = kgd_program_sh_mem_settings,
- .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
- .init_pipeline = kgd_init_pipeline,
- .init_interrupts = kgd_init_interrupts,
- .hqd_load = kgd_hqd_load,
- .hqd_sdma_load = kgd_hqd_sdma_load,
- .hqd_is_occupied = kgd_hqd_is_occupied,
- .hqd_sdma_is_occupied = kgd_hqd_sdma_is_occupied,
- .hqd_destroy = kgd_hqd_destroy,
- .hqd_sdma_destroy = kgd_hqd_sdma_destroy,
- .address_watch_disable = kgd_address_watch_disable,
- .address_watch_execute = kgd_address_watch_execute,
- .wave_control_execute = kgd_wave_control_execute,
- .address_watch_get_offset = kgd_address_watch_get_offset,
- .get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid,
- .get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid,
- .write_vmid_invalidate_request = write_vmid_invalidate_request,
- .get_fw_version = get_fw_version
-};
-
-static const struct kgd2kfd_calls *kgd2kfd;
-
-int radeon_kfd_init(void)
-{
- int ret;
-
-#if defined(CONFIG_HSA_AMD_MODULE)
- int (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
-
- kgd2kfd_init_p = symbol_request(kgd2kfd_init);
-
- if (kgd2kfd_init_p == NULL)
- return -ENOENT;
-
- ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
- if (ret) {
- symbol_put(kgd2kfd_init);
- kgd2kfd = NULL;
- }
-
-#elif defined(CONFIG_HSA_AMD)
- ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
- if (ret)
- kgd2kfd = NULL;
-
-#else
- ret = -ENOENT;
-#endif
-
- return ret;
-}
-
-void radeon_kfd_fini(void)
-{
- if (kgd2kfd) {
- kgd2kfd->exit();
- symbol_put(kgd2kfd_init);
- }
-}
-
-void radeon_kfd_device_probe(struct radeon_device *rdev)
-{
- if (kgd2kfd)
- rdev->kfd = kgd2kfd->probe((struct kgd_dev *)rdev,
- rdev->pdev, &kfd2kgd);
-}
-
-void radeon_kfd_device_init(struct radeon_device *rdev)
-{
- int i, queue, pipe, mec;
-
- if (rdev->kfd) {
- struct kgd2kfd_shared_resources gpu_resources = {
- .compute_vmid_bitmap = 0xFF00,
- .num_pipe_per_mec = 4,
- .num_queue_per_pipe = 8
- };
-
- bitmap_zero(gpu_resources.queue_bitmap, KGD_MAX_QUEUES);
-
- for (i = 0; i < KGD_MAX_QUEUES; ++i) {
- queue = i % gpu_resources.num_queue_per_pipe;
- pipe = (i / gpu_resources.num_queue_per_pipe)
- % gpu_resources.num_pipe_per_mec;
- mec = (i / gpu_resources.num_queue_per_pipe)
- / gpu_resources.num_pipe_per_mec;
-
- if (mec == 0 && pipe > 0)
- set_bit(i, gpu_resources.queue_bitmap);
- }
-
- radeon_doorbell_get_kfd_info(rdev,
- &gpu_resources.doorbell_physical_address,
- &gpu_resources.doorbell_aperture_size,
- &gpu_resources.doorbell_start_offset);
-
- kgd2kfd->device_init(rdev->kfd, &gpu_resources);
- }
-}
-
-void radeon_kfd_device_fini(struct radeon_device *rdev)
-{
- if (rdev->kfd) {
- kgd2kfd->device_exit(rdev->kfd);
- rdev->kfd = NULL;
- }
-}
-
-void radeon_kfd_interrupt(struct radeon_device *rdev, const void *ih_ring_entry)
-{
- if (rdev->kfd)
- kgd2kfd->interrupt(rdev->kfd, ih_ring_entry);
-}
-
-void radeon_kfd_suspend(struct radeon_device *rdev)
-{
- if (rdev->kfd)
- kgd2kfd->suspend(rdev->kfd);
-}
-
-int radeon_kfd_resume(struct radeon_device *rdev)
-{
- int r = 0;
-
- if (rdev->kfd)
- r = kgd2kfd->resume(rdev->kfd);
-
- return r;
-}
-
-static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
- void **mem_obj, uint64_t *gpu_addr,
- void **cpu_ptr)
-{
- struct radeon_device *rdev = (struct radeon_device *)kgd;
- struct kgd_mem **mem = (struct kgd_mem **) mem_obj;
- int r;
-
- BUG_ON(kgd == NULL);
- BUG_ON(gpu_addr == NULL);
- BUG_ON(cpu_ptr == NULL);
-
- *mem = kmalloc(sizeof(struct kgd_mem), GFP_KERNEL);
- if ((*mem) == NULL)
- return -ENOMEM;
-
- r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_GTT,
- RADEON_GEM_GTT_WC, NULL, NULL, &(*mem)->bo);
- if (r) {
- dev_err(rdev->dev,
- "failed to allocate BO for amdkfd (%d)\n", r);
- return r;
- }
-
- /* map the buffer */
- r = radeon_bo_reserve((*mem)->bo, true);
- if (r) {
- dev_err(rdev->dev, "(%d) failed to reserve bo for amdkfd\n", r);
- goto allocate_mem_reserve_bo_failed;
- }
-
- r = radeon_bo_pin((*mem)->bo, RADEON_GEM_DOMAIN_GTT,
- &(*mem)->gpu_addr);
- if (r) {
- dev_err(rdev->dev, "(%d) failed to pin bo for amdkfd\n", r);
- goto allocate_mem_pin_bo_failed;
- }
- *gpu_addr = (*mem)->gpu_addr;
-
- r = radeon_bo_kmap((*mem)->bo, &(*mem)->cpu_ptr);
- if (r) {
- dev_err(rdev->dev,
- "(%d) failed to map bo to kernel for amdkfd\n", r);
- goto allocate_mem_kmap_bo_failed;
- }
- *cpu_ptr = (*mem)->cpu_ptr;
-
- radeon_bo_unreserve((*mem)->bo);
-
- return 0;
-
-allocate_mem_kmap_bo_failed:
- radeon_bo_unpin((*mem)->bo);
-allocate_mem_pin_bo_failed:
- radeon_bo_unreserve((*mem)->bo);
-allocate_mem_reserve_bo_failed:
- radeon_bo_unref(&(*mem)->bo);
-
- return r;
-}
-
-static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
-{
- struct kgd_mem *mem = (struct kgd_mem *) mem_obj;
-
- BUG_ON(mem == NULL);
-
- radeon_bo_reserve(mem->bo, true);
- radeon_bo_kunmap(mem->bo);
- radeon_bo_unpin(mem->bo);
- radeon_bo_unreserve(mem->bo);
- radeon_bo_unref(&(mem->bo));
- kfree(mem);
-}
-
-static uint64_t get_vmem_size(struct kgd_dev *kgd)
-{
- struct radeon_device *rdev = (struct radeon_device *)kgd;
-
- BUG_ON(kgd == NULL);
-
- return rdev->mc.real_vram_size;
-}
-
-static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
-{
- struct radeon_device *rdev = (struct radeon_device *)kgd;
-
- return rdev->asic->get_gpu_clock_counter(rdev);
-}
-
-static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
-{
- struct radeon_device *rdev = (struct radeon_device *)kgd;
-
- /* The sclk is in quantas of 10kHz */
- return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
-}
-
-/*
- * PASID manager
- */
-static DEFINE_IDA(pasid_ida);
-
-static int alloc_pasid(unsigned int bits)
-{
- int pasid = -EINVAL;
-
- for (bits = min(bits, 31U); bits > 0; bits--) {
- pasid = ida_simple_get(&pasid_ida,
- 1U << (bits - 1), 1U << bits,
- GFP_KERNEL);
- if (pasid != -ENOSPC)
- break;
- }
-
- return pasid;
-}
-
-static void free_pasid(unsigned int pasid)
-{
- ida_simple_remove(&pasid_ida, pasid);
-}
-
-static inline struct radeon_device *get_radeon_device(struct kgd_dev *kgd)
-{
- return (struct radeon_device *)kgd;
-}
-
-static void write_register(struct kgd_dev *kgd, uint32_t offset, uint32_t value)
-{
- struct radeon_device *rdev = get_radeon_device(kgd);
-
- writel(value, (void __iomem *)(rdev->rmmio + offset));
-}
-
-static uint32_t read_register(struct kgd_dev *kgd, uint32_t offset)
-{
- struct radeon_device *rdev = get_radeon_device(kgd);
-
- return readl((void __iomem *)(rdev->rmmio + offset));
-}
-
-static void lock_srbm(struct kgd_dev *kgd, uint32_t mec, uint32_t pipe,
- uint32_t queue, uint32_t vmid)
-{
- struct radeon_device *rdev = get_radeon_device(kgd);
- uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);
-
- mutex_lock(&rdev->srbm_mutex);
- write_register(kgd, SRBM_GFX_CNTL, value);
-}
-
-static void unlock_srbm(struct kgd_dev *kgd)
-{
- struct radeon_device *rdev = get_radeon_device(kgd);
-
- write_register(kgd, SRBM_GFX_CNTL, 0);
- mutex_unlock(&rdev->srbm_mutex);
-}
-
-static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id,
- uint32_t queue_id)
-{
- uint32_t mec = (++pipe_id / CIK_PIPE_PER_MEC) + 1;
- uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);
-
- lock_srbm(kgd, mec, pipe, queue_id, 0);
-}
-
-static void release_queue(struct kgd_dev *kgd)
-{
- unlock_srbm(kgd);
-}
-
-static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
- uint32_t sh_mem_config,
- uint32_t sh_mem_ape1_base,
- uint32_t sh_mem_ape1_limit,
- uint32_t sh_mem_bases)
-{
- lock_srbm(kgd, 0, 0, 0, vmid);
-
- write_register(kgd, SH_MEM_CONFIG, sh_mem_config);
- write_register(kgd, SH_MEM_APE1_BASE, sh_mem_ape1_base);
- write_register(kgd, SH_MEM_APE1_LIMIT, sh_mem_ape1_limit);
- write_register(kgd, SH_MEM_BASES, sh_mem_bases);
-
- unlock_srbm(kgd);
-}
-
-static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
- unsigned int vmid)
-{
- /*
- * We have to assume that there is no outstanding mapping.
- * The ATC_VMID_PASID_MAPPING_UPDATE_STATUS bit could be 0
- * because a mapping is in progress or because a mapping finished and
- * the SW cleared it.
- * So the protocol is to always wait & clear.
- */
- uint32_t pasid_mapping = (pasid == 0) ? 0 : (uint32_t)pasid |
- ATC_VMID_PASID_MAPPING_VALID_MASK;
-
- write_register(kgd, ATC_VMID0_PASID_MAPPING + vmid*sizeof(uint32_t),
- pasid_mapping);
-
- while (!(read_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS) &
- (1U << vmid)))
- cpu_relax();
- write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);
-
- /* Mapping vmid to pasid also for IH block */
- write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),
- pasid_mapping);
-
- return 0;
-}
-
-static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
- uint32_t hpd_size, uint64_t hpd_gpu_addr)
-{
- /* nothing to do here */
- return 0;
-}
-
-static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id)
-{
- uint32_t mec;
- uint32_t pipe;
-
- mec = (pipe_id / CIK_PIPE_PER_MEC) + 1;
- pipe = (pipe_id % CIK_PIPE_PER_MEC);
-
- lock_srbm(kgd, mec, pipe, 0, 0);
-
- write_register(kgd, CPC_INT_CNTL,
- TIME_STAMP_INT_ENABLE | OPCODE_ERROR_INT_ENABLE);
-
- unlock_srbm(kgd);
-
- return 0;
-}
-
-static inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m)
-{
- uint32_t retval;
-
- retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET +
- m->sdma_queue_id * KFD_CIK_SDMA_QUEUE_OFFSET;
-
- pr_debug("kfd: sdma base address: 0x%x\n", retval);
-
- return retval;
-}
-
-static inline struct cik_mqd *get_mqd(void *mqd)
-{
- return (struct cik_mqd *)mqd;
-}
-
-static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
-{
- return (struct cik_sdma_rlc_registers *)mqd;
-}
-
-static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
- uint32_t queue_id, uint32_t __user *wptr,
- uint32_t wptr_shift, uint32_t wptr_mask,
- struct mm_struct *mm)
-{
- uint32_t wptr_shadow, is_wptr_shadow_valid;
- struct cik_mqd *m;
-
- m = get_mqd(mqd);
-
- is_wptr_shadow_valid = !get_user(wptr_shadow, wptr);
-
- acquire_queue(kgd, pipe_id, queue_id);
- write_register(kgd, CP_MQD_BASE_ADDR, m->cp_mqd_base_addr_lo);
- write_register(kgd, CP_MQD_BASE_ADDR_HI, m->cp_mqd_base_addr_hi);
- write_register(kgd, CP_MQD_CONTROL, m->cp_mqd_control);
-
- write_register(kgd, CP_HQD_PQ_BASE, m->cp_hqd_pq_base_lo);
- write_register(kgd, CP_HQD_PQ_BASE_HI, m->cp_hqd_pq_base_hi);
- write_register(kgd, CP_HQD_PQ_CONTROL, m->cp_hqd_pq_control);
-
- write_register(kgd, CP_HQD_IB_CONTROL, m->cp_hqd_ib_control);
- write_register(kgd, CP_HQD_IB_BASE_ADDR, m->cp_hqd_ib_base_addr_lo);
- write_register(kgd, CP_HQD_IB_BASE_ADDR_HI, m->cp_hqd_ib_base_addr_hi);
-
- write_register(kgd, CP_HQD_IB_RPTR, m->cp_hqd_ib_rptr);
-
- write_register(kgd, CP_HQD_PERSISTENT_STATE,
- m->cp_hqd_persistent_state);
- write_register(kgd, CP_HQD_SEMA_CMD, m->cp_hqd_sema_cmd);
- write_register(kgd, CP_HQD_MSG_TYPE, m->cp_hqd_msg_type);
-
- write_register(kgd, CP_HQD_ATOMIC0_PREOP_LO,
- m->cp_hqd_atomic0_preop_lo);
-
- write_register(kgd, CP_HQD_ATOMIC0_PREOP_HI,
- m->cp_hqd_atomic0_preop_hi);
-
- write_register(kgd, CP_HQD_ATOMIC1_PREOP_LO,
- m->cp_hqd_atomic1_preop_lo);
-
- write_register(kgd, CP_HQD_ATOMIC1_PREOP_HI,
- m->cp_hqd_atomic1_preop_hi);
-
- write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR,
- m->cp_hqd_pq_rptr_report_addr_lo);
-
- write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR_HI,
- m->cp_hqd_pq_rptr_report_addr_hi);
-
- write_register(kgd, CP_HQD_PQ_RPTR, m->cp_hqd_pq_rptr);
-
- write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR,
- m->cp_hqd_pq_wptr_poll_addr_lo);
-
- write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR_HI,
- m->cp_hqd_pq_wptr_poll_addr_hi);
-
- write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL,
- m->cp_hqd_pq_doorbell_control);
-
- write_register(kgd, CP_HQD_VMID, m->cp_hqd_vmid);
-
- write_register(kgd, CP_HQD_QUANTUM, m->cp_hqd_quantum);
-
- write_register(kgd, CP_HQD_PIPE_PRIORITY, m->cp_hqd_pipe_priority);
- write_register(kgd, CP_HQD_QUEUE_PRIORITY, m->cp_hqd_queue_priority);
-
- write_register(kgd, CP_HQD_IQ_RPTR, m->cp_hqd_iq_rptr);
-
- if (is_wptr_shadow_valid)
- write_register(kgd, CP_HQD_PQ_WPTR, wptr_shadow);
-
- write_register(kgd, CP_HQD_ACTIVE, m->cp_hqd_active);
- release_queue(kgd);
-
- return 0;
-}
-
-static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd)
-{
- struct cik_sdma_rlc_registers *m;
- uint32_t sdma_base_addr;
-
- m = get_sdma_mqd(mqd);
- sdma_base_addr = get_sdma_base_addr(m);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_VIRTUAL_ADDR,
- m->sdma_rlc_virtual_addr);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_RB_BASE,
- m->sdma_rlc_rb_base);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_RB_BASE_HI,
- m->sdma_rlc_rb_base_hi);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_LO,
- m->sdma_rlc_rb_rptr_addr_lo);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_HI,
- m->sdma_rlc_rb_rptr_addr_hi);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_DOORBELL,
- m->sdma_rlc_doorbell);
-
- write_register(kgd,
- sdma_base_addr + SDMA0_RLC0_RB_CNTL,
- m->sdma_rlc_rb_cntl);
-
- return 0;
-}
-
-static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
- uint32_t pipe_id, uint32_t queue_id)
-{
- uint32_t act;
- bool retval = false;
- uint32_t low, high;
-
- acquire_queue(kgd, pipe_id, queue_id);
- act = read_register(kgd, CP_HQD_ACTIVE);
- if (act) {
- low = lower_32_bits(queue_address >> 8);
- high = upper_32_bits(queue_address >> 8);
-
- if (low == read_register(kgd, CP_HQD_PQ_BASE) &&
- high == read_register(kgd, CP_HQD_PQ_BASE_HI))
- retval = true;
- }
- release_queue(kgd);
- return retval;
-}
-
-static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)
-{
- struct cik_sdma_rlc_registers *m;
- uint32_t sdma_base_addr;
- uint32_t sdma_rlc_rb_cntl;
-
- m = get_sdma_mqd(mqd);
- sdma_base_addr = get_sdma_base_addr(m);
-
- sdma_rlc_rb_cntl = read_register(kgd,
- sdma_base_addr + SDMA0_RLC0_RB_CNTL);
-
- if (sdma_rlc_rb_cntl & SDMA_RB_ENABLE)
- return true;
-
- return false;
-}
-
-static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
- unsigned int timeout, uint32_t pipe_id,
- uint32_t queue_id)
-{
- uint32_t temp;
-
- acquire_queue(kgd, pipe_id, queue_id);
- write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL, 0);
-
- write_register(kgd, CP_HQD_DEQUEUE_REQUEST, reset_type);
-
- while (true) {
- temp = read_register(kgd, CP_HQD_ACTIVE);
- if (temp & 0x1)
- break;
- if (timeout == 0) {
- pr_err("kfd: cp queue preemption time out (%dms)\n",
- temp);
- release_queue(kgd);
- return -ETIME;
- }
- msleep(20);
- timeout -= 20;
- }
-
- release_queue(kgd);
- return 0;
-}
-
-static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
- unsigned int timeout)
-{
- struct cik_sdma_rlc_registers *m;
- uint32_t sdma_base_addr;
- uint32_t temp;
-
- m = get_sdma_mqd(mqd);
- sdma_base_addr = get_sdma_base_addr(m);
-
- temp = read_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL);
- temp = temp & ~SDMA_RB_ENABLE;
- write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL, temp);
-
- while (true) {
- temp = read_register(kgd, sdma_base_addr +
- SDMA0_RLC0_CONTEXT_STATUS);
- if (temp & SDMA_RLC_IDLE)
- break;
- if (timeout == 0)
- return -ETIME;
- msleep(20);
- timeout -= 20;
- }
-
- write_register(kgd, sdma_base_addr + SDMA0_RLC0_DOORBELL, 0);
- write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_RPTR, 0);
- write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_WPTR, 0);
- write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_BASE, 0);
-
- return 0;
-}
-
-static int kgd_address_watch_disable(struct kgd_dev *kgd)
-{
- union TCP_WATCH_CNTL_BITS cntl;
- unsigned int i;
-
- cntl.u32All = 0;
-
- cntl.bitfields.valid = 0;
- cntl.bitfields.mask = ADDRESS_WATCH_REG_CNTL_DEFAULT_MASK;
- cntl.bitfields.atc = 1;
-
- /* Turning off this address until we set all the registers */
- for (i = 0; i < MAX_WATCH_ADDRESSES; i++)
- write_register(kgd,
- watchRegs[i * ADDRESS_WATCH_REG_MAX +
- ADDRESS_WATCH_REG_CNTL],
- cntl.u32All);
-
- return 0;
-}
-
-static int kgd_address_watch_execute(struct kgd_dev *kgd,
- unsigned int watch_point_id,
- uint32_t cntl_val,
- uint32_t addr_hi,
- uint32_t addr_lo)
-{
- union TCP_WATCH_CNTL_BITS cntl;
-
- cntl.u32All = cntl_val;
-
- /* Turning off this watch point until we set all the registers */
- cntl.bitfields.valid = 0;
- write_register(kgd,
- watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
- ADDRESS_WATCH_REG_CNTL],
- cntl.u32All);
-
- write_register(kgd,
- watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
- ADDRESS_WATCH_REG_ADDR_HI],
- addr_hi);
-
- write_register(kgd,
- watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
- ADDRESS_WATCH_REG_ADDR_LO],
- addr_lo);
-
- /* Enable the watch point */
- cntl.bitfields.valid = 1;
-
- write_register(kgd,
- watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
- ADDRESS_WATCH_REG_CNTL],
- cntl.u32All);
-
- return 0;
-}
-
-static int kgd_wave_control_execute(struct kgd_dev *kgd,
- uint32_t gfx_index_val,
- uint32_t sq_cmd)
-{
- struct radeon_device *rdev = get_radeon_device(kgd);
- uint32_t data;
-
- mutex_lock(&rdev->grbm_idx_mutex);
-
- write_register(kgd, GRBM_GFX_INDEX, gfx_index_val);
- write_register(kgd, SQ_CMD, sq_cmd);
-
- /* Restore the GRBM_GFX_INDEX register */
-
- data = INSTANCE_BROADCAST_WRITES | SH_BROADCAST_WRITES |
- SE_BROADCAST_WRITES;
-
- write_register(kgd, GRBM_GFX_INDEX, data);
-
- mutex_unlock(&rdev->grbm_idx_mutex);
-
- return 0;
-}
-
-static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
- unsigned int watch_point_id,
- unsigned int reg_offset)
-{
- return watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX + reg_offset]
- / 4;
-}
-
-static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid)
-{
- uint32_t reg;
- struct radeon_device *rdev = (struct radeon_device *) kgd;
-
- reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
- return reg & ATC_VMID_PASID_MAPPING_VALID_MASK;
-}
-
-static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
- uint8_t vmid)
-{
- uint32_t reg;
- struct radeon_device *rdev = (struct radeon_device *) kgd;
-
- reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
- return reg & ATC_VMID_PASID_MAPPING_PASID_MASK;
-}
-
-static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)
-{
- struct radeon_device *rdev = (struct radeon_device *) kgd;
-
- return WREG32(VM_INVALIDATE_REQUEST, 1 << vmid);
-}
-
-static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
-{
- struct radeon_device *rdev = (struct radeon_device *) kgd;
- const union radeon_firmware_header *hdr;
-
- BUG_ON(kgd == NULL || rdev->mec_fw == NULL);
-
- switch (type) {
- case KGD_ENGINE_PFP:
- hdr = (const union radeon_firmware_header *) rdev->pfp_fw->data;
- break;
-
- case KGD_ENGINE_ME:
- hdr = (const union radeon_firmware_header *) rdev->me_fw->data;
- break;
-
- case KGD_ENGINE_CE:
- hdr = (const union radeon_firmware_header *) rdev->ce_fw->data;
- break;
-
- case KGD_ENGINE_MEC1:
- hdr = (const union radeon_firmware_header *) rdev->mec_fw->data;
- break;
-
- case KGD_ENGINE_MEC2:
- hdr = (const union radeon_firmware_header *)
- rdev->mec2_fw->data;
- break;
-
- case KGD_ENGINE_RLC:
- hdr = (const union radeon_firmware_header *) rdev->rlc_fw->data;
- break;
-
- case KGD_ENGINE_SDMA1:
- case KGD_ENGINE_SDMA2:
- hdr = (const union radeon_firmware_header *)
- rdev->sdma_fw->data;
- break;
-
- default:
- return 0;
- }
-
- if (hdr == NULL)
- return 0;
-
- /* Only 12 bit in use*/
- return hdr->common.ucode_version;
-}
diff --git a/drivers/gpu/drm/radeon/radeon_kfd.h b/drivers/gpu/drm/radeon/radeon_kfd.h
deleted file mode 100644
index 9df1fea..0000000
--- a/drivers/gpu/drm/radeon/radeon_kfd.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright 2014 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * radeon_kfd.h defines the private interface between the
- * AMD kernel graphics drivers and the AMD KFD.
- */
-
-#ifndef RADEON_KFD_H_INCLUDED
-#define RADEON_KFD_H_INCLUDED
-
-#include <linux/types.h>
-#include "kgd_kfd_interface.h"
-
-struct radeon_device;
-
-int radeon_kfd_init(void);
-void radeon_kfd_fini(void);
-
-void radeon_kfd_suspend(struct radeon_device *rdev);
-int radeon_kfd_resume(struct radeon_device *rdev);
-void radeon_kfd_interrupt(struct radeon_device *rdev,
- const void *ih_ring_entry);
-void radeon_kfd_device_probe(struct radeon_device *rdev);
-void radeon_kfd_device_init(struct radeon_device *rdev);
-void radeon_kfd_device_fini(struct radeon_device *rdev);
-
-#endif /* RADEON_KFD_H_INCLUDED */
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index dfee8f7..cde037f 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -34,8 +34,6 @@
#include <linux/slab.h>
#include <linux/pm_runtime.h>
-#include "radeon_kfd.h"
-
#if defined(CONFIG_VGA_SWITCHEROO)
bool radeon_has_atpx(void);
#else
@@ -68,8 +66,6 @@ void radeon_driver_unload_kms(struct drm_device *dev)
pm_runtime_forbid(dev->dev);
}
- radeon_kfd_device_fini(rdev);
-
radeon_acpi_fini(rdev);
radeon_modeset_fini(rdev);
@@ -174,9 +170,6 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
"Error during ACPI methods call\n");
}
- radeon_kfd_device_probe(rdev);
- radeon_kfd_device_init(rdev);
-
if (radeon_is_px(dev)) {
pm_runtime_use_autosuspend(dev->dev);
pm_runtime_set_autosuspend_delay(dev->dev, 5000);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <1509369381-16062-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-10-31 10:44 ` Oded Gabbay
[not found] ` <CAFCwf10G5014KcMG+_Zz9_RaUh+JH8cMdgHD_accH40ZciFydw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Oded Gabbay @ 2017-10-31 10:44 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
Don't have any strong objection, but I just want to ask if current
users can just move to using amdgpu on KV and their current usermode
stack will work as usual.
btw, are there any "current users" that you are aware of ?
On Mon, Oct 30, 2017 at 3:16 PM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> To quote Felix: "For testing KV with current user mode stack, please use
> amdgpu. I don't expect this to work with radeon and I'm not planning to spend
> any effort on making radeon work with a current user mode stack."
>
> Only compile tested, but should be straight forward.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdkfd/Kconfig | 2 +-
> drivers/gpu/drm/radeon/Makefile | 3 +-
> drivers/gpu/drm/radeon/cik.c | 14 +-
> drivers/gpu/drm/radeon/cikd.h | 2 -
> drivers/gpu/drm/radeon/radeon.h | 3 -
> drivers/gpu/drm/radeon/radeon_drv.c | 10 -
> drivers/gpu/drm/radeon/radeon_kfd.c | 901 ------------------------------------
> drivers/gpu/drm/radeon/radeon_kfd.h | 47 --
> drivers/gpu/drm/radeon/radeon_kms.c | 7 -
> 9 files changed, 4 insertions(+), 985 deletions(-)
> delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.c
> delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.h
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/Kconfig b/drivers/gpu/drm/amd/amdkfd/Kconfig
> index e13c67c..bc5a294 100644
> --- a/drivers/gpu/drm/amd/amdkfd/Kconfig
> +++ b/drivers/gpu/drm/amd/amdkfd/Kconfig
> @@ -4,6 +4,6 @@
>
> config HSA_AMD
> tristate "HSA kernel driver for AMD GPU devices"
> - depends on (DRM_RADEON || DRM_AMDGPU) && AMD_IOMMU_V2 && X86_64
> + depends on DRM_AMDGPU && AMD_IOMMU_V2 && X86_64
> help
> Enable this if you want to use HSA features on AMD GPU devices.
> diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
> index be16c63..cf3e598 100644
> --- a/drivers/gpu/drm/radeon/Makefile
> +++ b/drivers/gpu/drm/radeon/Makefile
> @@ -102,8 +102,7 @@ radeon-y += \
> radeon-y += \
> radeon_vce.o \
> vce_v1_0.o \
> - vce_v2_0.o \
> - radeon_kfd.o
> + vce_v2_0.o
>
> radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
> radeon-$(CONFIG_ACPI) += radeon_acpi.o
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 3cb6c55..898f9a0 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -33,7 +33,6 @@
> #include "cik_blit_shaders.h"
> #include "radeon_ucode.h"
> #include "clearstate_ci.h"
> -#include "radeon_kfd.h"
>
> #define SH_MEM_CONFIG_GFX_DEFAULT \
> ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED)
> @@ -5684,10 +5683,9 @@ int cik_vm_init(struct radeon_device *rdev)
> /*
> * number of VMs
> * VMID 0 is reserved for System
> - * radeon graphics/compute will use VMIDs 1-7
> - * amdkfd will use VMIDs 8-15
> + * radeon graphics/compute will use VMIDs 1-15
> */
> - rdev->vm_manager.nvm = RADEON_NUM_OF_VMIDS;
> + rdev->vm_manager.nvm = 16;
> /* base offset of vram pages */
> if (rdev->flags & RADEON_IS_IGP) {
> u64 tmp = RREG32(MC_VM_FB_OFFSET);
> @@ -7589,9 +7587,6 @@ int cik_irq_process(struct radeon_device *rdev)
> /* wptr/rptr are in bytes! */
> ring_index = rptr / 4;
>
> - radeon_kfd_interrupt(rdev,
> - (const void *) &rdev->ih.ring[ring_index]);
> -
> src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;
> src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;
> ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff;
> @@ -8486,10 +8481,6 @@ static int cik_startup(struct radeon_device *rdev)
> if (r)
> return r;
>
> - r = radeon_kfd_resume(rdev);
> - if (r)
> - return r;
> -
> return 0;
> }
>
> @@ -8538,7 +8529,6 @@ int cik_resume(struct radeon_device *rdev)
> */
> int cik_suspend(struct radeon_device *rdev)
> {
> - radeon_kfd_suspend(rdev);
> radeon_pm_suspend(rdev);
> radeon_audio_fini(rdev);
> radeon_vm_manager_fini(rdev);
> diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
> index e210154..cda16fc 100644
> --- a/drivers/gpu/drm/radeon/cikd.h
> +++ b/drivers/gpu/drm/radeon/cikd.h
> @@ -30,8 +30,6 @@
> #define CIK_RB_BITMAP_WIDTH_PER_SH 2
> #define HAWAII_RB_BITMAP_WIDTH_PER_SH 4
>
> -#define RADEON_NUM_OF_VMIDS 8
> -
> /* DIDT IND registers */
> #define DIDT_SQ_CTRL0 0x0
> # define DIDT_CTRL_EN (1 << 0)
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index ec63bc5..d94741b 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -2456,9 +2456,6 @@ struct radeon_device {
> u64 vram_pin_size;
> u64 gart_pin_size;
>
> - /* amdkfd interface */
> - struct kfd_dev *kfd;
> -
> struct mutex mn_lock;
> DECLARE_HASHTABLE(mn_hash, 7);
> };
> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
> index f4becad..31dd04f 100644
> --- a/drivers/gpu/drm/radeon/radeon_drv.c
> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
> @@ -43,7 +43,6 @@
> #include <drm/drm_fb_helper.h>
>
> #include <drm/drm_crtc_helper.h>
> -#include "radeon_kfd.h"
>
> /*
> * KMS wrapper.
> @@ -338,14 +337,6 @@ static int radeon_pci_probe(struct pci_dev *pdev,
> {
> int ret;
>
> - /*
> - * Initialize amdkfd before starting radeon. If it was not loaded yet,
> - * defer radeon probing
> - */
> - ret = radeon_kfd_init();
> - if (ret == -EPROBE_DEFER)
> - return ret;
> -
> if (vga_switcheroo_client_probe_defer(pdev))
> return -EPROBE_DEFER;
>
> @@ -645,7 +636,6 @@ static int __init radeon_init(void)
>
> static void __exit radeon_exit(void)
> {
> - radeon_kfd_fini();
> pci_unregister_driver(pdriver);
> radeon_unregister_atpx_handler();
> }
> diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c
> deleted file mode 100644
> index 385b4d7..0000000
> --- a/drivers/gpu/drm/radeon/radeon_kfd.c
> +++ /dev/null
> @@ -1,901 +0,0 @@
> -/*
> - * Copyright 2014 Advanced Micro Devices, Inc.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - */
> -
> -#include <linux/module.h>
> -#include <linux/fdtable.h>
> -#include <linux/uaccess.h>
> -#include <drm/drmP.h>
> -#include "radeon.h"
> -#include "cikd.h"
> -#include "cik_reg.h"
> -#include "radeon_kfd.h"
> -#include "radeon_ucode.h"
> -#include <linux/firmware.h>
> -#include "cik_structs.h"
> -
> -#define CIK_PIPE_PER_MEC (4)
> -
> -static const uint32_t watchRegs[MAX_WATCH_ADDRESSES * ADDRESS_WATCH_REG_MAX] = {
> - TCP_WATCH0_ADDR_H, TCP_WATCH0_ADDR_L, TCP_WATCH0_CNTL,
> - TCP_WATCH1_ADDR_H, TCP_WATCH1_ADDR_L, TCP_WATCH1_CNTL,
> - TCP_WATCH2_ADDR_H, TCP_WATCH2_ADDR_L, TCP_WATCH2_CNTL,
> - TCP_WATCH3_ADDR_H, TCP_WATCH3_ADDR_L, TCP_WATCH3_CNTL
> -};
> -
> -struct kgd_mem {
> - struct radeon_bo *bo;
> - uint64_t gpu_addr;
> - void *cpu_ptr;
> -};
> -
> -
> -static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
> - void **mem_obj, uint64_t *gpu_addr,
> - void **cpu_ptr);
> -
> -static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
> -
> -static uint64_t get_vmem_size(struct kgd_dev *kgd);
> -static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
> -
> -static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
> -
> -static int alloc_pasid(unsigned int bits);
> -static void free_pasid(unsigned int pasid);
> -
> -static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
> -
> -/*
> - * Register access functions
> - */
> -
> -static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
> - uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
> - uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
> -
> -static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
> - unsigned int vmid);
> -
> -static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
> - uint32_t hpd_size, uint64_t hpd_gpu_addr);
> -static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id);
> -static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
> - uint32_t queue_id, uint32_t __user *wptr,
> - uint32_t wptr_shift, uint32_t wptr_mask,
> - struct mm_struct *mm);
> -static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
> -static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
> - uint32_t pipe_id, uint32_t queue_id);
> -
> -static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
> - unsigned int timeout, uint32_t pipe_id,
> - uint32_t queue_id);
> -static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
> -static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
> - unsigned int timeout);
> -static int kgd_address_watch_disable(struct kgd_dev *kgd);
> -static int kgd_address_watch_execute(struct kgd_dev *kgd,
> - unsigned int watch_point_id,
> - uint32_t cntl_val,
> - uint32_t addr_hi,
> - uint32_t addr_lo);
> -static int kgd_wave_control_execute(struct kgd_dev *kgd,
> - uint32_t gfx_index_val,
> - uint32_t sq_cmd);
> -static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
> - unsigned int watch_point_id,
> - unsigned int reg_offset);
> -
> -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid);
> -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
> - uint8_t vmid);
> -static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid);
> -
> -static const struct kfd2kgd_calls kfd2kgd = {
> - .init_gtt_mem_allocation = alloc_gtt_mem,
> - .free_gtt_mem = free_gtt_mem,
> - .get_vmem_size = get_vmem_size,
> - .get_gpu_clock_counter = get_gpu_clock_counter,
> - .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
> - .alloc_pasid = alloc_pasid,
> - .free_pasid = free_pasid,
> - .program_sh_mem_settings = kgd_program_sh_mem_settings,
> - .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
> - .init_pipeline = kgd_init_pipeline,
> - .init_interrupts = kgd_init_interrupts,
> - .hqd_load = kgd_hqd_load,
> - .hqd_sdma_load = kgd_hqd_sdma_load,
> - .hqd_is_occupied = kgd_hqd_is_occupied,
> - .hqd_sdma_is_occupied = kgd_hqd_sdma_is_occupied,
> - .hqd_destroy = kgd_hqd_destroy,
> - .hqd_sdma_destroy = kgd_hqd_sdma_destroy,
> - .address_watch_disable = kgd_address_watch_disable,
> - .address_watch_execute = kgd_address_watch_execute,
> - .wave_control_execute = kgd_wave_control_execute,
> - .address_watch_get_offset = kgd_address_watch_get_offset,
> - .get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid,
> - .get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid,
> - .write_vmid_invalidate_request = write_vmid_invalidate_request,
> - .get_fw_version = get_fw_version
> -};
> -
> -static const struct kgd2kfd_calls *kgd2kfd;
> -
> -int radeon_kfd_init(void)
> -{
> - int ret;
> -
> -#if defined(CONFIG_HSA_AMD_MODULE)
> - int (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
> -
> - kgd2kfd_init_p = symbol_request(kgd2kfd_init);
> -
> - if (kgd2kfd_init_p == NULL)
> - return -ENOENT;
> -
> - ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
> - if (ret) {
> - symbol_put(kgd2kfd_init);
> - kgd2kfd = NULL;
> - }
> -
> -#elif defined(CONFIG_HSA_AMD)
> - ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
> - if (ret)
> - kgd2kfd = NULL;
> -
> -#else
> - ret = -ENOENT;
> -#endif
> -
> - return ret;
> -}
> -
> -void radeon_kfd_fini(void)
> -{
> - if (kgd2kfd) {
> - kgd2kfd->exit();
> - symbol_put(kgd2kfd_init);
> - }
> -}
> -
> -void radeon_kfd_device_probe(struct radeon_device *rdev)
> -{
> - if (kgd2kfd)
> - rdev->kfd = kgd2kfd->probe((struct kgd_dev *)rdev,
> - rdev->pdev, &kfd2kgd);
> -}
> -
> -void radeon_kfd_device_init(struct radeon_device *rdev)
> -{
> - int i, queue, pipe, mec;
> -
> - if (rdev->kfd) {
> - struct kgd2kfd_shared_resources gpu_resources = {
> - .compute_vmid_bitmap = 0xFF00,
> - .num_pipe_per_mec = 4,
> - .num_queue_per_pipe = 8
> - };
> -
> - bitmap_zero(gpu_resources.queue_bitmap, KGD_MAX_QUEUES);
> -
> - for (i = 0; i < KGD_MAX_QUEUES; ++i) {
> - queue = i % gpu_resources.num_queue_per_pipe;
> - pipe = (i / gpu_resources.num_queue_per_pipe)
> - % gpu_resources.num_pipe_per_mec;
> - mec = (i / gpu_resources.num_queue_per_pipe)
> - / gpu_resources.num_pipe_per_mec;
> -
> - if (mec == 0 && pipe > 0)
> - set_bit(i, gpu_resources.queue_bitmap);
> - }
> -
> - radeon_doorbell_get_kfd_info(rdev,
> - &gpu_resources.doorbell_physical_address,
> - &gpu_resources.doorbell_aperture_size,
> - &gpu_resources.doorbell_start_offset);
> -
> - kgd2kfd->device_init(rdev->kfd, &gpu_resources);
> - }
> -}
> -
> -void radeon_kfd_device_fini(struct radeon_device *rdev)
> -{
> - if (rdev->kfd) {
> - kgd2kfd->device_exit(rdev->kfd);
> - rdev->kfd = NULL;
> - }
> -}
> -
> -void radeon_kfd_interrupt(struct radeon_device *rdev, const void *ih_ring_entry)
> -{
> - if (rdev->kfd)
> - kgd2kfd->interrupt(rdev->kfd, ih_ring_entry);
> -}
> -
> -void radeon_kfd_suspend(struct radeon_device *rdev)
> -{
> - if (rdev->kfd)
> - kgd2kfd->suspend(rdev->kfd);
> -}
> -
> -int radeon_kfd_resume(struct radeon_device *rdev)
> -{
> - int r = 0;
> -
> - if (rdev->kfd)
> - r = kgd2kfd->resume(rdev->kfd);
> -
> - return r;
> -}
> -
> -static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
> - void **mem_obj, uint64_t *gpu_addr,
> - void **cpu_ptr)
> -{
> - struct radeon_device *rdev = (struct radeon_device *)kgd;
> - struct kgd_mem **mem = (struct kgd_mem **) mem_obj;
> - int r;
> -
> - BUG_ON(kgd == NULL);
> - BUG_ON(gpu_addr == NULL);
> - BUG_ON(cpu_ptr == NULL);
> -
> - *mem = kmalloc(sizeof(struct kgd_mem), GFP_KERNEL);
> - if ((*mem) == NULL)
> - return -ENOMEM;
> -
> - r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_GTT,
> - RADEON_GEM_GTT_WC, NULL, NULL, &(*mem)->bo);
> - if (r) {
> - dev_err(rdev->dev,
> - "failed to allocate BO for amdkfd (%d)\n", r);
> - return r;
> - }
> -
> - /* map the buffer */
> - r = radeon_bo_reserve((*mem)->bo, true);
> - if (r) {
> - dev_err(rdev->dev, "(%d) failed to reserve bo for amdkfd\n", r);
> - goto allocate_mem_reserve_bo_failed;
> - }
> -
> - r = radeon_bo_pin((*mem)->bo, RADEON_GEM_DOMAIN_GTT,
> - &(*mem)->gpu_addr);
> - if (r) {
> - dev_err(rdev->dev, "(%d) failed to pin bo for amdkfd\n", r);
> - goto allocate_mem_pin_bo_failed;
> - }
> - *gpu_addr = (*mem)->gpu_addr;
> -
> - r = radeon_bo_kmap((*mem)->bo, &(*mem)->cpu_ptr);
> - if (r) {
> - dev_err(rdev->dev,
> - "(%d) failed to map bo to kernel for amdkfd\n", r);
> - goto allocate_mem_kmap_bo_failed;
> - }
> - *cpu_ptr = (*mem)->cpu_ptr;
> -
> - radeon_bo_unreserve((*mem)->bo);
> -
> - return 0;
> -
> -allocate_mem_kmap_bo_failed:
> - radeon_bo_unpin((*mem)->bo);
> -allocate_mem_pin_bo_failed:
> - radeon_bo_unreserve((*mem)->bo);
> -allocate_mem_reserve_bo_failed:
> - radeon_bo_unref(&(*mem)->bo);
> -
> - return r;
> -}
> -
> -static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
> -{
> - struct kgd_mem *mem = (struct kgd_mem *) mem_obj;
> -
> - BUG_ON(mem == NULL);
> -
> - radeon_bo_reserve(mem->bo, true);
> - radeon_bo_kunmap(mem->bo);
> - radeon_bo_unpin(mem->bo);
> - radeon_bo_unreserve(mem->bo);
> - radeon_bo_unref(&(mem->bo));
> - kfree(mem);
> -}
> -
> -static uint64_t get_vmem_size(struct kgd_dev *kgd)
> -{
> - struct radeon_device *rdev = (struct radeon_device *)kgd;
> -
> - BUG_ON(kgd == NULL);
> -
> - return rdev->mc.real_vram_size;
> -}
> -
> -static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
> -{
> - struct radeon_device *rdev = (struct radeon_device *)kgd;
> -
> - return rdev->asic->get_gpu_clock_counter(rdev);
> -}
> -
> -static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
> -{
> - struct radeon_device *rdev = (struct radeon_device *)kgd;
> -
> - /* The sclk is in quantas of 10kHz */
> - return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
> -}
> -
> -/*
> - * PASID manager
> - */
> -static DEFINE_IDA(pasid_ida);
> -
> -static int alloc_pasid(unsigned int bits)
> -{
> - int pasid = -EINVAL;
> -
> - for (bits = min(bits, 31U); bits > 0; bits--) {
> - pasid = ida_simple_get(&pasid_ida,
> - 1U << (bits - 1), 1U << bits,
> - GFP_KERNEL);
> - if (pasid != -ENOSPC)
> - break;
> - }
> -
> - return pasid;
> -}
> -
> -static void free_pasid(unsigned int pasid)
> -{
> - ida_simple_remove(&pasid_ida, pasid);
> -}
> -
> -static inline struct radeon_device *get_radeon_device(struct kgd_dev *kgd)
> -{
> - return (struct radeon_device *)kgd;
> -}
> -
> -static void write_register(struct kgd_dev *kgd, uint32_t offset, uint32_t value)
> -{
> - struct radeon_device *rdev = get_radeon_device(kgd);
> -
> - writel(value, (void __iomem *)(rdev->rmmio + offset));
> -}
> -
> -static uint32_t read_register(struct kgd_dev *kgd, uint32_t offset)
> -{
> - struct radeon_device *rdev = get_radeon_device(kgd);
> -
> - return readl((void __iomem *)(rdev->rmmio + offset));
> -}
> -
> -static void lock_srbm(struct kgd_dev *kgd, uint32_t mec, uint32_t pipe,
> - uint32_t queue, uint32_t vmid)
> -{
> - struct radeon_device *rdev = get_radeon_device(kgd);
> - uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);
> -
> - mutex_lock(&rdev->srbm_mutex);
> - write_register(kgd, SRBM_GFX_CNTL, value);
> -}
> -
> -static void unlock_srbm(struct kgd_dev *kgd)
> -{
> - struct radeon_device *rdev = get_radeon_device(kgd);
> -
> - write_register(kgd, SRBM_GFX_CNTL, 0);
> - mutex_unlock(&rdev->srbm_mutex);
> -}
> -
> -static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id,
> - uint32_t queue_id)
> -{
> - uint32_t mec = (++pipe_id / CIK_PIPE_PER_MEC) + 1;
> - uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);
> -
> - lock_srbm(kgd, mec, pipe, queue_id, 0);
> -}
> -
> -static void release_queue(struct kgd_dev *kgd)
> -{
> - unlock_srbm(kgd);
> -}
> -
> -static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
> - uint32_t sh_mem_config,
> - uint32_t sh_mem_ape1_base,
> - uint32_t sh_mem_ape1_limit,
> - uint32_t sh_mem_bases)
> -{
> - lock_srbm(kgd, 0, 0, 0, vmid);
> -
> - write_register(kgd, SH_MEM_CONFIG, sh_mem_config);
> - write_register(kgd, SH_MEM_APE1_BASE, sh_mem_ape1_base);
> - write_register(kgd, SH_MEM_APE1_LIMIT, sh_mem_ape1_limit);
> - write_register(kgd, SH_MEM_BASES, sh_mem_bases);
> -
> - unlock_srbm(kgd);
> -}
> -
> -static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
> - unsigned int vmid)
> -{
> - /*
> - * We have to assume that there is no outstanding mapping.
> - * The ATC_VMID_PASID_MAPPING_UPDATE_STATUS bit could be 0
> - * because a mapping is in progress or because a mapping finished and
> - * the SW cleared it.
> - * So the protocol is to always wait & clear.
> - */
> - uint32_t pasid_mapping = (pasid == 0) ? 0 : (uint32_t)pasid |
> - ATC_VMID_PASID_MAPPING_VALID_MASK;
> -
> - write_register(kgd, ATC_VMID0_PASID_MAPPING + vmid*sizeof(uint32_t),
> - pasid_mapping);
> -
> - while (!(read_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS) &
> - (1U << vmid)))
> - cpu_relax();
> - write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);
> -
> - /* Mapping vmid to pasid also for IH block */
> - write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),
> - pasid_mapping);
> -
> - return 0;
> -}
> -
> -static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
> - uint32_t hpd_size, uint64_t hpd_gpu_addr)
> -{
> - /* nothing to do here */
> - return 0;
> -}
> -
> -static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id)
> -{
> - uint32_t mec;
> - uint32_t pipe;
> -
> - mec = (pipe_id / CIK_PIPE_PER_MEC) + 1;
> - pipe = (pipe_id % CIK_PIPE_PER_MEC);
> -
> - lock_srbm(kgd, mec, pipe, 0, 0);
> -
> - write_register(kgd, CPC_INT_CNTL,
> - TIME_STAMP_INT_ENABLE | OPCODE_ERROR_INT_ENABLE);
> -
> - unlock_srbm(kgd);
> -
> - return 0;
> -}
> -
> -static inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m)
> -{
> - uint32_t retval;
> -
> - retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET +
> - m->sdma_queue_id * KFD_CIK_SDMA_QUEUE_OFFSET;
> -
> - pr_debug("kfd: sdma base address: 0x%x\n", retval);
> -
> - return retval;
> -}
> -
> -static inline struct cik_mqd *get_mqd(void *mqd)
> -{
> - return (struct cik_mqd *)mqd;
> -}
> -
> -static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
> -{
> - return (struct cik_sdma_rlc_registers *)mqd;
> -}
> -
> -static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
> - uint32_t queue_id, uint32_t __user *wptr,
> - uint32_t wptr_shift, uint32_t wptr_mask,
> - struct mm_struct *mm)
> -{
> - uint32_t wptr_shadow, is_wptr_shadow_valid;
> - struct cik_mqd *m;
> -
> - m = get_mqd(mqd);
> -
> - is_wptr_shadow_valid = !get_user(wptr_shadow, wptr);
> -
> - acquire_queue(kgd, pipe_id, queue_id);
> - write_register(kgd, CP_MQD_BASE_ADDR, m->cp_mqd_base_addr_lo);
> - write_register(kgd, CP_MQD_BASE_ADDR_HI, m->cp_mqd_base_addr_hi);
> - write_register(kgd, CP_MQD_CONTROL, m->cp_mqd_control);
> -
> - write_register(kgd, CP_HQD_PQ_BASE, m->cp_hqd_pq_base_lo);
> - write_register(kgd, CP_HQD_PQ_BASE_HI, m->cp_hqd_pq_base_hi);
> - write_register(kgd, CP_HQD_PQ_CONTROL, m->cp_hqd_pq_control);
> -
> - write_register(kgd, CP_HQD_IB_CONTROL, m->cp_hqd_ib_control);
> - write_register(kgd, CP_HQD_IB_BASE_ADDR, m->cp_hqd_ib_base_addr_lo);
> - write_register(kgd, CP_HQD_IB_BASE_ADDR_HI, m->cp_hqd_ib_base_addr_hi);
> -
> - write_register(kgd, CP_HQD_IB_RPTR, m->cp_hqd_ib_rptr);
> -
> - write_register(kgd, CP_HQD_PERSISTENT_STATE,
> - m->cp_hqd_persistent_state);
> - write_register(kgd, CP_HQD_SEMA_CMD, m->cp_hqd_sema_cmd);
> - write_register(kgd, CP_HQD_MSG_TYPE, m->cp_hqd_msg_type);
> -
> - write_register(kgd, CP_HQD_ATOMIC0_PREOP_LO,
> - m->cp_hqd_atomic0_preop_lo);
> -
> - write_register(kgd, CP_HQD_ATOMIC0_PREOP_HI,
> - m->cp_hqd_atomic0_preop_hi);
> -
> - write_register(kgd, CP_HQD_ATOMIC1_PREOP_LO,
> - m->cp_hqd_atomic1_preop_lo);
> -
> - write_register(kgd, CP_HQD_ATOMIC1_PREOP_HI,
> - m->cp_hqd_atomic1_preop_hi);
> -
> - write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR,
> - m->cp_hqd_pq_rptr_report_addr_lo);
> -
> - write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR_HI,
> - m->cp_hqd_pq_rptr_report_addr_hi);
> -
> - write_register(kgd, CP_HQD_PQ_RPTR, m->cp_hqd_pq_rptr);
> -
> - write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR,
> - m->cp_hqd_pq_wptr_poll_addr_lo);
> -
> - write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR_HI,
> - m->cp_hqd_pq_wptr_poll_addr_hi);
> -
> - write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL,
> - m->cp_hqd_pq_doorbell_control);
> -
> - write_register(kgd, CP_HQD_VMID, m->cp_hqd_vmid);
> -
> - write_register(kgd, CP_HQD_QUANTUM, m->cp_hqd_quantum);
> -
> - write_register(kgd, CP_HQD_PIPE_PRIORITY, m->cp_hqd_pipe_priority);
> - write_register(kgd, CP_HQD_QUEUE_PRIORITY, m->cp_hqd_queue_priority);
> -
> - write_register(kgd, CP_HQD_IQ_RPTR, m->cp_hqd_iq_rptr);
> -
> - if (is_wptr_shadow_valid)
> - write_register(kgd, CP_HQD_PQ_WPTR, wptr_shadow);
> -
> - write_register(kgd, CP_HQD_ACTIVE, m->cp_hqd_active);
> - release_queue(kgd);
> -
> - return 0;
> -}
> -
> -static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd)
> -{
> - struct cik_sdma_rlc_registers *m;
> - uint32_t sdma_base_addr;
> -
> - m = get_sdma_mqd(mqd);
> - sdma_base_addr = get_sdma_base_addr(m);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_VIRTUAL_ADDR,
> - m->sdma_rlc_virtual_addr);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_RB_BASE,
> - m->sdma_rlc_rb_base);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_RB_BASE_HI,
> - m->sdma_rlc_rb_base_hi);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_LO,
> - m->sdma_rlc_rb_rptr_addr_lo);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_HI,
> - m->sdma_rlc_rb_rptr_addr_hi);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_DOORBELL,
> - m->sdma_rlc_doorbell);
> -
> - write_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_RB_CNTL,
> - m->sdma_rlc_rb_cntl);
> -
> - return 0;
> -}
> -
> -static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
> - uint32_t pipe_id, uint32_t queue_id)
> -{
> - uint32_t act;
> - bool retval = false;
> - uint32_t low, high;
> -
> - acquire_queue(kgd, pipe_id, queue_id);
> - act = read_register(kgd, CP_HQD_ACTIVE);
> - if (act) {
> - low = lower_32_bits(queue_address >> 8);
> - high = upper_32_bits(queue_address >> 8);
> -
> - if (low == read_register(kgd, CP_HQD_PQ_BASE) &&
> - high == read_register(kgd, CP_HQD_PQ_BASE_HI))
> - retval = true;
> - }
> - release_queue(kgd);
> - return retval;
> -}
> -
> -static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)
> -{
> - struct cik_sdma_rlc_registers *m;
> - uint32_t sdma_base_addr;
> - uint32_t sdma_rlc_rb_cntl;
> -
> - m = get_sdma_mqd(mqd);
> - sdma_base_addr = get_sdma_base_addr(m);
> -
> - sdma_rlc_rb_cntl = read_register(kgd,
> - sdma_base_addr + SDMA0_RLC0_RB_CNTL);
> -
> - if (sdma_rlc_rb_cntl & SDMA_RB_ENABLE)
> - return true;
> -
> - return false;
> -}
> -
> -static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
> - unsigned int timeout, uint32_t pipe_id,
> - uint32_t queue_id)
> -{
> - uint32_t temp;
> -
> - acquire_queue(kgd, pipe_id, queue_id);
> - write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL, 0);
> -
> - write_register(kgd, CP_HQD_DEQUEUE_REQUEST, reset_type);
> -
> - while (true) {
> - temp = read_register(kgd, CP_HQD_ACTIVE);
> - if (temp & 0x1)
> - break;
> - if (timeout == 0) {
> - pr_err("kfd: cp queue preemption time out (%dms)\n",
> - temp);
> - release_queue(kgd);
> - return -ETIME;
> - }
> - msleep(20);
> - timeout -= 20;
> - }
> -
> - release_queue(kgd);
> - return 0;
> -}
> -
> -static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
> - unsigned int timeout)
> -{
> - struct cik_sdma_rlc_registers *m;
> - uint32_t sdma_base_addr;
> - uint32_t temp;
> -
> - m = get_sdma_mqd(mqd);
> - sdma_base_addr = get_sdma_base_addr(m);
> -
> - temp = read_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL);
> - temp = temp & ~SDMA_RB_ENABLE;
> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL, temp);
> -
> - while (true) {
> - temp = read_register(kgd, sdma_base_addr +
> - SDMA0_RLC0_CONTEXT_STATUS);
> - if (temp & SDMA_RLC_IDLE)
> - break;
> - if (timeout == 0)
> - return -ETIME;
> - msleep(20);
> - timeout -= 20;
> - }
> -
> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_DOORBELL, 0);
> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_RPTR, 0);
> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_WPTR, 0);
> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_BASE, 0);
> -
> - return 0;
> -}
> -
> -static int kgd_address_watch_disable(struct kgd_dev *kgd)
> -{
> - union TCP_WATCH_CNTL_BITS cntl;
> - unsigned int i;
> -
> - cntl.u32All = 0;
> -
> - cntl.bitfields.valid = 0;
> - cntl.bitfields.mask = ADDRESS_WATCH_REG_CNTL_DEFAULT_MASK;
> - cntl.bitfields.atc = 1;
> -
> - /* Turning off this address until we set all the registers */
> - for (i = 0; i < MAX_WATCH_ADDRESSES; i++)
> - write_register(kgd,
> - watchRegs[i * ADDRESS_WATCH_REG_MAX +
> - ADDRESS_WATCH_REG_CNTL],
> - cntl.u32All);
> -
> - return 0;
> -}
> -
> -static int kgd_address_watch_execute(struct kgd_dev *kgd,
> - unsigned int watch_point_id,
> - uint32_t cntl_val,
> - uint32_t addr_hi,
> - uint32_t addr_lo)
> -{
> - union TCP_WATCH_CNTL_BITS cntl;
> -
> - cntl.u32All = cntl_val;
> -
> - /* Turning off this watch point until we set all the registers */
> - cntl.bitfields.valid = 0;
> - write_register(kgd,
> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
> - ADDRESS_WATCH_REG_CNTL],
> - cntl.u32All);
> -
> - write_register(kgd,
> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
> - ADDRESS_WATCH_REG_ADDR_HI],
> - addr_hi);
> -
> - write_register(kgd,
> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
> - ADDRESS_WATCH_REG_ADDR_LO],
> - addr_lo);
> -
> - /* Enable the watch point */
> - cntl.bitfields.valid = 1;
> -
> - write_register(kgd,
> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
> - ADDRESS_WATCH_REG_CNTL],
> - cntl.u32All);
> -
> - return 0;
> -}
> -
> -static int kgd_wave_control_execute(struct kgd_dev *kgd,
> - uint32_t gfx_index_val,
> - uint32_t sq_cmd)
> -{
> - struct radeon_device *rdev = get_radeon_device(kgd);
> - uint32_t data;
> -
> - mutex_lock(&rdev->grbm_idx_mutex);
> -
> - write_register(kgd, GRBM_GFX_INDEX, gfx_index_val);
> - write_register(kgd, SQ_CMD, sq_cmd);
> -
> - /* Restore the GRBM_GFX_INDEX register */
> -
> - data = INSTANCE_BROADCAST_WRITES | SH_BROADCAST_WRITES |
> - SE_BROADCAST_WRITES;
> -
> - write_register(kgd, GRBM_GFX_INDEX, data);
> -
> - mutex_unlock(&rdev->grbm_idx_mutex);
> -
> - return 0;
> -}
> -
> -static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
> - unsigned int watch_point_id,
> - unsigned int reg_offset)
> -{
> - return watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX + reg_offset]
> - / 4;
> -}
> -
> -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid)
> -{
> - uint32_t reg;
> - struct radeon_device *rdev = (struct radeon_device *) kgd;
> -
> - reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
> - return reg & ATC_VMID_PASID_MAPPING_VALID_MASK;
> -}
> -
> -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
> - uint8_t vmid)
> -{
> - uint32_t reg;
> - struct radeon_device *rdev = (struct radeon_device *) kgd;
> -
> - reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
> - return reg & ATC_VMID_PASID_MAPPING_PASID_MASK;
> -}
> -
> -static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)
> -{
> - struct radeon_device *rdev = (struct radeon_device *) kgd;
> -
> - return WREG32(VM_INVALIDATE_REQUEST, 1 << vmid);
> -}
> -
> -static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
> -{
> - struct radeon_device *rdev = (struct radeon_device *) kgd;
> - const union radeon_firmware_header *hdr;
> -
> - BUG_ON(kgd == NULL || rdev->mec_fw == NULL);
> -
> - switch (type) {
> - case KGD_ENGINE_PFP:
> - hdr = (const union radeon_firmware_header *) rdev->pfp_fw->data;
> - break;
> -
> - case KGD_ENGINE_ME:
> - hdr = (const union radeon_firmware_header *) rdev->me_fw->data;
> - break;
> -
> - case KGD_ENGINE_CE:
> - hdr = (const union radeon_firmware_header *) rdev->ce_fw->data;
> - break;
> -
> - case KGD_ENGINE_MEC1:
> - hdr = (const union radeon_firmware_header *) rdev->mec_fw->data;
> - break;
> -
> - case KGD_ENGINE_MEC2:
> - hdr = (const union radeon_firmware_header *)
> - rdev->mec2_fw->data;
> - break;
> -
> - case KGD_ENGINE_RLC:
> - hdr = (const union radeon_firmware_header *) rdev->rlc_fw->data;
> - break;
> -
> - case KGD_ENGINE_SDMA1:
> - case KGD_ENGINE_SDMA2:
> - hdr = (const union radeon_firmware_header *)
> - rdev->sdma_fw->data;
> - break;
> -
> - default:
> - return 0;
> - }
> -
> - if (hdr == NULL)
> - return 0;
> -
> - /* Only 12 bit in use*/
> - return hdr->common.ucode_version;
> -}
> diff --git a/drivers/gpu/drm/radeon/radeon_kfd.h b/drivers/gpu/drm/radeon/radeon_kfd.h
> deleted file mode 100644
> index 9df1fea..0000000
> --- a/drivers/gpu/drm/radeon/radeon_kfd.h
> +++ /dev/null
> @@ -1,47 +0,0 @@
> -/*
> - * Copyright 2014 Advanced Micro Devices, Inc.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - */
> -
> -/*
> - * radeon_kfd.h defines the private interface between the
> - * AMD kernel graphics drivers and the AMD KFD.
> - */
> -
> -#ifndef RADEON_KFD_H_INCLUDED
> -#define RADEON_KFD_H_INCLUDED
> -
> -#include <linux/types.h>
> -#include "kgd_kfd_interface.h"
> -
> -struct radeon_device;
> -
> -int radeon_kfd_init(void);
> -void radeon_kfd_fini(void);
> -
> -void radeon_kfd_suspend(struct radeon_device *rdev);
> -int radeon_kfd_resume(struct radeon_device *rdev);
> -void radeon_kfd_interrupt(struct radeon_device *rdev,
> - const void *ih_ring_entry);
> -void radeon_kfd_device_probe(struct radeon_device *rdev);
> -void radeon_kfd_device_init(struct radeon_device *rdev);
> -void radeon_kfd_device_fini(struct radeon_device *rdev);
> -
> -#endif /* RADEON_KFD_H_INCLUDED */
> diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
> index dfee8f7..cde037f 100644
> --- a/drivers/gpu/drm/radeon/radeon_kms.c
> +++ b/drivers/gpu/drm/radeon/radeon_kms.c
> @@ -34,8 +34,6 @@
> #include <linux/slab.h>
> #include <linux/pm_runtime.h>
>
> -#include "radeon_kfd.h"
> -
> #if defined(CONFIG_VGA_SWITCHEROO)
> bool radeon_has_atpx(void);
> #else
> @@ -68,8 +66,6 @@ void radeon_driver_unload_kms(struct drm_device *dev)
> pm_runtime_forbid(dev->dev);
> }
>
> - radeon_kfd_device_fini(rdev);
> -
> radeon_acpi_fini(rdev);
>
> radeon_modeset_fini(rdev);
> @@ -174,9 +170,6 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
> "Error during ACPI methods call\n");
> }
>
> - radeon_kfd_device_probe(rdev);
> - radeon_kfd_device_init(rdev);
> -
> if (radeon_is_px(dev)) {
> pm_runtime_use_autosuspend(dev->dev);
> pm_runtime_set_autosuspend_delay(dev->dev, 5000);
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <CAFCwf10G5014KcMG+_Zz9_RaUh+JH8cMdgHD_accH40ZciFydw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-10-31 14:56 ` Christian König
[not found] ` <56f7a613-7815-6916-2739-a9cb935a2018-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2017-10-31 14:56 UTC (permalink / raw)
To: Oded Gabbay, Christian König; +Cc: amd-gfx list
Am 31.10.2017 um 11:44 schrieb Oded Gabbay:
> Don't have any strong objection, but I just want to ask if current
> users can just move to using amdgpu on KV and their current usermode
> stack will work as usual.
Yes, I think so.
> btw, are there any "current users" that you are aware of ?
Not the slightest idea, but from Felix comments at least the current
user mode stack + old kernel won't work.
Regards,
Christian.
>
>
> On Mon, Oct 30, 2017 at 3:16 PM, Christian König
> <deathsimple@vodafone.de> wrote:
>> From: Christian König <christian.koenig@amd.com>
>>
>> To quote Felix: "For testing KV with current user mode stack, please use
>> amdgpu. I don't expect this to work with radeon and I'm not planning to spend
>> any effort on making radeon work with a current user mode stack."
>>
>> Only compile tested, but should be straight forward.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdkfd/Kconfig | 2 +-
>> drivers/gpu/drm/radeon/Makefile | 3 +-
>> drivers/gpu/drm/radeon/cik.c | 14 +-
>> drivers/gpu/drm/radeon/cikd.h | 2 -
>> drivers/gpu/drm/radeon/radeon.h | 3 -
>> drivers/gpu/drm/radeon/radeon_drv.c | 10 -
>> drivers/gpu/drm/radeon/radeon_kfd.c | 901 ------------------------------------
>> drivers/gpu/drm/radeon/radeon_kfd.h | 47 --
>> drivers/gpu/drm/radeon/radeon_kms.c | 7 -
>> 9 files changed, 4 insertions(+), 985 deletions(-)
>> delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.c
>> delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.h
>>
>> diff --git a/drivers/gpu/drm/amd/amdkfd/Kconfig b/drivers/gpu/drm/amd/amdkfd/Kconfig
>> index e13c67c..bc5a294 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/Kconfig
>> +++ b/drivers/gpu/drm/amd/amdkfd/Kconfig
>> @@ -4,6 +4,6 @@
>>
>> config HSA_AMD
>> tristate "HSA kernel driver for AMD GPU devices"
>> - depends on (DRM_RADEON || DRM_AMDGPU) && AMD_IOMMU_V2 && X86_64
>> + depends on DRM_AMDGPU && AMD_IOMMU_V2 && X86_64
>> help
>> Enable this if you want to use HSA features on AMD GPU devices.
>> diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
>> index be16c63..cf3e598 100644
>> --- a/drivers/gpu/drm/radeon/Makefile
>> +++ b/drivers/gpu/drm/radeon/Makefile
>> @@ -102,8 +102,7 @@ radeon-y += \
>> radeon-y += \
>> radeon_vce.o \
>> vce_v1_0.o \
>> - vce_v2_0.o \
>> - radeon_kfd.o
>> + vce_v2_0.o
>>
>> radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
>> radeon-$(CONFIG_ACPI) += radeon_acpi.o
>> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
>> index 3cb6c55..898f9a0 100644
>> --- a/drivers/gpu/drm/radeon/cik.c
>> +++ b/drivers/gpu/drm/radeon/cik.c
>> @@ -33,7 +33,6 @@
>> #include "cik_blit_shaders.h"
>> #include "radeon_ucode.h"
>> #include "clearstate_ci.h"
>> -#include "radeon_kfd.h"
>>
>> #define SH_MEM_CONFIG_GFX_DEFAULT \
>> ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED)
>> @@ -5684,10 +5683,9 @@ int cik_vm_init(struct radeon_device *rdev)
>> /*
>> * number of VMs
>> * VMID 0 is reserved for System
>> - * radeon graphics/compute will use VMIDs 1-7
>> - * amdkfd will use VMIDs 8-15
>> + * radeon graphics/compute will use VMIDs 1-15
>> */
>> - rdev->vm_manager.nvm = RADEON_NUM_OF_VMIDS;
>> + rdev->vm_manager.nvm = 16;
>> /* base offset of vram pages */
>> if (rdev->flags & RADEON_IS_IGP) {
>> u64 tmp = RREG32(MC_VM_FB_OFFSET);
>> @@ -7589,9 +7587,6 @@ int cik_irq_process(struct radeon_device *rdev)
>> /* wptr/rptr are in bytes! */
>> ring_index = rptr / 4;
>>
>> - radeon_kfd_interrupt(rdev,
>> - (const void *) &rdev->ih.ring[ring_index]);
>> -
>> src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;
>> src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;
>> ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff;
>> @@ -8486,10 +8481,6 @@ static int cik_startup(struct radeon_device *rdev)
>> if (r)
>> return r;
>>
>> - r = radeon_kfd_resume(rdev);
>> - if (r)
>> - return r;
>> -
>> return 0;
>> }
>>
>> @@ -8538,7 +8529,6 @@ int cik_resume(struct radeon_device *rdev)
>> */
>> int cik_suspend(struct radeon_device *rdev)
>> {
>> - radeon_kfd_suspend(rdev);
>> radeon_pm_suspend(rdev);
>> radeon_audio_fini(rdev);
>> radeon_vm_manager_fini(rdev);
>> diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
>> index e210154..cda16fc 100644
>> --- a/drivers/gpu/drm/radeon/cikd.h
>> +++ b/drivers/gpu/drm/radeon/cikd.h
>> @@ -30,8 +30,6 @@
>> #define CIK_RB_BITMAP_WIDTH_PER_SH 2
>> #define HAWAII_RB_BITMAP_WIDTH_PER_SH 4
>>
>> -#define RADEON_NUM_OF_VMIDS 8
>> -
>> /* DIDT IND registers */
>> #define DIDT_SQ_CTRL0 0x0
>> # define DIDT_CTRL_EN (1 << 0)
>> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
>> index ec63bc5..d94741b 100644
>> --- a/drivers/gpu/drm/radeon/radeon.h
>> +++ b/drivers/gpu/drm/radeon/radeon.h
>> @@ -2456,9 +2456,6 @@ struct radeon_device {
>> u64 vram_pin_size;
>> u64 gart_pin_size;
>>
>> - /* amdkfd interface */
>> - struct kfd_dev *kfd;
>> -
>> struct mutex mn_lock;
>> DECLARE_HASHTABLE(mn_hash, 7);
>> };
>> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
>> index f4becad..31dd04f 100644
>> --- a/drivers/gpu/drm/radeon/radeon_drv.c
>> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
>> @@ -43,7 +43,6 @@
>> #include <drm/drm_fb_helper.h>
>>
>> #include <drm/drm_crtc_helper.h>
>> -#include "radeon_kfd.h"
>>
>> /*
>> * KMS wrapper.
>> @@ -338,14 +337,6 @@ static int radeon_pci_probe(struct pci_dev *pdev,
>> {
>> int ret;
>>
>> - /*
>> - * Initialize amdkfd before starting radeon. If it was not loaded yet,
>> - * defer radeon probing
>> - */
>> - ret = radeon_kfd_init();
>> - if (ret == -EPROBE_DEFER)
>> - return ret;
>> -
>> if (vga_switcheroo_client_probe_defer(pdev))
>> return -EPROBE_DEFER;
>>
>> @@ -645,7 +636,6 @@ static int __init radeon_init(void)
>>
>> static void __exit radeon_exit(void)
>> {
>> - radeon_kfd_fini();
>> pci_unregister_driver(pdriver);
>> radeon_unregister_atpx_handler();
>> }
>> diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c
>> deleted file mode 100644
>> index 385b4d7..0000000
>> --- a/drivers/gpu/drm/radeon/radeon_kfd.c
>> +++ /dev/null
>> @@ -1,901 +0,0 @@
>> -/*
>> - * Copyright 2014 Advanced Micro Devices, Inc.
>> - *
>> - * Permission is hereby granted, free of charge, to any person obtaining a
>> - * copy of this software and associated documentation files (the "Software"),
>> - * to deal in the Software without restriction, including without limitation
>> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> - * and/or sell copies of the Software, and to permit persons to whom the
>> - * Software is furnished to do so, subject to the following conditions:
>> - *
>> - * The above copyright notice and this permission notice shall be included in
>> - * all copies or substantial portions of the Software.
>> - *
>> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> - * OTHER DEALINGS IN THE SOFTWARE.
>> - */
>> -
>> -#include <linux/module.h>
>> -#include <linux/fdtable.h>
>> -#include <linux/uaccess.h>
>> -#include <drm/drmP.h>
>> -#include "radeon.h"
>> -#include "cikd.h"
>> -#include "cik_reg.h"
>> -#include "radeon_kfd.h"
>> -#include "radeon_ucode.h"
>> -#include <linux/firmware.h>
>> -#include "cik_structs.h"
>> -
>> -#define CIK_PIPE_PER_MEC (4)
>> -
>> -static const uint32_t watchRegs[MAX_WATCH_ADDRESSES * ADDRESS_WATCH_REG_MAX] = {
>> - TCP_WATCH0_ADDR_H, TCP_WATCH0_ADDR_L, TCP_WATCH0_CNTL,
>> - TCP_WATCH1_ADDR_H, TCP_WATCH1_ADDR_L, TCP_WATCH1_CNTL,
>> - TCP_WATCH2_ADDR_H, TCP_WATCH2_ADDR_L, TCP_WATCH2_CNTL,
>> - TCP_WATCH3_ADDR_H, TCP_WATCH3_ADDR_L, TCP_WATCH3_CNTL
>> -};
>> -
>> -struct kgd_mem {
>> - struct radeon_bo *bo;
>> - uint64_t gpu_addr;
>> - void *cpu_ptr;
>> -};
>> -
>> -
>> -static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>> - void **mem_obj, uint64_t *gpu_addr,
>> - void **cpu_ptr);
>> -
>> -static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
>> -
>> -static uint64_t get_vmem_size(struct kgd_dev *kgd);
>> -static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
>> -
>> -static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
>> -
>> -static int alloc_pasid(unsigned int bits);
>> -static void free_pasid(unsigned int pasid);
>> -
>> -static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
>> -
>> -/*
>> - * Register access functions
>> - */
>> -
>> -static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
>> - uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
>> - uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
>> -
>> -static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
>> - unsigned int vmid);
>> -
>> -static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
>> - uint32_t hpd_size, uint64_t hpd_gpu_addr);
>> -static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id);
>> -static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
>> - uint32_t queue_id, uint32_t __user *wptr,
>> - uint32_t wptr_shift, uint32_t wptr_mask,
>> - struct mm_struct *mm);
>> -static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
>> -static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
>> - uint32_t pipe_id, uint32_t queue_id);
>> -
>> -static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
>> - unsigned int timeout, uint32_t pipe_id,
>> - uint32_t queue_id);
>> -static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
>> -static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
>> - unsigned int timeout);
>> -static int kgd_address_watch_disable(struct kgd_dev *kgd);
>> -static int kgd_address_watch_execute(struct kgd_dev *kgd,
>> - unsigned int watch_point_id,
>> - uint32_t cntl_val,
>> - uint32_t addr_hi,
>> - uint32_t addr_lo);
>> -static int kgd_wave_control_execute(struct kgd_dev *kgd,
>> - uint32_t gfx_index_val,
>> - uint32_t sq_cmd);
>> -static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
>> - unsigned int watch_point_id,
>> - unsigned int reg_offset);
>> -
>> -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid);
>> -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
>> - uint8_t vmid);
>> -static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid);
>> -
>> -static const struct kfd2kgd_calls kfd2kgd = {
>> - .init_gtt_mem_allocation = alloc_gtt_mem,
>> - .free_gtt_mem = free_gtt_mem,
>> - .get_vmem_size = get_vmem_size,
>> - .get_gpu_clock_counter = get_gpu_clock_counter,
>> - .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
>> - .alloc_pasid = alloc_pasid,
>> - .free_pasid = free_pasid,
>> - .program_sh_mem_settings = kgd_program_sh_mem_settings,
>> - .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
>> - .init_pipeline = kgd_init_pipeline,
>> - .init_interrupts = kgd_init_interrupts,
>> - .hqd_load = kgd_hqd_load,
>> - .hqd_sdma_load = kgd_hqd_sdma_load,
>> - .hqd_is_occupied = kgd_hqd_is_occupied,
>> - .hqd_sdma_is_occupied = kgd_hqd_sdma_is_occupied,
>> - .hqd_destroy = kgd_hqd_destroy,
>> - .hqd_sdma_destroy = kgd_hqd_sdma_destroy,
>> - .address_watch_disable = kgd_address_watch_disable,
>> - .address_watch_execute = kgd_address_watch_execute,
>> - .wave_control_execute = kgd_wave_control_execute,
>> - .address_watch_get_offset = kgd_address_watch_get_offset,
>> - .get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid,
>> - .get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid,
>> - .write_vmid_invalidate_request = write_vmid_invalidate_request,
>> - .get_fw_version = get_fw_version
>> -};
>> -
>> -static const struct kgd2kfd_calls *kgd2kfd;
>> -
>> -int radeon_kfd_init(void)
>> -{
>> - int ret;
>> -
>> -#if defined(CONFIG_HSA_AMD_MODULE)
>> - int (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
>> -
>> - kgd2kfd_init_p = symbol_request(kgd2kfd_init);
>> -
>> - if (kgd2kfd_init_p == NULL)
>> - return -ENOENT;
>> -
>> - ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
>> - if (ret) {
>> - symbol_put(kgd2kfd_init);
>> - kgd2kfd = NULL;
>> - }
>> -
>> -#elif defined(CONFIG_HSA_AMD)
>> - ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
>> - if (ret)
>> - kgd2kfd = NULL;
>> -
>> -#else
>> - ret = -ENOENT;
>> -#endif
>> -
>> - return ret;
>> -}
>> -
>> -void radeon_kfd_fini(void)
>> -{
>> - if (kgd2kfd) {
>> - kgd2kfd->exit();
>> - symbol_put(kgd2kfd_init);
>> - }
>> -}
>> -
>> -void radeon_kfd_device_probe(struct radeon_device *rdev)
>> -{
>> - if (kgd2kfd)
>> - rdev->kfd = kgd2kfd->probe((struct kgd_dev *)rdev,
>> - rdev->pdev, &kfd2kgd);
>> -}
>> -
>> -void radeon_kfd_device_init(struct radeon_device *rdev)
>> -{
>> - int i, queue, pipe, mec;
>> -
>> - if (rdev->kfd) {
>> - struct kgd2kfd_shared_resources gpu_resources = {
>> - .compute_vmid_bitmap = 0xFF00,
>> - .num_pipe_per_mec = 4,
>> - .num_queue_per_pipe = 8
>> - };
>> -
>> - bitmap_zero(gpu_resources.queue_bitmap, KGD_MAX_QUEUES);
>> -
>> - for (i = 0; i < KGD_MAX_QUEUES; ++i) {
>> - queue = i % gpu_resources.num_queue_per_pipe;
>> - pipe = (i / gpu_resources.num_queue_per_pipe)
>> - % gpu_resources.num_pipe_per_mec;
>> - mec = (i / gpu_resources.num_queue_per_pipe)
>> - / gpu_resources.num_pipe_per_mec;
>> -
>> - if (mec == 0 && pipe > 0)
>> - set_bit(i, gpu_resources.queue_bitmap);
>> - }
>> -
>> - radeon_doorbell_get_kfd_info(rdev,
>> - &gpu_resources.doorbell_physical_address,
>> - &gpu_resources.doorbell_aperture_size,
>> - &gpu_resources.doorbell_start_offset);
>> -
>> - kgd2kfd->device_init(rdev->kfd, &gpu_resources);
>> - }
>> -}
>> -
>> -void radeon_kfd_device_fini(struct radeon_device *rdev)
>> -{
>> - if (rdev->kfd) {
>> - kgd2kfd->device_exit(rdev->kfd);
>> - rdev->kfd = NULL;
>> - }
>> -}
>> -
>> -void radeon_kfd_interrupt(struct radeon_device *rdev, const void *ih_ring_entry)
>> -{
>> - if (rdev->kfd)
>> - kgd2kfd->interrupt(rdev->kfd, ih_ring_entry);
>> -}
>> -
>> -void radeon_kfd_suspend(struct radeon_device *rdev)
>> -{
>> - if (rdev->kfd)
>> - kgd2kfd->suspend(rdev->kfd);
>> -}
>> -
>> -int radeon_kfd_resume(struct radeon_device *rdev)
>> -{
>> - int r = 0;
>> -
>> - if (rdev->kfd)
>> - r = kgd2kfd->resume(rdev->kfd);
>> -
>> - return r;
>> -}
>> -
>> -static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>> - void **mem_obj, uint64_t *gpu_addr,
>> - void **cpu_ptr)
>> -{
>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>> - struct kgd_mem **mem = (struct kgd_mem **) mem_obj;
>> - int r;
>> -
>> - BUG_ON(kgd == NULL);
>> - BUG_ON(gpu_addr == NULL);
>> - BUG_ON(cpu_ptr == NULL);
>> -
>> - *mem = kmalloc(sizeof(struct kgd_mem), GFP_KERNEL);
>> - if ((*mem) == NULL)
>> - return -ENOMEM;
>> -
>> - r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_GTT,
>> - RADEON_GEM_GTT_WC, NULL, NULL, &(*mem)->bo);
>> - if (r) {
>> - dev_err(rdev->dev,
>> - "failed to allocate BO for amdkfd (%d)\n", r);
>> - return r;
>> - }
>> -
>> - /* map the buffer */
>> - r = radeon_bo_reserve((*mem)->bo, true);
>> - if (r) {
>> - dev_err(rdev->dev, "(%d) failed to reserve bo for amdkfd\n", r);
>> - goto allocate_mem_reserve_bo_failed;
>> - }
>> -
>> - r = radeon_bo_pin((*mem)->bo, RADEON_GEM_DOMAIN_GTT,
>> - &(*mem)->gpu_addr);
>> - if (r) {
>> - dev_err(rdev->dev, "(%d) failed to pin bo for amdkfd\n", r);
>> - goto allocate_mem_pin_bo_failed;
>> - }
>> - *gpu_addr = (*mem)->gpu_addr;
>> -
>> - r = radeon_bo_kmap((*mem)->bo, &(*mem)->cpu_ptr);
>> - if (r) {
>> - dev_err(rdev->dev,
>> - "(%d) failed to map bo to kernel for amdkfd\n", r);
>> - goto allocate_mem_kmap_bo_failed;
>> - }
>> - *cpu_ptr = (*mem)->cpu_ptr;
>> -
>> - radeon_bo_unreserve((*mem)->bo);
>> -
>> - return 0;
>> -
>> -allocate_mem_kmap_bo_failed:
>> - radeon_bo_unpin((*mem)->bo);
>> -allocate_mem_pin_bo_failed:
>> - radeon_bo_unreserve((*mem)->bo);
>> -allocate_mem_reserve_bo_failed:
>> - radeon_bo_unref(&(*mem)->bo);
>> -
>> - return r;
>> -}
>> -
>> -static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
>> -{
>> - struct kgd_mem *mem = (struct kgd_mem *) mem_obj;
>> -
>> - BUG_ON(mem == NULL);
>> -
>> - radeon_bo_reserve(mem->bo, true);
>> - radeon_bo_kunmap(mem->bo);
>> - radeon_bo_unpin(mem->bo);
>> - radeon_bo_unreserve(mem->bo);
>> - radeon_bo_unref(&(mem->bo));
>> - kfree(mem);
>> -}
>> -
>> -static uint64_t get_vmem_size(struct kgd_dev *kgd)
>> -{
>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>> -
>> - BUG_ON(kgd == NULL);
>> -
>> - return rdev->mc.real_vram_size;
>> -}
>> -
>> -static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
>> -{
>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>> -
>> - return rdev->asic->get_gpu_clock_counter(rdev);
>> -}
>> -
>> -static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
>> -{
>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>> -
>> - /* The sclk is in quantas of 10kHz */
>> - return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
>> -}
>> -
>> -/*
>> - * PASID manager
>> - */
>> -static DEFINE_IDA(pasid_ida);
>> -
>> -static int alloc_pasid(unsigned int bits)
>> -{
>> - int pasid = -EINVAL;
>> -
>> - for (bits = min(bits, 31U); bits > 0; bits--) {
>> - pasid = ida_simple_get(&pasid_ida,
>> - 1U << (bits - 1), 1U << bits,
>> - GFP_KERNEL);
>> - if (pasid != -ENOSPC)
>> - break;
>> - }
>> -
>> - return pasid;
>> -}
>> -
>> -static void free_pasid(unsigned int pasid)
>> -{
>> - ida_simple_remove(&pasid_ida, pasid);
>> -}
>> -
>> -static inline struct radeon_device *get_radeon_device(struct kgd_dev *kgd)
>> -{
>> - return (struct radeon_device *)kgd;
>> -}
>> -
>> -static void write_register(struct kgd_dev *kgd, uint32_t offset, uint32_t value)
>> -{
>> - struct radeon_device *rdev = get_radeon_device(kgd);
>> -
>> - writel(value, (void __iomem *)(rdev->rmmio + offset));
>> -}
>> -
>> -static uint32_t read_register(struct kgd_dev *kgd, uint32_t offset)
>> -{
>> - struct radeon_device *rdev = get_radeon_device(kgd);
>> -
>> - return readl((void __iomem *)(rdev->rmmio + offset));
>> -}
>> -
>> -static void lock_srbm(struct kgd_dev *kgd, uint32_t mec, uint32_t pipe,
>> - uint32_t queue, uint32_t vmid)
>> -{
>> - struct radeon_device *rdev = get_radeon_device(kgd);
>> - uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);
>> -
>> - mutex_lock(&rdev->srbm_mutex);
>> - write_register(kgd, SRBM_GFX_CNTL, value);
>> -}
>> -
>> -static void unlock_srbm(struct kgd_dev *kgd)
>> -{
>> - struct radeon_device *rdev = get_radeon_device(kgd);
>> -
>> - write_register(kgd, SRBM_GFX_CNTL, 0);
>> - mutex_unlock(&rdev->srbm_mutex);
>> -}
>> -
>> -static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id,
>> - uint32_t queue_id)
>> -{
>> - uint32_t mec = (++pipe_id / CIK_PIPE_PER_MEC) + 1;
>> - uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);
>> -
>> - lock_srbm(kgd, mec, pipe, queue_id, 0);
>> -}
>> -
>> -static void release_queue(struct kgd_dev *kgd)
>> -{
>> - unlock_srbm(kgd);
>> -}
>> -
>> -static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
>> - uint32_t sh_mem_config,
>> - uint32_t sh_mem_ape1_base,
>> - uint32_t sh_mem_ape1_limit,
>> - uint32_t sh_mem_bases)
>> -{
>> - lock_srbm(kgd, 0, 0, 0, vmid);
>> -
>> - write_register(kgd, SH_MEM_CONFIG, sh_mem_config);
>> - write_register(kgd, SH_MEM_APE1_BASE, sh_mem_ape1_base);
>> - write_register(kgd, SH_MEM_APE1_LIMIT, sh_mem_ape1_limit);
>> - write_register(kgd, SH_MEM_BASES, sh_mem_bases);
>> -
>> - unlock_srbm(kgd);
>> -}
>> -
>> -static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
>> - unsigned int vmid)
>> -{
>> - /*
>> - * We have to assume that there is no outstanding mapping.
>> - * The ATC_VMID_PASID_MAPPING_UPDATE_STATUS bit could be 0
>> - * because a mapping is in progress or because a mapping finished and
>> - * the SW cleared it.
>> - * So the protocol is to always wait & clear.
>> - */
>> - uint32_t pasid_mapping = (pasid == 0) ? 0 : (uint32_t)pasid |
>> - ATC_VMID_PASID_MAPPING_VALID_MASK;
>> -
>> - write_register(kgd, ATC_VMID0_PASID_MAPPING + vmid*sizeof(uint32_t),
>> - pasid_mapping);
>> -
>> - while (!(read_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS) &
>> - (1U << vmid)))
>> - cpu_relax();
>> - write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);
>> -
>> - /* Mapping vmid to pasid also for IH block */
>> - write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),
>> - pasid_mapping);
>> -
>> - return 0;
>> -}
>> -
>> -static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
>> - uint32_t hpd_size, uint64_t hpd_gpu_addr)
>> -{
>> - /* nothing to do here */
>> - return 0;
>> -}
>> -
>> -static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id)
>> -{
>> - uint32_t mec;
>> - uint32_t pipe;
>> -
>> - mec = (pipe_id / CIK_PIPE_PER_MEC) + 1;
>> - pipe = (pipe_id % CIK_PIPE_PER_MEC);
>> -
>> - lock_srbm(kgd, mec, pipe, 0, 0);
>> -
>> - write_register(kgd, CPC_INT_CNTL,
>> - TIME_STAMP_INT_ENABLE | OPCODE_ERROR_INT_ENABLE);
>> -
>> - unlock_srbm(kgd);
>> -
>> - return 0;
>> -}
>> -
>> -static inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m)
>> -{
>> - uint32_t retval;
>> -
>> - retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET +
>> - m->sdma_queue_id * KFD_CIK_SDMA_QUEUE_OFFSET;
>> -
>> - pr_debug("kfd: sdma base address: 0x%x\n", retval);
>> -
>> - return retval;
>> -}
>> -
>> -static inline struct cik_mqd *get_mqd(void *mqd)
>> -{
>> - return (struct cik_mqd *)mqd;
>> -}
>> -
>> -static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
>> -{
>> - return (struct cik_sdma_rlc_registers *)mqd;
>> -}
>> -
>> -static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
>> - uint32_t queue_id, uint32_t __user *wptr,
>> - uint32_t wptr_shift, uint32_t wptr_mask,
>> - struct mm_struct *mm)
>> -{
>> - uint32_t wptr_shadow, is_wptr_shadow_valid;
>> - struct cik_mqd *m;
>> -
>> - m = get_mqd(mqd);
>> -
>> - is_wptr_shadow_valid = !get_user(wptr_shadow, wptr);
>> -
>> - acquire_queue(kgd, pipe_id, queue_id);
>> - write_register(kgd, CP_MQD_BASE_ADDR, m->cp_mqd_base_addr_lo);
>> - write_register(kgd, CP_MQD_BASE_ADDR_HI, m->cp_mqd_base_addr_hi);
>> - write_register(kgd, CP_MQD_CONTROL, m->cp_mqd_control);
>> -
>> - write_register(kgd, CP_HQD_PQ_BASE, m->cp_hqd_pq_base_lo);
>> - write_register(kgd, CP_HQD_PQ_BASE_HI, m->cp_hqd_pq_base_hi);
>> - write_register(kgd, CP_HQD_PQ_CONTROL, m->cp_hqd_pq_control);
>> -
>> - write_register(kgd, CP_HQD_IB_CONTROL, m->cp_hqd_ib_control);
>> - write_register(kgd, CP_HQD_IB_BASE_ADDR, m->cp_hqd_ib_base_addr_lo);
>> - write_register(kgd, CP_HQD_IB_BASE_ADDR_HI, m->cp_hqd_ib_base_addr_hi);
>> -
>> - write_register(kgd, CP_HQD_IB_RPTR, m->cp_hqd_ib_rptr);
>> -
>> - write_register(kgd, CP_HQD_PERSISTENT_STATE,
>> - m->cp_hqd_persistent_state);
>> - write_register(kgd, CP_HQD_SEMA_CMD, m->cp_hqd_sema_cmd);
>> - write_register(kgd, CP_HQD_MSG_TYPE, m->cp_hqd_msg_type);
>> -
>> - write_register(kgd, CP_HQD_ATOMIC0_PREOP_LO,
>> - m->cp_hqd_atomic0_preop_lo);
>> -
>> - write_register(kgd, CP_HQD_ATOMIC0_PREOP_HI,
>> - m->cp_hqd_atomic0_preop_hi);
>> -
>> - write_register(kgd, CP_HQD_ATOMIC1_PREOP_LO,
>> - m->cp_hqd_atomic1_preop_lo);
>> -
>> - write_register(kgd, CP_HQD_ATOMIC1_PREOP_HI,
>> - m->cp_hqd_atomic1_preop_hi);
>> -
>> - write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR,
>> - m->cp_hqd_pq_rptr_report_addr_lo);
>> -
>> - write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR_HI,
>> - m->cp_hqd_pq_rptr_report_addr_hi);
>> -
>> - write_register(kgd, CP_HQD_PQ_RPTR, m->cp_hqd_pq_rptr);
>> -
>> - write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR,
>> - m->cp_hqd_pq_wptr_poll_addr_lo);
>> -
>> - write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR_HI,
>> - m->cp_hqd_pq_wptr_poll_addr_hi);
>> -
>> - write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL,
>> - m->cp_hqd_pq_doorbell_control);
>> -
>> - write_register(kgd, CP_HQD_VMID, m->cp_hqd_vmid);
>> -
>> - write_register(kgd, CP_HQD_QUANTUM, m->cp_hqd_quantum);
>> -
>> - write_register(kgd, CP_HQD_PIPE_PRIORITY, m->cp_hqd_pipe_priority);
>> - write_register(kgd, CP_HQD_QUEUE_PRIORITY, m->cp_hqd_queue_priority);
>> -
>> - write_register(kgd, CP_HQD_IQ_RPTR, m->cp_hqd_iq_rptr);
>> -
>> - if (is_wptr_shadow_valid)
>> - write_register(kgd, CP_HQD_PQ_WPTR, wptr_shadow);
>> -
>> - write_register(kgd, CP_HQD_ACTIVE, m->cp_hqd_active);
>> - release_queue(kgd);
>> -
>> - return 0;
>> -}
>> -
>> -static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd)
>> -{
>> - struct cik_sdma_rlc_registers *m;
>> - uint32_t sdma_base_addr;
>> -
>> - m = get_sdma_mqd(mqd);
>> - sdma_base_addr = get_sdma_base_addr(m);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_VIRTUAL_ADDR,
>> - m->sdma_rlc_virtual_addr);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_RB_BASE,
>> - m->sdma_rlc_rb_base);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_RB_BASE_HI,
>> - m->sdma_rlc_rb_base_hi);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_LO,
>> - m->sdma_rlc_rb_rptr_addr_lo);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_HI,
>> - m->sdma_rlc_rb_rptr_addr_hi);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_DOORBELL,
>> - m->sdma_rlc_doorbell);
>> -
>> - write_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_RB_CNTL,
>> - m->sdma_rlc_rb_cntl);
>> -
>> - return 0;
>> -}
>> -
>> -static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
>> - uint32_t pipe_id, uint32_t queue_id)
>> -{
>> - uint32_t act;
>> - bool retval = false;
>> - uint32_t low, high;
>> -
>> - acquire_queue(kgd, pipe_id, queue_id);
>> - act = read_register(kgd, CP_HQD_ACTIVE);
>> - if (act) {
>> - low = lower_32_bits(queue_address >> 8);
>> - high = upper_32_bits(queue_address >> 8);
>> -
>> - if (low == read_register(kgd, CP_HQD_PQ_BASE) &&
>> - high == read_register(kgd, CP_HQD_PQ_BASE_HI))
>> - retval = true;
>> - }
>> - release_queue(kgd);
>> - return retval;
>> -}
>> -
>> -static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)
>> -{
>> - struct cik_sdma_rlc_registers *m;
>> - uint32_t sdma_base_addr;
>> - uint32_t sdma_rlc_rb_cntl;
>> -
>> - m = get_sdma_mqd(mqd);
>> - sdma_base_addr = get_sdma_base_addr(m);
>> -
>> - sdma_rlc_rb_cntl = read_register(kgd,
>> - sdma_base_addr + SDMA0_RLC0_RB_CNTL);
>> -
>> - if (sdma_rlc_rb_cntl & SDMA_RB_ENABLE)
>> - return true;
>> -
>> - return false;
>> -}
>> -
>> -static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
>> - unsigned int timeout, uint32_t pipe_id,
>> - uint32_t queue_id)
>> -{
>> - uint32_t temp;
>> -
>> - acquire_queue(kgd, pipe_id, queue_id);
>> - write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL, 0);
>> -
>> - write_register(kgd, CP_HQD_DEQUEUE_REQUEST, reset_type);
>> -
>> - while (true) {
>> - temp = read_register(kgd, CP_HQD_ACTIVE);
>> - if (temp & 0x1)
>> - break;
>> - if (timeout == 0) {
>> - pr_err("kfd: cp queue preemption time out (%dms)\n",
>> - temp);
>> - release_queue(kgd);
>> - return -ETIME;
>> - }
>> - msleep(20);
>> - timeout -= 20;
>> - }
>> -
>> - release_queue(kgd);
>> - return 0;
>> -}
>> -
>> -static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
>> - unsigned int timeout)
>> -{
>> - struct cik_sdma_rlc_registers *m;
>> - uint32_t sdma_base_addr;
>> - uint32_t temp;
>> -
>> - m = get_sdma_mqd(mqd);
>> - sdma_base_addr = get_sdma_base_addr(m);
>> -
>> - temp = read_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL);
>> - temp = temp & ~SDMA_RB_ENABLE;
>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL, temp);
>> -
>> - while (true) {
>> - temp = read_register(kgd, sdma_base_addr +
>> - SDMA0_RLC0_CONTEXT_STATUS);
>> - if (temp & SDMA_RLC_IDLE)
>> - break;
>> - if (timeout == 0)
>> - return -ETIME;
>> - msleep(20);
>> - timeout -= 20;
>> - }
>> -
>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_DOORBELL, 0);
>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_RPTR, 0);
>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_WPTR, 0);
>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_BASE, 0);
>> -
>> - return 0;
>> -}
>> -
>> -static int kgd_address_watch_disable(struct kgd_dev *kgd)
>> -{
>> - union TCP_WATCH_CNTL_BITS cntl;
>> - unsigned int i;
>> -
>> - cntl.u32All = 0;
>> -
>> - cntl.bitfields.valid = 0;
>> - cntl.bitfields.mask = ADDRESS_WATCH_REG_CNTL_DEFAULT_MASK;
>> - cntl.bitfields.atc = 1;
>> -
>> - /* Turning off this address until we set all the registers */
>> - for (i = 0; i < MAX_WATCH_ADDRESSES; i++)
>> - write_register(kgd,
>> - watchRegs[i * ADDRESS_WATCH_REG_MAX +
>> - ADDRESS_WATCH_REG_CNTL],
>> - cntl.u32All);
>> -
>> - return 0;
>> -}
>> -
>> -static int kgd_address_watch_execute(struct kgd_dev *kgd,
>> - unsigned int watch_point_id,
>> - uint32_t cntl_val,
>> - uint32_t addr_hi,
>> - uint32_t addr_lo)
>> -{
>> - union TCP_WATCH_CNTL_BITS cntl;
>> -
>> - cntl.u32All = cntl_val;
>> -
>> - /* Turning off this watch point until we set all the registers */
>> - cntl.bitfields.valid = 0;
>> - write_register(kgd,
>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
>> - ADDRESS_WATCH_REG_CNTL],
>> - cntl.u32All);
>> -
>> - write_register(kgd,
>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
>> - ADDRESS_WATCH_REG_ADDR_HI],
>> - addr_hi);
>> -
>> - write_register(kgd,
>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
>> - ADDRESS_WATCH_REG_ADDR_LO],
>> - addr_lo);
>> -
>> - /* Enable the watch point */
>> - cntl.bitfields.valid = 1;
>> -
>> - write_register(kgd,
>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
>> - ADDRESS_WATCH_REG_CNTL],
>> - cntl.u32All);
>> -
>> - return 0;
>> -}
>> -
>> -static int kgd_wave_control_execute(struct kgd_dev *kgd,
>> - uint32_t gfx_index_val,
>> - uint32_t sq_cmd)
>> -{
>> - struct radeon_device *rdev = get_radeon_device(kgd);
>> - uint32_t data;
>> -
>> - mutex_lock(&rdev->grbm_idx_mutex);
>> -
>> - write_register(kgd, GRBM_GFX_INDEX, gfx_index_val);
>> - write_register(kgd, SQ_CMD, sq_cmd);
>> -
>> - /* Restore the GRBM_GFX_INDEX register */
>> -
>> - data = INSTANCE_BROADCAST_WRITES | SH_BROADCAST_WRITES |
>> - SE_BROADCAST_WRITES;
>> -
>> - write_register(kgd, GRBM_GFX_INDEX, data);
>> -
>> - mutex_unlock(&rdev->grbm_idx_mutex);
>> -
>> - return 0;
>> -}
>> -
>> -static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
>> - unsigned int watch_point_id,
>> - unsigned int reg_offset)
>> -{
>> - return watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX + reg_offset]
>> - / 4;
>> -}
>> -
>> -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid)
>> -{
>> - uint32_t reg;
>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>> -
>> - reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
>> - return reg & ATC_VMID_PASID_MAPPING_VALID_MASK;
>> -}
>> -
>> -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
>> - uint8_t vmid)
>> -{
>> - uint32_t reg;
>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>> -
>> - reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
>> - return reg & ATC_VMID_PASID_MAPPING_PASID_MASK;
>> -}
>> -
>> -static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)
>> -{
>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>> -
>> - return WREG32(VM_INVALIDATE_REQUEST, 1 << vmid);
>> -}
>> -
>> -static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
>> -{
>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>> - const union radeon_firmware_header *hdr;
>> -
>> - BUG_ON(kgd == NULL || rdev->mec_fw == NULL);
>> -
>> - switch (type) {
>> - case KGD_ENGINE_PFP:
>> - hdr = (const union radeon_firmware_header *) rdev->pfp_fw->data;
>> - break;
>> -
>> - case KGD_ENGINE_ME:
>> - hdr = (const union radeon_firmware_header *) rdev->me_fw->data;
>> - break;
>> -
>> - case KGD_ENGINE_CE:
>> - hdr = (const union radeon_firmware_header *) rdev->ce_fw->data;
>> - break;
>> -
>> - case KGD_ENGINE_MEC1:
>> - hdr = (const union radeon_firmware_header *) rdev->mec_fw->data;
>> - break;
>> -
>> - case KGD_ENGINE_MEC2:
>> - hdr = (const union radeon_firmware_header *)
>> - rdev->mec2_fw->data;
>> - break;
>> -
>> - case KGD_ENGINE_RLC:
>> - hdr = (const union radeon_firmware_header *) rdev->rlc_fw->data;
>> - break;
>> -
>> - case KGD_ENGINE_SDMA1:
>> - case KGD_ENGINE_SDMA2:
>> - hdr = (const union radeon_firmware_header *)
>> - rdev->sdma_fw->data;
>> - break;
>> -
>> - default:
>> - return 0;
>> - }
>> -
>> - if (hdr == NULL)
>> - return 0;
>> -
>> - /* Only 12 bit in use*/
>> - return hdr->common.ucode_version;
>> -}
>> diff --git a/drivers/gpu/drm/radeon/radeon_kfd.h b/drivers/gpu/drm/radeon/radeon_kfd.h
>> deleted file mode 100644
>> index 9df1fea..0000000
>> --- a/drivers/gpu/drm/radeon/radeon_kfd.h
>> +++ /dev/null
>> @@ -1,47 +0,0 @@
>> -/*
>> - * Copyright 2014 Advanced Micro Devices, Inc.
>> - *
>> - * Permission is hereby granted, free of charge, to any person obtaining a
>> - * copy of this software and associated documentation files (the "Software"),
>> - * to deal in the Software without restriction, including without limitation
>> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> - * and/or sell copies of the Software, and to permit persons to whom the
>> - * Software is furnished to do so, subject to the following conditions:
>> - *
>> - * The above copyright notice and this permission notice shall be included in
>> - * all copies or substantial portions of the Software.
>> - *
>> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> - * OTHER DEALINGS IN THE SOFTWARE.
>> - */
>> -
>> -/*
>> - * radeon_kfd.h defines the private interface between the
>> - * AMD kernel graphics drivers and the AMD KFD.
>> - */
>> -
>> -#ifndef RADEON_KFD_H_INCLUDED
>> -#define RADEON_KFD_H_INCLUDED
>> -
>> -#include <linux/types.h>
>> -#include "kgd_kfd_interface.h"
>> -
>> -struct radeon_device;
>> -
>> -int radeon_kfd_init(void);
>> -void radeon_kfd_fini(void);
>> -
>> -void radeon_kfd_suspend(struct radeon_device *rdev);
>> -int radeon_kfd_resume(struct radeon_device *rdev);
>> -void radeon_kfd_interrupt(struct radeon_device *rdev,
>> - const void *ih_ring_entry);
>> -void radeon_kfd_device_probe(struct radeon_device *rdev);
>> -void radeon_kfd_device_init(struct radeon_device *rdev);
>> -void radeon_kfd_device_fini(struct radeon_device *rdev);
>> -
>> -#endif /* RADEON_KFD_H_INCLUDED */
>> diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
>> index dfee8f7..cde037f 100644
>> --- a/drivers/gpu/drm/radeon/radeon_kms.c
>> +++ b/drivers/gpu/drm/radeon/radeon_kms.c
>> @@ -34,8 +34,6 @@
>> #include <linux/slab.h>
>> #include <linux/pm_runtime.h>
>>
>> -#include "radeon_kfd.h"
>> -
>> #if defined(CONFIG_VGA_SWITCHEROO)
>> bool radeon_has_atpx(void);
>> #else
>> @@ -68,8 +66,6 @@ void radeon_driver_unload_kms(struct drm_device *dev)
>> pm_runtime_forbid(dev->dev);
>> }
>>
>> - radeon_kfd_device_fini(rdev);
>> -
>> radeon_acpi_fini(rdev);
>>
>> radeon_modeset_fini(rdev);
>> @@ -174,9 +170,6 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
>> "Error during ACPI methods call\n");
>> }
>>
>> - radeon_kfd_device_probe(rdev);
>> - radeon_kfd_device_init(rdev);
>> -
>> if (radeon_is_px(dev)) {
>> pm_runtime_use_autosuspend(dev->dev);
>> pm_runtime_set_autosuspend_delay(dev->dev, 5000);
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <56f7a613-7815-6916-2739-a9cb935a2018-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2017-11-01 8:31 ` Oded Gabbay
[not found] ` <CAFCwf11GZkKNEnR=_+NZcDxoujAXcj4GJ=JLNzNfShJBx97vDg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Oded Gabbay @ 2017-11-01 8:31 UTC (permalink / raw)
To: Christian König; +Cc: Christian König, amd-gfx list
[-- Attachment #1.1: Type: text/plain, Size: 47060 bytes --]
ok, taken to -next.
On Tue, Oct 31, 2017 at 4:56 PM, Christian König <
ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Am 31.10.2017 um 11:44 schrieb Oded Gabbay:
>
>> Don't have any strong objection, but I just want to ask if current
>> users can just move to using amdgpu on KV and their current usermode
>> stack will work as usual.
>>
>
> Yes, I think so.
>
> btw, are there any "current users" that you are aware of ?
>>
>
> Not the slightest idea, but from Felix comments at least the current user
> mode stack + old kernel won't work.
>
> Regards,
> Christian.
>
>
>
>>
>> On Mon, Oct 30, 2017 at 3:16 PM, Christian König
>> <deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> wrote:
>>
>>> From: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
>>>
>>> To quote Felix: "For testing KV with current user mode stack, please use
>>> amdgpu. I don't expect this to work with radeon and I'm not planning to
>>> spend
>>> any effort on making radeon work with a current user mode stack."
>>>
>>> Only compile tested, but should be straight forward.
>>>
>>> Signed-off-by: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
>>> ---
>>> drivers/gpu/drm/amd/amdkfd/Kconfig | 2 +-
>>> drivers/gpu/drm/radeon/Makefile | 3 +-
>>> drivers/gpu/drm/radeon/cik.c | 14 +-
>>> drivers/gpu/drm/radeon/cikd.h | 2 -
>>> drivers/gpu/drm/radeon/radeon.h | 3 -
>>> drivers/gpu/drm/radeon/radeon_drv.c | 10 -
>>> drivers/gpu/drm/radeon/radeon_kfd.c | 901
>>> ------------------------------------
>>> drivers/gpu/drm/radeon/radeon_kfd.h | 47 --
>>> drivers/gpu/drm/radeon/radeon_kms.c | 7 -
>>> 9 files changed, 4 insertions(+), 985 deletions(-)
>>> delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.c
>>> delete mode 100644 drivers/gpu/drm/radeon/radeon_kfd.h
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdkfd/Kconfig
>>> b/drivers/gpu/drm/amd/amdkfd/Kconfig
>>> index e13c67c..bc5a294 100644
>>> --- a/drivers/gpu/drm/amd/amdkfd/Kconfig
>>> +++ b/drivers/gpu/drm/amd/amdkfd/Kconfig
>>> @@ -4,6 +4,6 @@
>>>
>>> config HSA_AMD
>>> tristate "HSA kernel driver for AMD GPU devices"
>>> - depends on (DRM_RADEON || DRM_AMDGPU) && AMD_IOMMU_V2 && X86_64
>>> + depends on DRM_AMDGPU && AMD_IOMMU_V2 && X86_64
>>> help
>>> Enable this if you want to use HSA features on AMD GPU
>>> devices.
>>> diff --git a/drivers/gpu/drm/radeon/Makefile
>>> b/drivers/gpu/drm/radeon/Makefile
>>> index be16c63..cf3e598 100644
>>> --- a/drivers/gpu/drm/radeon/Makefile
>>> +++ b/drivers/gpu/drm/radeon/Makefile
>>> @@ -102,8 +102,7 @@ radeon-y += \
>>> radeon-y += \
>>> radeon_vce.o \
>>> vce_v1_0.o \
>>> - vce_v2_0.o \
>>> - radeon_kfd.o
>>> + vce_v2_0.o
>>>
>>> radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
>>> radeon-$(CONFIG_ACPI) += radeon_acpi.o
>>> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
>>> index 3cb6c55..898f9a0 100644
>>> --- a/drivers/gpu/drm/radeon/cik.c
>>> +++ b/drivers/gpu/drm/radeon/cik.c
>>> @@ -33,7 +33,6 @@
>>> #include "cik_blit_shaders.h"
>>> #include "radeon_ucode.h"
>>> #include "clearstate_ci.h"
>>> -#include "radeon_kfd.h"
>>>
>>> #define SH_MEM_CONFIG_GFX_DEFAULT \
>>> ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED)
>>> @@ -5684,10 +5683,9 @@ int cik_vm_init(struct radeon_device *rdev)
>>> /*
>>> * number of VMs
>>> * VMID 0 is reserved for System
>>> - * radeon graphics/compute will use VMIDs 1-7
>>> - * amdkfd will use VMIDs 8-15
>>> + * radeon graphics/compute will use VMIDs 1-15
>>> */
>>> - rdev->vm_manager.nvm = RADEON_NUM_OF_VMIDS;
>>> + rdev->vm_manager.nvm = 16;
>>> /* base offset of vram pages */
>>> if (rdev->flags & RADEON_IS_IGP) {
>>> u64 tmp = RREG32(MC_VM_FB_OFFSET);
>>> @@ -7589,9 +7587,6 @@ int cik_irq_process(struct radeon_device *rdev)
>>> /* wptr/rptr are in bytes! */
>>> ring_index = rptr / 4;
>>>
>>> - radeon_kfd_interrupt(rdev,
>>> - (const void *)
>>> &rdev->ih.ring[ring_index]);
>>> -
>>> src_id = le32_to_cpu(rdev->ih.ring[ring_index]) &
>>> 0xff;
>>> src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1])
>>> & 0xfffffff;
>>> ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) &
>>> 0xff;
>>> @@ -8486,10 +8481,6 @@ static int cik_startup(struct radeon_device *rdev)
>>> if (r)
>>> return r;
>>>
>>> - r = radeon_kfd_resume(rdev);
>>> - if (r)
>>> - return r;
>>> -
>>> return 0;
>>> }
>>>
>>> @@ -8538,7 +8529,6 @@ int cik_resume(struct radeon_device *rdev)
>>> */
>>> int cik_suspend(struct radeon_device *rdev)
>>> {
>>> - radeon_kfd_suspend(rdev);
>>> radeon_pm_suspend(rdev);
>>> radeon_audio_fini(rdev);
>>> radeon_vm_manager_fini(rdev);
>>> diff --git a/drivers/gpu/drm/radeon/cikd.h
>>> b/drivers/gpu/drm/radeon/cikd.h
>>> index e210154..cda16fc 100644
>>> --- a/drivers/gpu/drm/radeon/cikd.h
>>> +++ b/drivers/gpu/drm/radeon/cikd.h
>>> @@ -30,8 +30,6 @@
>>> #define CIK_RB_BITMAP_WIDTH_PER_SH 2
>>> #define HAWAII_RB_BITMAP_WIDTH_PER_SH 4
>>>
>>> -#define RADEON_NUM_OF_VMIDS 8
>>> -
>>> /* DIDT IND registers */
>>> #define DIDT_SQ_CTRL0 0x0
>>> # define DIDT_CTRL_EN (1 << 0)
>>> diff --git a/drivers/gpu/drm/radeon/radeon.h
>>> b/drivers/gpu/drm/radeon/radeon.h
>>> index ec63bc5..d94741b 100644
>>> --- a/drivers/gpu/drm/radeon/radeon.h
>>> +++ b/drivers/gpu/drm/radeon/radeon.h
>>> @@ -2456,9 +2456,6 @@ struct radeon_device {
>>> u64 vram_pin_size;
>>> u64 gart_pin_size;
>>>
>>> - /* amdkfd interface */
>>> - struct kfd_dev *kfd;
>>> -
>>> struct mutex mn_lock;
>>> DECLARE_HASHTABLE(mn_hash, 7);
>>> };
>>> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
>>> b/drivers/gpu/drm/radeon/radeon_drv.c
>>> index f4becad..31dd04f 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_drv.c
>>> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
>>> @@ -43,7 +43,6 @@
>>> #include <drm/drm_fb_helper.h>
>>>
>>> #include <drm/drm_crtc_helper.h>
>>> -#include "radeon_kfd.h"
>>>
>>> /*
>>> * KMS wrapper.
>>> @@ -338,14 +337,6 @@ static int radeon_pci_probe(struct pci_dev *pdev,
>>> {
>>> int ret;
>>>
>>> - /*
>>> - * Initialize amdkfd before starting radeon. If it was not
>>> loaded yet,
>>> - * defer radeon probing
>>> - */
>>> - ret = radeon_kfd_init();
>>> - if (ret == -EPROBE_DEFER)
>>> - return ret;
>>> -
>>> if (vga_switcheroo_client_probe_defer(pdev))
>>> return -EPROBE_DEFER;
>>>
>>> @@ -645,7 +636,6 @@ static int __init radeon_init(void)
>>>
>>> static void __exit radeon_exit(void)
>>> {
>>> - radeon_kfd_fini();
>>> pci_unregister_driver(pdriver);
>>> radeon_unregister_atpx_handler();
>>> }
>>> diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c
>>> b/drivers/gpu/drm/radeon/radeon_kfd.c
>>> deleted file mode 100644
>>> index 385b4d7..0000000
>>> --- a/drivers/gpu/drm/radeon/radeon_kfd.c
>>> +++ /dev/null
>>> @@ -1,901 +0,0 @@
>>> -/*
>>> - * Copyright 2014 Advanced Micro Devices, Inc.
>>> - *
>>> - * Permission is hereby granted, free of charge, to any person
>>> obtaining a
>>> - * copy of this software and associated documentation files (the
>>> "Software"),
>>> - * to deal in the Software without restriction, including without
>>> limitation
>>> - * the rights to use, copy, modify, merge, publish, distribute,
>>> sublicense,
>>> - * and/or sell copies of the Software, and to permit persons to whom the
>>> - * Software is furnished to do so, subject to the following conditions:
>>> - *
>>> - * The above copyright notice and this permission notice shall be
>>> included in
>>> - * all copies or substantial portions of the Software.
>>> - *
>>> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>> EXPRESS OR
>>> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>>> MERCHANTABILITY,
>>> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
>>> SHALL
>>> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>>> DAMAGES OR
>>> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>>> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>> - * OTHER DEALINGS IN THE SOFTWARE.
>>> - */
>>> -
>>> -#include <linux/module.h>
>>> -#include <linux/fdtable.h>
>>> -#include <linux/uaccess.h>
>>> -#include <drm/drmP.h>
>>> -#include "radeon.h"
>>> -#include "cikd.h"
>>> -#include "cik_reg.h"
>>> -#include "radeon_kfd.h"
>>> -#include "radeon_ucode.h"
>>> -#include <linux/firmware.h>
>>> -#include "cik_structs.h"
>>> -
>>> -#define CIK_PIPE_PER_MEC (4)
>>> -
>>> -static const uint32_t watchRegs[MAX_WATCH_ADDRESSES *
>>> ADDRESS_WATCH_REG_MAX] = {
>>> - TCP_WATCH0_ADDR_H, TCP_WATCH0_ADDR_L, TCP_WATCH0_CNTL,
>>> - TCP_WATCH1_ADDR_H, TCP_WATCH1_ADDR_L, TCP_WATCH1_CNTL,
>>> - TCP_WATCH2_ADDR_H, TCP_WATCH2_ADDR_L, TCP_WATCH2_CNTL,
>>> - TCP_WATCH3_ADDR_H, TCP_WATCH3_ADDR_L, TCP_WATCH3_CNTL
>>> -};
>>> -
>>> -struct kgd_mem {
>>> - struct radeon_bo *bo;
>>> - uint64_t gpu_addr;
>>> - void *cpu_ptr;
>>> -};
>>> -
>>> -
>>> -static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>>> - void **mem_obj, uint64_t *gpu_addr,
>>> - void **cpu_ptr);
>>> -
>>> -static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
>>> -
>>> -static uint64_t get_vmem_size(struct kgd_dev *kgd);
>>> -static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
>>> -
>>> -static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
>>> -
>>> -static int alloc_pasid(unsigned int bits);
>>> -static void free_pasid(unsigned int pasid);
>>> -
>>> -static uint16_t get_fw_version(struct kgd_dev *kgd, enum
>>> kgd_engine_type type);
>>> -
>>> -/*
>>> - * Register access functions
>>> - */
>>> -
>>> -static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t
>>> vmid,
>>> - uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
>>> - uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
>>> -
>>> -static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned
>>> int pasid,
>>> - unsigned int vmid);
>>> -
>>> -static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
>>> - uint32_t hpd_size, uint64_t
>>> hpd_gpu_addr);
>>> -static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id);
>>> -static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t
>>> pipe_id,
>>> - uint32_t queue_id, uint32_t __user *wptr,
>>> - uint32_t wptr_shift, uint32_t wptr_mask,
>>> - struct mm_struct *mm);
>>> -static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
>>> -static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t
>>> queue_address,
>>> - uint32_t pipe_id, uint32_t queue_id);
>>> -
>>> -static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t
>>> reset_type,
>>> - unsigned int timeout, uint32_t pipe_id,
>>> - uint32_t queue_id);
>>> -static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
>>> -static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
>>> - unsigned int timeout);
>>> -static int kgd_address_watch_disable(struct kgd_dev *kgd);
>>> -static int kgd_address_watch_execute(struct kgd_dev *kgd,
>>> - unsigned int watch_point_id,
>>> - uint32_t cntl_val,
>>> - uint32_t addr_hi,
>>> - uint32_t addr_lo);
>>> -static int kgd_wave_control_execute(struct kgd_dev *kgd,
>>> - uint32_t gfx_index_val,
>>> - uint32_t sq_cmd);
>>> -static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
>>> - unsigned int watch_point_id,
>>> - unsigned int reg_offset);
>>> -
>>> -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd,
>>> uint8_t vmid);
>>> -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
>>> - uint8_t vmid);
>>> -static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t
>>> vmid);
>>> -
>>> -static const struct kfd2kgd_calls kfd2kgd = {
>>> - .init_gtt_mem_allocation = alloc_gtt_mem,
>>> - .free_gtt_mem = free_gtt_mem,
>>> - .get_vmem_size = get_vmem_size,
>>> - .get_gpu_clock_counter = get_gpu_clock_counter,
>>> - .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
>>> - .alloc_pasid = alloc_pasid,
>>> - .free_pasid = free_pasid,
>>> - .program_sh_mem_settings = kgd_program_sh_mem_settings,
>>> - .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
>>> - .init_pipeline = kgd_init_pipeline,
>>> - .init_interrupts = kgd_init_interrupts,
>>> - .hqd_load = kgd_hqd_load,
>>> - .hqd_sdma_load = kgd_hqd_sdma_load,
>>> - .hqd_is_occupied = kgd_hqd_is_occupied,
>>> - .hqd_sdma_is_occupied = kgd_hqd_sdma_is_occupied,
>>> - .hqd_destroy = kgd_hqd_destroy,
>>> - .hqd_sdma_destroy = kgd_hqd_sdma_destroy,
>>> - .address_watch_disable = kgd_address_watch_disable,
>>> - .address_watch_execute = kgd_address_watch_execute,
>>> - .wave_control_execute = kgd_wave_control_execute,
>>> - .address_watch_get_offset = kgd_address_watch_get_offset,
>>> - .get_atc_vmid_pasid_mapping_pasid =
>>> get_atc_vmid_pasid_mapping_pasid,
>>> - .get_atc_vmid_pasid_mapping_valid =
>>> get_atc_vmid_pasid_mapping_valid,
>>> - .write_vmid_invalidate_request = write_vmid_invalidate_request,
>>> - .get_fw_version = get_fw_version
>>> -};
>>> -
>>> -static const struct kgd2kfd_calls *kgd2kfd;
>>> -
>>> -int radeon_kfd_init(void)
>>> -{
>>> - int ret;
>>> -
>>> -#if defined(CONFIG_HSA_AMD_MODULE)
>>> - int (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
>>> -
>>> - kgd2kfd_init_p = symbol_request(kgd2kfd_init);
>>> -
>>> - if (kgd2kfd_init_p == NULL)
>>> - return -ENOENT;
>>> -
>>> - ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
>>> - if (ret) {
>>> - symbol_put(kgd2kfd_init);
>>> - kgd2kfd = NULL;
>>> - }
>>> -
>>> -#elif defined(CONFIG_HSA_AMD)
>>> - ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
>>> - if (ret)
>>> - kgd2kfd = NULL;
>>> -
>>> -#else
>>> - ret = -ENOENT;
>>> -#endif
>>> -
>>> - return ret;
>>> -}
>>> -
>>> -void radeon_kfd_fini(void)
>>> -{
>>> - if (kgd2kfd) {
>>> - kgd2kfd->exit();
>>> - symbol_put(kgd2kfd_init);
>>> - }
>>> -}
>>> -
>>> -void radeon_kfd_device_probe(struct radeon_device *rdev)
>>> -{
>>> - if (kgd2kfd)
>>> - rdev->kfd = kgd2kfd->probe((struct kgd_dev *)rdev,
>>> - rdev->pdev, &kfd2kgd);
>>> -}
>>> -
>>> -void radeon_kfd_device_init(struct radeon_device *rdev)
>>> -{
>>> - int i, queue, pipe, mec;
>>> -
>>> - if (rdev->kfd) {
>>> - struct kgd2kfd_shared_resources gpu_resources = {
>>> - .compute_vmid_bitmap = 0xFF00,
>>> - .num_pipe_per_mec = 4,
>>> - .num_queue_per_pipe = 8
>>> - };
>>> -
>>> - bitmap_zero(gpu_resources.queue_bitmap, KGD_MAX_QUEUES);
>>> -
>>> - for (i = 0; i < KGD_MAX_QUEUES; ++i) {
>>> - queue = i % gpu_resources.num_queue_per_pipe;
>>> - pipe = (i / gpu_resources.num_queue_per_pipe)
>>> - % gpu_resources.num_pipe_per_mec;
>>> - mec = (i / gpu_resources.num_queue_per_pipe)
>>> - / gpu_resources.num_pipe_per_mec;
>>> -
>>> - if (mec == 0 && pipe > 0)
>>> - set_bit(i, gpu_resources.queue_bitmap);
>>> - }
>>> -
>>> - radeon_doorbell_get_kfd_info(rdev,
>>> - &gpu_resources.doorbell_physi
>>> cal_address,
>>> - &gpu_resources.doorbell_aperture_size,
>>> - &gpu_resources.doorbell_start_offset);
>>> -
>>> - kgd2kfd->device_init(rdev->kfd, &gpu_resources);
>>> - }
>>> -}
>>> -
>>> -void radeon_kfd_device_fini(struct radeon_device *rdev)
>>> -{
>>> - if (rdev->kfd) {
>>> - kgd2kfd->device_exit(rdev->kfd);
>>> - rdev->kfd = NULL;
>>> - }
>>> -}
>>> -
>>> -void radeon_kfd_interrupt(struct radeon_device *rdev, const void
>>> *ih_ring_entry)
>>> -{
>>> - if (rdev->kfd)
>>> - kgd2kfd->interrupt(rdev->kfd, ih_ring_entry);
>>> -}
>>> -
>>> -void radeon_kfd_suspend(struct radeon_device *rdev)
>>> -{
>>> - if (rdev->kfd)
>>> - kgd2kfd->suspend(rdev->kfd);
>>> -}
>>> -
>>> -int radeon_kfd_resume(struct radeon_device *rdev)
>>> -{
>>> - int r = 0;
>>> -
>>> - if (rdev->kfd)
>>> - r = kgd2kfd->resume(rdev->kfd);
>>> -
>>> - return r;
>>> -}
>>> -
>>> -static int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>>> - void **mem_obj, uint64_t *gpu_addr,
>>> - void **cpu_ptr)
>>> -{
>>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>>> - struct kgd_mem **mem = (struct kgd_mem **) mem_obj;
>>> - int r;
>>> -
>>> - BUG_ON(kgd == NULL);
>>> - BUG_ON(gpu_addr == NULL);
>>> - BUG_ON(cpu_ptr == NULL);
>>> -
>>> - *mem = kmalloc(sizeof(struct kgd_mem), GFP_KERNEL);
>>> - if ((*mem) == NULL)
>>> - return -ENOMEM;
>>> -
>>> - r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
>>> RADEON_GEM_DOMAIN_GTT,
>>> - RADEON_GEM_GTT_WC, NULL, NULL,
>>> &(*mem)->bo);
>>> - if (r) {
>>> - dev_err(rdev->dev,
>>> - "failed to allocate BO for amdkfd (%d)\n", r);
>>> - return r;
>>> - }
>>> -
>>> - /* map the buffer */
>>> - r = radeon_bo_reserve((*mem)->bo, true);
>>> - if (r) {
>>> - dev_err(rdev->dev, "(%d) failed to reserve bo for
>>> amdkfd\n", r);
>>> - goto allocate_mem_reserve_bo_failed;
>>> - }
>>> -
>>> - r = radeon_bo_pin((*mem)->bo, RADEON_GEM_DOMAIN_GTT,
>>> - &(*mem)->gpu_addr);
>>> - if (r) {
>>> - dev_err(rdev->dev, "(%d) failed to pin bo for amdkfd\n",
>>> r);
>>> - goto allocate_mem_pin_bo_failed;
>>> - }
>>> - *gpu_addr = (*mem)->gpu_addr;
>>> -
>>> - r = radeon_bo_kmap((*mem)->bo, &(*mem)->cpu_ptr);
>>> - if (r) {
>>> - dev_err(rdev->dev,
>>> - "(%d) failed to map bo to kernel for amdkfd\n",
>>> r);
>>> - goto allocate_mem_kmap_bo_failed;
>>> - }
>>> - *cpu_ptr = (*mem)->cpu_ptr;
>>> -
>>> - radeon_bo_unreserve((*mem)->bo);
>>> -
>>> - return 0;
>>> -
>>> -allocate_mem_kmap_bo_failed:
>>> - radeon_bo_unpin((*mem)->bo);
>>> -allocate_mem_pin_bo_failed:
>>> - radeon_bo_unreserve((*mem)->bo);
>>> -allocate_mem_reserve_bo_failed:
>>> - radeon_bo_unref(&(*mem)->bo);
>>> -
>>> - return r;
>>> -}
>>> -
>>> -static void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
>>> -{
>>> - struct kgd_mem *mem = (struct kgd_mem *) mem_obj;
>>> -
>>> - BUG_ON(mem == NULL);
>>> -
>>> - radeon_bo_reserve(mem->bo, true);
>>> - radeon_bo_kunmap(mem->bo);
>>> - radeon_bo_unpin(mem->bo);
>>> - radeon_bo_unreserve(mem->bo);
>>> - radeon_bo_unref(&(mem->bo));
>>> - kfree(mem);
>>> -}
>>> -
>>> -static uint64_t get_vmem_size(struct kgd_dev *kgd)
>>> -{
>>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>>> -
>>> - BUG_ON(kgd == NULL);
>>> -
>>> - return rdev->mc.real_vram_size;
>>> -}
>>> -
>>> -static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
>>> -{
>>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>>> -
>>> - return rdev->asic->get_gpu_clock_counter(rdev);
>>> -}
>>> -
>>> -static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
>>> -{
>>> - struct radeon_device *rdev = (struct radeon_device *)kgd;
>>> -
>>> - /* The sclk is in quantas of 10kHz */
>>> - return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk /
>>> 100;
>>> -}
>>> -
>>> -/*
>>> - * PASID manager
>>> - */
>>> -static DEFINE_IDA(pasid_ida);
>>> -
>>> -static int alloc_pasid(unsigned int bits)
>>> -{
>>> - int pasid = -EINVAL;
>>> -
>>> - for (bits = min(bits, 31U); bits > 0; bits--) {
>>> - pasid = ida_simple_get(&pasid_ida,
>>> - 1U << (bits - 1), 1U << bits,
>>> - GFP_KERNEL);
>>> - if (pasid != -ENOSPC)
>>> - break;
>>> - }
>>> -
>>> - return pasid;
>>> -}
>>> -
>>> -static void free_pasid(unsigned int pasid)
>>> -{
>>> - ida_simple_remove(&pasid_ida, pasid);
>>> -}
>>> -
>>> -static inline struct radeon_device *get_radeon_device(struct kgd_dev
>>> *kgd)
>>> -{
>>> - return (struct radeon_device *)kgd;
>>> -}
>>> -
>>> -static void write_register(struct kgd_dev *kgd, uint32_t offset,
>>> uint32_t value)
>>> -{
>>> - struct radeon_device *rdev = get_radeon_device(kgd);
>>> -
>>> - writel(value, (void __iomem *)(rdev->rmmio + offset));
>>> -}
>>> -
>>> -static uint32_t read_register(struct kgd_dev *kgd, uint32_t offset)
>>> -{
>>> - struct radeon_device *rdev = get_radeon_device(kgd);
>>> -
>>> - return readl((void __iomem *)(rdev->rmmio + offset));
>>> -}
>>> -
>>> -static void lock_srbm(struct kgd_dev *kgd, uint32_t mec, uint32_t pipe,
>>> - uint32_t queue, uint32_t vmid)
>>> -{
>>> - struct radeon_device *rdev = get_radeon_device(kgd);
>>> - uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) |
>>> QUEUEID(queue);
>>> -
>>> - mutex_lock(&rdev->srbm_mutex);
>>> - write_register(kgd, SRBM_GFX_CNTL, value);
>>> -}
>>> -
>>> -static void unlock_srbm(struct kgd_dev *kgd)
>>> -{
>>> - struct radeon_device *rdev = get_radeon_device(kgd);
>>> -
>>> - write_register(kgd, SRBM_GFX_CNTL, 0);
>>> - mutex_unlock(&rdev->srbm_mutex);
>>> -}
>>> -
>>> -static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id,
>>> - uint32_t queue_id)
>>> -{
>>> - uint32_t mec = (++pipe_id / CIK_PIPE_PER_MEC) + 1;
>>> - uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);
>>> -
>>> - lock_srbm(kgd, mec, pipe, queue_id, 0);
>>> -}
>>> -
>>> -static void release_queue(struct kgd_dev *kgd)
>>> -{
>>> - unlock_srbm(kgd);
>>> -}
>>> -
>>> -static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t
>>> vmid,
>>> - uint32_t sh_mem_config,
>>> - uint32_t sh_mem_ape1_base,
>>> - uint32_t sh_mem_ape1_limit,
>>> - uint32_t sh_mem_bases)
>>> -{
>>> - lock_srbm(kgd, 0, 0, 0, vmid);
>>> -
>>> - write_register(kgd, SH_MEM_CONFIG, sh_mem_config);
>>> - write_register(kgd, SH_MEM_APE1_BASE, sh_mem_ape1_base);
>>> - write_register(kgd, SH_MEM_APE1_LIMIT, sh_mem_ape1_limit);
>>> - write_register(kgd, SH_MEM_BASES, sh_mem_bases);
>>> -
>>> - unlock_srbm(kgd);
>>> -}
>>> -
>>> -static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned
>>> int pasid,
>>> - unsigned int vmid)
>>> -{
>>> - /*
>>> - * We have to assume that there is no outstanding mapping.
>>> - * The ATC_VMID_PASID_MAPPING_UPDATE_STATUS bit could be 0
>>> - * because a mapping is in progress or because a mapping
>>> finished and
>>> - * the SW cleared it.
>>> - * So the protocol is to always wait & clear.
>>> - */
>>> - uint32_t pasid_mapping = (pasid == 0) ? 0 : (uint32_t)pasid |
>>> - ATC_VMID_PASID_MAPPING_VALID_
>>> MASK;
>>> -
>>> - write_register(kgd, ATC_VMID0_PASID_MAPPING +
>>> vmid*sizeof(uint32_t),
>>> - pasid_mapping);
>>> -
>>> - while (!(read_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS)
>>> &
>>> - (1U <<
>>> vmid)))
>>> - cpu_relax();
>>> - write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U <<
>>> vmid);
>>> -
>>> - /* Mapping vmid to pasid also for IH block */
>>> - write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),
>>> - pasid_mapping);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
>>> - uint32_t hpd_size, uint64_t hpd_gpu_addr)
>>> -{
>>> - /* nothing to do here */
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id)
>>> -{
>>> - uint32_t mec;
>>> - uint32_t pipe;
>>> -
>>> - mec = (pipe_id / CIK_PIPE_PER_MEC) + 1;
>>> - pipe = (pipe_id % CIK_PIPE_PER_MEC);
>>> -
>>> - lock_srbm(kgd, mec, pipe, 0, 0);
>>> -
>>> - write_register(kgd, CPC_INT_CNTL,
>>> - TIME_STAMP_INT_ENABLE | OPCODE_ERROR_INT_ENABLE);
>>> -
>>> - unlock_srbm(kgd);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers
>>> *m)
>>> -{
>>> - uint32_t retval;
>>> -
>>> - retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET +
>>> - m->sdma_queue_id * KFD_CIK_SDMA_QUEUE_OFFSET;
>>> -
>>> - pr_debug("kfd: sdma base address: 0x%x\n", retval);
>>> -
>>> - return retval;
>>> -}
>>> -
>>> -static inline struct cik_mqd *get_mqd(void *mqd)
>>> -{
>>> - return (struct cik_mqd *)mqd;
>>> -}
>>> -
>>> -static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
>>> -{
>>> - return (struct cik_sdma_rlc_registers *)mqd;
>>> -}
>>> -
>>> -static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t
>>> pipe_id,
>>> - uint32_t queue_id, uint32_t __user *wptr,
>>> - uint32_t wptr_shift, uint32_t wptr_mask,
>>> - struct mm_struct *mm)
>>> -{
>>> - uint32_t wptr_shadow, is_wptr_shadow_valid;
>>> - struct cik_mqd *m;
>>> -
>>> - m = get_mqd(mqd);
>>> -
>>> - is_wptr_shadow_valid = !get_user(wptr_shadow, wptr);
>>> -
>>> - acquire_queue(kgd, pipe_id, queue_id);
>>> - write_register(kgd, CP_MQD_BASE_ADDR, m->cp_mqd_base_addr_lo);
>>> - write_register(kgd, CP_MQD_BASE_ADDR_HI, m->cp_mqd_base_addr_hi);
>>> - write_register(kgd, CP_MQD_CONTROL, m->cp_mqd_control);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_BASE, m->cp_hqd_pq_base_lo);
>>> - write_register(kgd, CP_HQD_PQ_BASE_HI, m->cp_hqd_pq_base_hi);
>>> - write_register(kgd, CP_HQD_PQ_CONTROL, m->cp_hqd_pq_control);
>>> -
>>> - write_register(kgd, CP_HQD_IB_CONTROL, m->cp_hqd_ib_control);
>>> - write_register(kgd, CP_HQD_IB_BASE_ADDR,
>>> m->cp_hqd_ib_base_addr_lo);
>>> - write_register(kgd, CP_HQD_IB_BASE_ADDR_HI,
>>> m->cp_hqd_ib_base_addr_hi);
>>> -
>>> - write_register(kgd, CP_HQD_IB_RPTR, m->cp_hqd_ib_rptr);
>>> -
>>> - write_register(kgd, CP_HQD_PERSISTENT_STATE,
>>> - m->cp_hqd_persistent_state);
>>> - write_register(kgd, CP_HQD_SEMA_CMD, m->cp_hqd_sema_cmd);
>>> - write_register(kgd, CP_HQD_MSG_TYPE, m->cp_hqd_msg_type);
>>> -
>>> - write_register(kgd, CP_HQD_ATOMIC0_PREOP_LO,
>>> - m->cp_hqd_atomic0_preop_lo);
>>> -
>>> - write_register(kgd, CP_HQD_ATOMIC0_PREOP_HI,
>>> - m->cp_hqd_atomic0_preop_hi);
>>> -
>>> - write_register(kgd, CP_HQD_ATOMIC1_PREOP_LO,
>>> - m->cp_hqd_atomic1_preop_lo);
>>> -
>>> - write_register(kgd, CP_HQD_ATOMIC1_PREOP_HI,
>>> - m->cp_hqd_atomic1_preop_hi);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR,
>>> - m->cp_hqd_pq_rptr_report_addr_lo);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_RPTR_REPORT_ADDR_HI,
>>> - m->cp_hqd_pq_rptr_report_addr_hi);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_RPTR, m->cp_hqd_pq_rptr);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR,
>>> - m->cp_hqd_pq_wptr_poll_addr_lo);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_WPTR_POLL_ADDR_HI,
>>> - m->cp_hqd_pq_wptr_poll_addr_hi);
>>> -
>>> - write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL,
>>> - m->cp_hqd_pq_doorbell_control);
>>> -
>>> - write_register(kgd, CP_HQD_VMID, m->cp_hqd_vmid);
>>> -
>>> - write_register(kgd, CP_HQD_QUANTUM, m->cp_hqd_quantum);
>>> -
>>> - write_register(kgd, CP_HQD_PIPE_PRIORITY,
>>> m->cp_hqd_pipe_priority);
>>> - write_register(kgd, CP_HQD_QUEUE_PRIORITY,
>>> m->cp_hqd_queue_priority);
>>> -
>>> - write_register(kgd, CP_HQD_IQ_RPTR, m->cp_hqd_iq_rptr);
>>> -
>>> - if (is_wptr_shadow_valid)
>>> - write_register(kgd, CP_HQD_PQ_WPTR, wptr_shadow);
>>> -
>>> - write_register(kgd, CP_HQD_ACTIVE, m->cp_hqd_active);
>>> - release_queue(kgd);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd)
>>> -{
>>> - struct cik_sdma_rlc_registers *m;
>>> - uint32_t sdma_base_addr;
>>> -
>>> - m = get_sdma_mqd(mqd);
>>> - sdma_base_addr = get_sdma_base_addr(m);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_VIRTUAL_ADDR,
>>> - m->sdma_rlc_virtual_addr);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_RB_BASE,
>>> - m->sdma_rlc_rb_base);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_RB_BASE_HI,
>>> - m->sdma_rlc_rb_base_hi);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_LO,
>>> - m->sdma_rlc_rb_rptr_addr_lo);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_RB_RPTR_ADDR_HI,
>>> - m->sdma_rlc_rb_rptr_addr_hi);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_DOORBELL,
>>> - m->sdma_rlc_doorbell);
>>> -
>>> - write_register(kgd,
>>> - sdma_base_addr + SDMA0_RLC0_RB_CNTL,
>>> - m->sdma_rlc_rb_cntl);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t
>>> queue_address,
>>> - uint32_t pipe_id, uint32_t queue_id)
>>> -{
>>> - uint32_t act;
>>> - bool retval = false;
>>> - uint32_t low, high;
>>> -
>>> - acquire_queue(kgd, pipe_id, queue_id);
>>> - act = read_register(kgd, CP_HQD_ACTIVE);
>>> - if (act) {
>>> - low = lower_32_bits(queue_address >> 8);
>>> - high = upper_32_bits(queue_address >> 8);
>>> -
>>> - if (low == read_register(kgd, CP_HQD_PQ_BASE) &&
>>> - high == read_register(kgd,
>>> CP_HQD_PQ_BASE_HI))
>>> - retval = true;
>>> - }
>>> - release_queue(kgd);
>>> - return retval;
>>> -}
>>> -
>>> -static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)
>>> -{
>>> - struct cik_sdma_rlc_registers *m;
>>> - uint32_t sdma_base_addr;
>>> - uint32_t sdma_rlc_rb_cntl;
>>> -
>>> - m = get_sdma_mqd(mqd);
>>> - sdma_base_addr = get_sdma_base_addr(m);
>>> -
>>> - sdma_rlc_rb_cntl = read_register(kgd,
>>> - sdma_base_addr +
>>> SDMA0_RLC0_RB_CNTL);
>>> -
>>> - if (sdma_rlc_rb_cntl & SDMA_RB_ENABLE)
>>> - return true;
>>> -
>>> - return false;
>>> -}
>>> -
>>> -static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, uint32_t
>>> reset_type,
>>> - unsigned int timeout, uint32_t pipe_id,
>>> - uint32_t queue_id)
>>> -{
>>> - uint32_t temp;
>>> -
>>> - acquire_queue(kgd, pipe_id, queue_id);
>>> - write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL, 0);
>>> -
>>> - write_register(kgd, CP_HQD_DEQUEUE_REQUEST, reset_type);
>>> -
>>> - while (true) {
>>> - temp = read_register(kgd, CP_HQD_ACTIVE);
>>> - if (temp & 0x1)
>>> - break;
>>> - if (timeout == 0) {
>>> - pr_err("kfd: cp queue preemption time out
>>> (%dms)\n",
>>> - temp);
>>> - release_queue(kgd);
>>> - return -ETIME;
>>> - }
>>> - msleep(20);
>>> - timeout -= 20;
>>> - }
>>> -
>>> - release_queue(kgd);
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
>>> - unsigned int timeout)
>>> -{
>>> - struct cik_sdma_rlc_registers *m;
>>> - uint32_t sdma_base_addr;
>>> - uint32_t temp;
>>> -
>>> - m = get_sdma_mqd(mqd);
>>> - sdma_base_addr = get_sdma_base_addr(m);
>>> -
>>> - temp = read_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL);
>>> - temp = temp & ~SDMA_RB_ENABLE;
>>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_CNTL, temp);
>>> -
>>> - while (true) {
>>> - temp = read_register(kgd, sdma_base_addr +
>>> -
>>> SDMA0_RLC0_CONTEXT_STATUS);
>>> - if (temp & SDMA_RLC_IDLE)
>>> - break;
>>> - if (timeout == 0)
>>> - return -ETIME;
>>> - msleep(20);
>>> - timeout -= 20;
>>> - }
>>> -
>>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_DOORBELL, 0);
>>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_RPTR, 0);
>>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_WPTR, 0);
>>> - write_register(kgd, sdma_base_addr + SDMA0_RLC0_RB_BASE, 0);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_address_watch_disable(struct kgd_dev *kgd)
>>> -{
>>> - union TCP_WATCH_CNTL_BITS cntl;
>>> - unsigned int i;
>>> -
>>> - cntl.u32All = 0;
>>> -
>>> - cntl.bitfields.valid = 0;
>>> - cntl.bitfields.mask = ADDRESS_WATCH_REG_CNTL_DEFAULT_MASK;
>>> - cntl.bitfields.atc = 1;
>>> -
>>> - /* Turning off this address until we set all the registers */
>>> - for (i = 0; i < MAX_WATCH_ADDRESSES; i++)
>>> - write_register(kgd,
>>> - watchRegs[i * ADDRESS_WATCH_REG_MAX +
>>> - ADDRESS_WATCH_REG_CNTL],
>>> - cntl.u32All);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_address_watch_execute(struct kgd_dev *kgd,
>>> - unsigned int watch_point_id,
>>> - uint32_t cntl_val,
>>> - uint32_t addr_hi,
>>> - uint32_t addr_lo)
>>> -{
>>> - union TCP_WATCH_CNTL_BITS cntl;
>>> -
>>> - cntl.u32All = cntl_val;
>>> -
>>> - /* Turning off this watch point until we set all the registers */
>>> - cntl.bitfields.valid = 0;
>>> - write_register(kgd,
>>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX
>>> +
>>> - ADDRESS_WATCH_REG_CNTL],
>>> - cntl.u32All);
>>> -
>>> - write_register(kgd,
>>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX
>>> +
>>> - ADDRESS_WATCH_REG_ADDR_HI],
>>> - addr_hi);
>>> -
>>> - write_register(kgd,
>>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX
>>> +
>>> - ADDRESS_WATCH_REG_ADDR_LO],
>>> - addr_lo);
>>> -
>>> - /* Enable the watch point */
>>> - cntl.bitfields.valid = 1;
>>> -
>>> - write_register(kgd,
>>> - watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX
>>> +
>>> - ADDRESS_WATCH_REG_CNTL],
>>> - cntl.u32All);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static int kgd_wave_control_execute(struct kgd_dev *kgd,
>>> - uint32_t gfx_index_val,
>>> - uint32_t sq_cmd)
>>> -{
>>> - struct radeon_device *rdev = get_radeon_device(kgd);
>>> - uint32_t data;
>>> -
>>> - mutex_lock(&rdev->grbm_idx_mutex);
>>> -
>>> - write_register(kgd, GRBM_GFX_INDEX, gfx_index_val);
>>> - write_register(kgd, SQ_CMD, sq_cmd);
>>> -
>>> - /* Restore the GRBM_GFX_INDEX register */
>>> -
>>> - data = INSTANCE_BROADCAST_WRITES | SH_BROADCAST_WRITES |
>>> - SE_BROADCAST_WRITES;
>>> -
>>> - write_register(kgd, GRBM_GFX_INDEX, data);
>>> -
>>> - mutex_unlock(&rdev->grbm_idx_mutex);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static uint32_t kgd_address_watch_get_offset(struct kgd_dev *kgd,
>>> - unsigned int watch_point_id,
>>> - unsigned int reg_offset)
>>> -{
>>> - return watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX +
>>> reg_offset]
>>> - / 4;
>>> -}
>>> -
>>> -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd,
>>> uint8_t vmid)
>>> -{
>>> - uint32_t reg;
>>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>>> -
>>> - reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
>>> - return reg & ATC_VMID_PASID_MAPPING_VALID_MASK;
>>> -}
>>> -
>>> -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
>>> - uint8_t vmid)
>>> -{
>>> - uint32_t reg;
>>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>>> -
>>> - reg = RREG32(ATC_VMID0_PASID_MAPPING + vmid*4);
>>> - return reg & ATC_VMID_PASID_MAPPING_PASID_MASK;
>>> -}
>>> -
>>> -static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t
>>> vmid)
>>> -{
>>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>>> -
>>> - return WREG32(VM_INVALIDATE_REQUEST, 1 << vmid);
>>> -}
>>> -
>>> -static uint16_t get_fw_version(struct kgd_dev *kgd, enum
>>> kgd_engine_type type)
>>> -{
>>> - struct radeon_device *rdev = (struct radeon_device *) kgd;
>>> - const union radeon_firmware_header *hdr;
>>> -
>>> - BUG_ON(kgd == NULL || rdev->mec_fw == NULL);
>>> -
>>> - switch (type) {
>>> - case KGD_ENGINE_PFP:
>>> - hdr = (const union radeon_firmware_header *)
>>> rdev->pfp_fw->data;
>>> - break;
>>> -
>>> - case KGD_ENGINE_ME:
>>> - hdr = (const union radeon_firmware_header *)
>>> rdev->me_fw->data;
>>> - break;
>>> -
>>> - case KGD_ENGINE_CE:
>>> - hdr = (const union radeon_firmware_header *)
>>> rdev->ce_fw->data;
>>> - break;
>>> -
>>> - case KGD_ENGINE_MEC1:
>>> - hdr = (const union radeon_firmware_header *)
>>> rdev->mec_fw->data;
>>> - break;
>>> -
>>> - case KGD_ENGINE_MEC2:
>>> - hdr = (const union radeon_firmware_header *)
>>> -
>>> rdev->mec2_fw->data;
>>> - break;
>>> -
>>> - case KGD_ENGINE_RLC:
>>> - hdr = (const union radeon_firmware_header *)
>>> rdev->rlc_fw->data;
>>> - break;
>>> -
>>> - case KGD_ENGINE_SDMA1:
>>> - case KGD_ENGINE_SDMA2:
>>> - hdr = (const union radeon_firmware_header *)
>>> -
>>> rdev->sdma_fw->data;
>>> - break;
>>> -
>>> - default:
>>> - return 0;
>>> - }
>>> -
>>> - if (hdr == NULL)
>>> - return 0;
>>> -
>>> - /* Only 12 bit in use*/
>>> - return hdr->common.ucode_version;
>>> -}
>>> diff --git a/drivers/gpu/drm/radeon/radeon_kfd.h
>>> b/drivers/gpu/drm/radeon/radeon_kfd.h
>>> deleted file mode 100644
>>> index 9df1fea..0000000
>>> --- a/drivers/gpu/drm/radeon/radeon_kfd.h
>>> +++ /dev/null
>>> @@ -1,47 +0,0 @@
>>> -/*
>>> - * Copyright 2014 Advanced Micro Devices, Inc.
>>> - *
>>> - * Permission is hereby granted, free of charge, to any person
>>> obtaining a
>>> - * copy of this software and associated documentation files (the
>>> "Software"),
>>> - * to deal in the Software without restriction, including without
>>> limitation
>>> - * the rights to use, copy, modify, merge, publish, distribute,
>>> sublicense,
>>> - * and/or sell copies of the Software, and to permit persons to whom the
>>> - * Software is furnished to do so, subject to the following conditions:
>>> - *
>>> - * The above copyright notice and this permission notice shall be
>>> included in
>>> - * all copies or substantial portions of the Software.
>>> - *
>>> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>> EXPRESS OR
>>> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>>> MERCHANTABILITY,
>>> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
>>> SHALL
>>> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>>> DAMAGES OR
>>> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>>> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>> - * OTHER DEALINGS IN THE SOFTWARE.
>>> - */
>>> -
>>> -/*
>>> - * radeon_kfd.h defines the private interface between the
>>> - * AMD kernel graphics drivers and the AMD KFD.
>>> - */
>>> -
>>> -#ifndef RADEON_KFD_H_INCLUDED
>>> -#define RADEON_KFD_H_INCLUDED
>>> -
>>> -#include <linux/types.h>
>>> -#include "kgd_kfd_interface.h"
>>> -
>>> -struct radeon_device;
>>> -
>>> -int radeon_kfd_init(void);
>>> -void radeon_kfd_fini(void);
>>> -
>>> -void radeon_kfd_suspend(struct radeon_device *rdev);
>>> -int radeon_kfd_resume(struct radeon_device *rdev);
>>> -void radeon_kfd_interrupt(struct radeon_device *rdev,
>>> - const void *ih_ring_entry);
>>> -void radeon_kfd_device_probe(struct radeon_device *rdev);
>>> -void radeon_kfd_device_init(struct radeon_device *rdev);
>>> -void radeon_kfd_device_fini(struct radeon_device *rdev);
>>> -
>>> -#endif /* RADEON_KFD_H_INCLUDED */
>>> diff --git a/drivers/gpu/drm/radeon/radeon_kms.c
>>> b/drivers/gpu/drm/radeon/radeon_kms.c
>>> index dfee8f7..cde037f 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_kms.c
>>> +++ b/drivers/gpu/drm/radeon/radeon_kms.c
>>> @@ -34,8 +34,6 @@
>>> #include <linux/slab.h>
>>> #include <linux/pm_runtime.h>
>>>
>>> -#include "radeon_kfd.h"
>>> -
>>> #if defined(CONFIG_VGA_SWITCHEROO)
>>> bool radeon_has_atpx(void);
>>> #else
>>> @@ -68,8 +66,6 @@ void radeon_driver_unload_kms(struct drm_device *dev)
>>> pm_runtime_forbid(dev->dev);
>>> }
>>>
>>> - radeon_kfd_device_fini(rdev);
>>> -
>>> radeon_acpi_fini(rdev);
>>>
>>> radeon_modeset_fini(rdev);
>>> @@ -174,9 +170,6 @@ int radeon_driver_load_kms(struct drm_device *dev,
>>> unsigned long flags)
>>> "Error during ACPI methods call\n");
>>> }
>>>
>>> - radeon_kfd_device_probe(rdev);
>>> - radeon_kfd_device_init(rdev);
>>> -
>>> if (radeon_is_px(dev)) {
>>> pm_runtime_use_autosuspend(dev->dev);
>>> pm_runtime_set_autosuspend_delay(dev->dev, 5000);
>>> --
>>> 2.7.4
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>
>
>
>
[-- Attachment #1.2: Type: text/html, Size: 54051 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <CAFCwf11GZkKNEnR=_+NZcDxoujAXcj4GJ=JLNzNfShJBx97vDg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-11-29 11:16 ` Michel Dänzer
[not found] ` <b0c7cee5-63ec-ce4a-0641-8952b5a976da-otUistvHUpPR7s880joybQ@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Michel Dänzer @ 2017-11-29 11:16 UTC (permalink / raw)
To: Oded Gabbay, Christian König; +Cc: Christian König, amd-gfx list
[-- Attachment #1: Type: text/plain, Size: 1019 bytes --]
On 2017-11-01 09:31 AM, Oded Gabbay wrote:
> ok, taken to -next.
This change broke the radeon driver on my Kaveri laptop. The gdm login
screen works, but logging into the GNOME on Xorg session quickly results
in a GPU hang and associated badness, see the attached dmesg.
Reverting this change on top of drm-next makes it work again.
On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
reduce number of free VMIDs and pipes in KV") and 28b57b856b63
("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
Any ideas for what else is missing?
Note that the amdkfd driver isn't actually active anyway, because I'm
disabling the IOMMU. Is it possible that it's still doing or triggering
some needed HW setup before it bails in that case?
P.S. Assuming we can fix this without reverting, maybe we could also
remove rdev->grbm_idx_mutex again?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
[-- Attachment #2: dmesg.txt --]
[-- Type: text/plain, Size: 85667 bytes --]
[ 0.000000] Linux version 4.14.2+ (daenzer@kaveri) (gcc version 7.2.0 (Debian 7.2.0-16)) #295 SMP Mon Nov 27 10:35:18 CET 2017
[ 0.000000] Command line: BOOT_IMAGE=/vmlinuz-4.14.2+ root=/dev/mapper/tok--l8--mdaenzer--vg-root ro single iommu=soft radeon.bapm=1 forcefsck
[ 0.000000] random: get_random_u32 called from bsp_init_amd+0x1d9/0x220 with crng_init=0
[ 0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
[ 0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
[ 0.000000] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers'
[ 0.000000] x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256
[ 0.000000] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'standard' format.
[ 0.000000] e820: BIOS-provided physical RAM map:
[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000008dfff] usable
[ 0.000000] BIOS-e820: [mem 0x000000000008e000-0x000000000008ffff] ACPI NVS
[ 0.000000] BIOS-e820: [mem 0x0000000000090000-0x000000000009efff] usable
[ 0.000000] BIOS-e820: [mem 0x000000000009f000-0x000000000009ffff] reserved
[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000007d9a1fff] usable
[ 0.000000] BIOS-e820: [mem 0x000000007d9a2000-0x000000007dfa1fff] type 20
[ 0.000000] BIOS-e820: [mem 0x000000007dfa2000-0x000000007e89dfff] reserved
[ 0.000000] BIOS-e820: [mem 0x000000007e89e000-0x000000007ef9dfff] ACPI NVS
[ 0.000000] BIOS-e820: [mem 0x000000007ef9e000-0x000000007effefff] ACPI data
[ 0.000000] BIOS-e820: [mem 0x000000007efff000-0x000000007effffff] usable
[ 0.000000] BIOS-e820: [mem 0x00000000fec10000-0x00000000fec10fff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000fed80000-0x00000000fed80fff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000ff830000-0x00000000ff84efff] reserved
[ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000023effffff] usable
[ 0.000000] NX (Execute Disable) protection: active
[ 0.000000] efi: EFI v2.31 by HPQ
[ 0.000000] efi: ACPI=0x7effe000 ACPI 2.0=0x7effe014 SMBIOS=0x7e053c98
[ 0.000000] random: fast init done
[ 0.000000] SMBIOS 2.7 present.
[ 0.000000] DMI: Hewlett-Packard HP EliteBook 725 G2/221D, BIOS M84 Ver. 01.44 09/26/2016
[ 0.000000] tsc: Fast TSC calibration using PIT
[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
[ 0.000000] e820: last_pfn = 0x23f000 max_arch_pfn = 0x400000000
[ 0.000000] MTRR default type: uncachable
[ 0.000000] MTRR fixed ranges enabled:
[ 0.000000] 00000-9FFFF write-back
[ 0.000000] A0000-BFFFF uncachable
[ 0.000000] C0000-FFFFF write-through
[ 0.000000] MTRR variable ranges enabled:
[ 0.000000] 0 base 000000000000 mask FFFF80000000 write-back
[ 0.000000] 1 base 0000FF800000 mask FFFFFF800000 write-protect
[ 0.000000] 2 disabled
[ 0.000000] 3 disabled
[ 0.000000] 4 disabled
[ 0.000000] 5 disabled
[ 0.000000] 6 disabled
[ 0.000000] 7 disabled
[ 0.000000] TOM2: 000000023f000000 aka 9200M
[ 0.000000] x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT
[ 0.000000] e820: last_pfn = 0x7f000 max_arch_pfn = 0x400000000
[ 0.000000] Base memory trampoline at [ffff9fbd40099000] 99000 size 24576
[ 0.000000] Using GB pages for direct mapping
[ 0.000000] BRK [0x10a3de000, 0x10a3defff] PGTABLE
[ 0.000000] BRK [0x10a3df000, 0x10a3dffff] PGTABLE
[ 0.000000] BRK [0x10a3e0000, 0x10a3e0fff] PGTABLE
[ 0.000000] BRK [0x10a3e1000, 0x10a3e1fff] PGTABLE
[ 0.000000] BRK [0x10a3e2000, 0x10a3e2fff] PGTABLE
[ 0.000000] BRK [0x10a3e3000, 0x10a3e3fff] PGTABLE
[ 0.000000] BRK [0x10a3e4000, 0x10a3e4fff] PGTABLE
[ 0.000000] BRK [0x10a3e5000, 0x10a3e5fff] PGTABLE
[ 0.000000] Secure boot could not be determined
[ 0.000000] RAMDISK: [mem 0x33277000-0x35932fff]
[ 0.000000] ACPI: Early table checksum verification disabled
[ 0.000000] ACPI: RSDP 0x000000007EFFE014 000024 (v02 HPQOEM)
[ 0.000000] ACPI: XSDT 0x000000007EFFD0E8 0000A4 (v01 HPQOEM SLIC-MPC 00000003 01000013)
[ 0.000000] ACPI: FACP 0x000000007EFFB000 00010C (v05 HPQOEM 221D 00000003 HP 00000001)
[ 0.000000] ACPI: DSDT 0x000000007EFD7000 01F73D (v01 HPQOEM 221D 00000001 INTL 20130927)
[ 0.000000] ACPI: FACS 0x000000007ED55000 000040
[ 0.000000] ACPI: HPET 0x000000007EFFA000 000038 (v01 HPQOEM 221D 00000001 HP 00000001)
[ 0.000000] ACPI: APIC 0x000000007EFF9000 000090 (v01 HPQOEM 221D 00000001 HP 00000001)
[ 0.000000] ACPI: MCFG 0x000000007EFF8000 00003C (v01 HPQOEM 221D 00000001 HP 00000001)
[ 0.000000] ACPI: TCPA 0x000000007EFF7000 000032 (v02 HPQOEM 221D 00000000 HP 00000001)
[ 0.000000] ACPI: SLIC 0x000000007EFD5000 000176 (v01 HPQOEM SLIC-MPC 00000001 HP 00000001)
[ 0.000000] ACPI: MSDM 0x000000007EFD4000 000055 (v03 HPQOEM SLIC-MPC 00000000 HP 00000001)
[ 0.000000] ACPI: FPDT 0x000000007EFD3000 000044 (v01 HPQOEM 221D 00000001 HP 00000001)
[ 0.000000] ACPI: BGRT 0x000000007EFD2000 000038 (v00 HPQOEM 221D 00000001 HP 00000001)
[ 0.000000] ACPI: SSDT 0x000000007EFD1000 000B9C (v01 AMD BALLINA 00000001 AMD 00000001)
[ 0.000000] ACPI: SSDT 0x000000007EFC7000 009399 (v02 AMD BALLINA 00000002 MSFT 04000000)
[ 0.000000] ACPI: IVRS 0x000000007EFC6000 000078 (v02 AMD BALLINA 00000001 AMD 00000000)
[ 0.000000] ACPI: CRAT 0x000000007EFC5000 000550 (v01 AMD BALLINA 00000001 AMD 00000001)
[ 0.000000] ACPI: VFCT 0x000000007EFB5000 00F684 (v01 HPQOEM SLIC-MPC 00000001 AMD 31504F47)
[ 0.000000] ACPI: SSDT 0x000000007EFB4000 00081B (v01 AMD CPMADPS4 00000001 INTL 20130927)
[ 0.000000] ACPI: SSDT 0x000000007EFB2000 001207 (v01 AMD CPMCMN 00000001 INTL 20130927)
[ 0.000000] ACPI: Local APIC address 0xfee00000
[ 0.000000] No NUMA configuration found
[ 0.000000] Faking a node at [mem 0x0000000000000000-0x000000023effffff]
[ 0.000000] NODE_DATA(0) allocated [mem 0x23effb000-0x23effffff]
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000000001000-0x0000000000ffffff]
[ 0.000000] DMA32 [mem 0x0000000001000000-0x00000000ffffffff]
[ 0.000000] Normal [mem 0x0000000100000000-0x000000023effffff]
[ 0.000000] Device empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000001000-0x000000000008dfff]
[ 0.000000] node 0: [mem 0x0000000000090000-0x000000000009efff]
[ 0.000000] node 0: [mem 0x0000000000100000-0x000000007d9a1fff]
[ 0.000000] node 0: [mem 0x000000007efff000-0x000000007effffff]
[ 0.000000] node 0: [mem 0x0000000100000000-0x000000023effffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000023effffff]
[ 0.000000] On node 0 totalpages: 1820991
[ 0.000000] DMA zone: 64 pages used for memmap
[ 0.000000] DMA zone: 22 pages reserved
[ 0.000000] DMA zone: 3996 pages, LIFO batch:0
[ 0.000000] DMA32 zone: 7975 pages used for memmap
[ 0.000000] DMA32 zone: 510371 pages, LIFO batch:31
[ 0.000000] Normal zone: 20416 pages used for memmap
[ 0.000000] Normal zone: 1306624 pages, LIFO batch:31
[ 0.000000] ACPI: PM-Timer IO Port: 0x408
[ 0.000000] ACPI: Local APIC address 0xfee00000
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1])
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1])
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1])
[ 0.000000] IOAPIC[0]: apic_id 4, version 33, address 0xfec00000, GSI 0-23
[ 0.000000] IOAPIC[1]: apic_id 5, version 33, address 0xfec20000, GSI 24-55
[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
[ 0.000000] ACPI: IRQ0 used by override.
[ 0.000000] ACPI: IRQ9 used by override.
[ 0.000000] Using ACPI (MADT) for SMP configuration information
[ 0.000000] ACPI: HPET id: 0x43538301 base: 0xfed00000
[ 0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
[ 0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
[ 0.000000] PM: Registered nosave memory: [mem 0x0008e000-0x0008ffff]
[ 0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff]
[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
[ 0.000000] PM: Registered nosave memory: [mem 0x7d9a2000-0x7dfa1fff]
[ 0.000000] PM: Registered nosave memory: [mem 0x7dfa2000-0x7e89dfff]
[ 0.000000] PM: Registered nosave memory: [mem 0x7e89e000-0x7ef9dfff]
[ 0.000000] PM: Registered nosave memory: [mem 0x7ef9e000-0x7effefff]
[ 0.000000] PM: Registered nosave memory: [mem 0x7f000000-0xfec0ffff]
[ 0.000000] PM: Registered nosave memory: [mem 0xfec10000-0xfec10fff]
[ 0.000000] PM: Registered nosave memory: [mem 0xfec11000-0xfed7ffff]
[ 0.000000] PM: Registered nosave memory: [mem 0xfed80000-0xfed80fff]
[ 0.000000] PM: Registered nosave memory: [mem 0xfed81000-0xff82ffff]
[ 0.000000] PM: Registered nosave memory: [mem 0xff830000-0xff84efff]
[ 0.000000] PM: Registered nosave memory: [mem 0xff84f000-0xffffffff]
[ 0.000000] e820: [mem 0x7f000000-0xfec0ffff] available for PCI devices
[ 0.000000] Booting paravirtualized kernel on bare hardware
[ 0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns
[ 0.000000] setup_percpu: NR_CPUS:512 nr_cpumask_bits:512 nr_cpu_ids:4 nr_node_ids:1
[ 0.000000] percpu: Embedded 37 pages/cpu @ffff9fbf7ec00000 s113800 r8192 d29560 u524288
[ 0.000000] pcpu-alloc: s113800 r8192 d29560 u524288 alloc=1*2097152
[ 0.000000] pcpu-alloc: [0] 0 1 2 3
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1792514
[ 0.000000] Policy zone: Normal
[ 0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-4.14.2+ root=/dev/mapper/tok--l8--mdaenzer--vg-root ro single iommu=soft radeon.bapm=1 forcefsck
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Memory: 6934284K/7283964K available (7270K kernel code, 1270K rwdata, 3028K rodata, 1356K init, 12924K bss, 349680K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] ftrace: allocating 28344 entries in 111 pages
[ 0.000000] Running RCU self tests
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] RCU lockdep checking is enabled.
[ 0.000000] RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=4.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[ 0.000000] NR_IRQS: 33024, nr_irqs: 1000, preallocated irqs: 16
[ 0.000000] Console: colour dummy device 80x25
[ 0.000000] console [tty0] enabled
[ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.000000] ... MAX_LOCK_DEPTH: 48
[ 0.000000] ... MAX_LOCKDEP_KEYS: 8191
[ 0.000000] ... CLASSHASH_SIZE: 4096
[ 0.000000] ... MAX_LOCKDEP_ENTRIES: 32768
[ 0.000000] ... MAX_LOCKDEP_CHAINS: 65536
[ 0.000000] ... CHAINHASH_SIZE: 32768
[ 0.000000] memory used by lock dependency info: 7391 kB
[ 0.000000] per task-struct memory footprint: 1920 bytes
[ 0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484873504 ns
[ 0.000000] hpet clockevent registered
[ 0.000000] tsc: Fast TSC calibration using PIT
[ 0.004000] tsc: Detected 2096.096 MHz processor
[ 0.004000] Calibrating delay loop (skipped), value calculated using timer frequency.. 4192.19 BogoMIPS (lpj=8384384)
[ 0.004000] pid_max: default: 32768 minimum: 301
[ 0.004000] ACPI: Core revision 20170728
[ 0.024264] ACPI: 5 ACPI AML tables successfully acquired and loaded
[ 0.036364] Security Framework initialized
[ 0.036382] Yama: becoming mindful.
[ 0.036433] AppArmor: AppArmor initialized
[ 0.038751] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
[ 0.039995] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
[ 0.040091] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
[ 0.040143] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
[ 0.040764] [Firmware Info]: CPU: Re-enabling disabled Topology Extensions Support.
[ 0.040787] CPU: Physical Processor ID: 0
[ 0.040796] CPU: Processor Core ID: 0
[ 0.040805] mce: CPU supports 7 MCE banks
[ 0.040829] LVT offset 1 assigned for vector 0xf9
[ 0.040845] Last level iTLB entries: 4KB 512, 2MB 1024, 4MB 512
[ 0.040857] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 512, 1GB 0
[ 0.041158] Freeing SMP alternatives memory: 28K
[ 0.053015] smpboot: Max logical packages: 1
[ 0.053892] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
[ 0.096000] smpboot: CPU0: AMD A10 PRO-7350B R6, 10 Compute Cores 4C+6G (family: 0x15, model: 0x30, stepping: 0x1)
[ 0.096000] Performance Events: Fam15h core perfctr, AMD PMU driver.
[ 0.096000] ... version: 0
[ 0.096000] ... bit width: 48
[ 0.096000] ... generic registers: 6
[ 0.096000] ... value mask: 0000ffffffffffff
[ 0.096000] ... max period: 00007fffffffffff
[ 0.096000] ... fixed-purpose events: 0
[ 0.096000] ... event mask: 000000000000003f
[ 0.096000] Hierarchical SRCU implementation.
[ 0.096000] smp: Bringing up secondary CPUs ...
[ 0.096000] x86: Booting SMP configuration:
[ 0.096000] .... node #0, CPUs: #1
[ 0.096112] NMI watchdog: Enabled. Permanently consumes one hw-PMU counter.
[ 0.096367] #2 #3
[ 0.102033] smp: Brought up 1 node, 4 CPUs
[ 0.102033] smpboot: Total of 4 processors activated (16768.76 BogoMIPS)
[ 0.104060] devtmpfs: initialized
[ 0.104229] x86/mm: Memory block size: 128MB
[ 0.106991] PM: Registering ACPI NVS region [mem 0x0008e000-0x0008ffff] (8192 bytes)
[ 0.106991] PM: Registering ACPI NVS region [mem 0x7e89e000-0x7ef9dfff] (7340032 bytes)
[ 0.108544] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.108544] futex hash table entries: 1024 (order: 5, 131072 bytes)
[ 0.108544] pinctrl core: initialized pinctrl subsystem
[ 0.108962] NET: Registered protocol family 16
[ 0.109712] cpuidle: using governor ladder
[ 0.109734] cpuidle: using governor menu
[ 0.109734] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
[ 0.109734] ACPI: bus type PCI registered
[ 0.109734] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
[ 0.109734] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
[ 0.109734] PCI: not using MMCONFIG
[ 0.109734] PCI: Using configuration type 1 for base access
[ 0.109734] PCI: Using configuration type 1 for extended access
[ 0.115375] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[ 0.115375] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.116287] ACPI: Added _OSI(Module Device)
[ 0.116300] ACPI: Added _OSI(Processor Device)
[ 0.116313] ACPI: Added _OSI(3.0 _SCP Extensions)
[ 0.116325] ACPI: Added _OSI(Processor Aggregator Device)
[ 0.278895] ACPI: EC: EC started
[ 0.278915] ACPI: EC: interrupt blocked
[ 0.299289] ACPI: \_SB_.PCI0.LPCB.EC0_: Used as first EC
[ 0.299306] ACPI: \_SB_.PCI0.LPCB.EC0_: GPE=0x3, EC_CMD/EC_SC=0x66, EC_DATA=0x62
[ 0.299322] ACPI: \_SB_.PCI0.LPCB.EC0_: Used as boot DSDT EC to handle transactions
[ 0.299338] ACPI: Interpreter enabled
[ 0.299450] ACPI: (supports S0 S3 S4 S5)
[ 0.299464] ACPI: Using IOAPIC for interrupt routing
[ 0.299951] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
[ 0.301004] PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in ACPI motherboard resources
[ 0.301049] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
[ 0.301991] ACPI: Enabled 4 GPEs in block 00 to 1F
[ 0.311774] ACPI: Power Resource [APPR] (off)
[ 0.333000] ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored
[ 0.333878] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
[ 0.333900] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
[ 0.334936] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
[ 0.334955] acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
[ 0.336044] PCI host bridge to bus 0000:00
[ 0.336058] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7 window]
[ 0.336075] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window]
[ 0.336091] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
[ 0.336109] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window]
[ 0.336127] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window]
[ 0.336145] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window]
[ 0.336163] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window]
[ 0.336180] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
[ 0.336198] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
[ 0.336216] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
[ 0.336234] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
[ 0.336251] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window]
[ 0.336269] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window]
[ 0.336286] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff window]
[ 0.336304] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff window]
[ 0.336322] pci_bus 0000:00: root bus resource [mem 0x000f0000-0x000fffff window]
[ 0.336340] pci_bus 0000:00: root bus resource [mem 0xc0000000-0xdfffffff window]
[ 0.336357] pci_bus 0000:00: root bus resource [mem 0xf0000000-0xfed3ffff window]
[ 0.336375] pci_bus 0000:00: root bus resource [mem 0xfed45000-0xfffdffff window]
[ 0.336394] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 0.336456] pci 0000:00:00.0: [1022:1422] type 00 class 0x060000
[ 0.336778] pci 0000:00:00.2: [1022:1423] type 00 class 0x080600
[ 0.337066] pci 0000:00:01.0: [1002:1309] type 00 class 0x030000
[ 0.337090] pci 0000:00:01.0: reg 0x10: [mem 0xc0000000-0xcfffffff 64bit pref]
[ 0.337101] pci 0000:00:01.0: reg 0x18: [mem 0xd0000000-0xd07fffff 64bit pref]
[ 0.337108] pci 0000:00:01.0: reg 0x20: [io 0x5000-0x50ff]
[ 0.337116] pci 0000:00:01.0: reg 0x24: [mem 0xd6800000-0xd683ffff]
[ 0.337124] pci 0000:00:01.0: reg 0x30: [mem 0xfffe0000-0xffffffff pref]
[ 0.337130] pci 0000:00:01.0: enabling Extended Tags
[ 0.337151] pci 0000:00:01.0: BAR 0: assigned to efifb
[ 0.337202] pci 0000:00:01.0: supports D1 D2
[ 0.337204] pci 0000:00:01.0: PME# supported from D1 D2 D3hot
[ 0.337465] pci 0000:00:01.1: [1002:1308] type 00 class 0x040300
[ 0.337486] pci 0000:00:01.1: reg 0x10: [mem 0xd6840000-0xd6843fff 64bit]
[ 0.337519] pci 0000:00:01.1: enabling Extended Tags
[ 0.337570] pci 0000:00:01.1: supports D1 D2
[ 0.337808] pci 0000:00:02.0: [1022:1424] type 00 class 0x060000
[ 0.338073] pci 0000:00:03.0: [1022:1424] type 00 class 0x060000
[ 0.338344] pci 0000:00:03.1: [1022:1426] type 01 class 0x060400
[ 0.338391] pci 0000:00:03.1: enabling Extended Tags
[ 0.338457] pci 0000:00:03.1: PME# supported from D0 D3hot D3cold
[ 0.338727] pci 0000:00:03.2: [1022:1426] type 01 class 0x060400
[ 0.338774] pci 0000:00:03.2: enabling Extended Tags
[ 0.338839] pci 0000:00:03.2: PME# supported from D0 D3hot D3cold
[ 0.339086] pci 0000:00:03.3: [1022:1426] type 01 class 0x060400
[ 0.339132] pci 0000:00:03.3: enabling Extended Tags
[ 0.339215] pci 0000:00:03.3: PME# supported from D0 D3hot D3cold
[ 0.339540] pci 0000:00:04.0: [1022:1424] type 00 class 0x060000
[ 0.339872] pci 0000:00:10.0: [1022:7814] type 00 class 0x0c0330
[ 0.339907] pci 0000:00:10.0: reg 0x10: [mem 0xd6848000-0xd6849fff 64bit]
[ 0.340049] pci 0000:00:10.0: PME# supported from D0 D3hot D3cold
[ 0.340362] pci 0000:00:10.1: [1022:7814] type 00 class 0x0c0330
[ 0.340398] pci 0000:00:10.1: reg 0x10: [mem 0xd684a000-0xd684bfff 64bit]
[ 0.340544] pci 0000:00:10.1: PME# supported from D0 D3hot D3cold
[ 0.340825] pci 0000:00:11.0: [1022:7801] type 00 class 0x010601
[ 0.340850] pci 0000:00:11.0: reg 0x10: [io 0x5118-0x511f]
[ 0.340860] pci 0000:00:11.0: reg 0x14: [io 0x5124-0x5127]
[ 0.340871] pci 0000:00:11.0: reg 0x18: [io 0x5110-0x5117]
[ 0.340882] pci 0000:00:11.0: reg 0x1c: [io 0x5120-0x5123]
[ 0.340892] pci 0000:00:11.0: reg 0x20: [io 0x5100-0x510f]
[ 0.340903] pci 0000:00:11.0: reg 0x24: [mem 0xd6851000-0xd68517ff]
[ 0.341199] pci 0000:00:12.0: [1022:7807] type 00 class 0x0c0310
[ 0.341219] pci 0000:00:12.0: reg 0x10: [mem 0xd6850000-0xd6850fff]
[ 0.341538] pci 0000:00:12.2: [1022:7808] type 00 class 0x0c0320
[ 0.341562] pci 0000:00:12.2: reg 0x10: [mem 0xd684f000-0xd684f0ff]
[ 0.341655] pci 0000:00:12.2: supports D1 D2
[ 0.341657] pci 0000:00:12.2: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.341913] pci 0000:00:13.0: [1022:7807] type 00 class 0x0c0310
[ 0.341933] pci 0000:00:13.0: reg 0x10: [mem 0xd684e000-0xd684efff]
[ 0.342296] pci 0000:00:13.2: [1022:7808] type 00 class 0x0c0320
[ 0.342322] pci 0000:00:13.2: reg 0x10: [mem 0xd684d000-0xd684d0ff]
[ 0.342419] pci 0000:00:13.2: supports D1 D2
[ 0.342421] pci 0000:00:13.2: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.342710] pci 0000:00:14.0: [1022:780b] type 00 class 0x0c0500
[ 0.343061] pci 0000:00:14.2: [1022:780d] type 00 class 0x040300
[ 0.343090] pci 0000:00:14.2: reg 0x10: [mem 0xd6844000-0xd6847fff 64bit]
[ 0.343192] pci 0000:00:14.2: PME# supported from D0 D3hot D3cold
[ 0.343516] pci 0000:00:14.3: [1022:780e] type 00 class 0x060100
[ 0.343866] pci 0000:00:14.4: [1022:780f] type 01 class 0x060401
[ 0.344177] pci 0000:00:14.5: [1022:7809] type 00 class 0x0c0310
[ 0.344199] pci 0000:00:14.5: reg 0x10: [mem 0xd684c000-0xd684cfff]
[ 0.344555] pci 0000:00:18.0: [1022:141a] type 00 class 0x060000
[ 0.344740] pci 0000:00:18.1: [1022:141b] type 00 class 0x060000
[ 0.344751] pci 0000:00:18.1: adding root bus resource [mem 0x23f000000-0xfcffffffff 64bit pref window]
[ 0.344945] pci 0000:00:18.2: [1022:141c] type 00 class 0x060000
[ 0.345123] pci 0000:00:18.3: [1022:141d] type 00 class 0x060000
[ 0.345304] pci 0000:00:18.4: [1022:141e] type 00 class 0x060000
[ 0.345478] pci 0000:00:18.5: [1022:141f] type 00 class 0x060000
[ 0.345864] pci 0000:01:00.0: [10ec:8168] type 00 class 0x020000
[ 0.345897] pci 0000:01:00.0: reg 0x10: [io 0x4000-0x40ff]
[ 0.345925] pci 0000:01:00.0: reg 0x18: [mem 0xd5804000-0xd5804fff 64bit]
[ 0.345943] pci 0000:01:00.0: reg 0x20: [mem 0xd5800000-0xd5803fff 64bit]
[ 0.346049] pci 0000:01:00.0: supports D1 D2
[ 0.346051] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.356125] pci 0000:00:03.1: PCI bridge to [bus 01]
[ 0.356151] pci 0000:00:03.1: bridge window [io 0x4000-0x4fff]
[ 0.356157] pci 0000:00:03.1: bridge window [mem 0xd5800000-0xd67fffff]
[ 0.356163] pci 0000:00:03.1: bridge window [mem 0xd1800000-0xd27fffff 64bit pref]
[ 0.356541] pci 0000:02:00.0: [14e4:43b1] type 00 class 0x028000
[ 0.356583] pci 0000:02:00.0: reg 0x10: [mem 0xd0a00000-0xd0a07fff 64bit]
[ 0.356598] pci 0000:02:00.0: reg 0x18: [mem 0xd0800000-0xd09fffff 64bit]
[ 0.356748] pci 0000:02:00.0: supports D1 D2
[ 0.356750] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.368127] pci 0000:00:03.2: PCI bridge to [bus 02]
[ 0.368152] pci 0000:00:03.2: bridge window [io 0x3000-0x3fff]
[ 0.368158] pci 0000:00:03.2: bridge window [mem 0xd0800000-0xd17fffff]
[ 0.368164] pci 0000:00:03.2: bridge window [mem 0xd2800000-0xd37fffff 64bit pref]
[ 0.368308] pci 0000:03:00.0: [10ec:5227] type 00 class 0xff0000
[ 0.368339] pci 0000:03:00.0: reg 0x10: [mem 0xd4800000-0xd4800fff]
[ 0.368479] pci 0000:03:00.0: supports D1 D2
[ 0.368481] pci 0000:03:00.0: PME# supported from D1 D2 D3hot D3cold
[ 0.380107] pci 0000:00:03.3: PCI bridge to [bus 03]
[ 0.380132] pci 0000:00:03.3: bridge window [io 0x2000-0x2fff]
[ 0.380139] pci 0000:00:03.3: bridge window [mem 0xd4800000-0xd57fffff]
[ 0.380145] pci 0000:00:03.3: bridge window [mem 0xd3800000-0xd47fffff 64bit pref]
[ 0.380373] pci 0000:00:14.4: PCI bridge to [bus 04] (subtractive decode)
[ 0.380398] pci 0000:00:14.4: bridge window [io 0x0000-0x0cf7 window] (subtractive decode)
[ 0.380401] pci 0000:00:14.4: bridge window [io 0x0d00-0xffff window] (subtractive decode)
[ 0.380403] pci 0000:00:14.4: bridge window [mem 0x000a0000-0x000bffff window] (subtractive decode)
[ 0.380405] pci 0000:00:14.4: bridge window [mem 0x000c0000-0x000c3fff window] (subtractive decode)
[ 0.380408] pci 0000:00:14.4: bridge window [mem 0x000c4000-0x000c7fff window] (subtractive decode)
[ 0.380410] pci 0000:00:14.4: bridge window [mem 0x000c8000-0x000cbfff window] (subtractive decode)
[ 0.380412] pci 0000:00:14.4: bridge window [mem 0x000cc000-0x000cffff window] (subtractive decode)
[ 0.380414] pci 0000:00:14.4: bridge window [mem 0x000d0000-0x000d3fff window] (subtractive decode)
[ 0.380417] pci 0000:00:14.4: bridge window [mem 0x000d4000-0x000d7fff window] (subtractive decode)
[ 0.380419] pci 0000:00:14.4: bridge window [mem 0x000d8000-0x000dbfff window] (subtractive decode)
[ 0.380421] pci 0000:00:14.4: bridge window [mem 0x000dc000-0x000dffff window] (subtractive decode)
[ 0.380423] pci 0000:00:14.4: bridge window [mem 0x000e0000-0x000e3fff window] (subtractive decode)
[ 0.380426] pci 0000:00:14.4: bridge window [mem 0x000e4000-0x000e7fff window] (subtractive decode)
[ 0.380428] pci 0000:00:14.4: bridge window [mem 0x000e8000-0x000ebfff window] (subtractive decode)
[ 0.380430] pci 0000:00:14.4: bridge window [mem 0x000ec000-0x000effff window] (subtractive decode)
[ 0.380432] pci 0000:00:14.4: bridge window [mem 0x000f0000-0x000fffff window] (subtractive decode)
[ 0.380438] pci 0000:00:14.4: bridge window [mem 0xc0000000-0xdfffffff window] (subtractive decode)
[ 0.380440] pci 0000:00:14.4: bridge window [mem 0xf0000000-0xfed3ffff window] (subtractive decode)
[ 0.380443] pci 0000:00:14.4: bridge window [mem 0xfed45000-0xfffdffff window] (subtractive decode)
[ 0.380445] pci 0000:00:14.4: bridge window [mem 0x23f000000-0xfcffffffff 64bit pref window] (subtractive decode)
[ 0.381155] ACPI: IRQ 7 override to edge, high
[ 0.383564] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.383846] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.384210] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.384500] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.384720] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.384912] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.385102] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.385292] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 7 10 11 12 14 15) *0
[ 0.386020] ACPI: EC: interrupt unblocked
[ 0.386103] ACPI: EC: event unblocked
[ 0.386223] ACPI: \_SB_.PCI0.LPCB.EC0_: GPE=0x3, EC_CMD/EC_SC=0x66, EC_DATA=0x62
[ 0.386243] ACPI: \_SB_.PCI0.LPCB.EC0_: Used as boot DSDT EC to handle transactions and events
[ 0.386521] pci 0000:00:01.0: vgaarb: setting as boot VGA device
[ 0.386521] pci 0000:00:01.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
[ 0.386521] pci 0000:00:01.0: vgaarb: bridge control possible
[ 0.386521] vgaarb: loaded
[ 0.386521] EDAC MC: Ver: 3.0.0
[ 0.386521] Registered efivars operations
[ 1.599404] PCI: Using ACPI for IRQ routing
[ 1.609481] PCI: pci_cache_line_size set to 64 bytes
[ 1.609678] e820: reserve RAM buffer [mem 0x0008e000-0x0008ffff]
[ 1.609687] e820: reserve RAM buffer [mem 0x0009f000-0x0009ffff]
[ 1.609689] e820: reserve RAM buffer [mem 0x7d9a2000-0x7fffffff]
[ 1.609692] e820: reserve RAM buffer [mem 0x7f000000-0x7fffffff]
[ 1.609695] e820: reserve RAM buffer [mem 0x23f000000-0x23fffffff]
[ 1.610191] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
[ 1.610191] hpet0: 3 comparators, 32-bit 14.318180 MHz counter
[ 1.612301] clocksource: Switched to clocksource hpet
[ 1.648337] VFS: Disk quotas dquot_6.6.0
[ 1.648404] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 1.649001] AppArmor: AppArmor Filesystem Enabled
[ 1.649052] pnp: PnP ACPI init
[ 1.649370] system 00:00: [mem 0xe0000000-0xefffffff] has been reserved
[ 1.649388] system 00:00: [mem 0xfeb00000-0xfeb00fff] has been reserved
[ 1.649404] system 00:00: [mem 0xfec00000-0xfec00fff] could not be reserved
[ 1.649421] system 00:00: [mem 0xfec20000-0xfec20fff] could not be reserved
[ 1.649438] system 00:00: [mem 0xfee00000-0xfee00fff] has been reserved
[ 1.649472] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
[ 1.650069] system 00:01: [io 0x0400-0x04cf] has been reserved
[ 1.650084] system 00:01: [io 0x04d0-0x04d1] has been reserved
[ 1.650099] system 00:01: [io 0x04d6] has been reserved
[ 1.650113] system 00:01: [io 0x0680-0x06ff] has been reserved
[ 1.650128] system 00:01: [io 0x077a] has been reserved
[ 1.650142] system 00:01: [io 0x0c00-0x0c01] has been reserved
[ 1.650156] system 00:01: [io 0x0c14] has been reserved
[ 1.650170] system 00:01: [io 0x0c50-0x0c52] has been reserved
[ 1.650184] system 00:01: [io 0x0c6c] has been reserved
[ 1.650197] system 00:01: [io 0x0c6f] has been reserved
[ 1.650211] system 00:01: [io 0x0cd0-0x0cdb] has been reserved
[ 1.650225] system 00:01: [io 0x0220-0x0227] has been reserved
[ 1.650240] system 00:01: [io 0x0260-0x0273] has been reserved
[ 1.650254] system 00:01: [io 0x0800] has been reserved
[ 1.650267] system 00:01: [io 0x0804] has been reserved
[ 1.650281] system 00:01: [io 0x087f] has been reserved
[ 1.650294] system 00:01: [io 0x0cdc-0x0cdf] has been reserved
[ 1.650309] system 00:01: [io 0x0b00-0x0b0f] has been reserved
[ 1.650324] system 00:01: [io 0x0200-0x027f] could not be reserved
[ 1.650339] system 00:01: [io 0x1770-0x1777] has been reserved
[ 1.650359] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
[ 1.650514] system 00:02: [mem 0x00000000-0x0009ffff] could not be reserved
[ 1.650532] system 00:02: [mem 0x00100000-0xbfffffff] could not be reserved
[ 1.650549] system 00:02: [mem 0xffe00000-0xffffffff] could not be reserved
[ 1.650570] system 00:02: Plug and Play ACPI device, IDs PNP0c01 (active)
[ 1.650721] pnp 00:03: Plug and Play ACPI device, IDs PNP0b00 (active)
[ 1.650808] pnp 00:04: Plug and Play ACPI device, IDs HPQ8001 PNP0303 (active)
[ 1.650865] pnp 00:05: Plug and Play ACPI device, IDs SYN3017 SYN0100 SYN0002 PNP0f13 (active)
[ 1.651496] pnp 00:06: Plug and Play ACPI device, IDs IFX0102 PNP0c31 (active)
[ 1.651875] pnp: PnP ACPI: found 7 devices
[ 1.665901] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
[ 1.665928] pci 0000:00:01.0: can't claim BAR 6 [mem 0xfffe0000-0xffffffff pref]: no compatible bridge window
[ 1.666021] pci 0000:00:01.0: BAR 6: assigned [mem 0xd6860000-0xd687ffff pref]
[ 1.666042] pci 0000:00:03.1: PCI bridge to [bus 01]
[ 1.666055] pci 0000:00:03.1: bridge window [io 0x4000-0x4fff]
[ 1.666073] pci 0000:00:03.1: bridge window [mem 0xd5800000-0xd67fffff]
[ 1.666089] pci 0000:00:03.1: bridge window [mem 0xd1800000-0xd27fffff 64bit pref]
[ 1.666110] pci 0000:00:03.2: PCI bridge to [bus 02]
[ 1.666123] pci 0000:00:03.2: bridge window [io 0x3000-0x3fff]
[ 1.666140] pci 0000:00:03.2: bridge window [mem 0xd0800000-0xd17fffff]
[ 1.666156] pci 0000:00:03.2: bridge window [mem 0xd2800000-0xd37fffff 64bit pref]
[ 1.666178] pci 0000:00:03.3: PCI bridge to [bus 03]
[ 1.666190] pci 0000:00:03.3: bridge window [io 0x2000-0x2fff]
[ 1.666207] pci 0000:00:03.3: bridge window [mem 0xd4800000-0xd57fffff]
[ 1.666223] pci 0000:00:03.3: bridge window [mem 0xd3800000-0xd47fffff 64bit pref]
[ 1.666244] pci 0000:00:14.4: PCI bridge to [bus 04]
[ 1.666331] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7 window]
[ 1.666333] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff window]
[ 1.666335] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
[ 1.666338] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window]
[ 1.666340] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window]
[ 1.666342] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window]
[ 1.666344] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window]
[ 1.666346] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window]
[ 1.666348] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window]
[ 1.666350] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window]
[ 1.666352] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window]
[ 1.666354] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff window]
[ 1.666356] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff window]
[ 1.666358] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff window]
[ 1.666359] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff window]
[ 1.666361] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff window]
[ 1.666363] pci_bus 0000:00: resource 20 [mem 0xc0000000-0xdfffffff window]
[ 1.666365] pci_bus 0000:00: resource 21 [mem 0xf0000000-0xfed3ffff window]
[ 1.666367] pci_bus 0000:00: resource 22 [mem 0xfed45000-0xfffdffff window]
[ 1.666369] pci_bus 0000:00: resource 23 [mem 0x23f000000-0xfcffffffff 64bit pref window]
[ 1.666372] pci_bus 0000:01: resource 0 [io 0x4000-0x4fff]
[ 1.666374] pci_bus 0000:01: resource 1 [mem 0xd5800000-0xd67fffff]
[ 1.666376] pci_bus 0000:01: resource 2 [mem 0xd1800000-0xd27fffff 64bit pref]
[ 1.666378] pci_bus 0000:02: resource 0 [io 0x3000-0x3fff]
[ 1.666380] pci_bus 0000:02: resource 1 [mem 0xd0800000-0xd17fffff]
[ 1.666382] pci_bus 0000:02: resource 2 [mem 0xd2800000-0xd37fffff 64bit pref]
[ 1.666384] pci_bus 0000:03: resource 0 [io 0x2000-0x2fff]
[ 1.666386] pci_bus 0000:03: resource 1 [mem 0xd4800000-0xd57fffff]
[ 1.666388] pci_bus 0000:03: resource 2 [mem 0xd3800000-0xd47fffff 64bit pref]
[ 1.666390] pci_bus 0000:04: resource 4 [io 0x0000-0x0cf7 window]
[ 1.666392] pci_bus 0000:04: resource 5 [io 0x0d00-0xffff window]
[ 1.666394] pci_bus 0000:04: resource 6 [mem 0x000a0000-0x000bffff window]
[ 1.666396] pci_bus 0000:04: resource 7 [mem 0x000c0000-0x000c3fff window]
[ 1.666398] pci_bus 0000:04: resource 8 [mem 0x000c4000-0x000c7fff window]
[ 1.666400] pci_bus 0000:04: resource 9 [mem 0x000c8000-0x000cbfff window]
[ 1.666402] pci_bus 0000:04: resource 10 [mem 0x000cc000-0x000cffff window]
[ 1.666404] pci_bus 0000:04: resource 11 [mem 0x000d0000-0x000d3fff window]
[ 1.666406] pci_bus 0000:04: resource 12 [mem 0x000d4000-0x000d7fff window]
[ 1.666408] pci_bus 0000:04: resource 13 [mem 0x000d8000-0x000dbfff window]
[ 1.666410] pci_bus 0000:04: resource 14 [mem 0x000dc000-0x000dffff window]
[ 1.666412] pci_bus 0000:04: resource 15 [mem 0x000e0000-0x000e3fff window]
[ 1.666414] pci_bus 0000:04: resource 16 [mem 0x000e4000-0x000e7fff window]
[ 1.666415] pci_bus 0000:04: resource 17 [mem 0x000e8000-0x000ebfff window]
[ 1.666417] pci_bus 0000:04: resource 18 [mem 0x000ec000-0x000effff window]
[ 1.666419] pci_bus 0000:04: resource 19 [mem 0x000f0000-0x000fffff window]
[ 1.666421] pci_bus 0000:04: resource 20 [mem 0xc0000000-0xdfffffff window]
[ 1.666423] pci_bus 0000:04: resource 21 [mem 0xf0000000-0xfed3ffff window]
[ 1.666425] pci_bus 0000:04: resource 22 [mem 0xfed45000-0xfffdffff window]
[ 1.666428] pci_bus 0000:04: resource 23 [mem 0x23f000000-0xfcffffffff 64bit pref window]
[ 1.666685] NET: Registered protocol family 2
[ 1.667125] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
[ 1.667630] TCP bind hash table entries: 65536 (order: 10, 4194304 bytes)
[ 1.670310] TCP: Hash tables configured (established 65536 bind 65536)
[ 1.670556] UDP hash table entries: 4096 (order: 7, 655360 bytes)
[ 1.670994] UDP-Lite hash table entries: 4096 (order: 7, 655360 bytes)
[ 1.671559] NET: Registered protocol family 1
[ 1.671624] pci 0000:00:01.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
[ 1.733541] pci 0000:00:12.2: PME# does not work under D3, disabling it
[ 1.793547] pci 0000:00:13.2: PME# does not work under D3, disabling it
[ 1.793639] PCI: CLS mismatch (64 != 32), using 64 bytes
[ 1.852925] Unpacking initramfs...
[ 2.113084] Freeing initrd memory: 39664K
[ 2.113222] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
[ 2.113239] software IO TLB [mem 0x6e0a3000-0x720a3000] (64MB) mapped at [ffff9fbdae0a3000-ffff9fbdb20a2fff]
[ 2.113325] amd_uncore: AMD NB counters detected
[ 2.113914] LVT offset 0 assigned for vector 0x400
[ 2.114036] perf: AMD IBS detected (0x000001ff)
[ 2.115084] audit: initializing netlink subsys (disabled)
[ 2.115370] audit: type=2000 audit(1511952478.112:1): state=initialized audit_enabled=0 res=1
[ 2.116419] workingset: timestamp_bits=40 max_order=21 bucket_order=0
[ 2.120933] zbud: loaded
[ 2.472970] Key type asymmetric registered
[ 2.472996] Asymmetric key parser 'x509' registered
[ 2.473113] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
[ 2.473437] io scheduler noop registered
[ 2.473450] io scheduler deadline registered
[ 2.473557] io scheduler cfq registered (default)
[ 2.473570] io scheduler mq-deadline registered
[ 2.473582] io scheduler kyber registered
[ 2.476186] pcieport 0000:00:03.1: Signaling PME with IRQ 24
[ 2.476251] pcieport 0000:00:03.2: Signaling PME with IRQ 25
[ 2.476314] pcieport 0000:00:03.3: Signaling PME with IRQ 26
[ 2.476377] pciehp 0000:00:03.2:pcie004: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise- Interlock- NoCompl+ LLActRep+
[ 2.476569] pciehp 0000:00:03.3:pcie004: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise- Interlock- NoCompl+ LLActRep+
[ 2.476715] efifb: probing for efifb
[ 2.476750] efifb: framebuffer at 0xc0000000, using 8128k, total 8128k
[ 2.476767] efifb: mode is 1920x1080x32, linelength=7680, pages=1
[ 2.476782] efifb: scrolling: redraw
[ 2.476794] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
[ 2.481762] Console: switching to colour frame buffer device 240x67
[ 2.486045] fb0: EFI VGA frame buffer device
[ 2.487445] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 2.489054] Linux agpgart interface v0.103
[ 2.517905] tpm_tis 00:06: 1.2 TPM (device-id 0x1A, rev-id 16)
[ 2.710177] AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>
[ 2.710223] AMD IOMMUv2 functionality not available on this system
[ 2.711752] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
[ 2.713776] i8042: Detected active multiplexing controller, rev 1.1
[ 2.714868] serio: i8042 KBD port at 0x60,0x64 irq 1
[ 2.714963] serio: i8042 AUX0 port at 0x60,0x64 irq 12
[ 2.715192] serio: i8042 AUX1 port at 0x60,0x64 irq 12
[ 2.715313] serio: i8042 AUX2 port at 0x60,0x64 irq 12
[ 2.715426] serio: i8042 AUX3 port at 0x60,0x64 irq 12
[ 2.716172] mousedev: PS/2 mouse device common for all mice
[ 2.716544] rtc_cmos 00:03: RTC can wake from S4
[ 2.717197] rtc_cmos 00:03: rtc core: registered rtc_cmos as rtc0
[ 2.717305] rtc_cmos 00:03: alarms up to one month, 114 bytes nvram, hpet irqs
[ 2.717711] ledtrig-cpu: registered to indicate activity on CPUs
[ 2.718754] NET: Registered protocol family 10
[ 2.719742] Segment Routing with IPv6
[ 2.719791] mip6: Mobile IPv6
[ 2.719841] NET: Registered protocol family 17
[ 2.719873] mpls_gso: MPLS GSO support
[ 2.721132] microcode: CPU0: patch_level=0x06003106
[ 2.721254] microcode: CPU1: patch_level=0x06003106
[ 2.721331] microcode: CPU2: patch_level=0x06003106
[ 2.721413] microcode: CPU3: patch_level=0x06003106
[ 2.721659] microcode: Microcode Update Driver: v2.2.
[ 2.721698] sched_clock: Marking stable (2721642496, 0)->(2856533174, -134890678)
[ 2.722501] registered taskstats version 1
[ 2.722605] zswap: loaded using pool lzo/zbud
[ 2.722995] AppArmor: AppArmor sha1 policy hashing enabled
[ 2.741621] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
[ 3.029800] rtc_cmos 00:03: setting system clock to 2017-11-29 10:47:59 UTC (1511952479)
[ 3.035183] Freeing unused kernel memory: 1356K
[ 3.035218] Write protecting the kernel read-only data: 12288k
[ 3.036347] Freeing unused kernel memory: 912K
[ 3.039146] Freeing unused kernel memory: 1068K
[ 3.045147] x86/mm: Checked W+X mappings: passed, no W+X pages found.
[ 3.132382] tsc: Refined TSC clocksource calibration: 2096.145 MHz
[ 3.132443] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x1e36f6fad32, max_idle_ns: 440795283517 ns
[ 3.315144] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input6
[ 3.316508] ACPI: Sleep Button [SLPB]
[ 3.318122] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input7
[ 3.321020] ACPI: Lid Switch [LID]
[ 3.322270] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no)
[ 3.325243] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input8
[ 3.327006] ACPI: Power Button [PWRF]
[ 3.327271] acpi device:00: registered as cooling_device4
[ 3.327657] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input9
[ 3.352061] drm: loading out-of-tree module taints kernel.
[ 3.365140] SCSI subsystem initialized
[ 3.367329] ACPI: bus type USB registered
[ 3.369680] (NULL device *): hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().
[ 3.371971] usbcore: registered new interface driver usbfs
[ 3.373891] usbcore: registered new interface driver hub
[ 3.376275] thermal LNXTHERM:00: registered as thermal_zone0
[ 3.376278] ACPI: Thermal Zone [CPUZ] (89 C)
[ 3.379048] libata version 3.00 loaded.
[ 3.380969] usbcore: registered new device driver usb
[ 3.384961] ahci 0000:00:11.0: version 3.0
[ 3.385942] ahci 0000:00:11.0: AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
[ 3.387609] ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part
[ 3.396233] scsi host0: ahci
[ 3.398185] ata1: SATA max UDMA/133 abar m2048@0xd6851000 port 0xd6851100 irq 27
[ 3.401805] QUIRK: Enable AMD PLL fix
[ 3.401920] xhci_hcd 0000:00:10.0: xHCI Host Controller
[ 3.403454] xhci_hcd 0000:00:10.0: new USB bus registered, assigned bus number 1
[ 3.405640] xhci_hcd 0000:00:10.0: hcc params 0x014040c3 hci version 0x100 quirks 0x00000418
[ 3.406259] thermal LNXTHERM:01: registered as thermal_zone1
[ 3.406263] ACPI: Thermal Zone [GFXZ] (0 C)
[ 3.411639] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 3.413859] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 3.414568] ehci-pci: EHCI PCI platform driver
[ 3.416810] AVX version of gcm_enc/dec engaged.
[ 3.416812] AES CTR mode by8 optimization enabled
[ 3.416831] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 3.417928] [drm] radeon kernel modesetting enabled.
[ 3.426066] thermal LNXTHERM:02: registered as thermal_zone2
[ 3.426070] ACPI: Thermal Zone [EXTZ] (0 C)
[ 3.430668] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.432280] usb usb1: Product: xHCI Host Controller
[ 3.434113] usb usb1: Manufacturer: Linux 4.14.2+ xhci-hcd
[ 3.435833] usb usb1: SerialNumber: 0000:00:10.0
[ 3.438976] hub 1-0:1.0: USB hub found
[ 3.440701] hub 1-0:1.0: 2 ports detected
[ 3.443767] thermal LNXTHERM:03: registered as thermal_zone3
[ 3.444722] xhci_hcd 0000:00:10.0: xHCI Host Controller
[ 3.444739] xhci_hcd 0000:00:10.0: new USB bus registered, assigned bus number 2
[ 3.445021] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[ 3.445139] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
[ 3.445142] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.445144] usb usb2: Product: xHCI Host Controller
[ 3.445146] usb usb2: Manufacturer: Linux 4.14.2+ xhci-hcd
[ 3.445147] usb usb2: SerialNumber: 0000:00:10.0
[ 3.446052] hub 2-0:1.0: USB hub found
[ 3.446189] hub 2-0:1.0: 2 ports detected
[ 3.448388] xhci_hcd 0000:00:10.1: xHCI Host Controller
[ 3.448405] xhci_hcd 0000:00:10.1: new USB bus registered, assigned bus number 3
[ 3.468993] ACPI: Thermal Zone [LOCZ] (0 C)
[ 3.495979] thermal LNXTHERM:04: registered as thermal_zone4
[ 3.497897] ACPI: Thermal Zone [BATZ] (36 C)
[ 3.554093] xhci_hcd 0000:00:10.1: hcc params 0x014040c3 hci version 0x100 quirks 0x00000418
[ 3.556550] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
[ 3.558285] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.559982] usb usb3: Product: xHCI Host Controller
[ 3.561688] usb usb3: Manufacturer: Linux 4.14.2+ xhci-hcd
[ 3.563433] usb usb3: SerialNumber: 0000:00:10.1
[ 3.566288] hub 3-0:1.0: USB hub found
[ 3.568031] hub 3-0:1.0: 2 ports detected
[ 3.570918] xhci_hcd 0000:00:10.1: xHCI Host Controller
[ 3.572536] xhci_hcd 0000:00:10.1: new USB bus registered, assigned bus number 4
[ 3.574399] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[ 3.576057] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003
[ 3.577864] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.579526] usb usb4: Product: xHCI Host Controller
[ 3.581061] usb usb4: Manufacturer: Linux 4.14.2+ xhci-hcd
[ 3.582777] usb usb4: SerialNumber: 0000:00:10.1
[ 3.585745] hub 4-0:1.0: USB hub found
[ 3.587286] hub 4-0:1.0: 2 ports detected
[ 3.591087] ehci-pci 0000:00:12.2: EHCI Host Controller
[ 3.592745] ehci-pci 0000:00:12.2: new USB bus registered, assigned bus number 5
[ 3.594444] ehci-pci 0000:00:12.2: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround
[ 3.595974] ehci-pci 0000:00:12.2: debug port 1
[ 3.597733] ehci-pci 0000:00:12.2: irq 17, io mem 0xd684f000
[ 3.612297] ehci-pci 0000:00:12.2: USB 2.0 started, EHCI 1.00
[ 3.613751] usb usb5: New USB device found, idVendor=1d6b, idProduct=0002
[ 3.614949] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.616261] usb usb5: Product: EHCI Host Controller
[ 3.617496] usb usb5: Manufacturer: Linux 4.14.2+ ehci_hcd
[ 3.618732] usb usb5: SerialNumber: 0000:00:12.2
[ 3.620950] hub 5-0:1.0: USB hub found
[ 3.622218] hub 5-0:1.0: 5 ports detected
[ 3.625475] ehci-pci 0000:00:13.2: EHCI Host Controller
[ 3.626647] ehci-pci 0000:00:13.2: new USB bus registered, assigned bus number 6
[ 3.627799] ehci-pci 0000:00:13.2: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround
[ 3.629123] ehci-pci 0000:00:13.2: debug port 1
[ 3.630394] ehci-pci 0000:00:13.2: irq 17, io mem 0xd684d000
[ 3.644223] ehci-pci 0000:00:13.2: USB 2.0 started, EHCI 1.00
[ 3.645555] usb usb6: New USB device found, idVendor=1d6b, idProduct=0002
[ 3.646559] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.647559] usb usb6: Product: EHCI Host Controller
[ 3.648677] usb usb6: Manufacturer: Linux 4.14.2+ ehci_hcd
[ 3.649781] usb usb6: SerialNumber: 0000:00:13.2
[ 3.651580] hub 6-0:1.0: USB hub found
[ 3.652833] hub 6-0:1.0: 5 ports detected
[ 3.655136] checking generic (c0000000 7f0000) vs hw (c0000000 10000000)
[ 3.655143] fb: switching to radeondrmfb from EFI VGA
[ 3.656630] Console: switching to colour dummy device 80x25
[ 3.660057] [drm] initializing kernel modesetting (KAVERI 0x1002:0x1309 0x103C:0x221D 0x00).
[ 3.660152] [drm] doorbell mmio base: 0xD0000000
[ 3.660167] [drm] doorbell mmio size: 8388608
[ 3.660270] ATOM BIOS: BR45464.001
[ 3.660384] [drm] Changing default dispclk from 533Mhz to 600Mhz
[ 3.660431] radeon 0000:00:01.0: VRAM: 1024M 0x0000000000000000 - 0x000000003FFFFFFF (1024M used)
[ 3.660455] radeon 0000:00:01.0: GTT: 2048M 0x0000000040000000 - 0x00000000BFFFFFFF
[ 3.660479] [drm] Detected VRAM RAM=1024M, BAR=256M
[ 3.660493] [drm] RAM width 128bits DDR
[ 3.660868] [TTM] Zone kernel: Available graphics memory: 3537606 kiB
[ 3.660891] [TTM] Zone dma32: Available graphics memory: 2097152 kiB
[ 3.660908] [TTM] Initializing pool allocator
[ 3.660946] [TTM] Initializing DMA pool allocator
[ 3.661275] [drm] radeon: 1024M of VRAM memory ready
[ 3.661290] [drm] radeon: 2048M of GTT memory ready.
[ 3.661339] [drm] Loading kaveri Microcode
[ 3.661907] [drm] Internal thermal controller without fan control
[ 3.663404] [drm] radeon: dpm initialized
[ 3.663657] [drm] Found UVD firmware Version: 1.64 Family ID: 9
[ 3.667027] [drm] Found VCE firmware/feedback version 40.2.2 / 15!
[ 3.667086] [drm] GART: num cpu pages 524288, num gpu pages 524288
[ 3.693336] ohci-pci: OHCI PCI platform driver
[ 3.716402] [drm] PCIE GART of 2048M enabled (table at 0x000000000030E000).
[ 3.716911] radeon 0000:00:01.0: WB enabled
[ 3.717018] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000040000c00 and cpu addr 0xffff9fbf6cd3ec00
[ 3.717061] radeon 0000:00:01.0: fence driver on ring 1 use gpu addr 0x0000000040000c04 and cpu addr 0xffff9fbf6cd3ec04
[ 3.717103] radeon 0000:00:01.0: fence driver on ring 2 use gpu addr 0x0000000040000c08 and cpu addr 0xffff9fbf6cd3ec08
[ 3.717144] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000040000c0c and cpu addr 0xffff9fbf6cd3ec0c
[ 3.717184] radeon 0000:00:01.0: fence driver on ring 4 use gpu addr 0x0000000040000c10 and cpu addr 0xffff9fbf6cd3ec10
[ 3.717817] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000078d30 and cpu addr 0xffffbd8dc2038d30
[ 3.718100] radeon 0000:00:01.0: fence driver on ring 6 use gpu addr 0x0000000040000c18 and cpu addr 0xffff9fbf6cd3ec18
[ 3.718141] radeon 0000:00:01.0: fence driver on ring 7 use gpu addr 0x0000000040000c1c and cpu addr 0xffff9fbf6cd3ec1c
[ 3.718191] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 3.718217] [drm] Driver supports precise vblank timestamp query.
[ 3.718423] radeon 0000:00:01.0: radeon: using MSI.
[ 3.718613] [drm] radeon: irq initialized.
[ 3.725398] [drm] ring test on 0 succeeded in 3 usecs
[ 3.725572] [drm] ring test on 1 succeeded in 2 usecs
[ 3.725636] [drm] ring test on 2 succeeded in 3 usecs
[ 3.725844] [drm] ring test on 3 succeeded in 5 usecs
[ 3.725873] [drm] ring test on 4 succeeded in 4 usecs
[ 3.771916] [drm] ring test on 5 succeeded in 2 usecs
[ 3.791811] [drm] UVD initialized successfully.
[ 3.880193] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
[ 3.881078] ata1.00: supports DRM functions and may not be fully accessible
[ 3.889287] ata1.00: disabling queued TRIM support
[ 3.889295] ata1.00: ATA-9: Crucial_CT512M550SSD1, MU01, max UDMA/133
[ 3.889332] ata1.00: 1000215216 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
[ 3.901238] [drm] ring test on 6 succeeded in 17 usecs
[ 3.901275] [drm] ring test on 7 succeeded in 3 usecs
[ 3.901299] [drm] VCE initialized successfully.
[ 3.904050] usb 3-2: new high-speed USB device number 2 using xhci_hcd
[ 3.906758] ata1.00: supports DRM functions and may not be fully accessible
[ 3.908065] [drm] ib test on ring 0 succeeded in 0 usecs
[ 3.915013] ata1.00: disabling queued TRIM support
[ 3.932670] ata1.00: configured for UDMA/133
[ 3.935118] scsi 0:0:0:0: Direct-Access ATA Crucial_CT512M55 MU01 PQ: 0 ANSI: 5
[ 3.943358] ata1.00: Enabling discard_zeroes_data
[ 3.943692] sd 0:0:0:0: [sda] 1000215216 512-byte logical blocks: (512 GB/477 GiB)
[ 3.943743] sd 0:0:0:0: [sda] 4096-byte physical blocks
[ 3.943823] sd 0:0:0:0: [sda] Write Protect is off
[ 3.943849] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
[ 3.943914] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[ 3.945652] ata1.00: Enabling discard_zeroes_data
[ 3.948853] sda: sda1 sda2 sda3
[ 3.951168] ata1.00: Enabling discard_zeroes_data
[ 3.951710] sd 0:0:0:0: [sda] Attached SCSI disk
[ 4.055975] usb 3-2: New USB device found, idVendor=0424, idProduct=2134
[ 4.056049] usb 3-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[ 4.056079] usb 3-2: Product: USB2134B
[ 4.056097] usb 3-2: Manufacturer: SMSC
[ 4.058362] hub 3-2:1.0: USB hub found
[ 4.058781] hub 3-2:1.0: 4 ports detected
[ 4.157204] clocksource: Switched to clocksource tsc
[ 4.180596] usb 4-2: new SuperSpeed USB device number 2 using xhci_hcd
[ 4.204133] usb 4-2: New USB device found, idVendor=0424, idProduct=5534
[ 4.204172] usb 4-2: New USB device strings: Mfr=2, Product=3, SerialNumber=0
[ 4.204201] usb 4-2: Product: USB5534B
[ 4.204219] usb 4-2: Manufacturer: SMSC
[ 4.205730] hub 4-2:1.0: USB hub found
[ 4.206143] hub 4-2:1.0: 4 ports detected
[ 4.348229] usb 3-2.3: new full-speed USB device number 3 using xhci_hcd
[ 4.412829] [drm] ib test on ring 1 succeeded in 0 usecs
[ 4.412985] [drm] ib test on ring 2 succeeded in 0 usecs
[ 4.413279] [drm] ib test on ring 3 succeeded in 0 usecs
[ 4.413456] [drm] ib test on ring 4 succeeded in 0 usecs
[ 4.467111] usb 3-2.3: New USB device found, idVendor=046d, idProduct=0a01
[ 4.467150] usb 3-2.3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[ 4.467181] usb 3-2.3: Product: Logitech USB Headset
[ 4.467203] usb 3-2.3: Manufacturer: Logitech
[ 4.872230] usb 5-5: new high-speed USB device number 3 using ehci-pci
[ 4.956465] [drm] ib test on ring 5 succeeded
[ 4.977576] [drm] ib test on ring 6 succeeded
[ 4.978582] [drm] ib test on ring 7 succeeded
[ 4.988938] [drm] radeon atom DIG backlight initialized
[ 4.988968] [drm] Radeon Display Connectors
[ 4.988989] [drm] Connector 0:
[ 4.989004] [drm] VGA-1
[ 4.989019] [drm] HPD2
[ 4.989035] [drm] DDC: 0x6540 0x6540 0x6544 0x6544 0x6548 0x6548 0x654c 0x654c
[ 4.989064] [drm] Encoders:
[ 4.989079] [drm] CRT1: INTERNAL_UNIPHY2
[ 4.989098] [drm] CRT1: NUTMEG
[ 4.989115] [drm] Connector 1:
[ 4.989130] [drm] DP-1
[ 4.989143] [drm] HPD3
[ 4.989157] [drm] DDC: 0x6550 0x6550 0x6554 0x6554 0x6558 0x6558 0x655c 0x655c
[ 4.989186] [drm] Encoders:
[ 4.989201] [drm] DFP1: INTERNAL_UNIPHY2
[ 4.989221] [drm] Connector 2:
[ 4.989236] [drm] eDP-1
[ 4.989250] [drm] HPD1
[ 4.989264] [drm] DDC: 0x6530 0x6530 0x6534 0x6534 0x6538 0x6538 0x653c 0x653c
[ 4.989293] [drm] Encoders:
[ 4.989308] [drm] LCD1: INTERNAL_UNIPHY
[ 4.989327] [drm] Connector 3:
[ 4.989342] [drm] DP-2
[ 4.989355] [drm] HPD5
[ 4.989370] [drm] DDC: 0x6570 0x6570 0x6574 0x6574 0x6578 0x6578 0x657c 0x657c
[ 4.989398] [drm] Encoders:
[ 4.989413] [drm] DFP3: INTERNAL_UNIPHY1
[ 4.989432] [drm] Connector 4:
[ 4.989447] [drm] DP-3
[ 4.989460] [drm] HPD4
[ 4.989475] [drm] DDC: 0x6560 0x6560 0x6564 0x6564 0x6568 0x6568 0x656c 0x656c
[ 4.989504] [drm] Encoders:
[ 4.989518] [drm] DFP2: INTERNAL_UNIPHY3
[ 5.072567] usb 5-5: New USB device found, idVendor=04f2, idProduct=b477
[ 5.072606] usb 5-5: New USB device strings: Mfr=3, Product=1, SerialNumber=2
[ 5.072636] usb 5-5: Product: HP HD Webcam
[ 5.072655] usb 5-5: Manufacturer: Chicony Electronics Co.,Ltd.
[ 5.072679] usb 5-5: SerialNumber: 200901010001
[ 6.123752] [drm] fb mappable at 0xC0722000
[ 6.123778] [drm] vram apper at 0xC0000000
[ 6.123787] [drm] size 8294400
[ 6.123795] [drm] fb depth is 24
[ 6.123803] [drm] pitch is 7680
[ 6.124323] fbcon: radeondrmfb (fb0) is primary device
[ 7.647952] Console: switching to colour frame buffer device 240x67
[ 7.652187] radeon 0000:00:01.0: fb0: radeondrmfb frame buffer device
[ 7.677456] [drm] Initialized radeon 2.50.0 20080528 for 0000:00:01.0 on minor 0
[ 7.678657] ohci-pci 0000:00:12.0: OHCI PCI host controller
[ 7.678727] ohci-pci 0000:00:12.0: new USB bus registered, assigned bus number 7
[ 7.678925] ohci-pci 0000:00:12.0: irq 18, io mem 0xd6850000
[ 7.720874] [drm] amdgpu kernel modesetting enabled.
[ 7.740542] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001
[ 7.740595] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 7.740637] usb usb7: Product: OHCI PCI host controller
[ 7.740667] usb usb7: Manufacturer: Linux 4.14.2+ ohci_hcd
[ 7.740699] usb usb7: SerialNumber: 0000:00:12.0
[ 7.741449] hub 7-0:1.0: USB hub found
[ 7.741542] hub 7-0:1.0: 5 ports detected
[ 7.743268] ohci-pci 0000:00:13.0: OHCI PCI host controller
[ 7.743322] ohci-pci 0000:00:13.0: new USB bus registered, assigned bus number 8
[ 7.743440] ohci-pci 0000:00:13.0: irq 18, io mem 0xd684e000
[ 7.804450] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001
[ 7.804495] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 7.804531] usb usb8: Product: OHCI PCI host controller
[ 7.804557] usb usb8: Manufacturer: Linux 4.14.2+ ohci_hcd
[ 7.804584] usb usb8: SerialNumber: 0000:00:13.0
[ 7.805338] hub 8-0:1.0: USB hub found
[ 7.805441] hub 8-0:1.0: 5 ports detected
[ 7.807398] ohci-pci 0000:00:14.5: OHCI PCI host controller
[ 7.807464] ohci-pci 0000:00:14.5: new USB bus registered, assigned bus number 9
[ 7.807595] ohci-pci 0000:00:14.5: irq 18, io mem 0xd684c000
[ 7.868466] usb usb9: New USB device found, idVendor=1d6b, idProduct=0001
[ 7.868512] usb usb9: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 7.868548] usb usb9: Product: OHCI PCI host controller
[ 7.868574] usb usb9: Manufacturer: Linux 4.14.2+ ohci_hcd
[ 7.868602] usb usb9: SerialNumber: 0000:00:14.5
[ 7.869492] hub 9-0:1.0: USB hub found
[ 7.869586] hub 9-0:1.0: 2 ports detected
[ 7.917612] hidraw: raw HID events driver (C) Jiri Kosina
[ 7.929636] usbcore: registered new interface driver usbhid
[ 7.929697] usbhid: USB HID core driver
[ 8.028188] raid6: sse2x1 gen() 5617 MB/s
[ 8.096064] raid6: sse2x1 xor() 3870 MB/s
[ 8.160079] usb 7-3: new full-speed USB device number 2 using ohci-pci
[ 8.164063] raid6: sse2x2 gen() 8416 MB/s
[ 8.232179] raid6: sse2x2 xor() 5632 MB/s
[ 8.300177] raid6: sse2x4 gen() 10011 MB/s
[ 8.368058] raid6: sse2x4 xor() 4649 MB/s
[ 8.369070] raid6: using algorithm sse2x4 gen() 10011 MB/s
[ 8.370094] raid6: .... xor() 4649 MB/s, rmw enabled
[ 8.370979] raid6: using ssse3x2 recovery algorithm
[ 8.372552] async_tx: api initialized (async)
[ 8.373912] xor: automatically using best checksumming function avx
[ 8.396409] usb 7-3: New USB device found, idVendor=0a5c, idProduct=21fb
[ 8.396413] usb 7-3: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 8.396415] usb 7-3: Product: BCM20702A0
[ 8.396416] usb 7-3: Manufacturer: Broadcom Corp
[ 8.396418] usb 7-3: SerialNumber: 40E2303B156C
[ 8.779588] device-mapper: uevent: version 1.0.3
[ 8.781475] device-mapper: ioctl: 4.37.0-ioctl (2017-09-20) initialised: dm-devel@redhat.com
[ 63.402880] random: crng init done
[ 66.132736] PM: Starting manual resume from disk
[ 66.134497] PM: Image not found (code -22)
[ 79.416878] EXT4-fs (dm-1): mounted filesystem with ordered data mode. Opts: (null)
[ 79.660078] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 81.957257] systemd[1]: systemd 235 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN default-hierarchy=hybrid)
[ 81.959225] systemd[1]: Detected architecture x86-64.
[ 81.963403] systemd[1]: Set hostname to <tok-l7-mdaenzer>.
[ 82.242380] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
[ 82.245119] systemd[1]: Created slice System Slice.
[ 82.253903] systemd[1]: Mounting POSIX Message Queue File System...
[ 82.259193] systemd[1]: Created slice system-systemd\x2dcryptsetup.slice.
[ 82.267101] systemd[1]: Listening on udev Control Socket.
[ 82.274457] systemd[1]: Listening on Journal Socket (/dev/log).
[ 82.280894] systemd[1]: Listening on fsck to fsckd communication Socket.
[ 82.431313] EXT4-fs (dm-1): re-mounted. Opts: errors=remount-ro
[ 82.438116] lp: driver loaded but no devices found
[ 82.456100] ppdev: user-space parallel port driver
[ 82.504925] loop: module loaded
[ 82.514040] tun: Universal TUN/TAP device driver, 1.6
[ 82.531277] fuse init (API version 7.26)
[ 82.794780] systemd-journald[396]: Received request to flush runtime journal from PID 1
[ 82.921527] acpi_cpufreq: overriding BIOS provided _PSD data
[ 82.923010] ACPI: AC Adapter [AC] (on-line)
[ 82.923445] input: HP Wireless hotkeys as /devices/virtual/input/input10
[ 82.946319] cmi: probe of SMB0001:00 failed with error -5
[ 83.005365] hp_accel: laptop model unknown, using default axes configuration
[ 83.013774] lis3lv02d: 8 bits 3DC sensor found
[ 83.058740] ACPI: Battery Slot [BAT0] (battery present)
[ 83.072275] input: ST LIS3LV02DL Accelerometer as /devices/platform/lis3lv02d/input/input11
[ 83.140275] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
[ 83.178146] rtsx_pci 0000:03:00.0: enabling device (0000 -> 0002)
[ 83.188932] sd 0:0:0:0: Attached scsi generic sg0 type 0
[ 83.195604] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
[ 83.203783] r8169 0000:01:00.0: can't disable ASPM; OS doesn't have ASPM control
[ 83.243807] ACPI Warning: SystemIO range 0x0000000000000B00-0x0000000000000B08 conflicts with OpRegion 0x0000000000000B00-0x0000000000000B06 (\_SB.PCI0.SMBS.SMBO) (20170728/utaddress-247)
[ 83.246462] media: Linux media interface: v0.10
[ 83.257374] EFI Variables Facility v0.08 2004-May-17
[ 83.258558] Linux video capture interface: v2.00
[ 83.269197] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[ 83.273903] snd_hda_intel 0000:00:01.1: Force to non-snoop mode
[ 83.283193] r8169 0000:01:00.0 eth0: RTL8168ep/8111ep at 0xffffbd8dc0e6d000, 8c:dc:d4:d1:30:69, XID 10200880 IRQ 45
[ 83.285722] r8169 0000:01:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko]
[ 83.312314] sp5100_tco: SP5100/SB800 TCO WatchDog Timer Driver v0.05
[ 83.317644] snd_hda_codec_realtek hdaudioC2D0: autoconfig for ALC3228: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
[ 83.317649] snd_hda_codec_realtek hdaudioC2D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
[ 83.317652] snd_hda_codec_realtek hdaudioC2D0: hp_outs=1 (0x15/0x0/0x0/0x0/0x0)
[ 83.317654] snd_hda_codec_realtek hdaudioC2D0: mono: mono_out=0x0
[ 83.317656] snd_hda_codec_realtek hdaudioC2D0: inputs:
[ 83.317661] snd_hda_codec_realtek hdaudioC2D0: Mic=0x1a
[ 83.317665] snd_hda_codec_realtek hdaudioC2D0: Internal Mic=0x12
[ 83.317842] input: HDA ATI HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:01.1/sound/card0/input12
[ 83.318435] input: HDA ATI HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:01.1/sound/card0/input13
[ 83.318899] input: HDA ATI HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:01.1/sound/card0/input14
[ 83.319062] input: PC Speaker as /devices/platform/pcspkr/input/input16
[ 83.319344] input: HDA ATI HDMI HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:01.1/sound/card0/input15
[ 83.322024] Error: Driver 'pcspkr' is already registered, aborting...
[ 83.353759] usb 3-2.3: Warning! Unlikely big volume range (=464), cval->res is probably wrong.
[ 83.353783] usb 3-2.3: [6] FU [Mic Playback Volume] ch = 1, val = -10496/-3072/16
[ 83.388229] sp5100_tco: PCI Vendor ID: 0x1022, Device ID: 0x780b, Revision ID: 0x16
[ 83.390447] sp5100_tco: Using 0xfed80b00 for watchdog MMIO address
[ 83.391299] uvcvideo: Found UVC 1.00 device HP HD Webcam (04f2:b477)
[ 83.393186] uvcvideo 5-5:1.0: Entity type for entity Extension 5 was not initialized!
[ 83.393245] uvcvideo 5-5:1.0: Entity type for entity Extension 2 was not initialized!
[ 83.393249] uvcvideo 5-5:1.0: Entity type for entity Processing 3 was not initialized!
[ 83.393252] uvcvideo 5-5:1.0: Entity type for entity Camera 1 was not initialized!
[ 83.395310] input: HP HD Webcam: HP HD Webcam as /devices/pci0000:00/0000:00:12.2/usb5/5-5/5-5:1.0/input/input22
[ 83.397825] usbcore: registered new interface driver uvcvideo
[ 83.397827] USB Video Class driver (1.1.1)
[ 83.401502] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:14.2/sound/card2/input17
[ 83.403504] input: HD-Audio Generic Mic as /devices/pci0000:00/0000:00:14.2/sound/card2/input20
[ 83.403827] input: HD-Audio Generic Headphone as /devices/pci0000:00/0000:00:14.2/sound/card2/input21
[ 83.418102] usbcore: registered new interface driver snd-usb-audio
[ 83.431202] sp5100_tco: Last reboot was not triggered by watchdog.
[ 83.448926] sp5100_tco: initialized (0xffffbd8dc1441b00). heartbeat=60 sec (nowayout=0)
[ 83.498378] hp_wmi: query 0xd returned error 0x5
[ 83.506292] Bluetooth: Core ver 2.22
[ 83.506327] NET: Registered protocol family 31
[ 83.506330] Bluetooth: HCI device and connection manager initialized
[ 83.506436] Bluetooth: HCI socket layer initialized
[ 83.506451] Bluetooth: L2CAP socket layer initialized
[ 83.506503] Bluetooth: SCO socket layer initialized
[ 83.523467] input: HP WMI hotkeys as /devices/virtual/input/input23
[ 83.529776] kvm: Nested Virtualization enabled
[ 83.533513] kvm: Nested Paging enabled
[ 83.546435] MCE: In-kernel MCE decoding enabled.
[ 83.548470] usbcore: registered new interface driver btusb
[ 83.565546] EDAC amd64: Node 0: DRAM ECC disabled.
[ 83.567837] EDAC amd64: ECC disabled in the BIOS or no ECC capability, module will not load.
Either enable ECC checking or force module loading by setting 'ecc_enable_override'.
(Note that use of the override may cause unknown side effects.)
[ 83.621081] EDAC amd64: Node 0: DRAM ECC disabled.
[ 83.623181] EDAC amd64: ECC disabled in the BIOS or no ECC capability, module will not load.
Either enable ECC checking or force module loading by setting 'ecc_enable_override'.
(Note that use of the override may cause unknown side effects.)
[ 83.664268] Bluetooth: hci0: BCM: chip id 63
[ 83.672040] Bluetooth: hci0: BCM: features 0x07
[ 83.692637] Bluetooth: hci0: BCM20702A
[ 83.694400] Bluetooth: hci0: BCM20702A1 (001.002.014) build 0000
[ 83.729468] Adding 7286780k swap on /dev/mapper/tok--l8--mdaenzer--vg-swap_1. Priority:-2 extents:1 across:7286780k SSFS
[ 83.868026] r8169 0000:01:00.0 eth2: renamed from eth0
[ 84.241011] EXT4-fs (sda2): mounting ext2 file system using the ext4 subsystem
[ 84.266589] EXT4-fs (sda2): mounted filesystem without journal. Opts: (null)
[ 84.280884] input: PS/2 Generic Mouse as /devices/platform/i8042/serio2/input/input19
[ 84.624226] Bluetooth: hci0: BCM20702A1 (001.002.014) build 1180
[ 84.643187] Bluetooth: hci0: Broadcom Bluetooth Device
[ 84.766396] audit: type=1400 audit(1511952561.231:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="firejail-default" pid=624 comm="apparmor_parser"
[ 84.788773] pstore: using zlib compression
[ 85.098377] psmouse serio3: synaptics: queried max coordinates: x [..5708], y [..4660]
[ 85.127410] audit: type=1400 audit(1511952561.591:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/man" pid=625 comm="apparmor_parser"
[ 85.133041] audit: type=1400 audit(1511952561.599:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/man//filter" pid=625 comm="apparmor_parser"
[ 85.136361] audit: type=1400 audit(1511952561.603:5): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/man//groff" pid=625 comm="apparmor_parser"
[ 85.139842] psmouse serio3: synaptics: queried min coordinates: x [1392..], y [1108..]
[ 85.142204] psmouse serio3: synaptics: The touchpad can support a better bus than the too old PS/2 protocol. Make sure MOUSE_PS2_SYNAPTICS_SMBUS and RMI4_SMB are enabled to get a better touchpad experience.
[ 85.168157] audit: type=1400 audit(1511952561.635:6): apparmor="STATUS" operation="profile_load" profile="unconfined" name="virt-aa-helper" pid=640 comm="apparmor_parser"
[ 85.212190] psmouse serio3: synaptics: Touchpad model: 1, fw: 8.1, id: 0x1e2b1, caps: 0xd00123/0x840300/0x26800/0x0, board id: 2767, fw id: 1530451
[ 85.253043] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio3/input/input24
[ 85.781537] pstore: Registered efi as persistent store backend
[ 86.299901] audit: type=1400 audit(1511952562.763:7): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=644 comm="apparmor_parser"
[ 86.302539] audit: type=1400 audit(1511952562.767:8): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cupsd" pid=644 comm="apparmor_parser"
[ 86.305121] audit: type=1400 audit(1511952562.767:9): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cupsd//third_party" pid=644 comm="apparmor_parser"
[ 86.324404] audit: type=1400 audit(1511952562.791:10): apparmor="STATUS" operation="profile_load" profile="unconfined" name="icedove" pid=627 comm="apparmor_parser"
[ 86.327124] audit: type=1400 audit(1511952562.791:11): apparmor="STATUS" operation="profile_load" profile="unconfined" name="icedove//gpg" pid=627 comm="apparmor_parser"
[ 89.904300] kauditd_printk_skb: 10 callbacks suppressed
[ 89.904302] audit: type=1400 audit(1511952566.371:22): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince" pid=626 comm="apparmor_parser"
[ 89.908143] audit: type=1400 audit(1511952566.371:23): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince//sanitized_helper" pid=626 comm="apparmor_parser"
[ 89.910159] audit: type=1400 audit(1511952566.371:24): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-previewer" pid=626 comm="apparmor_parser"
[ 89.912137] audit: type=1400 audit(1511952566.375:25): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-previewer//sanitized_helper" pid=626 comm="apparmor_parser"
[ 89.913928] audit: type=1400 audit(1511952566.375:26): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-thumbnailer" pid=626 comm="apparmor_parser"
[ 89.915861] audit: type=1400 audit(1511952566.375:27): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-thumbnailer//sanitized_helper" pid=626 comm="apparmor_parser"
[ 90.092369] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[ 90.092371] Bluetooth: BNEP filters: protocol multicast
[ 90.092380] Bluetooth: BNEP socket layer initialized
[ 229.392052] RPC: Registered named UNIX socket transport module.
[ 229.394240] RPC: Registered udp transport module.
[ 229.396582] RPC: Registered tcp transport module.
[ 229.398956] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 229.596414] radeon_dp_aux_transfer_native: 368 callbacks suppressed
[ 230.132487] rfkill: input handler disabled
[ 231.420194] ip6_tables: (C) 2000-2006 Netfilter Core Team
[ 231.573991] Ebtables v2.0 registered
[ 232.091437] nf_conntrack version 0.5.0 (65536 buckets, 262144 max)
[ 232.168163] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready
[ 232.246018] r8169 0000:01:00.0 eth2: link down
[ 232.246336] r8169 0000:01:00.0 eth2: link down
[ 232.254552] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready
[ 232.770327] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[ 233.068803] Netfilter messages via NETLINK v0.30.
[ 233.078096] ip_set: protocol 6
[ 235.727612] r8169 0000:01:00.0 eth2: link up
[ 235.731366] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
[ 236.736310] nf_conntrack: default automatic helper assignment has been turned off for security reasons and CT-based firewall rule not found. Use the iptables CT target to attach helpers instead.
[ 238.161453] virbr0: port 1(virbr0-nic) entered blocking state
[ 238.161463] virbr0: port 1(virbr0-nic) entered disabled state
[ 238.161635] device virbr0-nic entered promiscuous mode
[ 238.455563] virbr0: port 1(virbr0-nic) entered blocking state
[ 238.455586] virbr0: port 1(virbr0-nic) entered listening state
[ 238.579944] virbr0: port 1(virbr0-nic) entered disabled state
[ 239.335993] radeon_dp_aux_transfer_native: 116 callbacks suppressed
[ 241.182343] Bluetooth: RFCOMM TTY layer initialized
[ 241.182364] Bluetooth: RFCOMM socket layer initialized
[ 241.182385] Bluetooth: RFCOMM ver 1.11
[ 257.566231] radeon_dp_aux_transfer_native: 116 callbacks suppressed
[ 267.136883] radeon_dp_aux_transfer_native: 368 callbacks suppressed
[ 278.332235] radeon 0000:00:01.0: ring 4 stalled for more than 10176msec
[ 278.332324] radeon 0000:00:01.0: GPU lockup (current fence id 0x00000000000002c8 last fence id 0x00000000000002cc on ring 4)
[ 278.371494] radeon 0000:00:01.0: Saved 403 dwords of commands on ring 0.
[ 278.371577] radeon 0000:00:01.0: GPU softreset: 0x00000009
[ 278.371588] radeon 0000:00:01.0: GRBM_STATUS=0xF4403028
[ 278.371597] radeon 0000:00:01.0: GRBM_STATUS2=0x52000008
[ 278.371606] radeon 0000:00:01.0: GRBM_STATUS_SE0=0xC8000006
[ 278.371615] radeon 0000:00:01.0: GRBM_STATUS_SE1=0x00000006
[ 278.371623] radeon 0000:00:01.0: GRBM_STATUS_SE2=0x00000006
[ 278.371631] radeon 0000:00:01.0: GRBM_STATUS_SE3=0x00000006
[ 278.371639] radeon 0000:00:01.0: SRBM_STATUS=0x20000040
[ 278.371647] radeon 0000:00:01.0: SRBM_STATUS2=0x00000200
[ 278.371656] radeon 0000:00:01.0: SDMA0_STATUS_REG = 0x46CEE557
[ 278.371665] radeon 0000:00:01.0: SDMA1_STATUS_REG = 0x46CEE557
[ 278.371673] radeon 0000:00:01.0: CP_STAT = 0x84a28600
[ 278.371681] radeon 0000:00:01.0: CP_STALLED_STAT1 = 0x00000c00
[ 278.371689] radeon 0000:00:01.0: CP_STALLED_STAT2 = 0x40000000
[ 278.371697] radeon 0000:00:01.0: CP_STALLED_STAT3 = 0x00000400
[ 278.371705] radeon 0000:00:01.0: CP_CPF_BUSY_STAT = 0x00000006
[ 278.371714] radeon 0000:00:01.0: CP_CPF_STALLED_STAT1 = 0x00000003
[ 278.371722] radeon 0000:00:01.0: CP_CPF_STATUS = 0x80000063
[ 278.371730] radeon 0000:00:01.0: CP_CPC_BUSY_STAT = 0x00000000
[ 278.371738] radeon 0000:00:01.0: CP_CPC_STALLED_STAT1 = 0x00000000
[ 278.371746] radeon 0000:00:01.0: CP_CPC_STATUS = 0x00000000
[ 278.371754] radeon 0000:00:01.0: VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x00000000
[ 278.371763] radeon 0000:00:01.0: VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x00000000
[ 278.408215] radeon 0000:00:01.0: GRBM_SOFT_RESET=0x00010001
[ 278.408284] radeon 0000:00:01.0: SRBM_SOFT_RESET=0x00000100
[ 278.409439] radeon 0000:00:01.0: GRBM_STATUS=0x00003028
[ 278.409448] radeon 0000:00:01.0: GRBM_STATUS2=0x00000008
[ 278.409457] radeon 0000:00:01.0: GRBM_STATUS_SE0=0x00000006
[ 278.409466] radeon 0000:00:01.0: GRBM_STATUS_SE1=0x00000006
[ 278.409474] radeon 0000:00:01.0: GRBM_STATUS_SE2=0x00000006
[ 278.409483] radeon 0000:00:01.0: GRBM_STATUS_SE3=0x00000006
[ 278.409491] radeon 0000:00:01.0: SRBM_STATUS=0x20000040
[ 278.409499] radeon 0000:00:01.0: SRBM_STATUS2=0x00000200
[ 278.409508] radeon 0000:00:01.0: SDMA0_STATUS_REG = 0x46CEE557
[ 278.409517] radeon 0000:00:01.0: SDMA1_STATUS_REG = 0x46CEE557
[ 278.409525] radeon 0000:00:01.0: CP_STAT = 0x00000000
[ 278.409534] radeon 0000:00:01.0: CP_STALLED_STAT1 = 0x00000000
[ 278.409542] radeon 0000:00:01.0: CP_STALLED_STAT2 = 0x00000000
[ 278.409550] radeon 0000:00:01.0: CP_STALLED_STAT3 = 0x00000000
[ 278.409558] radeon 0000:00:01.0: CP_CPF_BUSY_STAT = 0x00000000
[ 278.409566] radeon 0000:00:01.0: CP_CPF_STALLED_STAT1 = 0x00000000
[ 278.409574] radeon 0000:00:01.0: CP_CPF_STATUS = 0x00000000
[ 278.409583] radeon 0000:00:01.0: CP_CPC_BUSY_STAT = 0x00000000
[ 278.409591] radeon 0000:00:01.0: CP_CPC_STALLED_STAT1 = 0x00000000
[ 278.409599] radeon 0000:00:01.0: CP_CPC_STATUS = 0x00000000
[ 278.409620] radeon 0000:00:01.0: GPU reset succeeded, trying to resume
[ 278.438333] [drm] PCIE GART of 2048M enabled (table at 0x000000000030E000).
[ 278.438790] radeon 0000:00:01.0: WB enabled
[ 278.438861] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000040000c00 and cpu addr 0xffff9fbf6cd3ec00
[ 278.438873] radeon 0000:00:01.0: fence driver on ring 1 use gpu addr 0x0000000040000c04 and cpu addr 0xffff9fbf6cd3ec04
[ 278.438883] radeon 0000:00:01.0: fence driver on ring 2 use gpu addr 0x0000000040000c08 and cpu addr 0xffff9fbf6cd3ec08
[ 278.438893] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000040000c0c and cpu addr 0xffff9fbf6cd3ec0c
[ 278.438903] radeon 0000:00:01.0: fence driver on ring 4 use gpu addr 0x0000000040000c10 and cpu addr 0xffff9fbf6cd3ec10
[ 278.439510] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000078d30 and cpu addr 0xffffbd8dc2038d30
[ 278.439777] radeon 0000:00:01.0: fence driver on ring 6 use gpu addr 0x0000000040000c18 and cpu addr 0xffff9fbf6cd3ec18
[ 278.439787] radeon 0000:00:01.0: fence driver on ring 7 use gpu addr 0x0000000040000c1c and cpu addr 0xffff9fbf6cd3ec1c
[ 278.441602] [drm] ring test on 0 succeeded in 3 usecs
[ 278.441709] [drm] ring test on 1 succeeded in 2 usecs
[ 278.441731] [drm] ring test on 2 succeeded in 2 usecs
[ 278.441922] [drm] ring test on 3 succeeded in 4 usecs
[ 278.441936] [drm] ring test on 4 succeeded in 3 usecs
[ 278.487682] [drm] ring test on 5 succeeded in 1 usecs
[ 278.487712] [drm] UVD initialized successfully.
[ 278.588773] [drm] ring test on 6 succeeded in 849 usecs
[ 278.588792] [drm] ring test on 7 succeeded in 3 usecs
[ 278.588797] [drm] VCE initialized successfully.
[ 278.920120] radeon_dp_aux_transfer_native: 116 callbacks suppressed
[ 280.049967] [drm:radeon_dp_link_train [radeon]] *ERROR* displayport link status failed
[ 280.050125] [drm:radeon_dp_link_train [radeon]] *ERROR* clock recovery failed
[ 281.115974] [drm:cik_ib_test [radeon]] *ERROR* radeon: fence wait timed out.
[ 281.116053] [drm:radeon_ib_ring_tests [radeon]] *ERROR* radeon: failed testing IB on GFX ring (-110).
[ 281.153515] radeon 0000:00:01.0: GPU softreset: 0x00000008
[ 281.153529] radeon 0000:00:01.0: GRBM_STATUS=0xA0003028
[ 281.153538] radeon 0000:00:01.0: GRBM_STATUS2=0x50000008
[ 281.153547] radeon 0000:00:01.0: GRBM_STATUS_SE0=0x00000006
[ 281.153556] radeon 0000:00:01.0: GRBM_STATUS_SE1=0x00000006
[ 281.153564] radeon 0000:00:01.0: GRBM_STATUS_SE2=0x00000006
[ 281.153573] radeon 0000:00:01.0: GRBM_STATUS_SE3=0x00000006
[ 281.153581] radeon 0000:00:01.0: SRBM_STATUS=0x20000A40
[ 281.153589] radeon 0000:00:01.0: SRBM_STATUS2=0x00000200
[ 281.153598] radeon 0000:00:01.0: SDMA0_STATUS_REG = 0x46CEE557
[ 281.153606] radeon 0000:00:01.0: SDMA1_STATUS_REG = 0x46CEE557
[ 281.153615] radeon 0000:00:01.0: CP_STAT = 0x80018200
[ 281.153623] radeon 0000:00:01.0: CP_STALLED_STAT1 = 0x00000c00
[ 281.153631] radeon 0000:00:01.0: CP_STALLED_STAT2 = 0x00010000
[ 281.153640] radeon 0000:00:01.0: CP_STALLED_STAT3 = 0x00000000
[ 281.153648] radeon 0000:00:01.0: CP_CPF_BUSY_STAT = 0x00000002
[ 281.153656] radeon 0000:00:01.0: CP_CPF_STALLED_STAT1 = 0x00000001
[ 281.153664] radeon 0000:00:01.0: CP_CPF_STATUS = 0x80000023
[ 281.153672] radeon 0000:00:01.0: CP_CPC_BUSY_STAT = 0x00000000
[ 281.153681] radeon 0000:00:01.0: CP_CPC_STALLED_STAT1 = 0x00000000
[ 281.153689] radeon 0000:00:01.0: CP_CPC_STATUS = 0x00000000
[ 281.153697] radeon 0000:00:01.0: VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x00000000
[ 281.153705] radeon 0000:00:01.0: VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x00000000
[ 281.187985] radeon 0000:00:01.0: GRBM_SOFT_RESET=0x00010001
[ 281.188054] radeon 0000:00:01.0: SRBM_SOFT_RESET=0x00000100
[ 281.189209] radeon 0000:00:01.0: GRBM_STATUS=0x00003028
[ 281.189218] radeon 0000:00:01.0: GRBM_STATUS2=0x00000008
[ 281.189228] radeon 0000:00:01.0: GRBM_STATUS_SE0=0x00000006
[ 281.189236] radeon 0000:00:01.0: GRBM_STATUS_SE1=0x00000006
[ 281.189244] radeon 0000:00:01.0: GRBM_STATUS_SE2=0x00000006
[ 281.189253] radeon 0000:00:01.0: GRBM_STATUS_SE3=0x00000006
[ 281.189261] radeon 0000:00:01.0: SRBM_STATUS=0x20000040
[ 281.189269] radeon 0000:00:01.0: SRBM_STATUS2=0x00000200
[ 281.189279] radeon 0000:00:01.0: SDMA0_STATUS_REG = 0x46CEE557
[ 281.189287] radeon 0000:00:01.0: SDMA1_STATUS_REG = 0x46CEE557
[ 281.189295] radeon 0000:00:01.0: CP_STAT = 0x00000000
[ 281.189304] radeon 0000:00:01.0: CP_STALLED_STAT1 = 0x00000000
[ 281.189312] radeon 0000:00:01.0: CP_STALLED_STAT2 = 0x00000000
[ 281.189320] radeon 0000:00:01.0: CP_STALLED_STAT3 = 0x00000000
[ 281.189328] radeon 0000:00:01.0: CP_CPF_BUSY_STAT = 0x00000000
[ 281.189336] radeon 0000:00:01.0: CP_CPF_STALLED_STAT1 = 0x00000000
[ 281.189344] radeon 0000:00:01.0: CP_CPF_STATUS = 0x00000000
[ 281.189353] radeon 0000:00:01.0: CP_CPC_BUSY_STAT = 0x00000000
[ 281.189361] radeon 0000:00:01.0: CP_CPC_STALLED_STAT1 = 0x00000000
[ 281.189369] radeon 0000:00:01.0: CP_CPC_STATUS = 0x00000000
[ 281.189390] radeon 0000:00:01.0: GPU reset succeeded, trying to resume
[ 281.218495] [drm] PCIE GART of 2048M enabled (table at 0x000000000030E000).
[ 281.218951] radeon 0000:00:01.0: WB enabled
[ 281.219021] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000040000c00 and cpu addr 0xffff9fbf6cd3ec00
[ 281.219033] radeon 0000:00:01.0: fence driver on ring 1 use gpu addr 0x0000000040000c04 and cpu addr 0xffff9fbf6cd3ec04
[ 281.219043] radeon 0000:00:01.0: fence driver on ring 2 use gpu addr 0x0000000040000c08 and cpu addr 0xffff9fbf6cd3ec08
[ 281.219053] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000040000c0c and cpu addr 0xffff9fbf6cd3ec0c
[ 281.219062] radeon 0000:00:01.0: fence driver on ring 4 use gpu addr 0x0000000040000c10 and cpu addr 0xffff9fbf6cd3ec10
[ 281.219763] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000078d30 and cpu addr 0xffffbd8dc2038d30
[ 281.220044] radeon 0000:00:01.0: fence driver on ring 6 use gpu addr 0x0000000040000c18 and cpu addr 0xffff9fbf6cd3ec18
[ 281.220056] radeon 0000:00:01.0: fence driver on ring 7 use gpu addr 0x0000000040000c1c and cpu addr 0xffff9fbf6cd3ec1c
[ 281.221666] [drm] ring test on 0 succeeded in 3 usecs
[ 281.221749] [drm] ring test on 1 succeeded in 2 usecs
[ 281.221770] [drm] ring test on 2 succeeded in 2 usecs
[ 281.221961] [drm] ring test on 3 succeeded in 4 usecs
[ 281.221976] [drm] ring test on 4 succeeded in 4 usecs
[ 281.247831] [drm] ring test on 5 succeeded in 1 usecs
[ 281.257794] [drm] UVD initialized successfully.
[ 281.358842] [drm] ring test on 6 succeeded in 872 usecs
[ 281.358861] [drm] ring test on 7 succeeded in 4 usecs
[ 281.358865] [drm] VCE initialized successfully.
[ 282.758769] [drm:radeon_dp_link_train [radeon]] *ERROR* displayport link status failed
[ 282.758841] [drm:radeon_dp_link_train [radeon]] *ERROR* clock recovery failed
[ 282.813479] [drm] ib test on ring 0 succeeded in 0 usecs
[ 282.813953] [drm] ib test on ring 1 succeeded in 0 usecs
[ 282.814020] [drm] ib test on ring 2 succeeded in 0 usecs
[ 282.814267] [drm] ib test on ring 3 succeeded in 0 usecs
[ 282.814369] [drm] ib test on ring 4 succeeded in 0 usecs
[ 283.871656] [drm:uvd_v1_0_ib_test [radeon]] *ERROR* radeon: fence wait timed out.
[ 283.891649] [drm:radeon_ib_ring_tests [radeon]] *ERROR* radeon: failed testing IB on ring 5 (-110).
[ 283.892570] [drm] ib test on ring 6 succeeded
[ 283.893346] [drm] ib test on ring 7 succeeded
[-- Attachment #3: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <b0c7cee5-63ec-ce4a-0641-8952b5a976da-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-11-29 12:31 ` Oded Gabbay
[not found] ` <CAFCwf11B--z9OrUj0pwU4MwmnvtjtpJPjFceKjmoBZrOPYqTJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Oded Gabbay @ 2017-11-29 12:31 UTC (permalink / raw)
To: Michel Dänzer
Cc: Christian König, Christian König, amd-gfx list
On Wed, Nov 29, 2017 at 1:16 PM, Michel Dänzer <michel@daenzer.net> wrote:
> On 2017-11-01 09:31 AM, Oded Gabbay wrote:
>> ok, taken to -next.
>
> This change broke the radeon driver on my Kaveri laptop. The gdm login
> screen works, but logging into the GNOME on Xorg session quickly results
> in a GPU hang and associated badness, see the attached dmesg.
>
> Reverting this change on top of drm-next makes it work again.
>
> On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
> reduce number of free VMIDs and pipes in KV") and 28b57b856b63
> ("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
>
> Any ideas for what else is missing?
>
> Note that the amdkfd driver isn't actually active anyway, because I'm
> disabling the IOMMU. Is it possible that it's still doing or triggering
> some needed HW setup before it bails in that case?
>
>
> P.S. Assuming we can fix this without reverting, maybe we could also
> remove rdev->grbm_idx_mutex again?
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
Hi Michel,
Even without IOMMU, amdkfd will initialize the module and internal
structures per device, up to the point where it tries to register a
callback with the iommu driver.
If IOMMU is disabled, it will fail then with the following error
message (in dmesg): "error getting iommu info. is the iommu enabled?"
Having said that, it doesn't initialize anything in the device H/W
itself, so I find this very weird.
I looked at the patch itself again and I don't see anything suspicious.
I'll try to resurrect my Kaveri machine to check this, but it will
take some time.
Oded
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <CAFCwf11B--z9OrUj0pwU4MwmnvtjtpJPjFceKjmoBZrOPYqTJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-11-29 14:40 ` Oded Gabbay
[not found] ` <CAFCwf11qVn-b5RHs9R1JhhWUf5UHyYfH1A3zAQHb3vaTpYY5Tw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 14:40 ` Christian König
1 sibling, 1 reply; 11+ messages in thread
From: Oded Gabbay @ 2017-11-29 14:40 UTC (permalink / raw)
To: Michel Dänzer
Cc: Christian König, Christian König, amd-gfx list
On Wed, Nov 29, 2017 at 2:31 PM, Oded Gabbay <oded.gabbay@gmail.com> wrote:
> On Wed, Nov 29, 2017 at 1:16 PM, Michel Dänzer <michel@daenzer.net> wrote:
>> On 2017-11-01 09:31 AM, Oded Gabbay wrote:
>>> ok, taken to -next.
>>
>> This change broke the radeon driver on my Kaveri laptop. The gdm login
>> screen works, but logging into the GNOME on Xorg session quickly results
>> in a GPU hang and associated badness, see the attached dmesg.
>>
>> Reverting this change on top of drm-next makes it work again.
>>
>> On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
>> reduce number of free VMIDs and pipes in KV") and 28b57b856b63
>> ("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
>>
>> Any ideas for what else is missing?
>>
>> Note that the amdkfd driver isn't actually active anyway, because I'm
>> disabling the IOMMU. Is it possible that it's still doing or triggering
>> some needed HW setup before it bails in that case?
>>
>>
>> P.S. Assuming we can fix this without reverting, maybe we could also
>> remove rdev->grbm_idx_mutex again?
>>
>> --
>> Earthling Michel Dänzer | http://www.amd.com
>> Libre software enthusiast | Mesa and X developer
>
> Hi Michel,
> Even without IOMMU, amdkfd will initialize the module and internal
> structures per device, up to the point where it tries to register a
> callback with the iommu driver.
> If IOMMU is disabled, it will fail then with the following error
> message (in dmesg): "error getting iommu info. is the iommu enabled?"
>
> Having said that, it doesn't initialize anything in the device H/W
> itself, so I find this very weird.
>
> I looked at the patch itself again and I don't see anything suspicious.
>
> I'll try to resurrect my Kaveri machine to check this, but it will
> take some time.
>
> Oded
Any chance that the increase of VMIDs from 8 to 16 somehow (although I
don't know how) caused this problem ?
The desktop gui also didn't work for me, but when I changed the VMID
number back to 8 (in cik.c) the gui worked again.
Michel, could you try this as well ?
Thanks,
Oded
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <CAFCwf11B--z9OrUj0pwU4MwmnvtjtpJPjFceKjmoBZrOPYqTJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 14:40 ` Oded Gabbay
@ 2017-11-29 14:40 ` Christian König
1 sibling, 0 replies; 11+ messages in thread
From: Christian König @ 2017-11-29 14:40 UTC (permalink / raw)
To: Oded Gabbay, Michel Dänzer; +Cc: Christian König, amd-gfx list
Am 29.11.2017 um 13:31 schrieb Oded Gabbay:
> On Wed, Nov 29, 2017 at 1:16 PM, Michel Dänzer <michel@daenzer.net> wrote:
>> On 2017-11-01 09:31 AM, Oded Gabbay wrote:
>>> ok, taken to -next.
>> This change broke the radeon driver on my Kaveri laptop. The gdm login
>> screen works, but logging into the GNOME on Xorg session quickly results
>> in a GPU hang and associated badness, see the attached dmesg.
>>
>> Reverting this change on top of drm-next makes it work again.
>>
>> On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
>> reduce number of free VMIDs and pipes in KV") and 28b57b856b63
>> ("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
>>
>> Any ideas for what else is missing?
>>
>> Note that the amdkfd driver isn't actually active anyway, because I'm
>> disabling the IOMMU. Is it possible that it's still doing or triggering
>> some needed HW setup before it bails in that case?
>>
>>
>> P.S. Assuming we can fix this without reverting, maybe we could also
>> remove rdev->grbm_idx_mutex again?
>>
>> --
>> Earthling Michel Dänzer | http://www.amd.com
>> Libre software enthusiast | Mesa and X developer
> Hi Michel,
> Even without IOMMU, amdkfd will initialize the module and internal
> structures per device, up to the point where it tries to register a
> callback with the iommu driver.
> If IOMMU is disabled, it will fail then with the following error
> message (in dmesg): "error getting iommu info. is the iommu enabled?"
>
> Having said that, it doesn't initialize anything in the device H/W
> itself, so I find this very weird.
>
> I looked at the patch itself again and I don't see anything suspicious.
>
> I'll try to resurrect my Kaveri machine to check this, but it will
> take some time.
My best guess is that there is something broken with the VMID handling
on Radeon.
I have a Kaveri running amdgpu as one of my test systems here and
switching to radeon for a test should be trivial.
Going to give that a try later today if I have time.
Christian.
>
> Oded
_______________________________________________
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <CAFCwf11qVn-b5RHs9R1JhhWUf5UHyYfH1A3zAQHb3vaTpYY5Tw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-11-29 14:42 ` Christian König
2017-11-29 14:54 ` Michel Dänzer
1 sibling, 0 replies; 11+ messages in thread
From: Christian König @ 2017-11-29 14:42 UTC (permalink / raw)
To: Oded Gabbay, Michel Dänzer; +Cc: Christian König, amd-gfx list
Am 29.11.2017 um 15:40 schrieb Oded Gabbay:
> On Wed, Nov 29, 2017 at 2:31 PM, Oded Gabbay <oded.gabbay@gmail.com> wrote:
>> On Wed, Nov 29, 2017 at 1:16 PM, Michel Dänzer <michel@daenzer.net> wrote:
>>> On 2017-11-01 09:31 AM, Oded Gabbay wrote:
>>>> ok, taken to -next.
>>> This change broke the radeon driver on my Kaveri laptop. The gdm login
>>> screen works, but logging into the GNOME on Xorg session quickly results
>>> in a GPU hang and associated badness, see the attached dmesg.
>>>
>>> Reverting this change on top of drm-next makes it work again.
>>>
>>> On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
>>> reduce number of free VMIDs and pipes in KV") and 28b57b856b63
>>> ("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
>>>
>>> Any ideas for what else is missing?
>>>
>>> Note that the amdkfd driver isn't actually active anyway, because I'm
>>> disabling the IOMMU. Is it possible that it's still doing or triggering
>>> some needed HW setup before it bails in that case?
>>>
>>>
>>> P.S. Assuming we can fix this without reverting, maybe we could also
>>> remove rdev->grbm_idx_mutex again?
>>>
>>> --
>>> Earthling Michel Dänzer | http://www.amd.com
>>> Libre software enthusiast | Mesa and X developer
>> Hi Michel,
>> Even without IOMMU, amdkfd will initialize the module and internal
>> structures per device, up to the point where it tries to register a
>> callback with the iommu driver.
>> If IOMMU is disabled, it will fail then with the following error
>> message (in dmesg): "error getting iommu info. is the iommu enabled?"
>>
>> Having said that, it doesn't initialize anything in the device H/W
>> itself, so I find this very weird.
>>
>> I looked at the patch itself again and I don't see anything suspicious.
>>
>> I'll try to resurrect my Kaveri machine to check this, but it will
>> take some time.
>>
>> Oded
> Any chance that the increase of VMIDs from 8 to 16 somehow (although I
> don't know how) caused this problem ?
Yeah, that's my first suspicion as well. We haven't used the higher
VMIDs in a while on radeon and so there could be bugs in the code.
> The desktop gui also didn't work for me, but when I changed the VMID
> number back to 8 (in cik.c) the gui worked again.
Good to know, going to test this as well later today.
Regards,
Christian.
>
> Michel, could you try this as well ?
>
> Thanks,
> Oded
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <CAFCwf11qVn-b5RHs9R1JhhWUf5UHyYfH1A3zAQHb3vaTpYY5Tw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 14:42 ` Christian König
@ 2017-11-29 14:54 ` Michel Dänzer
[not found] ` <7f8f1cff-99c6-86fb-7f1a-aa6f05df441e-otUistvHUpPR7s880joybQ@public.gmane.org>
1 sibling, 1 reply; 11+ messages in thread
From: Michel Dänzer @ 2017-11-29 14:54 UTC (permalink / raw)
To: Oded Gabbay; +Cc: Christian König, Christian König, amd-gfx list
On 2017-11-29 03:40 PM, Oded Gabbay wrote:
> On Wed, Nov 29, 2017 at 2:31 PM, Oded Gabbay <oded.gabbay@gmail.com> wrote:
>> On Wed, Nov 29, 2017 at 1:16 PM, Michel Dänzer <michel@daenzer.net> wrote:
>>> On 2017-11-01 09:31 AM, Oded Gabbay wrote:
>>>> ok, taken to -next.
>>>
>>> This change broke the radeon driver on my Kaveri laptop. The gdm login
>>> screen works, but logging into the GNOME on Xorg session quickly results
>>> in a GPU hang and associated badness, see the attached dmesg.
>>>
>>> Reverting this change on top of drm-next makes it work again.
>>>
>>> On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
>>> reduce number of free VMIDs and pipes in KV") and 28b57b856b63
>>> ("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
>>>
>>> Any ideas for what else is missing?
>>>
>>> Note that the amdkfd driver isn't actually active anyway, because I'm
>>> disabling the IOMMU. Is it possible that it's still doing or triggering
>>> some needed HW setup before it bails in that case?
>>>
>>>
>>> P.S. Assuming we can fix this without reverting, maybe we could also
>>> remove rdev->grbm_idx_mutex again?
>>>
>>> --
>>> Earthling Michel Dänzer | http://www.amd.com
>>> Libre software enthusiast | Mesa and X developer
>>
>> Hi Michel,
>> Even without IOMMU, amdkfd will initialize the module and internal
>> structures per device, up to the point where it tries to register a
>> callback with the iommu driver.
>> If IOMMU is disabled, it will fail then with the following error
>> message (in dmesg): "error getting iommu info. is the iommu enabled?"
>>
>> Having said that, it doesn't initialize anything in the device H/W
>> itself, so I find this very weird.
>>
>> I looked at the patch itself again and I don't see anything suspicious.
>>
>> I'll try to resurrect my Kaveri machine to check this, but it will
>> take some time.
>>
>> Oded
>
> Any chance that the increase of VMIDs from 8 to 16 somehow (although I
> don't know how) caused this problem ?
> The desktop gui also didn't work for me, but when I changed the VMID
> number back to 8 (in cik.c) the gui worked again.
>
> Michel, could you try this as well ?
Yeah, that also occurred to me in the meantime, and I can confirm your
findings.
My guess right now is that it's related to cik_pcie_init_compute_vmid.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/radeon: deprecate and remove KFD interface
[not found] ` <7f8f1cff-99c6-86fb-7f1a-aa6f05df441e-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-11-29 15:04 ` Oded Gabbay
0 siblings, 0 replies; 11+ messages in thread
From: Oded Gabbay @ 2017-11-29 15:04 UTC (permalink / raw)
To: Michel Dänzer
Cc: Christian König, Christian König, amd-gfx list
On Wed, Nov 29, 2017 at 4:54 PM, Michel Dänzer <michel@daenzer.net> wrote:
> On 2017-11-29 03:40 PM, Oded Gabbay wrote:
>> On Wed, Nov 29, 2017 at 2:31 PM, Oded Gabbay <oded.gabbay@gmail.com> wrote:
>>> On Wed, Nov 29, 2017 at 1:16 PM, Michel Dänzer <michel@daenzer.net> wrote:
>>>> On 2017-11-01 09:31 AM, Oded Gabbay wrote:
>>>>> ok, taken to -next.
>>>>
>>>> This change broke the radeon driver on my Kaveri laptop. The gdm login
>>>> screen works, but logging into the GNOME on Xorg session quickly results
>>>> in a GPU hang and associated badness, see the attached dmesg.
>>>>
>>>> Reverting this change on top of drm-next makes it work again.
>>>>
>>>> On a hunch, I've tried reverting commits 62a7b7fbd08e ("drm/radeon:
>>>> reduce number of free VMIDs and pipes in KV") and 28b57b856b63
>>>> ("drm/radeon/cik: Don't touch int of pipes 1-7"), but no luck.
>>>>
>>>> Any ideas for what else is missing?
>>>>
>>>> Note that the amdkfd driver isn't actually active anyway, because I'm
>>>> disabling the IOMMU. Is it possible that it's still doing or triggering
>>>> some needed HW setup before it bails in that case?
>>>>
>>>>
>>>> P.S. Assuming we can fix this without reverting, maybe we could also
>>>> remove rdev->grbm_idx_mutex again?
>>>>
>>>> --
>>>> Earthling Michel Dänzer | http://www.amd.com
>>>> Libre software enthusiast | Mesa and X developer
>>>
>>> Hi Michel,
>>> Even without IOMMU, amdkfd will initialize the module and internal
>>> structures per device, up to the point where it tries to register a
>>> callback with the iommu driver.
>>> If IOMMU is disabled, it will fail then with the following error
>>> message (in dmesg): "error getting iommu info. is the iommu enabled?"
>>>
>>> Having said that, it doesn't initialize anything in the device H/W
>>> itself, so I find this very weird.
>>>
>>> I looked at the patch itself again and I don't see anything suspicious.
>>>
>>> I'll try to resurrect my Kaveri machine to check this, but it will
>>> take some time.
>>>
>>> Oded
>>
>> Any chance that the increase of VMIDs from 8 to 16 somehow (although I
>> don't know how) caused this problem ?
>> The desktop gui also didn't work for me, but when I changed the VMID
>> number back to 8 (in cik.c) the gui worked again.
>>
>> Michel, could you try this as well ?
>
> Yeah, that also occurred to me in the meantime, and I can confirm your
> findings.
>
> My guess right now is that it's related to cik_pcie_init_compute_vmid.
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
Yeah, that seems reasonable.
That initialization was part of kfd but then we moved it to radeon.
Now it collides with radeon's initialization.
I removed it completely and returned the number of VMIDs to 16 and the
GUI is working.
I'll send a patch.
Oded
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2017-11-29 15:04 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-10-30 13:16 [PATCH] drm/radeon: deprecate and remove KFD interface Christian König
[not found] ` <1509369381-16062-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-10-31 10:44 ` Oded Gabbay
[not found] ` <CAFCwf10G5014KcMG+_Zz9_RaUh+JH8cMdgHD_accH40ZciFydw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-31 14:56 ` Christian König
[not found] ` <56f7a613-7815-6916-2739-a9cb935a2018-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-11-01 8:31 ` Oded Gabbay
[not found] ` <CAFCwf11GZkKNEnR=_+NZcDxoujAXcj4GJ=JLNzNfShJBx97vDg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 11:16 ` Michel Dänzer
[not found] ` <b0c7cee5-63ec-ce4a-0641-8952b5a976da-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-11-29 12:31 ` Oded Gabbay
[not found] ` <CAFCwf11B--z9OrUj0pwU4MwmnvtjtpJPjFceKjmoBZrOPYqTJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 14:40 ` Oded Gabbay
[not found] ` <CAFCwf11qVn-b5RHs9R1JhhWUf5UHyYfH1A3zAQHb3vaTpYY5Tw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 14:42 ` Christian König
2017-11-29 14:54 ` Michel Dänzer
[not found] ` <7f8f1cff-99c6-86fb-7f1a-aa6f05df441e-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-11-29 15:04 ` Oded Gabbay
2017-11-29 14:40 ` Christian König
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