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From: Peter Maydell <peter.maydell@linaro.org>
To: Greg Bellows <greg.bellows@linaro.org>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Andrew Jones" <drjones@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Patch Tracking" <patches@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags
Date: Wed, 28 Jan 2015 22:34:30 +0000	[thread overview]
Message-ID: <CAFEAcA-4e8U=k5-dF785VDdidF_aaMFSUpDvDtsy6CfsLuA+NQ@mail.gmail.com> (raw)
In-Reply-To: <CAOgzsHUBoSRND_iOj2w8QozvgVWOP9ut81+_htEi+KCh2hgH5g@mail.gmail.com>

On 28 January 2015 at 21:57, Greg Bellows <greg.bellows@linaro.org> wrote:
> After getting through patch 9, I wonder if the TB NS bit can also be removed
> as it is implied in the MMU index.

No, because for a 32-bit EL3 we are always running under a Secure
translation regime (S1E3) but the TBFLAG_NS bit may be either 0 or
1 depending on the value of the SCR.NS bit.

-- PMM

  reply	other threads:[~2015-01-28 22:34 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-23 18:20 [Qemu-devel] [PATCH 00/11] target-arm: handle mmu_idx/translation regimes properly Peter Maydell
2015-01-23 18:20 ` [Qemu-devel] [PATCH 01/11] cpu_ldst.h: Allow NB_MMU_MODES to be 7 Peter Maydell
2015-01-23 20:16   ` Greg Bellows
2015-01-24  1:05     ` Peter Maydell
2015-01-23 20:33   ` Paolo Bonzini
2015-01-23 18:20 ` [Qemu-devel] [PATCH 02/11] target-arm: Make arm_current_el() return sensible values for M profile Peter Maydell
2015-01-23 21:38   ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 03/11] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT Peter Maydell
2015-01-23 20:58   ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags Peter Maydell
2015-01-23 21:44   ` Greg Bellows
2015-01-24  1:12     ` Peter Maydell
2015-01-24 16:36       ` Greg Bellows
2015-01-24 19:31         ` Peter Maydell
2015-01-26 11:29           ` Peter Maydell
2015-01-27 19:30   ` Peter Maydell
2015-01-28 21:57   ` Greg Bellows
2015-01-28 22:34     ` Peter Maydell [this message]
2015-01-29 15:20       ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 05/11] target-arm: Use correct mmu_idx for unprivileged loads and stores Peter Maydell
2015-01-26 14:40   ` Greg Bellows
2015-01-26 14:56     ` Peter Maydell
2015-01-26 19:34       ` Greg Bellows
2015-01-26 20:37         ` Peter Maydell
2015-01-26 22:01           ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 06/11] target-arm: Don't define any MMU_MODE*_SUFFIXes Peter Maydell
2015-01-26 20:16   ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 07/11] target-arm: Split AArch64 cases out of ats_write() Peter Maydell
2015-01-26 20:30   ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 08/11] target-arm: Pass mmu_idx to get_phys_addr() Peter Maydell
2015-01-26 21:41   ` Greg Bellows
2015-01-26 21:55     ` Peter Maydell
2015-01-23 18:20 ` [Qemu-devel] [PATCH 09/11] target-arm: Use mmu_idx in get_phys_addr() Peter Maydell
2015-01-27 17:57   ` Greg Bellows
2015-01-27 18:12     ` Peter Maydell
2015-01-27 19:49       ` Greg Bellows
2015-01-27 19:59         ` Peter Maydell
2015-01-28 21:37   ` Greg Bellows
2015-01-28 22:30     ` Peter Maydell
2015-01-29 15:19       ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 10/11] target-arm: Reindent ancient page-table-walk code Peter Maydell
2015-01-26 22:53   ` Greg Bellows
2015-01-23 18:20 ` [Qemu-devel] [PATCH 11/11] target-arm: Fix brace style in reindented code Peter Maydell
2015-01-26 22:56   ` Greg Bellows

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