* [PULL v2 00/29] target-arm queue
@ 2020-10-20 20:11 Peter Maydell
2020-10-21 10:08 ` Peter Maydell
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2020-10-20 20:11 UTC (permalink / raw)
To: qemu-devel
v2: dropped linux-user bti series.
The following changes since commit 4c41341af76cfc85b5a6c0f87de4838672ab9f89:
Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20201020' into staging (2020-10-20 11:20:36 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201020-1
for you to fetch changes up to 8128c8e8cc9489a8387c74075974f86dc0222e7f:
target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension (2020-10-20 16:12:01 +0100)
----------------------------------------------------------------
target-arm queue:
* Fix AArch32 SMLAD incorrect setting of Q bit
* AArch32 VCVT fixed-point to float is always round-to-nearest
* strongarm: Fix 'time to transmit a char' unit comment
* Restrict APEI tables generation to the 'virt' machine
* bcm2835: minor code cleanups
* bcm2835: connect all IRQs from SYS_timer device
* correctly flush TLBs when TBI is enabled
* tests/qtest: Add npcm7xx timer test
* loads-stores.rst: add footnote that clarifies GETPC usage
* Fix reported EL for mte_check_fail
* Ignore HCR_EL2.ATA when {E2H,TGE} != 11
* microbit_i2c: Fix coredump when dump-vmstate
* nseries: Fix loading kernel image on n8x0 machines
* Implement v8.1M low-overhead-loops
----------------------------------------------------------------
Emanuele Giuseppe Esposito (1):
loads-stores.rst: add footnote that clarifies GETPC usage
Havard Skinnemoen (1):
tests/qtest: Add npcm7xx timer test
Peng Liang (1):
microbit_i2c: Fix coredump when dump-vmstate
Peter Maydell (12):
target/arm: Fix SMLAD incorrect setting of Q bit
target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest
decodetree: Fix codegen for non-overlapping group inside overlapping group
target/arm: Implement v8.1M NOCP handling
target/arm: Implement v8.1M conditional-select insns
target/arm: Make the t32 insn[25:23]=111 group non-overlapping
target/arm: Don't allow BLX imm for M-profile
target/arm: Implement v8.1M branch-future insns (as NOPs)
target/arm: Implement v8.1M low-overhead-loop instructions
target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile
target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16
target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension
Philippe Mathieu-Daudé (9):
hw/arm/strongarm: Fix 'time to transmit a char' unit comment
hw/arm: Restrict APEI tables generation to the 'virt' machine
hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition
hw/timer/bcm2835: Rename variable holding CTRL_STATUS register
hw/timer/bcm2835: Support the timer COMPARE registers
hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs
hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers
hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers
hw/arm/nseries: Fix loading kernel image on n8x0 machines
Richard Henderson (5):
accel/tcg: Add tlb_flush_page_bits_by_mmuidx*
target/arm: Use tlb_flush_page_bits_by_mmuidx*
target/arm: Remove redundant mmu_idx lookup
target/arm: Fix reported EL for mte_check_fail
target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11
docs/devel/loads-stores.rst | 8 +-
default-configs/devices/arm-softmmu.mak | 1 -
include/exec/exec-all.h | 36 ++
include/hw/timer/bcm2835_systmr.h | 17 +-
target/arm/cpu.h | 8 +
target/arm/helper.h | 13 +
target/arm/internals.h | 9 +-
target/arm/m-nocp.decode | 10 +-
target/arm/t32.decode | 50 ++-
accel/tcg/cputlb.c | 275 +++++++++++++++-
hw/arm/bcm2835_peripherals.c | 13 +-
hw/arm/nseries.c | 1 +
hw/arm/strongarm.c | 2 +-
hw/i2c/microbit_i2c.c | 1 +
hw/intc/bcm2835_ic.c | 4 +-
hw/intc/bcm2836_control.c | 8 +-
hw/timer/bcm2835_systmr.c | 57 ++--
target/arm/cpu.c | 38 ++-
target/arm/helper.c | 55 +++-
target/arm/mte_helper.c | 13 +-
target/arm/translate.c | 239 +++++++++++++-
target/arm/vfp_helper.c | 76 +++--
tests/qtest/npcm7xx_timer-test.c | 562 ++++++++++++++++++++++++++++++++
hw/arm/Kconfig | 1 +
hw/intc/trace-events | 4 +
hw/timer/trace-events | 6 +-
scripts/decodetree.py | 2 +-
target/arm/translate-vfp.c.inc | 41 ++-
tests/qtest/meson.build | 1 +
29 files changed, 1404 insertions(+), 147 deletions(-)
create mode 100644 tests/qtest/npcm7xx_timer-test.c
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/29] target-arm queue
2020-10-20 20:11 [PULL v2 00/29] target-arm queue Peter Maydell
@ 2020-10-21 10:08 ` Peter Maydell
0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2020-10-21 10:08 UTC (permalink / raw)
To: QEMU Developers
On Tue, 20 Oct 2020 at 21:11, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> v2: dropped linux-user bti series.
>
> The following changes since commit 4c41341af76cfc85b5a6c0f87de4838672ab9f89:
>
> Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20201020' into staging (2020-10-20 11:20:36 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201020-1
>
> for you to fetch changes up to 8128c8e8cc9489a8387c74075974f86dc0222e7f:
>
> target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension (2020-10-20 16:12:01 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Fix AArch32 SMLAD incorrect setting of Q bit
> * AArch32 VCVT fixed-point to float is always round-to-nearest
> * strongarm: Fix 'time to transmit a char' unit comment
> * Restrict APEI tables generation to the 'virt' machine
> * bcm2835: minor code cleanups
> * bcm2835: connect all IRQs from SYS_timer device
> * correctly flush TLBs when TBI is enabled
> * tests/qtest: Add npcm7xx timer test
> * loads-stores.rst: add footnote that clarifies GETPC usage
> * Fix reported EL for mte_check_fail
> * Ignore HCR_EL2.ATA when {E2H,TGE} != 11
> * microbit_i2c: Fix coredump when dump-vmstate
> * nseries: Fix loading kernel image on n8x0 machines
> * Implement v8.1M low-overhead-loops
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.2
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/29] target-arm queue
2021-01-19 15:47 Peter Maydell
@ 2021-01-19 17:15 ` Peter Maydell
0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2021-01-19 17:15 UTC (permalink / raw)
To: QEMU Developers
On Tue, 19 Jan 2021 at 15:47, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> v2: drop pvpanic-pci patches.
>
> The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
>
> Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
>
> for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
>
> docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Implement IMPDEF pauth algorithm
> * Support ARMv8.4-SEL2
> * Fix bug where we were truncating predicate vector lengths in SVE insns
> * npcm7xx_adc-test: Fix memleak in adc_qom_set
> * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
> * docs: Build and install all the docs in a single manual
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PULL v2 00/29] target-arm queue
@ 2021-01-19 15:47 Peter Maydell
2021-01-19 17:15 ` Peter Maydell
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2021-01-19 15:47 UTC (permalink / raw)
To: qemu-devel
v2: drop pvpanic-pci patches.
The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
----------------------------------------------------------------
target-arm queue:
* Implement IMPDEF pauth algorithm
* Support ARMv8.4-SEL2
* Fix bug where we were truncating predicate vector lengths in SVE insns
* npcm7xx_adc-test: Fix memleak in adc_qom_set
* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
* docs: Build and install all the docs in a single manual
----------------------------------------------------------------
Gan Qixin (1):
npcm7xx_adc-test: Fix memleak in adc_qom_set
Peter Maydell (1):
docs: Build and install all the docs in a single manual
Philippe Mathieu-Daudé (1):
target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
Richard Henderson (7):
target/arm: Implement an IMPDEF pauth algorithm
target/arm: Add cpu properties to control pauth
target/arm: Use object_property_add_bool for "sve" property
target/arm: Introduce PREDDESC field definitions
target/arm: Update PFIRST, PNEXT for pred_desc
target/arm: Update ZIP, UZP, TRN for pred_desc
target/arm: Update REV, PUNPK for pred_desc
Rémi Denis-Courmont (19):
target/arm: remove redundant tests
target/arm: add arm_is_el2_enabled() helper
target/arm: use arm_is_el2_enabled() where applicable
target/arm: use arm_hcr_el2_eff() where applicable
target/arm: factor MDCR_EL2 common handling
target/arm: Define isar_feature function to test for presence of SEL2
target/arm: add 64-bit S-EL2 to EL exception table
target/arm: add MMU stage 1 for Secure EL2
target/arm: add ARMv8.4-SEL2 system registers
target/arm: handle VMID change in secure state
target/arm: do S1_ptw_translate() before address space lookup
target/arm: translate NS bit in page-walks
target/arm: generalize 2-stage page-walk condition
target/arm: secure stage 2 translation regime
target/arm: set HPFAR_EL2.NS on secure stage 2 faults
target/arm: revector to run-time pick target EL
target/arm: Implement SCR_EL2.EEL2
target/arm: enable Secure EL2 in max CPU
target/arm: refactor vae1_tlbmask()
docs/conf.py | 46 ++++-
docs/devel/conf.py | 15 --
docs/index.html.in | 17 --
docs/interop/conf.py | 28 ---
docs/meson.build | 64 +++---
docs/specs/conf.py | 16 --
docs/system/arm/cpu-features.rst | 21 ++
docs/system/conf.py | 28 ---
docs/tools/conf.py | 37 ----
docs/user/conf.py | 15 --
include/qemu/xxhash.h | 98 +++++++++
target/arm/cpu-param.h | 2 +-
target/arm/cpu.h | 107 ++++++++--
target/arm/internals.h | 45 +++++
target/arm/cpu.c | 23 ++-
target/arm/cpu64.c | 65 ++++--
target/arm/helper-a64.c | 8 +-
target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
target/arm/m_helper.c | 2 +-
target/arm/monitor.c | 1 +
target/arm/op_helper.c | 4 +-
target/arm/pauth_helper.c | 27 ++-
target/arm/sve_helper.c | 33 ++--
target/arm/tlb_helper.c | 3 +
target/arm/translate-a64.c | 4 +
target/arm/translate-sve.c | 31 ++-
target/arm/translate.c | 36 +++-
tests/qtest/arm-cpu-features.c | 13 ++
tests/qtest/npcm7xx_adc-test.c | 1 +
.gitlab-ci.yml | 4 +-
30 files changed, 770 insertions(+), 438 deletions(-)
delete mode 100644 docs/devel/conf.py
delete mode 100644 docs/index.html.in
delete mode 100644 docs/interop/conf.py
delete mode 100644 docs/specs/conf.py
delete mode 100644 docs/system/conf.py
delete mode 100644 docs/tools/conf.py
delete mode 100644 docs/user/conf.py
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/29] target-arm queue
2020-05-21 21:06 Peter Maydell
@ 2020-05-22 11:10 ` Peter Maydell
0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2020-05-22 11:10 UTC (permalink / raw)
To: QEMU Developers
On Thu, 21 May 2020 at 22:06, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> v2: added Property array terminator (which caused crashes on
> various non-x86 host architectures).
>
> The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71:
>
> Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521-1
>
> for you to fetch changes up to fafe7229272f39500c14845bc7ea60a8504a5a20:
>
> linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 22:05:27 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * tests/acceptance: Add a test for the canon-a1100 machine
> * docs/system: Document some of the Arm development boards
> * linux-user: make BKPT insn cause SIGTRAP, not be a syscall
> * target/arm: Remove unused GEN_NEON_INTEGER_OP macro
> * fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
> * hw/arm: Use qemu_log_mask() instead of hw_error() in various places
> * ARM: PL061: Introduce N_GPIOS
> * target/arm: Improve clear_vec_high() usage
> * target/arm: Allow user-mode code to write CPSR.E via MSR
> * linux-user/arm: Reset CPSR_E when entering a signal handler
> * linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PULL v2 00/29] target-arm queue
@ 2020-05-21 21:06 Peter Maydell
2020-05-22 11:10 ` Peter Maydell
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2020-05-21 21:06 UTC (permalink / raw)
To: qemu-devel
v2: added Property array terminator (which caused crashes on
various non-x86 host architectures).
The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71:
Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521-1
for you to fetch changes up to fafe7229272f39500c14845bc7ea60a8504a5a20:
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 22:05:27 +0100)
----------------------------------------------------------------
target-arm queue:
* tests/acceptance: Add a test for the canon-a1100 machine
* docs/system: Document some of the Arm development boards
* linux-user: make BKPT insn cause SIGTRAP, not be a syscall
* target/arm: Remove unused GEN_NEON_INTEGER_OP macro
* fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
* hw/arm: Use qemu_log_mask() instead of hw_error() in various places
* ARM: PL061: Introduce N_GPIOS
* target/arm: Improve clear_vec_high() usage
* target/arm: Allow user-mode code to write CPSR.E via MSR
* linux-user/arm: Reset CPSR_E when entering a signal handler
* linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
----------------------------------------------------------------
Amanieu d'Antras (1):
linux-user/arm: Reset CPSR_E when entering a signal handler
Geert Uytterhoeven (1):
ARM: PL061: Introduce N_GPIOS
Guenter Roeck (8):
hw: Move i.MX watchdog driver to hw/watchdog
hw/watchdog: Implement full i.MX watchdog support
hw/arm/fsl-imx25: Wire up watchdog
hw/arm/fsl-imx31: Wire up watchdog
hw/arm/fsl-imx6: Connect watchdog interrupts
hw/arm/fsl-imx6ul: Connect watchdog interrupts
hw/arm/fsl-imx7: Instantiate various unimplemented devices
hw/arm/fsl-imx7: Connect watchdog interrupts
Peter Maydell (12):
docs/system: Add 'Arm' to the Integrator/CP document title
docs/system: Sort Arm board index into alphabetical order
docs/system: Document Arm Versatile Express boards
docs/system: Document the various MPS2 models
docs/system: Document Musca boards
linux-user/arm: BKPT should cause SIGTRAP, not be a syscall
linux-user/arm: Remove bogus SVC 0xf0002 handling
linux-user/arm: Handle invalid arm-specific syscalls correctly
linux-user/arm: Fix identification of syscall numbers
target/arm: Remove unused GEN_NEON_INTEGER_OP macro
target/arm: Allow user-mode code to write CPSR.E via MSR
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
Philippe Mathieu-Daudé (4):
hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
Richard Henderson (2):
target/arm: Use tcg_gen_gvec_mov for clear_vec_high
target/arm: Use clear_vec_high more effectively
Thomas Huth (1):
tests/acceptance: Add a test for the canon-a1100 machine
docs/system/arm/integratorcp.rst | 4 +-
docs/system/arm/mps2.rst | 29 +++
docs/system/arm/musca.rst | 31 +++
docs/system/arm/vexpress.rst | 60 ++++++
docs/system/target-arm.rst | 20 +-
include/hw/arm/fsl-imx25.h | 5 +
include/hw/arm/fsl-imx31.h | 4 +
include/hw/arm/fsl-imx6.h | 2 +-
include/hw/arm/fsl-imx6ul.h | 2 +-
include/hw/arm/fsl-imx7.h | 23 ++-
include/hw/misc/imx2_wdt.h | 33 ----
include/hw/watchdog/wdt_imx2.h | 90 +++++++++
target/arm/cpu.h | 2 +-
hw/arm/fsl-imx25.c | 10 +
hw/arm/fsl-imx31.c | 6 +
hw/arm/fsl-imx6.c | 9 +
hw/arm/fsl-imx6ul.c | 10 +
hw/arm/fsl-imx7.c | 35 ++++
hw/arm/integratorcp.c | 23 ++-
hw/arm/pxa2xx_gpio.c | 7 +-
hw/char/xilinx_uartlite.c | 5 +-
hw/display/pxa2xx_lcd.c | 8 +-
hw/dma/pxa2xx_dma.c | 14 +-
hw/gpio/pl061.c | 12 +-
hw/misc/imx2_wdt.c | 90 ---------
hw/timer/exynos4210_mct.c | 12 +-
hw/watchdog/wdt_imx2.c | 304 +++++++++++++++++++++++++++++
linux-user/arm/cpu_loop.c | 145 ++++++++------
linux-user/arm/signal.c | 15 +-
target/arm/translate-a64.c | 63 +++---
target/arm/translate.c | 23 ---
MAINTAINERS | 6 +
hw/arm/Kconfig | 5 +
hw/misc/Makefile.objs | 1 -
hw/watchdog/Kconfig | 3 +
hw/watchdog/Makefile.objs | 1 +
tests/acceptance/machine_arm_canona1100.py | 35 ++++
37 files changed, 855 insertions(+), 292 deletions(-)
create mode 100644 docs/system/arm/mps2.rst
create mode 100644 docs/system/arm/musca.rst
create mode 100644 docs/system/arm/vexpress.rst
delete mode 100644 include/hw/misc/imx2_wdt.h
create mode 100644 include/hw/watchdog/wdt_imx2.h
delete mode 100644 hw/misc/imx2_wdt.c
create mode 100644 hw/watchdog/wdt_imx2.c
create mode 100644 tests/acceptance/machine_arm_canona1100.py
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-01-19 18:41 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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