* [PATCH v2] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register
@ 2020-02-17 10:56 Philippe Mathieu-Daudé
2020-02-17 11:27 ` Peter Maydell
0 siblings, 1 reply; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-02-17 10:56 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, qemu-arm, Philippe Mathieu-Daudé
Fix warning reported by Clang static code analyzer:
CC hw/misc/iotkit-secctl.o
hw/misc/iotkit-secctl.c:343:9: warning: Value stored to 'value' is never read
value &= 0x00f000f3;
^ ~~~~~~~~~~
Fixes: b3717c23e1c
Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2: Corrected bitwise-not precedence (pm215)
---
hw/misc/iotkit-secctl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
index 609869821a..43cf0f9970 100644
--- a/hw/misc/iotkit-secctl.c
+++ b/hw/misc/iotkit-secctl.c
@@ -340,7 +340,7 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
qemu_set_irq(s->sec_resp_cfg, s->secrespcfg);
break;
case A_SECPPCINTCLR:
- value &= 0x00f000f3;
+ s->secppcintstat = ~(value & 0x00f000f3);
foreach_ppc(s, iotkit_secctl_ppc_update_irq_clear);
break;
case A_SECPPCINTEN:
--
2.21.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register
2020-02-17 10:56 [PATCH v2] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register Philippe Mathieu-Daudé
@ 2020-02-17 11:27 ` Peter Maydell
2020-02-17 13:27 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 3+ messages in thread
From: Peter Maydell @ 2020-02-17 11:27 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: qemu-arm, QEMU Developers
On Mon, 17 Feb 2020 at 10:57, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Fix warning reported by Clang static code analyzer:
>
> CC hw/misc/iotkit-secctl.o
> hw/misc/iotkit-secctl.c:343:9: warning: Value stored to 'value' is never read
> value &= 0x00f000f3;
> ^ ~~~~~~~~~~
>
> Fixes: b3717c23e1c
> Reported-by: Clang Static Analyzer
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2: Corrected bitwise-not precedence (pm215)
> ---
> hw/misc/iotkit-secctl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
> index 609869821a..43cf0f9970 100644
> --- a/hw/misc/iotkit-secctl.c
> +++ b/hw/misc/iotkit-secctl.c
> @@ -340,7 +340,7 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
> qemu_set_irq(s->sec_resp_cfg, s->secrespcfg);
> break;
> case A_SECPPCINTCLR:
> - value &= 0x00f000f3;
> + s->secppcintstat = ~(value & 0x00f000f3);
Should be &=, not =. Otherwise you set all the other
bits in the register.
thanks
-- PMM
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register
2020-02-17 11:27 ` Peter Maydell
@ 2020-02-17 13:27 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-02-17 13:27 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, QEMU Developers
On Mon, Feb 17, 2020 at 12:28 PM Peter Maydell <peter.maydell@linaro.org> wrote:
> On Mon, 17 Feb 2020 at 10:57, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >
> > Fix warning reported by Clang static code analyzer:
> >
> > CC hw/misc/iotkit-secctl.o
> > hw/misc/iotkit-secctl.c:343:9: warning: Value stored to 'value' is never read
> > value &= 0x00f000f3;
> > ^ ~~~~~~~~~~
> >
> > Fixes: b3717c23e1c
> > Reported-by: Clang Static Analyzer
> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > ---
> > v2: Corrected bitwise-not precedence (pm215)
> > ---
> > hw/misc/iotkit-secctl.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
> > index 609869821a..43cf0f9970 100644
> > --- a/hw/misc/iotkit-secctl.c
> > +++ b/hw/misc/iotkit-secctl.c
> > @@ -340,7 +340,7 @@ static MemTxResult iotkit_secctl_s_write(void *opaque, hwaddr addr,
> > qemu_set_irq(s->sec_resp_cfg, s->secrespcfg);
> > break;
> > case A_SECPPCINTCLR:
> > - value &= 0x00f000f3;
> > + s->secppcintstat = ~(value & 0x00f000f3);
>
> Should be &=, not =. Otherwise you set all the other
> bits in the register.
Yes, I'm sorry.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-02-17 10:56 [PATCH v2] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register Philippe Mathieu-Daudé
2020-02-17 11:27 ` Peter Maydell
2020-02-17 13:27 ` Philippe Mathieu-Daudé
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