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From: Peter Maydell <peter.maydell@linaro.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	Laurent Vivier <laurent@vivier.eu>
Subject: Re: [PATCH v3 3/9] escc: introduce escc_soft_reset_chn() for software reset
Date: Tue, 7 Sep 2021 14:00:02 +0100	[thread overview]
Message-ID: <CAFEAcA8Fzx0hz+kTzZEMXHx1=46Ryv2NwD-jH9fumyszKO0veQ@mail.gmail.com> (raw)
In-Reply-To: <20210903113223.19551-4-mark.cave-ayland@ilande.co.uk>

On Fri, 3 Sept 2021 at 13:01, Mark Cave-Ayland
<mark.cave-ayland@ilande.co.uk> wrote:
>
> This new software reset function is to be called when the appropriate channel
> software reset bit is written to register WR9. Its initial implementation is
> the same as the existing escc_reset_chn() function used for device reset.
>
> Add a new trace event when the guest initiates a soft reset via the WR9 register
> to help diagnose guest reset issues.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  hw/char/escc.c       | 40 ++++++++++++++++++++++++++++++++++++++--
>  hw/char/trace-events |  1 +
>  2 files changed, 39 insertions(+), 2 deletions(-)
>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


  reply	other threads:[~2021-09-07 13:27 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-03 11:32 [PATCH v3 0/9] escc: fix reset and R_STATUS when SDLC mode is enabled Mark Cave-Ayland
2021-09-03 11:32 ` [PATCH v3 1/9] escc: checkpatch fixes Mark Cave-Ayland
2021-09-03 11:32 ` [PATCH v3 2/9] escc: reset register values to zero in escc_reset() Mark Cave-Ayland
2021-09-07 12:59   ` Peter Maydell
2021-09-03 11:32 ` [PATCH v3 3/9] escc: introduce escc_soft_reset_chn() for software reset Mark Cave-Ayland
2021-09-07 13:00   ` Peter Maydell [this message]
2021-09-03 11:32 ` [PATCH v3 4/9] escc: introduce escc_hard_reset_chn() for hardware reset Mark Cave-Ayland
2021-09-07 13:00   ` Peter Maydell
2021-09-03 11:32 ` [PATCH v3 5/9] escc: implement soft reset as described in the datasheet Mark Cave-Ayland
2021-09-07 13:06   ` Peter Maydell
2021-09-03 11:32 ` [PATCH v3 6/9] escc: implement hard " Mark Cave-Ayland
2021-09-07 13:09   ` Peter Maydell
2021-09-03 11:32 ` [PATCH v3 7/9] escc: remove register changes from escc_reset_chn() Mark Cave-Ayland
2021-09-07 13:10   ` Peter Maydell
2021-09-03 11:32 ` [PATCH v3 8/9] escc: re-use escc_reset_chn() for soft reset Mark Cave-Ayland
2021-09-07 13:10   ` Peter Maydell
2021-09-03 11:32 ` [PATCH v3 9/9] escc: fix STATUS_SYNC bit in R_STATUS register Mark Cave-Ayland
2021-09-08 10:06 ` [PATCH v3 0/9] escc: fix reset and R_STATUS when SDLC mode is enabled Mark Cave-Ayland

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