* [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
@ 2020-09-21 3:47 Philippe Mathieu-Daudé
2020-09-21 3:47 ` [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-21 3:47 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Philippe Mathieu-Daudé,
Andrew Baumann, Paul Zimmerman, qemu-arm, Luc Michel
Patch 1 and 3 are review, patch 2 is new and trivial.
Philippe Mathieu-Daudé (3):
hw/arm/raspi: Define various blocks base addresses
hw/arm/bcm2835: Add more unimplemented peripherals
hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
include/hw/arm/bcm2835_peripherals.h | 2 ++
include/hw/arm/raspi_platform.h | 51 +++++++++++++++++++++++-----
hw/arm/bcm2835_peripherals.c | 2 ++
hw/arm/raspi.c | 3 --
4 files changed, 47 insertions(+), 11 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses
2020-09-21 3:47 [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
@ 2020-09-21 3:47 ` Philippe Mathieu-Daudé
2020-09-21 15:28 ` Luc Michel
2020-09-21 3:47 ` [PATCH 2/3] hw/arm/bcm2835: Add more unimplemented peripherals Philippe Mathieu-Daudé
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-21 3:47 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Philippe Mathieu-Daudé,
Andrew Baumann, Paul Zimmerman, qemu-arm, Alex Bennée,
Luc Michel
The Raspberry firmware is closed-source. While running it, it
accesses various I/O registers. Logging these accesses as UNIMP
(unimplemented) help to understand what the firmware is doing
(ideally we want it able to boot a Linux kernel).
Document various blocks we might use later.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/raspi_platform.h | 51 +++++++++++++++++++++++++++------
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
index 61b04a1bd4a..c7f50b260f6 100644
--- a/include/hw/arm/raspi_platform.h
+++ b/include/hw/arm/raspi_platform.h
@@ -20,20 +20,29 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Various undocumented addresses and names come from Herman Hermitage's VC4
+ * documentation:
+ * https://github.com/hermanhermitage/videocoreiv/wiki/MMIO-Register-map
*/
#ifndef HW_ARM_RASPI_PLATFORM_H
#define HW_ARM_RASPI_PLATFORM_H
#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
-#define IC0_OFFSET 0x2000
+#define CCPT_OFFSET 0x1000 /* Compact Camera Port 2 TX */
+#define INTE_OFFSET 0x2000 /* VC Interrupt controller */
#define ST_OFFSET 0x3000 /* System Timer */
+#define TXP_OFFSET 0x4000 /* Transposer */
+#define JPEG_OFFSET 0x5000
#define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
#define DMA_OFFSET 0x7000 /* DMA controller, channels 0-14 */
-#define ARM_OFFSET 0xB000 /* BCM2708 ARM control block */
+#define ARBA_OFFSET 0x9000
+#define BRDG_OFFSET 0xa000
+#define ARM_OFFSET 0xB000 /* ARM control block */
#define ARMCTRL_OFFSET (ARM_OFFSET + 0x000)
#define ARMCTRL_IC_OFFSET (ARM_OFFSET + 0x200) /* Interrupt controller */
-#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
+#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 (SP804) */
#define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
* Doorbells & Mailboxes */
#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
@@ -42,24 +51,50 @@
#define AVS_OFFSET 0x103000 /* Audio Video Standard */
#define RNG_OFFSET 0x104000
#define GPIO_OFFSET 0x200000
-#define UART0_OFFSET 0x201000
-#define MMCI0_OFFSET 0x202000
-#define I2S_OFFSET 0x203000
-#define SPI0_OFFSET 0x204000
+#define UART0_OFFSET 0x201000 /* PL011 */
+#define MMCI0_OFFSET 0x202000 /* Legacy MMC */
+#define I2S_OFFSET 0x203000 /* PCM */
+#define SPI0_OFFSET 0x204000 /* SPI master */
#define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
+#define PIXV0_OFFSET 0x206000
+#define PIXV1_OFFSET 0x207000
+#define DPI_OFFSET 0x208000
+#define DSI0_OFFSET 0x209000 /* Display Serial Interface */
+#define PWM_OFFSET 0x20c000
+#define PERM_OFFSET 0x20d000
+#define TEC_OFFSET 0x20e000
#define OTP_OFFSET 0x20f000
+#define SLIM_OFFSET 0x210000 /* SLIMbus */
+#define CPG_OFFSET 0x211000
#define THERMAL_OFFSET 0x212000
-#define BSC_SL_OFFSET 0x214000 /* SPI slave */
+#define AVSP_OFFSET 0x213000
+#define BSC_SL_OFFSET 0x214000 /* SPI slave (bootrom) */
#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
#define EMMC1_OFFSET 0x300000
+#define EMMC2_OFFSET 0x340000
+#define HVS_OFFSET 0x400000
#define SMI_OFFSET 0x600000
+#define DSI1_OFFSET 0x700000
+#define UCAM_OFFSET 0x800000
+#define CMI_OFFSET 0x802000
#define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
+#define VECA_OFFSET 0x806000
+#define PIXV2_OFFSET 0x807000
+#define HDMI_OFFSET 0x808000
+#define HDCP_OFFSET 0x809000
+#define ARBR0_OFFSET 0x80a000
#define DBUS_OFFSET 0x900000
#define AVE0_OFFSET 0x910000
#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
+#define V3D_OFFSET 0xc00000
#define SDRAMC_OFFSET 0xe00000
+#define L2CC_OFFSET 0xe01000 /* Level 2 Cache controller */
+#define L1CC_OFFSET 0xe02000 /* Level 1 Cache controller */
+#define ARBR1_OFFSET 0xe04000
#define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
+#define DCRC_OFFSET 0xe07000
+#define AXIP_OFFSET 0xe08000
/* GPU interrupts */
#define INTERRUPT_TIMER0 0
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] hw/arm/bcm2835: Add more unimplemented peripherals
2020-09-21 3:47 [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-09-21 3:47 ` [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
@ 2020-09-21 3:47 ` Philippe Mathieu-Daudé
2020-09-21 15:29 ` Luc Michel
2020-09-21 3:47 ` [PATCH 3/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-10-01 13:23 ` [PATCH 0/3] " Peter Maydell
3 siblings, 1 reply; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-21 3:47 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Philippe Mathieu-Daudé,
Andrew Baumann, Paul Zimmerman, qemu-arm, Luc Michel
The bcm2835-v3d is used since Linux 4.7, see commit
49ac67e0c39c ("ARM: bcm2835: Add VC4 to the device tree"),
and the bcm2835-txp since Linux 4.19, see commit
b7dd29b401f5 ("ARM: dts: bcm283x: Add Transposer block").
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/bcm2835_peripherals.h | 2 ++
hw/arm/bcm2835_peripherals.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index b4d3ae121ac..ccd9eb11102 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -47,6 +47,7 @@ struct BCM2835PeripheralState {
BCM2835SystemTimerState systmr;
BCM2835MphiState mphi;
+ UnimplementedDeviceState txp;
UnimplementedDeviceState armtmr;
UnimplementedDeviceState cprman;
UnimplementedDeviceState a2w;
@@ -68,6 +69,7 @@ struct BCM2835PeripheralState {
UnimplementedDeviceState otp;
UnimplementedDeviceState dbus;
UnimplementedDeviceState ave0;
+ UnimplementedDeviceState v3d;
UnimplementedDeviceState bscsl;
UnimplementedDeviceState smi;
DWC2State dwc2;
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index a9d7f53f6e9..15c5c72e465 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -343,6 +343,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
INTERRUPT_USB));
+ create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
@@ -356,6 +357,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
+ create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
}
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
2020-09-21 3:47 [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-09-21 3:47 ` [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
2020-09-21 3:47 ` [PATCH 2/3] hw/arm/bcm2835: Add more unimplemented peripherals Philippe Mathieu-Daudé
@ 2020-09-21 3:47 ` Philippe Mathieu-Daudé
2020-10-01 13:23 ` [PATCH 0/3] " Peter Maydell
3 siblings, 0 replies; 7+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-21 3:47 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Philippe Mathieu-Daudé,
Andrew Baumann, Paul Zimmerman, qemu-arm, Luc Michel
Commit 1c3db49d39 added the raspi3, which uses the same peripherals
than the raspi2 (but with different ARM cores). The raspi3 was
introduced without the ignore_memory_transaction_failures flag.
Almost 2 years later, the machine is usable running U-Boot and
Linux.
In commit 00cbd5bd74 we mapped a lot of unimplemented devices,
commit d442d95f added thermal block and commit 0e5bbd7406 the
system timer.
As we are happy with the raspi3, let's remove this flag on the
raspi2.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/raspi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index d2f674587d3..811eaf52ff5 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -321,9 +321,6 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data)
mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev);
mc->default_ram_size = board_ram_size(board_rev);
mc->default_ram_id = "ram";
- if (board_version(board_rev) == 2) {
- mc->ignore_memory_transaction_failures = true;
- }
};
static const TypeInfo raspi_machine_types[] = {
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses
2020-09-21 3:47 ` [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
@ 2020-09-21 15:28 ` Luc Michel
0 siblings, 0 replies; 7+ messages in thread
From: Luc Michel @ 2020-09-21 15:28 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, qemu-arm, Alex Bennée, Andrew Baumann,
Paul Zimmerman
On 9/21/20 5:47 AM, Philippe Mathieu-Daudé wrote:
> The Raspberry firmware is closed-source. While running it, it
> accesses various I/O registers. Logging these accesses as UNIMP
> (unimplemented) help to understand what the firmware is doing
> (ideally we want it able to boot a Linux kernel).
>
> Document various blocks we might use later.
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> ---
> include/hw/arm/raspi_platform.h | 51 +++++++++++++++++++++++++++------
> 1 file changed, 43 insertions(+), 8 deletions(-)
>
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index 61b04a1bd4a..c7f50b260f6 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -20,20 +20,29 @@
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
> + *
> + * Various undocumented addresses and names come from Herman Hermitage's VC4
> + * documentation:
> + * https://github.com/hermanhermitage/videocoreiv/wiki/MMIO-Register-map
> */
>
> #ifndef HW_ARM_RASPI_PLATFORM_H
> #define HW_ARM_RASPI_PLATFORM_H
>
> #define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
> -#define IC0_OFFSET 0x2000
> +#define CCPT_OFFSET 0x1000 /* Compact Camera Port 2 TX */
> +#define INTE_OFFSET 0x2000 /* VC Interrupt controller */
> #define ST_OFFSET 0x3000 /* System Timer */
> +#define TXP_OFFSET 0x4000 /* Transposer */
> +#define JPEG_OFFSET 0x5000
> #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
> #define DMA_OFFSET 0x7000 /* DMA controller, channels 0-14 */
> -#define ARM_OFFSET 0xB000 /* BCM2708 ARM control block */
> +#define ARBA_OFFSET 0x9000
> +#define BRDG_OFFSET 0xa000
> +#define ARM_OFFSET 0xB000 /* ARM control block */
> #define ARMCTRL_OFFSET (ARM_OFFSET + 0x000)
> #define ARMCTRL_IC_OFFSET (ARM_OFFSET + 0x200) /* Interrupt controller */
> -#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
> +#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 (SP804) */
> #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
> * Doorbells & Mailboxes */
> #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> @@ -42,24 +51,50 @@
> #define AVS_OFFSET 0x103000 /* Audio Video Standard */
> #define RNG_OFFSET 0x104000
> #define GPIO_OFFSET 0x200000
> -#define UART0_OFFSET 0x201000
> -#define MMCI0_OFFSET 0x202000
> -#define I2S_OFFSET 0x203000
> -#define SPI0_OFFSET 0x204000
> +#define UART0_OFFSET 0x201000 /* PL011 */
> +#define MMCI0_OFFSET 0x202000 /* Legacy MMC */
> +#define I2S_OFFSET 0x203000 /* PCM */
> +#define SPI0_OFFSET 0x204000 /* SPI master */
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> +#define PIXV0_OFFSET 0x206000
> +#define PIXV1_OFFSET 0x207000
> +#define DPI_OFFSET 0x208000
> +#define DSI0_OFFSET 0x209000 /* Display Serial Interface */
> +#define PWM_OFFSET 0x20c000
> +#define PERM_OFFSET 0x20d000
> +#define TEC_OFFSET 0x20e000
> #define OTP_OFFSET 0x20f000
> +#define SLIM_OFFSET 0x210000 /* SLIMbus */
> +#define CPG_OFFSET 0x211000
> #define THERMAL_OFFSET 0x212000
> -#define BSC_SL_OFFSET 0x214000 /* SPI slave */
> +#define AVSP_OFFSET 0x213000
> +#define BSC_SL_OFFSET 0x214000 /* SPI slave (bootrom) */
> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> #define EMMC1_OFFSET 0x300000
> +#define EMMC2_OFFSET 0x340000
> +#define HVS_OFFSET 0x400000
> #define SMI_OFFSET 0x600000
> +#define DSI1_OFFSET 0x700000
> +#define UCAM_OFFSET 0x800000
> +#define CMI_OFFSET 0x802000
> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> #define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
> +#define VECA_OFFSET 0x806000
> +#define PIXV2_OFFSET 0x807000
> +#define HDMI_OFFSET 0x808000
> +#define HDCP_OFFSET 0x809000
> +#define ARBR0_OFFSET 0x80a000
> #define DBUS_OFFSET 0x900000
> #define AVE0_OFFSET 0x910000
> #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> +#define V3D_OFFSET 0xc00000
> #define SDRAMC_OFFSET 0xe00000
> +#define L2CC_OFFSET 0xe01000 /* Level 2 Cache controller */
> +#define L1CC_OFFSET 0xe02000 /* Level 1 Cache controller */
> +#define ARBR1_OFFSET 0xe04000
> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
> +#define DCRC_OFFSET 0xe07000
> +#define AXIP_OFFSET 0xe08000
>
> /* GPU interrupts */
> #define INTERRUPT_TIMER0 0
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] hw/arm/bcm2835: Add more unimplemented peripherals
2020-09-21 3:47 ` [PATCH 2/3] hw/arm/bcm2835: Add more unimplemented peripherals Philippe Mathieu-Daudé
@ 2020-09-21 15:29 ` Luc Michel
0 siblings, 0 replies; 7+ messages in thread
From: Luc Michel @ 2020-09-21 15:29 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, qemu-arm, Andrew Baumann, Paul Zimmerman
On 9/21/20 5:47 AM, Philippe Mathieu-Daudé wrote:
> The bcm2835-v3d is used since Linux 4.7, see commit
> 49ac67e0c39c ("ARM: bcm2835: Add VC4 to the device tree"),
> and the bcm2835-txp since Linux 4.19, see commit
> b7dd29b401f5 ("ARM: dts: bcm283x: Add Transposer block").
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> ---
> include/hw/arm/bcm2835_peripherals.h | 2 ++
> hw/arm/bcm2835_peripherals.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index b4d3ae121ac..ccd9eb11102 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -47,6 +47,7 @@ struct BCM2835PeripheralState {
>
> BCM2835SystemTimerState systmr;
> BCM2835MphiState mphi;
> + UnimplementedDeviceState txp;
> UnimplementedDeviceState armtmr;
> UnimplementedDeviceState cprman;
> UnimplementedDeviceState a2w;
> @@ -68,6 +69,7 @@ struct BCM2835PeripheralState {
> UnimplementedDeviceState otp;
> UnimplementedDeviceState dbus;
> UnimplementedDeviceState ave0;
> + UnimplementedDeviceState v3d;
> UnimplementedDeviceState bscsl;
> UnimplementedDeviceState smi;
> DWC2State dwc2;
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index a9d7f53f6e9..15c5c72e465 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -343,6 +343,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> INTERRUPT_USB));
>
> + create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
> create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
> create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
> create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
> @@ -356,6 +357,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
> create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
> create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
> + create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
> create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
> }
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
2020-09-21 3:47 [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2020-09-21 3:47 ` [PATCH 3/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
@ 2020-10-01 13:23 ` Peter Maydell
3 siblings, 0 replies; 7+ messages in thread
From: Peter Maydell @ 2020-10-01 13:23 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Luc Michel, qemu-arm, QEMU Developers, Andrew Baumann, Paul Zimmerman
On Mon, 21 Sep 2020 at 04:47, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Patch 1 and 3 are review, patch 2 is new and trivial.
>
> Philippe Mathieu-Daudé (3):
> hw/arm/raspi: Define various blocks base addresses
> hw/arm/bcm2835: Add more unimplemented peripherals
> hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
>
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-10-01 13:24 UTC | newest]
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2020-09-21 3:47 [PATCH 0/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-09-21 3:47 ` [PATCH 1/3] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
2020-09-21 15:28 ` Luc Michel
2020-09-21 3:47 ` [PATCH 2/3] hw/arm/bcm2835: Add more unimplemented peripherals Philippe Mathieu-Daudé
2020-09-21 15:29 ` Luc Michel
2020-09-21 3:47 ` [PATCH 3/3] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-10-01 13:23 ` [PATCH 0/3] " Peter Maydell
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