* [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine
@ 2020-08-26 14:19 Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 1/2] hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref Graeme Gregory
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Graeme Gregory @ 2020-08-26 14:19 UTC (permalink / raw)
To: qemu-arm; +Cc: peter.maydell, leif, rad, qemu-devel, f4bug
This series is to an add embedded controller to the sbsa-ref machine
so that PSCI can communicate platform power states to the platform
which in this case is QEMU.
v1->v2
- broke out the EC itself as hw/misc/sbsa_ec.c as seperate patch
- applied review comments to date
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/2] hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref
2020-08-26 14:19 [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Graeme Gregory
@ 2020-08-26 14:19 ` Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 2/2] hw/arm/sbsa-ref : Add embedded controller in secure memory Graeme Gregory
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Graeme Gregory @ 2020-08-26 14:19 UTC (permalink / raw)
To: qemu-arm; +Cc: Graeme Gregory, peter.maydell, rad, qemu-devel, f4bug, leif
A difference between sbsa platform and the virt platform is PSCI is
handled by ARM-TF in the sbsa platform. This means that the PSCI code
there needs to communicate some of the platform power changes down
to the qemu code for things like shutdown/reset control.
Space has been left to extend the EC if we find other use cases in
future where ARM-TF and qemu need to communicate.
Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
---
hw/misc/meson.build | 2 +
hw/misc/sbsa_ec.c | 98 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 100 insertions(+)
create mode 100644 hw/misc/sbsa_ec.c
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 84fed0494d..e1576b81cf 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -97,3 +97,5 @@ specific_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c'))
specific_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_cmgcr.c', 'mips_cpc.c'))
specific_ss.add(when: 'CONFIG_MIPS_ITU', if_true: files('mips_itu.c'))
+
+specific_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
diff --git a/hw/misc/sbsa_ec.c b/hw/misc/sbsa_ec.c
new file mode 100644
index 0000000000..9a7d7f914a
--- /dev/null
+++ b/hw/misc/sbsa_ec.c
@@ -0,0 +1,98 @@
+/*
+ * ARM SBSA Reference Platform Embedded Controller
+ *
+ * A device to allow PSCI running in the secure side of sbsa-ref machine
+ * to communicate platform power states to qemu.
+ *
+ * Copyright (c) 2020 Nuvia Inc
+ * Written by Graeme Gregory <graeme@nuviainc.com>
+ *
+ * SPDX-License-Identifer: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "qemu/log.h"
+#include "hw/sysbus.h"
+#include "sysemu/runstate.h"
+
+typedef struct {
+ SysBusDevice parent_obj;
+ MemoryRegion iomem;
+} SECUREECState;
+
+#define TYPE_SBSA_EC "sbsa-ec"
+#define SECURE_EC(obj) OBJECT_CHECK(SECUREECState, (obj), TYPE_SBSA_EC)
+
+enum sbsa_ec_powerstates {
+ SBSA_EC_CMD_POWEROFF = 0x01,
+ SBSA_EC_CMD_REBOOT = 0x02,
+};
+
+static uint64_t sbsa_ec_read(void *opaque, hwaddr offset, unsigned size)
+{
+ /* No use for this currently */
+ qemu_log_mask(LOG_GUEST_ERROR, "sbsa-ec: no readable registers");
+ return 0;
+}
+
+static void sbsa_ec_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ if (offset == 0) { /* PSCI machine power command register */
+ switch (value) {
+ case SBSA_EC_CMD_POWEROFF:
+ qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ break;
+ case SBSA_EC_CMD_REBOOT:
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "sbsa-ec: unknown power command");
+ }
+ } else {
+ qemu_log_mask(LOG_GUEST_ERROR, "sbsa-ec: unknown EC register");
+ }
+}
+
+static const MemoryRegionOps sbsa_ec_ops = {
+ .read = sbsa_ec_read,
+ .write = sbsa_ec_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid.min_access_size = 4,
+ .valid.max_access_size = 4,
+};
+
+static void sbsa_ec_init(Object *obj)
+{
+ SECUREECState *s = SECURE_EC(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
+
+ memory_region_init_io(&s->iomem, obj, &sbsa_ec_ops, s, "sbsa-ec",
+ 0x1000);
+ sysbus_init_mmio(dev, &s->iomem);
+}
+
+static void sbsa_ec_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ /* No vmstate or reset required: device has no internal state */
+ dc->user_creatable = false;
+}
+
+static const TypeInfo sbsa_ec_info = {
+ .name = TYPE_SBSA_EC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(SECUREECState),
+ .instance_init = sbsa_ec_init,
+ .class_init = sbsa_ec_class_init,
+};
+
+static void sbsa_ec_register_type(void)
+{
+ type_register_static(&sbsa_ec_info);
+}
+
+type_init(sbsa_ec_register_type);
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] hw/arm/sbsa-ref : Add embedded controller in secure memory
2020-08-26 14:19 [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 1/2] hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref Graeme Gregory
@ 2020-08-26 14:19 ` Graeme Gregory
2020-08-28 12:21 ` [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Leif Lindholm
2020-09-01 13:02 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Graeme Gregory @ 2020-08-26 14:19 UTC (permalink / raw)
To: qemu-arm; +Cc: Graeme Gregory, peter.maydell, rad, qemu-devel, f4bug, leif
Add the previously created sbsa-ec device to the sbsa-ref machine in
secure memory so the PSCI implementation in ARM-TF can access it, but
not expose it to non secure firmware or OS except by via ARM-TF.
Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
---
hw/arm/sbsa-ref.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 2a7d9a61fc..8614709bfb 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -62,6 +62,7 @@ enum {
SBSA_CPUPERIPHS,
SBSA_GIC_DIST,
SBSA_GIC_REDIST,
+ SBSA_SECURE_EC,
SBSA_SMMU,
SBSA_UART,
SBSA_RTC,
@@ -107,6 +108,7 @@ static const MemMapEntry sbsa_ref_memmap[] = {
[SBSA_CPUPERIPHS] = { 0x40000000, 0x00040000 },
[SBSA_GIC_DIST] = { 0x40060000, 0x00010000 },
[SBSA_GIC_REDIST] = { 0x40080000, 0x04000000 },
+ [SBSA_SECURE_EC] = { 0x50000000, 0x00001000 },
[SBSA_UART] = { 0x60000000, 0x00001000 },
[SBSA_RTC] = { 0x60010000, 0x00001000 },
[SBSA_GPIO] = { 0x60020000, 0x00001000 },
@@ -585,6 +587,16 @@ static void *sbsa_ref_dtb(const struct arm_boot_info *binfo, int *fdt_size)
return board->fdt;
}
+static void create_secure_ec(MemoryRegion *mem)
+{
+ hwaddr base = sbsa_ref_memmap[SBSA_SECURE_EC].base;
+ DeviceState *dev = qdev_new("sbsa-ec");
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
+
+ memory_region_add_subregion(mem, base,
+ sysbus_mmio_get_region(s, 0));
+}
+
static void sbsa_ref_init(MachineState *machine)
{
unsigned int smp_cpus = machine->smp.cpus;
@@ -708,6 +720,8 @@ static void sbsa_ref_init(MachineState *machine)
create_pcie(sms);
+ create_secure_ec(secure_sysmem);
+
sms->bootinfo.ram_size = machine->ram_size;
sms->bootinfo.nb_cpus = smp_cpus;
sms->bootinfo.board_id = -1;
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine
2020-08-26 14:19 [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 1/2] hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 2/2] hw/arm/sbsa-ref : Add embedded controller in secure memory Graeme Gregory
@ 2020-08-28 12:21 ` Leif Lindholm
2020-09-01 13:02 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Leif Lindholm @ 2020-08-28 12:21 UTC (permalink / raw)
To: Graeme Gregory; +Cc: peter.maydell, f4bug, qemu-arm, qemu-devel, rad
On Wed, Aug 26, 2020 at 15:19:50 +0100, Graeme Gregory wrote:
> This series is to an add embedded controller to the sbsa-ref machine
> so that PSCI can communicate platform power states to the platform
> which in this case is QEMU.
>
> v1->v2
> - broke out the EC itself as hw/misc/sbsa_ec.c as seperate patch
> - applied review comments to date
For the series:
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Tested-by: Leif Lindholm <leif@nuviainc.com>
Thanks!
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine
2020-08-26 14:19 [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Graeme Gregory
` (2 preceding siblings ...)
2020-08-28 12:21 ` [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Leif Lindholm
@ 2020-09-01 13:02 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Peter Maydell @ 2020-09-01 13:02 UTC (permalink / raw)
To: Graeme Gregory
Cc: Leif Lindholm, Philippe Mathieu-Daudé,
qemu-arm, QEMU Developers, Radoslaw Biernacki
On Wed, 26 Aug 2020 at 15:19, Graeme Gregory <graeme@nuviainc.com> wrote:
>
> This series is to an add embedded controller to the sbsa-ref machine
> so that PSCI can communicate platform power states to the platform
> which in this case is QEMU.
>
> v1->v2
> - broke out the EC itself as hw/misc/sbsa_ec.c as seperate patch
> - applied review comments to date
>
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-08-26 14:19 [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 1/2] hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref Graeme Gregory
2020-08-26 14:19 ` [PATCH v2 2/2] hw/arm/sbsa-ref : Add embedded controller in secure memory Graeme Gregory
2020-08-28 12:21 ` [PATCH v2 0/2] Add an embedded controller to sbsa-ref machine Leif Lindholm
2020-09-01 13:02 ` Peter Maydell
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