* [PATCH 1/3] Add dummy i.MXS STMP register support
2020-03-01 17:04 [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Guenter Roeck
@ 2020-03-01 17:04 ` Guenter Roeck
2020-03-01 17:04 ` [PATCH 2/3] arm: fsl-imx6ul: Wire up USB controllers Guenter Roeck
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Guenter Roeck @ 2020-03-01 17:04 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, qemu-devel, Guenter Roeck, Jean-Christophe Dubois
STMP registers are registers with a specific register layout.
When using this layout, a register is implemented as set of four:
- The register itself
- A register to set individual register bits
- A register to reset individual register bits
- A register to toggle individual register bits
This register layout is used in various i.MXS SoCs.
In some cases, bit 31 of a STMP register has special reset functionality.
Setting the reset bit resets the chip or block and then sets bit 30. This
functionality is common enough that the Linux kernel implements a library
function to support it.
This patch implements an STMP register as a special device called STMP
device. An STMP device can be instantiated on top of an unimplemented
device. Each instance implements a single register of this unimplemented
device. In some cases, this is necessary and sufficient to be able to load
a driver.
The term "STMP" originates from the Linux kernel. Its origin and meaning
is unknown to the author, but it seemed to make sense to use the same
terminology here.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
hw/misc/Kconfig | 3 +
hw/misc/Makefile.objs | 1 +
hw/misc/stmp.c | 121 +++++++++++++++++++++++++++++++++++++++++
include/hw/misc/stmp.h | 47 ++++++++++++++++
4 files changed, 172 insertions(+)
create mode 100644 hw/misc/stmp.c
create mode 100644 include/hw/misc/stmp.h
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index bdd77d8020..68af3f1e2a 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -123,6 +123,9 @@ config AUX
bool
select I2C
+config STMP
+ bool
+
config UNIMP
bool
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index da993f45b7..942653854c 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -9,6 +9,7 @@ common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o
common-obj-$(CONFIG_EDU) += edu.o
common-obj-$(CONFIG_PCA9552) += pca9552.o
+common-obj-$(CONFIG_STMP) += stmp.o
common-obj-$(CONFIG_UNIMP) += unimp.o
common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o
diff --git a/hw/misc/stmp.c b/hw/misc/stmp.c
new file mode 100644
index 0000000000..eb909fccfe
--- /dev/null
+++ b/hw/misc/stmp.c
@@ -0,0 +1,121 @@
+/*
+ * MXS "STMP" dummy device
+ *
+ * This is a dummy device which follows MXS "STMP" register layout.
+ * It's useful for stubbing out regions of an SoC or board
+ * map which correspond to devices that have not yet been
+ * implemented, yet require "STMP" device specific reset support.
+ * This is often sufficient to placate initial guest device
+ * driver probing such that the system will come up.
+ *
+ * Derived from "unimplemented" device code.
+ * Copyright Linaro Limited, 2017
+ * Written by Peter Maydell
+ *
+ * Written by Guenter Roeck
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/misc/stmp.h"
+#include "qemu/log.h"
+#include "qemu/module.h"
+#include "qapi/error.h"
+
+#define REG_VAL 0x0
+#define REG_SET 0x4
+#define REG_CLR 0x8
+#define REG_TOG 0xc
+
+#define STMP_MODULE_CLKGATE (1 << 30)
+#define STMP_MODULE_SFTRST (1 << 31)
+
+static uint64_t stmp_read(void *opaque, hwaddr offset, unsigned size)
+{
+ StmpDeviceState *s = STMP_DEVICE(opaque);
+
+ switch (offset) {
+ case REG_VAL:
+ return s->regval;
+ default:
+ return 0;
+ }
+}
+
+static void stmp_write(void *opaque, hwaddr offset, uint64_t value,
+ unsigned size)
+{
+ StmpDeviceState *s = STMP_DEVICE(opaque);
+
+ switch (offset) {
+ case REG_VAL:
+ s->regval = value;
+ break;
+ case REG_SET:
+ s->regval |= value;
+ if (s->have_reset && (value & STMP_MODULE_SFTRST)) {
+ s->regval |= STMP_MODULE_CLKGATE;
+ }
+ break;
+ case REG_CLR:
+ s->regval &= ~value;
+ break;
+ case REG_TOG:
+ s->regval ^= value;
+ break;
+ default:
+ break;
+ }
+}
+
+static const MemoryRegionOps stmp_ops = {
+ .read = stmp_read,
+ .write = stmp_write,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 4,
+ .valid.max_access_size = 4,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static void stmp_realize(DeviceState *dev, Error **errp)
+{
+ StmpDeviceState *s = STMP_DEVICE(dev);
+
+ if (s->name == NULL) {
+ error_setg(errp, "property 'name' not specified");
+ return;
+ }
+
+ memory_region_init_io(&s->iomem, OBJECT(s), &stmp_ops, s,
+ s->name, 0x10);
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
+}
+
+static Property stmp_properties[] = {
+ DEFINE_PROP_STRING("name", StmpDeviceState, name),
+ DEFINE_PROP_BOOL("have-reset", StmpDeviceState, have_reset, false),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void stmp_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = stmp_realize;
+ device_class_set_props(dc, stmp_properties);
+}
+
+static const TypeInfo stmp_info = {
+ .name = TYPE_STMP_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(StmpDeviceState),
+ .class_init = stmp_class_init,
+};
+
+static void stmp_register_types(void)
+{
+ type_register_static(&stmp_info);
+}
+
+type_init(stmp_register_types)
diff --git a/include/hw/misc/stmp.h b/include/hw/misc/stmp.h
new file mode 100644
index 0000000000..941ceb25dd
--- /dev/null
+++ b/include/hw/misc/stmp.h
@@ -0,0 +1,47 @@
+/*
+ * "Stmp" device
+ *
+ * Written by Guenter Roeck
+ */
+
+#ifndef HW_MISC_STMP_H
+#define HW_MISC_STMP_H
+
+#include "hw/qdev-properties.h"
+#include "hw/sysbus.h"
+
+#define TYPE_STMP_DEVICE "stmp-device"
+
+#define STMP_DEVICE(obj) \
+ OBJECT_CHECK(StmpDeviceState, (obj), TYPE_STMP_DEVICE)
+
+typedef struct {
+ SysBusDevice parent_obj;
+ MemoryRegion iomem;
+ char *name;
+ bool have_reset;
+ uint32_t regval;
+} StmpDeviceState;
+
+/**
+ * create_stmp_device: create and map a dummy device with STMP register layout
+ * @name: name of the device for debug logging
+ * @have_reset: True if the register has reset functionality
+ * @base: base address of the device's MMIO region
+ *
+ * This utility function creates and maps an instance of stmp-device,
+ * which is a dummy device which follows STMP register layout.
+ */
+static inline void create_stmp_device(const char *name, bool have_reset,
+ hwaddr base)
+{
+ DeviceState *dev = qdev_create(NULL, TYPE_STMP_DEVICE);
+
+ qdev_prop_set_string(dev, "name", name);
+ qdev_prop_set_bit(dev, "have-reset", have_reset);
+ qdev_init_nofail(dev);
+
+ sysbus_mmio_map_overlap(SYS_BUS_DEVICE(dev), 0, base, 0);
+}
+
+#endif
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/3] arm: fsl-imx6ul: Wire up USB controllers
2020-03-01 17:04 [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Guenter Roeck
2020-03-01 17:04 ` [PATCH 1/3] Add dummy i.MXS STMP register support Guenter Roeck
@ 2020-03-01 17:04 ` Guenter Roeck
2020-03-01 17:04 ` [PATCH 3/3] hw/arm/fsl-imx6: " Guenter Roeck
2020-03-09 17:09 ` [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Peter Maydell
3 siblings, 0 replies; 7+ messages in thread
From: Guenter Roeck @ 2020-03-01 17:04 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, qemu-devel, Guenter Roeck, Jean-Christophe Dubois
IMX6UL USB controllers are quite similar to IMX7 USB controllers.
Wire them up the same way.
The only real difference is that wiring up dummy phy devices is necessary
to avoid phy reset timeouts in the Linux kernel.
With this patch, the USB controllers on 'mcimx6ul-evk' are detected
and can be used to boot the system.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
hw/arm/Kconfig | 1 +
hw/arm/fsl-imx6ul.c | 35 +++++++++++++++++++++++++++++++++++
include/hw/arm/fsl-imx6ul.h | 7 +++++++
3 files changed, 43 insertions(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 61635f52c4..d09b012c5a 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -411,6 +411,7 @@ config FSL_IMX6UL
select IMX_FEC
select IMX_I2C
select SDHCI
+ select STMP
select UNIMP
config MICROBIT
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index c405b68d1d..d2ee4cc846 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/fsl-imx6ul.h"
+#include "hw/misc/stmp.h"
#include "hw/misc/unimp.h"
#include "hw/boards.h"
#include "sysemu/sysemu.h"
@@ -133,6 +134,14 @@ static void fsl_imx6ul_init(Object *obj)
TYPE_IMX_ENET);
}
+ /* USB */
+ for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) {
+ snprintf(name, NAME_SIZE, "usb%d", i);
+ sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]),
+ TYPE_CHIPIDEA);
+ }
+
+
/*
* SDHCI
*/
@@ -456,6 +465,32 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
}
+ /* USB */
+ for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) {
+ static const int FSL_IMX6UL_USBn_IRQ[] = {
+ FSL_IMX6UL_USB2_IRQ,
+ FSL_IMX6UL_USB1_IRQ,
+ };
+
+ object_property_set_bool(OBJECT(&s->usb[i]), true, "realized",
+ &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
+ FSL_IMX6UL_USBO2_USB_ADDR + i * 0x200);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->a7mpcore),
+ FSL_IMX6UL_USBn_IRQ[i]));
+
+ }
+ create_unimplemented_device("usbmisc", FSL_IMX6UL_USBO2_USBMISC_ADDR,
+ 0x200);
+ create_unimplemented_device("usbphy1", FSL_IMX6UL_USBPHY1_ADDR,
+ FSL_IMX6UL_USBPHY1_SIZE);
+ create_stmp_device("usbphy1-stmp", true, FSL_IMX6UL_USBPHY1_ADDR + 0x30);
+ create_unimplemented_device("usbphy2", FSL_IMX6UL_USBPHY2_ADDR,
+ FSL_IMX6UL_USBPHY2_SIZE);
+ create_stmp_device("usbphy2-stmp", true, FSL_IMX6UL_USBPHY2_ADDR + 0x30);
+
/*
* USDHC
*/
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index eda389aec7..ae738bd5ea 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -34,6 +34,7 @@
#include "hw/sd/sdhci.h"
#include "hw/ssi/imx_spi.h"
#include "hw/net/imx_fec.h"
+#include "hw/usb/chipidea.h"
#include "exec/memory.h"
#include "cpu.h"
@@ -54,6 +55,7 @@ enum FslIMX6ULConfiguration {
FSL_IMX6UL_NUM_I2CS = 4,
FSL_IMX6UL_NUM_ECSPIS = 4,
FSL_IMX6UL_NUM_ADCS = 2,
+ FSL_IMX6UL_NUM_USBS = 2,
};
typedef struct FslIMX6ULState {
@@ -77,6 +79,7 @@ typedef struct FslIMX6ULState {
IMXFECState eth[FSL_IMX6UL_NUM_ETHS];
SDHCIState usdhc[FSL_IMX6UL_NUM_USDHCS];
IMX2WdtState wdt[FSL_IMX6UL_NUM_WDTS];
+ ChipideaState usb[FSL_IMX6UL_NUM_USBS];
MemoryRegion rom;
MemoryRegion caam;
MemoryRegion ocram;
@@ -145,6 +148,10 @@ enum FslIMX6ULMemoryMap {
FSL_IMX6UL_EPIT2_ADDR = 0x020D4000,
FSL_IMX6UL_EPIT1_ADDR = 0x020D0000,
FSL_IMX6UL_SNVS_HP_ADDR = 0x020CC000,
+ FSL_IMX6UL_USBPHY2_ADDR = 0x020CA000,
+ FSL_IMX6UL_USBPHY2_SIZE = (4 * 1024),
+ FSL_IMX6UL_USBPHY1_ADDR = 0x020C9000,
+ FSL_IMX6UL_USBPHY1_SIZE = (4 * 1024),
FSL_IMX6UL_ANALOG_ADDR = 0x020C8000,
FSL_IMX6UL_CCM_ADDR = 0x020C4000,
FSL_IMX6UL_WDOG2_ADDR = 0x020C0000,
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/3] hw/arm/fsl-imx6: Wire up USB controllers
2020-03-01 17:04 [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Guenter Roeck
2020-03-01 17:04 ` [PATCH 1/3] Add dummy i.MXS STMP register support Guenter Roeck
2020-03-01 17:04 ` [PATCH 2/3] arm: fsl-imx6ul: Wire up USB controllers Guenter Roeck
@ 2020-03-01 17:04 ` Guenter Roeck
2020-03-09 17:09 ` [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Peter Maydell
3 siblings, 0 replies; 7+ messages in thread
From: Guenter Roeck @ 2020-03-01 17:04 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, qemu-devel, Guenter Roeck, Jean-Christophe Dubois
With this patch, the USB controllers on 'sabrelite' are detected
and can be used to boot the system.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
hw/arm/Kconfig | 2 ++
hw/arm/fsl-imx6.c | 36 ++++++++++++++++++++++++++++++++++++
include/hw/arm/fsl-imx6.h | 3 +++
3 files changed, 41 insertions(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index d09b012c5a..5d12b0f686 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -361,6 +361,8 @@ config FSL_IMX6
select IMX_FEC
select IMX_I2C
select SDHCI
+ select STMP
+ select UNIMP
config ASPEED_SOC
bool
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index ecc62855f2..9a4a0eb35e 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -22,6 +22,8 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/fsl-imx6.h"
+#include "hw/misc/stmp.h"
+#include "hw/misc/unimp.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
#include "sysemu/sysemu.h"
@@ -86,6 +88,12 @@ static void fsl_imx6_init(Object *obj)
TYPE_IMX_USDHC);
}
+ for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
+ snprintf(name, NAME_SIZE, "usb%d", i);
+ sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]),
+ TYPE_CHIPIDEA);
+ }
+
for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
snprintf(name, NAME_SIZE, "spi%d", i + 1);
sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]),
@@ -349,6 +357,34 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
esdhc_table[i].irq));
}
+ /* USB */
+ for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
+ static const int FSL_IMX6_USBn_IRQ[] = {
+ FSL_IMX6_USB_OTG_IRQ,
+ FSL_IMX6_USB_HOST1_IRQ,
+ FSL_IMX6_USB_HOST2_IRQ,
+ FSL_IMX6_USB_HOST3_IRQ,
+ };
+
+ object_property_set_bool(OBJECT(&s->usb[i]), true, "realized",
+ &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
+ FSL_IMX6_USBOH3_USB_ADDR + i * 0x200);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->a9mpcore),
+ FSL_IMX6_USBn_IRQ[i]));
+
+ }
+ create_unimplemented_device("usbmisc", FSL_IMX6_USBOH3_USB_ADDR + 0x800,
+ 0x200);
+ create_unimplemented_device("usbphy1", FSL_IMX6_USBPHY1_ADDR,
+ FSL_IMX6_USBPHY1_SIZE);
+ create_stmp_device("usbphy1-stmp", true, FSL_IMX6_USBPHY1_ADDR + 0x30);
+ create_unimplemented_device("usbphy2", FSL_IMX6_USBPHY2_ADDR,
+ FSL_IMX6_USBPHY2_SIZE);
+ create_stmp_device("usbphy2-stmp", true, FSL_IMX6_USBPHY2_ADDR + 0x30);
+
/* Initialize all ECSPI */
for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
static const struct {
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 60eadccb42..a3d1f34598 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -30,6 +30,7 @@
#include "hw/sd/sdhci.h"
#include "hw/ssi/imx_spi.h"
#include "hw/net/imx_fec.h"
+#include "hw/usb/chipidea.h"
#include "exec/memory.h"
#include "cpu.h"
@@ -44,6 +45,7 @@
#define FSL_IMX6_NUM_ESDHCS 4
#define FSL_IMX6_NUM_ECSPIS 5
#define FSL_IMX6_NUM_WDTS 2
+#define FSL_IMX6_NUM_USBS 4
typedef struct FslIMX6State {
/*< private >*/
@@ -62,6 +64,7 @@ typedef struct FslIMX6State {
SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS];
IMXSPIState spi[FSL_IMX6_NUM_ECSPIS];
IMX2WdtState wdt[FSL_IMX6_NUM_WDTS];
+ ChipideaState usb[FSL_IMX6_NUM_USBS];
IMXFECState eth;
MemoryRegion rom;
MemoryRegion caam;
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul
2020-03-01 17:04 [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Guenter Roeck
` (2 preceding siblings ...)
2020-03-01 17:04 ` [PATCH 3/3] hw/arm/fsl-imx6: " Guenter Roeck
@ 2020-03-09 17:09 ` Peter Maydell
2020-03-09 17:27 ` Guenter Roeck
3 siblings, 1 reply; 7+ messages in thread
From: Peter Maydell @ 2020-03-09 17:09 UTC (permalink / raw)
To: Guenter Roeck; +Cc: qemu-arm, QEMU Developers, Jean-Christophe Dubois
On Sun, 1 Mar 2020 at 17:04, Guenter Roeck <linux@roeck-us.net> wrote:
>
> This patch series wires up the USB controllers on fsl-imx6 and fsl-imx6ul
> emulations.
>
> The first patch is a prerequisite for the following patches. It provides
> a dummy implementation of a register widely used on i.MX systems, and
> specifically the reset behavior of this register. This is needed to make
> the USB ports operational without full implementation of an emulation
> of its PHY controller.
>
> ----------------------------------------------------------------
> Guenter Roeck (3):
> Add dummy i.MXS STMP register support
> arm: fsl-imx6ul: Wire up USB controllers
> hw/arm/fsl-imx6: Wire up USB controllers
I'm not a huge fan of the "dummy device that's really just
implementing 4 registers from the middle of some other
device" approach. Unless you think we're strongly likely
to want to use it in other places, I think I'd prefer
to just implement a (minimal/no-functionality) model of
the PHY register block.
thanks
-- PMM
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul
2020-03-09 17:09 ` [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul Peter Maydell
@ 2020-03-09 17:27 ` Guenter Roeck
2020-03-09 17:29 ` Peter Maydell
0 siblings, 1 reply; 7+ messages in thread
From: Guenter Roeck @ 2020-03-09 17:27 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, QEMU Developers, Jean-Christophe Dubois
On Mon, Mar 09, 2020 at 05:09:21PM +0000, Peter Maydell wrote:
> On Sun, 1 Mar 2020 at 17:04, Guenter Roeck <linux@roeck-us.net> wrote:
> >
> > This patch series wires up the USB controllers on fsl-imx6 and fsl-imx6ul
> > emulations.
> >
> > The first patch is a prerequisite for the following patches. It provides
> > a dummy implementation of a register widely used on i.MX systems, and
> > specifically the reset behavior of this register. This is needed to make
> > the USB ports operational without full implementation of an emulation
> > of its PHY controller.
> >
> > ----------------------------------------------------------------
> > Guenter Roeck (3):
> > Add dummy i.MXS STMP register support
> > arm: fsl-imx6ul: Wire up USB controllers
> > hw/arm/fsl-imx6: Wire up USB controllers
>
> I'm not a huge fan of the "dummy device that's really just
> implementing 4 registers from the middle of some other
> device" approach. Unless you think we're strongly likely
> to want to use it in other places, I think I'd prefer
> to just implement a (minimal/no-functionality) model of
> the PHY register block.
>
Sure, no problem; I don't really have a preference. What would be
the best place for such a dummy phy ?
Thanks,
Guenter
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/3] Wire up USB controllers on fsl-imx6 and fsl-imx6ul
2020-03-09 17:27 ` Guenter Roeck
@ 2020-03-09 17:29 ` Peter Maydell
0 siblings, 0 replies; 7+ messages in thread
From: Peter Maydell @ 2020-03-09 17:29 UTC (permalink / raw)
To: Guenter Roeck; +Cc: qemu-arm, QEMU Developers, Jean-Christophe Dubois
On Mon, 9 Mar 2020 at 17:27, Guenter Roeck <linux@roeck-us.net> wrote:
> Sure, no problem; I don't really have a preference. What would be
> the best place for such a dummy phy ?
hw/usb, I guess. hw/usb/imx-usb-phy.c ?
thanks
-- PMM
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