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From: Peter Maydell <peter.maydell@linaro.org>
To: Shannon Zhao <shannon.zhao@linaro.org>
Cc: Shannon Zhao <zhaoshenglong@huawei.com>,
	qemu-arm <qemu-arm@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Patch Tracking <patches@linaro.org>,
	Shlomo Pongratz <shlomo.pongratz@huawei.com>,
	Shlomo Pongratz <shlomopongratz@gmail.com>,
	Pavel Fedin <p.fedin@samsung.com>,
	Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 00/23] GICv3 emulation
Date: Thu, 12 May 2016 16:22:40 +0100	[thread overview]
Message-ID: <CAFEAcA9xXO6GA3MkLEprWNSUW8ayWZkT4xcY01ek6zOvm0GP3A@mail.gmail.com> (raw)
In-Reply-To: <57349AC9.5070407@linaro.org>

On 12 May 2016 at 16:01, Shannon Zhao <shannon.zhao@linaro.org> wrote:
> On 2016年05月12日 22:35, Peter Maydell wrote:
>> Can you put the Image file somewhere I can download it, please?
> I just upload it to
> http://people.linaro.org/~shannon.zhao/ACPI_ARM/Image

OK, I can reproduce with that, and I think I know what this is.
If we boot a "-bios" image then we don't apply the QEMU workaround
for booting buggy Linux images which puts all the interrupts into
Group 1, and it looks like a no-TZ-support UEFI doesn't
configure the interrupt groups either. So Linux ends up hanging
because the interrupt is group 0 but group 0 is disabled.

If you apply this patch to your guest kernel you should find
it boots OK I think:
https://lkml.org/lkml/2016/5/10/297

(I'm not sure why the images I was running worked OK; I must
have been testing with an image that had that bugfix in it,
though I could have sworn I wasn't.)

I don't really want to apply the QEMU workaround when we're
booting firmware images as well as raw kernels, but on the
other hand via-UEFI is kind of supposed to be the normal way
to boot in future. Perhaps we should drop the QEMU workaround
altogether, putting everybody on the same playing field...

thanks
-- PMM

  reply	other threads:[~2016-05-12 15:23 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-09 17:29 [Qemu-devel] [PATCH 00/23] GICv3 emulation Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 01/23] migration: Define VMSTATE_UINT64_2DARRAY Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 02/23] bitops.h: Implement half-shuffle and half-unshuffle ops Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 03/23] target-arm: Define new arm_is_el3_or_mon() function Peter Maydell
2016-05-10 13:42   ` Shannon Zhao
2016-05-09 17:29 ` [Qemu-devel] [PATCH 04/23] target-arm: Provide hook to tell GICv3 about changes of security state Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 05/23] target-arm: Add mp-affinity property for ARM CPU class Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 06/23] hw/intc/arm_gicv3: Add state information Peter Maydell
2016-05-19  9:36   ` Shannon Zhao
2016-05-19  9:47     ` Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 07/23] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 08/23] hw/intc/arm_gicv3: Add vmstate descriptors Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 09/23] hw/intc/arm_gicv3: ARM GICv3 device framework Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 10/23] hw/intc/arm_gicv3: Implement functions to identify next pending irq Peter Maydell
2016-05-19 12:59   ` Shannon Zhao
2016-05-19 13:21     ` Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 11/23] hw/intc/arm_gicv3: Implement GICv3 distributor registers Peter Maydell
2016-05-13 15:05   ` Shannon Zhao
2016-05-13 15:24     ` Peter Maydell
2016-05-16  8:56       ` Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 12/23] hw/intc/arm_gicv3: Implement GICv3 redistributor registers Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 13/23] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 14/23] hw/intc/arm_gicv3: Implement gicv3_set_irq() Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 15/23] hw/intc/arm_gicv3: Implement GICv3 CPU interface registers Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 16/23] hw/intc/arm_gicv3: Implement gicv3_cpuif_update() Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 17/23] hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 18/23] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 19/23] target-arm/machine.c: Allow user to request GICv3 emulation Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 20/23] target-arm/monitor.c: Advertise emulated GICv3 in capabilities Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 21/23] hw/intc/arm_gicv3: Work around Linux assuming interrupts are group 1 Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 22/23] NOT-FOR-UPSTREAM: kernel: Add definitions for GICv3 attributes Peter Maydell
2016-05-09 17:29 ` [Qemu-devel] [PATCH 23/23] RFC: hw/intc/arm_gicv3_kvm: Implement get/put functions Peter Maydell
2016-05-11  6:51 ` [Qemu-devel] [PATCH 00/23] GICv3 emulation Shannon Zhao
2016-05-12 13:53   ` Peter Maydell
2016-05-12 14:31     ` Shannon Zhao
2016-05-12 14:35       ` Peter Maydell
2016-05-12 15:01         ` Shannon Zhao
2016-05-12 15:22           ` Peter Maydell [this message]
2016-05-13 14:35             ` Shannon Zhao
2016-05-25 14:50 ` Shannon Zhao

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