* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2015-06-26 13:31 Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 1/7] hw/arm/virt-acpi-build: Fix table revision and some comments Peter Maydell
` (7 more replies)
0 siblings, 8 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
target-arm queue: a few new features, but all minor stuff.
thanks
-- PMM
The following changes since commit ccb0c7e122db72d3a5da798c6414d4912bba828f:
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150626' into staging (2015-06-26 11:32:58 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150626
for you to fetch changes up to 4e2c0b2a4ab810c8989e181a010e75aeaa1c55f3:
hw/arm/virt: Make block devices default to virtio (2015-06-26 14:22:37 +0100)
----------------------------------------------------------------
target-arm queue:
* Change the virt board's default interface type for block devices to virtio
* Improve some error messages that will now be triggered by some incorrect
but previously worked-by-accident command lines
* Print ELR if we're doing debug logging of AArch64 exception entry
* Handle the "completely empty semihosting commandline" correctly for
softmmu (we already did for linux-user)
* Add GICv2m description to ACPI tables for virt board
* Fix some incorrect table revision entries in virt board ACPI tables
----------------------------------------------------------------
Liviu Ionescu (1):
target-arm: default empty semihosting cmdline
Peter Maydell (3):
qdev-properties-system: Change set_pointer's parse callback to use Error
qdev-properties-system: Improve error message for drive assignment conflict
hw/arm/virt: Make block devices default to virtio
Shannon Zhao (2):
hw/arm/virt-acpi-build: Fix table revision and some comments
hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT table
Soren Brinkmann (1):
target-arm: A64: Print ELR when taking exceptions
hw/arm/virt-acpi-build.c | 22 ++++++++++++++++-----
hw/arm/virt.c | 2 ++
hw/core/qdev-properties-system.c | 42 +++++++++++++++++++++++++++-------------
include/hw/acpi/acpi-defs.h | 12 ++++++++++++
target-arm/arm-semi.c | 11 +++++++++--
target-arm/helper-a64.c | 2 ++
6 files changed, 71 insertions(+), 20 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 1/7] hw/arm/virt-acpi-build: Fix table revision and some comments
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 2/7] hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT table Peter Maydell
` (6 subsequent siblings)
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
From: Shannon Zhao <shannon.zhao@linaro.org>
The table revision is not the ACPI spec version. Fix the wrong revision
and also some comments.
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 1433820378-8336-1-git-send-email-zhaoshenglong@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt-acpi-build.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index d5a8b9c..40029dd 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -387,7 +387,7 @@ build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
mcfg->allocation[0].end_bus_number = (memmap[VIRT_PCIE_ECAM].size
/ PCIE_MMCFG_SIZE_MIN) - 1;
- build_header(linker, table_data, (void *)mcfg, "MCFG", len, 5);
+ build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1);
}
/* GTDT */
@@ -413,7 +413,7 @@ build_gtdt(GArray *table_data, GArray *linker)
build_header(linker, table_data,
(void *)(table_data->data + gtdt_start), "GTDT",
- table_data->len - gtdt_start, 5);
+ table_data->len - gtdt_start, 2);
}
/* MADT */
@@ -450,7 +450,7 @@ build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info,
build_header(linker, table_data,
(void *)(table_data->data + madt_start), "APIC",
- table_data->len - madt_start, 5);
+ table_data->len - madt_start, 3);
}
/* FADT */
@@ -507,7 +507,7 @@ build_dsdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
build_header(linker, table_data,
(void *)(table_data->data + table_data->len - dsdt->buf->len),
- "DSDT", dsdt->buf->len, 5);
+ "DSDT", dsdt->buf->len, 2);
free_aml_allocator();
}
@@ -545,6 +545,7 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
* FADT
* GTDT
* MADT
+ * MCFG
* DSDT
*/
@@ -552,7 +553,7 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
dsdt = tables_blob->len;
build_dsdt(tables_blob, tables->linker, guest_info);
- /* FADT MADT GTDT SPCR pointed to by RSDT */
+ /* FADT MADT GTDT MCFG SPCR pointed to by RSDT */
acpi_add_table(table_offsets, tables_blob);
build_fadt(tables_blob, tables->linker, dsdt);
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 2/7] hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT table
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 1/7] hw/arm/virt-acpi-build: Fix table revision and some comments Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 3/7] target-arm: default empty semihosting cmdline Peter Maydell
` (5 subsequent siblings)
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
From: Shannon Zhao <shannon.zhao@linaro.org>
Add GICv2m description in ACPI MADT table, so guest can use MSI when
booting with ACPI.
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Tested-by: Andrew Jones <drjones@redhat.com>
Message-id: 1434676210-2276-1-git-send-email-shannon.zhao@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt-acpi-build.c | 11 +++++++++++
include/hw/acpi/acpi-defs.h | 12 ++++++++++++
2 files changed, 23 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 40029dd..f365140 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -423,8 +423,10 @@ build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info,
{
int madt_start = table_data->len;
const MemMapEntry *memmap = guest_info->memmap;
+ const int *irqmap = guest_info->irqmap;
AcpiMultipleApicTable *madt;
AcpiMadtGenericDistributor *gicd;
+ AcpiMadtGenericMsiFrame *gic_msi;
int i;
madt = acpi_data_push(table_data, sizeof *madt);
@@ -448,6 +450,15 @@ build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info,
gicd->length = sizeof(*gicd);
gicd->base_address = memmap[VIRT_GIC_DIST].base;
+ gic_msi = acpi_data_push(table_data, sizeof *gic_msi);
+ gic_msi->type = ACPI_APIC_GENERIC_MSI_FRAME;
+ gic_msi->length = sizeof(*gic_msi);
+ gic_msi->gic_msi_frame_id = 0;
+ gic_msi->base_address = cpu_to_le64(memmap[VIRT_GIC_V2M].base);
+ gic_msi->flags = cpu_to_le32(1);
+ gic_msi->spi_count = cpu_to_le16(NUM_GICV2M_SPIS);
+ gic_msi->spi_base = cpu_to_le16(irqmap[VIRT_GIC_V2M] + ARM_SPI_BASE);
+
build_header(linker, table_data,
(void *)(table_data->data + madt_start), "APIC",
table_data->len - madt_start, 3);
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index 7b4bfb7..2b431e6 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -372,6 +372,18 @@ struct AcpiMadtGenericDistributor {
typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
+struct AcpiMadtGenericMsiFrame {
+ ACPI_SUB_HEADER_DEF
+ uint16_t reserved;
+ uint32_t gic_msi_frame_id;
+ uint64_t base_address;
+ uint32_t flags;
+ uint16_t spi_count;
+ uint16_t spi_base;
+} QEMU_PACKED;
+
+typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame;
+
/*
* Generic Timer Description Table (GTDT)
*/
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 3/7] target-arm: default empty semihosting cmdline
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 1/7] hw/arm/virt-acpi-build: Fix table revision and some comments Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 2/7] hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT table Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 4/7] target-arm: A64: Print ELR when taking exceptions Peter Maydell
` (4 subsequent siblings)
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
From: Liviu Ionescu <ilg@livius.net>
If neither explicit semihosting args nor -kernel are used,
make SYS_GET_CMDLINE return an empty string.
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Message-id: AC7B5AFC-06AE-4FAD-9852-B65708E80E09@livius.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/arm-semi.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c
index 74a67e9..a2a7369 100644
--- a/target-arm/arm-semi.c
+++ b/target-arm/arm-semi.c
@@ -436,12 +436,19 @@ uint32_t do_arm_semihosting(CPUARMState *env)
size_t input_size;
size_t output_size;
int status = 0;
+#if !defined(CONFIG_USER_ONLY)
+ const char *cmdline;
+#endif
GET_ARG(0);
GET_ARG(1);
input_size = arg1;
/* Compute the size of the output string. */
#if !defined(CONFIG_USER_ONLY)
- output_size = strlen(semihosting_get_cmdline()) + 1;
+ cmdline = semihosting_get_cmdline();
+ if (cmdline == NULL) {
+ cmdline = ""; /* Default to an empty line. */
+ }
+ output_size = strlen(cmdline) + 1; /* Count terminating 0. */
#else
unsigned int i;
@@ -472,7 +479,7 @@ uint32_t do_arm_semihosting(CPUARMState *env)
/* Copy the command-line arguments. */
#if !defined(CONFIG_USER_ONLY)
- pstrcpy(output_buffer, output_size, semihosting_get_cmdline());
+ pstrcpy(output_buffer, output_size, cmdline);
#else
if (output_size == 1) {
/* Empty command-line. */
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 4/7] target-arm: A64: Print ELR when taking exceptions
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
` (2 preceding siblings ...)
2015-06-26 13:31 ` [Qemu-devel] [PULL 3/7] target-arm: default empty semihosting cmdline Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 5/7] qdev-properties-system: Change set_pointer's parse callback to use Error Peter Maydell
` (3 subsequent siblings)
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
From: Soren Brinkmann <soren.brinkmann@xilinx.com>
When taking an exception print the content of the exception link
register. This is useful especially for synchronous exceptions because
in that case this registers holds the address of the instruction that
generated the exception.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Message-id: 1435036655-16132-1-git-send-email-soren.brinkmann@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper-a64.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index e30af06..08c95a3 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -533,6 +533,8 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
env->condexec_bits = 0;
}
+ qemu_log_mask(CPU_LOG_INT, "...with ELR 0x%" PRIx64 "\n",
+ env->elr_el[new_el]);
pstate_write(env, PSTATE_DAIF | new_mode);
env->aarch64 = 1;
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 5/7] qdev-properties-system: Change set_pointer's parse callback to use Error
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
` (3 preceding siblings ...)
2015-06-26 13:31 ` [Qemu-devel] [PULL 4/7] target-arm: A64: Print ELR when taking exceptions Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 6/7] qdev-properties-system: Improve error message for drive assignment conflict Peter Maydell
` (2 subsequent siblings)
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
Instead of having set_pointer() call a parse callback which returns
an error number that we then convert to an Error string with
error_set_from_qdev_prop_error(), make the parse callback take an
Error** and set the error itself. This will allow parse routines
to provide more helpful error messages than the generic ones.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1435068107-12594-2-git-send-email-peter.maydell@linaro.org
---
hw/core/qdev-properties-system.c | 33 ++++++++++++++++++++-------------
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
index aa794ca..c731bc6 100644
--- a/hw/core/qdev-properties-system.c
+++ b/hw/core/qdev-properties-system.c
@@ -35,15 +35,15 @@ static void get_pointer(Object *obj, Visitor *v, Property *prop,
}
static void set_pointer(Object *obj, Visitor *v, Property *prop,
- int (*parse)(DeviceState *dev, const char *str,
- void **ptr),
+ void (*parse)(DeviceState *dev, const char *str,
+ void **ptr, const char *propname,
+ Error **errp),
const char *name, Error **errp)
{
DeviceState *dev = DEVICE(obj);
Error *local_err = NULL;
void **ptr = qdev_get_prop_ptr(dev, prop);
char *str;
- int ret;
if (dev->realized) {
qdev_prop_set_after_realize(dev, name, errp);
@@ -60,26 +60,29 @@ static void set_pointer(Object *obj, Visitor *v, Property *prop,
*ptr = NULL;
return;
}
- ret = parse(dev, str, ptr);
- error_set_from_qdev_prop_error(errp, ret, dev, prop, str);
+ parse(dev, str, ptr, prop->name, errp);
g_free(str);
}
/* --- drive --- */
-static int parse_drive(DeviceState *dev, const char *str, void **ptr)
+static void parse_drive(DeviceState *dev, const char *str, void **ptr,
+ const char *propname, Error **errp)
{
BlockBackend *blk;
blk = blk_by_name(str);
if (!blk) {
- return -ENOENT;
+ error_setg(errp, "Property '%s.%s' can't find value '%s'",
+ object_get_typename(OBJECT(dev)), propname, str);
+ return;
}
if (blk_attach_dev(blk, dev) < 0) {
- return -EEXIST;
+ error_setg(errp, "Property '%s.%s' can't take value '%s', it's in use",
+ object_get_typename(OBJECT(dev)), propname, str);
+ return;
}
*ptr = blk;
- return 0;
}
static void release_drive(Object *obj, const char *name, void *opaque)
@@ -121,17 +124,21 @@ PropertyInfo qdev_prop_drive = {
/* --- character device --- */
-static int parse_chr(DeviceState *dev, const char *str, void **ptr)
+static void parse_chr(DeviceState *dev, const char *str, void **ptr,
+ const char *propname, Error **errp)
{
CharDriverState *chr = qemu_chr_find(str);
if (chr == NULL) {
- return -ENOENT;
+ error_setg(errp, "Property '%s.%s' can't find value '%s'",
+ object_get_typename(OBJECT(dev)), propname, str);
+ return;
}
if (qemu_chr_fe_claim(chr) != 0) {
- return -EEXIST;
+ error_setg(errp, "Property '%s.%s' can't take value '%s', it's in use",
+ object_get_typename(OBJECT(dev)), propname, str);
+ return;
}
*ptr = chr;
- return 0;
}
static void release_chr(Object *obj, const char *name, void *opaque)
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 6/7] qdev-properties-system: Improve error message for drive assignment conflict
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
` (4 preceding siblings ...)
2015-06-26 13:31 ` [Qemu-devel] [PULL 5/7] qdev-properties-system: Change set_pointer's parse callback to use Error Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 7/7] hw/arm/virt: Make block devices default to virtio Peter Maydell
2015-06-26 14:57 ` [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
If the user forgot if=none on their drive specification they're likely
to get an error message because the drive is assigned once automatically
by QEMU and once by the manual id=/drive= user command line specification.
Improve the error message produced in this case to explicitly guide the
user towards if=none.
We rephrase the "drive conflict but not for an if=something" error as
well to keep the wording in line.
The two cases that change are:
(1) Drive specified as to be auto-connected and also manually connected
(and the board does handle this if= type):
qemu-system-x86_64 -nodefaults -display none \
-drive if=scsi,file=tmp.qcow2,id=foo -device ide-hd,drive=foo
Previously:
qemu-system-x86_64: -device ide-hd,drive=foo: Property 'ide-hd.drive'
can't take value 'foo', it's in use
Now:
qemu-system-x86_64: -device ide-hd,drive=foo: Drive 'foo' is already in
use because it has been automatically connected to another device (did
you need 'if=none' in the drive options?)
(2) Drive specified to be manually connected in two different ways:
qemu-system-x86_64 -nodefaults -display none \
-drive if=none,file=tmp.qcow2,id=foo -device ide-hd,drive=foo \
-device ide-hd,drive=foo
Previously:
qemu-system-x86_64: -device ide-hd,drive=foo: Property 'ide-hd.drive'
can't take value 'foo', it's in use
Now:
qemu-system-x86_64: -device ide-hd,drive=foo: Drive 'foo' is already in
use by another device
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1435068107-12594-3-git-send-email-peter.maydell@linaro.org
---
hw/core/qdev-properties-system.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
index c731bc6..921e799 100644
--- a/hw/core/qdev-properties-system.c
+++ b/hw/core/qdev-properties-system.c
@@ -78,8 +78,17 @@ static void parse_drive(DeviceState *dev, const char *str, void **ptr,
return;
}
if (blk_attach_dev(blk, dev) < 0) {
- error_setg(errp, "Property '%s.%s' can't take value '%s', it's in use",
- object_get_typename(OBJECT(dev)), propname, str);
+ DriveInfo *dinfo = blk_legacy_dinfo(blk);
+
+ if (dinfo->type != IF_NONE) {
+ error_setg(errp, "Drive '%s' is already in use because "
+ "it has been automatically connected to another "
+ "device (did you need 'if=none' in the drive options?)",
+ str);
+ } else {
+ error_setg(errp, "Drive '%s' is already in use by another device",
+ str);
+ }
return;
}
*ptr = blk;
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 7/7] hw/arm/virt: Make block devices default to virtio
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
` (5 preceding siblings ...)
2015-06-26 13:31 ` [Qemu-devel] [PULL 6/7] qdev-properties-system: Improve error message for drive assignment conflict Peter Maydell
@ 2015-06-26 13:31 ` Peter Maydell
2015-06-26 14:57 ` [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 13:31 UTC (permalink / raw)
To: qemu-devel
Now we have virtio-pci, we can make the virt board's default block
device type be IF_VIRTIO. This allows users to use simplified
command lines that don't have to explicitly create virtio-pci-blk
devices; the -hda &c very short options now also work.
This means we also need to set no_cdrom to avoid getting a
default cdrom device -- this is needed because the virtio-blk
device will fail if it is connected to a block backend with
no media, which is what the default cdrom device typically is.
Providing a cdrom with media via -cdrom will succeed, but silently
create a device with non-removable medium. this is probably
not really what the user wants, but is the best we can do now.
Note that this change means that some command lines which used
to work (by accident) will stop working. Where a drive was connected
manually to a device but without 'if=none' being specified, we
used to treat this as an IDE drive, which we would then not autoplug
because the board doesn't support IDE. Now we will treat it as a
virtio disk and autoplug it, which means the attempt to use the
drive manually will fail:
qemu-system-arm: -drive file=img.qcow2,id=foo: Drive 'foo' is already
in use because it has been automatically connected to another device
(did you need 'if=none' in the drive options?)
The command line will have to be changed to include 'if=none', as the
error message suggests.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1435068107-12594-4-git-send-email-peter.maydell@linaro.org
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4e78083a..4846892 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -956,6 +956,8 @@ static void virt_class_init(ObjectClass *oc, void *data)
mc->init = machvirt_init;
mc->max_cpus = 8;
mc->has_dynamic_sysbus = true;
+ mc->block_default_type = IF_VIRTIO;
+ mc->no_cdrom = 1;
}
static const TypeInfo machvirt_info = {
--
1.9.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
` (6 preceding siblings ...)
2015-06-26 13:31 ` [Qemu-devel] [PULL 7/7] hw/arm/virt: Make block devices default to virtio Peter Maydell
@ 2015-06-26 14:57 ` Peter Maydell
7 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-06-26 14:57 UTC (permalink / raw)
To: QEMU Developers
On 26 June 2015 at 14:31, Peter Maydell <peter.maydell@linaro.org> wrote:
> target-arm queue: a few new features, but all minor stuff.
>
> thanks
> -- PMM
>
>
> The following changes since commit ccb0c7e122db72d3a5da798c6414d4912bba828f:
>
> Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150626' into staging (2015-06-26 11:32:58 +0100)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150626
>
> for you to fetch changes up to 4e2c0b2a4ab810c8989e181a010e75aeaa1c55f3:
>
> hw/arm/virt: Make block devices default to virtio (2015-06-26 14:22:37 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Change the virt board's default interface type for block devices to virtio
> * Improve some error messages that will now be triggered by some incorrect
> but previously worked-by-accident command lines
> * Print ELR if we're doing debug logging of AArch64 exception entry
> * Handle the "completely empty semihosting commandline" correctly for
> softmmu (we already did for linux-user)
> * Add GICv2m description to ACPI tables for virt board
> * Fix some incorrect table revision entries in virt board ACPI tables
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2017-11-07 13:35 Peter Maydell
@ 2017-11-07 14:32 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2017-11-07 14:32 UTC (permalink / raw)
To: QEMU Developers
On 7 November 2017 at 13:35, Peter Maydell <peter.maydell@linaro.org> wrote:
> A small set of arm bugfixes for rc0.
>
>
>
> The following changes since commit 5853e92207193e967abf5e4c25b4a551c7604725:
>
> Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20171107' into staging (2017-11-07 12:19:48 +0000)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171107
>
> for you to fetch changes up to 8a7348b5d62d7ea16807e6bea54b448a0184bb0f:
>
> hw/intc/arm_gicv3_its: Don't abort on table save failure (2017-11-07 13:03:52 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * arm_gicv3_its: Don't abort on table save failure
> * arm_gicv3_its: Fix the VM termination in vm_change_state_handler()
> * translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD
> * hw/arm: Mark the "fsl,imx31/25/6" devices with user_creatable = false
> * arm: implement cache/shareability attribute bits for PAR registers
>
> ----------------------------------------------------------------
> Andrew Baumann (1):
> arm: implement cache/shareability attribute bits for PAR registers
>
> Eric Auger (1):
> hw/intc/arm_gicv3_its: Don't abort on table save failure
>
> Peter Maydell (1):
> translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD
>
> Shanker Donthineni (1):
> hw/intc/arm_gicv3_its: Fix the VM termination in vm_change_state_handler()
>
> Thomas Huth (3):
> hw/arm: Mark the "fsl,imx6" device with user_creatable = false
> hw/arm: Mark the "fsl,imx25" device with user_creatable = false
> hw/arm: Mark the "fsl,imx31" device with user_creatable = false
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2017-11-07 13:35 Peter Maydell
2017-11-07 14:32 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2017-11-07 13:35 UTC (permalink / raw)
To: qemu-devel
A small set of arm bugfixes for rc0.
The following changes since commit 5853e92207193e967abf5e4c25b4a551c7604725:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20171107' into staging (2017-11-07 12:19:48 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171107
for you to fetch changes up to 8a7348b5d62d7ea16807e6bea54b448a0184bb0f:
hw/intc/arm_gicv3_its: Don't abort on table save failure (2017-11-07 13:03:52 +0000)
----------------------------------------------------------------
target-arm queue:
* arm_gicv3_its: Don't abort on table save failure
* arm_gicv3_its: Fix the VM termination in vm_change_state_handler()
* translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD
* hw/arm: Mark the "fsl,imx31/25/6" devices with user_creatable = false
* arm: implement cache/shareability attribute bits for PAR registers
----------------------------------------------------------------
Andrew Baumann (1):
arm: implement cache/shareability attribute bits for PAR registers
Eric Auger (1):
hw/intc/arm_gicv3_its: Don't abort on table save failure
Peter Maydell (1):
translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD
Shanker Donthineni (1):
hw/intc/arm_gicv3_its: Fix the VM termination in vm_change_state_handler()
Thomas Huth (3):
hw/arm: Mark the "fsl,imx6" device with user_creatable = false
hw/arm: Mark the "fsl,imx25" device with user_creatable = false
hw/arm: Mark the "fsl,imx31" device with user_creatable = false
hw/arm/fsl-imx25.c | 6 +-
hw/arm/fsl-imx31.c | 6 +-
hw/arm/fsl-imx6.c | 3 +-
hw/intc/arm_gicv3_its_kvm.c | 12 +--
target/arm/helper.c | 178 ++++++++++++++++++++++++++++++++++++++++----
target/arm/translate.c | 39 ++++++++--
6 files changed, 214 insertions(+), 30 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2017-07-31 12:22 Peter Maydell
@ 2017-07-31 15:40 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2017-07-31 15:40 UTC (permalink / raw)
To: QEMU Developers
On 31 July 2017 at 13:22, Peter Maydell <peter.maydell@linaro.org> wrote:
> ARM queue for 2.10: all M profile bugfixes...
>
> thanks
> -- PMM
>
> The following changes since commit 25dd0e77898c3e10796d4cbeb35e8af5ba6ce975:
>
> Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into staging (2017-07-31 11:27:43 +0100)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170731
>
> for you to fetch changes up to 89cbc3778a3d61761e2231e740269218c9a8a41d:
>
> hw/mps2_scc: fix incorrect properties (2017-07-31 13:11:56 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * fix broken properties on MPS2 SCC device
> * fix MPU trace handling of write vs exec
> * fix MPU M profile bugs:
> - not handling system space or PPB region correctly
> - not resetting state
> - not migrating MPU_RNR
>
> ----------------------------------------------------------------
> Peter Maydell (6):
> target/arm: Correct MPU trace handling of write vs execute
> target/arm: Don't do MPU lookups for addresses in M profile PPB region
> target/arm: Don't allow guest to make System space executable for M profile
> target/arm: Rename cp15.c6_rgnr to pmsav7.rnr
> target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset
> target/arm: Migrate MPU_RNR register state for M profile cores
>
> Philippe Mathieu-Daudé (1):
> hw/mps2_scc: fix incorrect properties
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2017-07-31 12:22 Peter Maydell
2017-07-31 15:40 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2017-07-31 12:22 UTC (permalink / raw)
To: qemu-devel
ARM queue for 2.10: all M profile bugfixes...
thanks
-- PMM
The following changes since commit 25dd0e77898c3e10796d4cbeb35e8af5ba6ce975:
Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into staging (2017-07-31 11:27:43 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170731
for you to fetch changes up to 89cbc3778a3d61761e2231e740269218c9a8a41d:
hw/mps2_scc: fix incorrect properties (2017-07-31 13:11:56 +0100)
----------------------------------------------------------------
target-arm queue:
* fix broken properties on MPS2 SCC device
* fix MPU trace handling of write vs exec
* fix MPU M profile bugs:
- not handling system space or PPB region correctly
- not resetting state
- not migrating MPU_RNR
----------------------------------------------------------------
Peter Maydell (6):
target/arm: Correct MPU trace handling of write vs execute
target/arm: Don't do MPU lookups for addresses in M profile PPB region
target/arm: Don't allow guest to make System space executable for M profile
target/arm: Rename cp15.c6_rgnr to pmsav7.rnr
target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset
target/arm: Migrate MPU_RNR register state for M profile cores
Philippe Mathieu-Daudé (1):
hw/mps2_scc: fix incorrect properties
target/arm/cpu.h | 3 +--
hw/intc/armv7m_nvic.c | 14 +++++-----
hw/misc/mps2-scc.c | 4 +--
target/arm/cpu.c | 14 ++++++++++
target/arm/helper.c | 71 ++++++++++++++++++++++++++++++++++-----------------
target/arm/machine.c | 30 +++++++++++++++++++++-
6 files changed, 101 insertions(+), 35 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-11-10 17:12 ` Peter Crosthwaite
@ 2015-11-10 17:13 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-11-10 17:13 UTC (permalink / raw)
To: Peter Crosthwaite; +Cc: QEMU Developers
On 10 November 2015 at 17:12, Peter Crosthwaite
<crosthwaitepeter@gmail.com> wrote:
> On Tue, Nov 10, 2015 at 8:38 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
>> On 10 November 2015 at 13:51, Peter Maydell <peter.maydell@linaro.org> wrote:
>>> A small set of ARM patches, notably fixing bugs in breakpoint
>>> and singlestep code, and repairing the long-broken highbank model.
>>>
>>> The only other ARM thing I have on my radar for 2.5 is the Zynq
>>> ADC controller, which I'll send separately if it makes it before
>>> the freeze deadline.
>>>
>
> It is on list I think. I don't see further review:
>
> [PATCH for-2.5 v4 1/1] hw/misc: Add support for ADC controller in
> Xilinx Zynq 7000
Ah yes, found it -- not sure why my search didn't turn it up earlier.
thanks
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-11-10 16:38 ` Peter Maydell
@ 2015-11-10 17:12 ` Peter Crosthwaite
2015-11-10 17:13 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Crosthwaite @ 2015-11-10 17:12 UTC (permalink / raw)
To: Peter Maydell; +Cc: QEMU Developers
On Tue, Nov 10, 2015 at 8:38 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 10 November 2015 at 13:51, Peter Maydell <peter.maydell@linaro.org> wrote:
>> A small set of ARM patches, notably fixing bugs in breakpoint
>> and singlestep code, and repairing the long-broken highbank model.
>>
>> The only other ARM thing I have on my radar for 2.5 is the Zynq
>> ADC controller, which I'll send separately if it makes it before
>> the freeze deadline.
>>
It is on list I think. I don't see further review:
[PATCH for-2.5 v4 1/1] hw/misc: Add support for ADC controller in
Xilinx Zynq 7000
Regards,
Peter
>> thanks
>> -- PMM
>>
>> The following changes since commit a8b4f9585a0bf5186fca793ce2c5d754cd8ec49a:
>>
>> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-11-10' into staging (2015-11-10 09:39:24 +0000)
>>
>> are available in the git repository at:
>>
>>
>> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20151110
>>
>> for you to fetch changes up to 577bf808958d06497928c639efaa473bf8c5e099:
>>
>> target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code (2015-11-10 13:37:33 +0000)
>>
>> ----------------------------------------------------------------
>> target-arm queue:
>> * fix bugs in gdb singlestep handling and breakpoints
>> * minor code cleanup in arm_gic
>> * clean up error messages in hw/arm/virt
>> * fix highbank kernel booting by adding a board-setup blob
>>
>
> Applied, thanks.
>
> -- PMM
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-11-10 13:51 Peter Maydell
@ 2015-11-10 16:38 ` Peter Maydell
2015-11-10 17:12 ` Peter Crosthwaite
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2015-11-10 16:38 UTC (permalink / raw)
To: QEMU Developers
On 10 November 2015 at 13:51, Peter Maydell <peter.maydell@linaro.org> wrote:
> A small set of ARM patches, notably fixing bugs in breakpoint
> and singlestep code, and repairing the long-broken highbank model.
>
> The only other ARM thing I have on my radar for 2.5 is the Zynq
> ADC controller, which I'll send separately if it makes it before
> the freeze deadline.
>
> thanks
> -- PMM
>
> The following changes since commit a8b4f9585a0bf5186fca793ce2c5d754cd8ec49a:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-11-10' into staging (2015-11-10 09:39:24 +0000)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20151110
>
> for you to fetch changes up to 577bf808958d06497928c639efaa473bf8c5e099:
>
> target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code (2015-11-10 13:37:33 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * fix bugs in gdb singlestep handling and breakpoints
> * minor code cleanup in arm_gic
> * clean up error messages in hw/arm/virt
> * fix highbank kernel booting by adding a board-setup blob
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2015-11-10 13:51 Peter Maydell
2015-11-10 16:38 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2015-11-10 13:51 UTC (permalink / raw)
To: qemu-devel
A small set of ARM patches, notably fixing bugs in breakpoint
and singlestep code, and repairing the long-broken highbank model.
The only other ARM thing I have on my radar for 2.5 is the Zynq
ADC controller, which I'll send separately if it makes it before
the freeze deadline.
thanks
-- PMM
The following changes since commit a8b4f9585a0bf5186fca793ce2c5d754cd8ec49a:
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-11-10' into staging (2015-11-10 09:39:24 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20151110
for you to fetch changes up to 577bf808958d06497928c639efaa473bf8c5e099:
target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code (2015-11-10 13:37:33 +0000)
----------------------------------------------------------------
target-arm queue:
* fix bugs in gdb singlestep handling and breakpoints
* minor code cleanup in arm_gic
* clean up error messages in hw/arm/virt
* fix highbank kernel booting by adding a board-setup blob
----------------------------------------------------------------
Andrew Jones (1):
hw/arm/virt: error_report cleanups
Peter Crosthwaite (3):
arm: boot: Add secure_board_setup flag
arm: highbank: Defeature CPU override
arm: highbank: Implement PSCI and dummy monitor
Sergey Fedorov (2):
target-arm: Fix gdb singlestep handling in arm_debug_excp_handler()
target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code
Wei Huang (1):
hw/intc/arm_gic: Remove the definition of NUM_CPU
hw/arm/boot.c | 10 +++++-
hw/arm/highbank.c | 91 +++++++++++++++++++++++++++++++++++++-------------
hw/arm/virt.c | 10 +++---
hw/intc/arm_gic.c | 8 ++---
include/hw/arm/arm.h | 6 ++++
target-arm/op_helper.c | 8 ++++-
target-arm/translate.c | 25 ++++++++------
7 files changed, 111 insertions(+), 47 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-09-24 0:31 Peter Maydell
2015-09-24 8:36 ` Pavel Fedin
@ 2015-09-24 16:04 ` Peter Maydell
1 sibling, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-09-24 16:04 UTC (permalink / raw)
To: QEMU Developers
On 23 September 2015 at 17:31, Peter Maydell <peter.maydell@linaro.org> wrote:
> Try number 2 with format string fix...
>
> -- PMM
>
> The following changes since commit fefa4b128de06cec6d513f00ee61e8208aed4a87:
>
> Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20150923.0' into staging (2015-09-23 21:39:46 +0100)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150924
>
> for you to fetch changes up to 85b4d5dae12580ecdd446c0f71afa04a95641c91:
>
> MAINTAINERS: update Allwinner A10 maintainer (2015-09-24 01:29:37 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * support VGICv3 in KVM
> * fix bug in ACPI table entries for flash devices in virt board
> * update Allwinner entry in MAINTAINERS
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-09-24 0:31 Peter Maydell
@ 2015-09-24 8:36 ` Pavel Fedin
2015-09-24 16:04 ` Peter Maydell
1 sibling, 0 replies; 29+ messages in thread
From: Pavel Fedin @ 2015-09-24 8:36 UTC (permalink / raw)
To: 'Peter Maydell', qemu-devel
Cc: 'Shlomo Pongratz', 'Shlomo Pongratz'
Hello!
Thank you very much for your support and cooperation. I am back from my vacation and continuing my
work on live migration. Actually i already have working code, but need to settle down kernel API
first.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2015-09-24 0:31 Peter Maydell
2015-09-24 8:36 ` Pavel Fedin
2015-09-24 16:04 ` Peter Maydell
0 siblings, 2 replies; 29+ messages in thread
From: Peter Maydell @ 2015-09-24 0:31 UTC (permalink / raw)
To: qemu-devel
Try number 2 with format string fix...
-- PMM
The following changes since commit fefa4b128de06cec6d513f00ee61e8208aed4a87:
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20150923.0' into staging (2015-09-23 21:39:46 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150924
for you to fetch changes up to 85b4d5dae12580ecdd446c0f71afa04a95641c91:
MAINTAINERS: update Allwinner A10 maintainer (2015-09-24 01:29:37 +0100)
----------------------------------------------------------------
target-arm queue:
* support VGICv3 in KVM
* fix bug in ACPI table entries for flash devices in virt board
* update Allwinner entry in MAINTAINERS
----------------------------------------------------------------
Beniamino Galvani (1):
MAINTAINERS: update Allwinner A10 maintainer
Pavel Fedin (4):
intc/gic: Extract some reusable vGIC code
arm_kvm: Do not assume particular GIC type in kvm_arch_irqchip_create()
hw/intc: Initial implementation of vGICv3
hw/arm/virt: Add gic-version option to virt machine
Shannon Zhao (1):
hw/arm/virt-acpi-build: Fix wrong size of flash in ACPI table
Shlomo Pongratz (1):
hw/intc: Implement GIC-500 base class
MAINTAINERS | 6 +-
hw/arm/virt-acpi-build.c | 56 ++++++++------
hw/arm/virt.c | 124 ++++++++++++++++++++++++------
hw/intc/Makefile.objs | 2 +
hw/intc/arm_gic_kvm.c | 98 ++++++++----------------
hw/intc/arm_gicv3_common.c | 140 ++++++++++++++++++++++++++++++++++
hw/intc/arm_gicv3_kvm.c | 149 +++++++++++++++++++++++++++++++++++++
hw/intc/vgic_common.h | 35 +++++++++
include/hw/acpi/acpi-defs.h | 9 +++
include/hw/arm/virt-acpi-build.h | 1 +
include/hw/arm/virt.h | 4 +-
include/hw/intc/arm_gicv3_common.h | 68 +++++++++++++++++
include/sysemu/kvm.h | 26 +++++++
kvm-all.c | 34 +++++++++
target-arm/kvm.c | 19 +++--
target-arm/kvm_arm.h | 19 +++++
target-arm/machine.c | 18 +++++
17 files changed, 686 insertions(+), 122 deletions(-)
create mode 100644 hw/intc/arm_gicv3_common.c
create mode 100644 hw/intc/arm_gicv3_kvm.c
create mode 100644 hw/intc/vgic_common.h
create mode 100644 include/hw/intc/arm_gicv3_common.h
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-09-23 21:43 Peter Maydell
@ 2015-09-24 0:26 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-09-24 0:26 UTC (permalink / raw)
To: QEMU Developers
On 23 September 2015 at 14:43, Peter Maydell <peter.maydell@linaro.org> wrote:
> A small pullreq, but I don't have anything else pending and I wanted
> to get the GICv3 patches in this week.
>
> -- PMM
>
>
> The following changes since commit 684bb5770ec5d72a66620f64fc5d9672bf8d3509:
>
> Merge remote-tracking branch 'remotes/dgibson/tags/spapr-next-20150923' into staging (2015-09-23 16:52:54 +0100)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150923-1
>
> for you to fetch changes up to 5d23e959fc6c8604d3c19b39b71c5a1effb2c347:
>
> MAINTAINERS: update Allwinner A10 maintainer (2015-09-23 22:37:40 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * support VGICv3 in KVM
> * fix bug in ACPI table entries for flash devices in virt board
> * update Allwinner entry in MAINTAINERS
>
> ----------------------------------------------------------------
Minor fixup required to get it to compile on 32-bit:
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -2036,7 +2036,7 @@ void kvm_device_access(int fd, int group, uint64_t attr,
&kvmattr);
if (err < 0) {
error_report("KVM_%s_DEVICE_ATTR failed: %s\n"
- "Group %d attr 0x%016zX", write ? "SET" : "GET",
+ "Group %d attr 0x%016" PRIx64 , write ? "SET" : "GET",
strerror(-err), group, attr);
abort();
}
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2015-09-23 21:43 Peter Maydell
2015-09-24 0:26 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2015-09-23 21:43 UTC (permalink / raw)
To: qemu-devel
A small pullreq, but I don't have anything else pending and I wanted
to get the GICv3 patches in this week.
-- PMM
The following changes since commit 684bb5770ec5d72a66620f64fc5d9672bf8d3509:
Merge remote-tracking branch 'remotes/dgibson/tags/spapr-next-20150923' into staging (2015-09-23 16:52:54 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150923-1
for you to fetch changes up to 5d23e959fc6c8604d3c19b39b71c5a1effb2c347:
MAINTAINERS: update Allwinner A10 maintainer (2015-09-23 22:37:40 +0100)
----------------------------------------------------------------
target-arm queue:
* support VGICv3 in KVM
* fix bug in ACPI table entries for flash devices in virt board
* update Allwinner entry in MAINTAINERS
----------------------------------------------------------------
Beniamino Galvani (1):
MAINTAINERS: update Allwinner A10 maintainer
Pavel Fedin (4):
intc/gic: Extract some reusable vGIC code
arm_kvm: Do not assume particular GIC type in kvm_arch_irqchip_create()
hw/intc: Initial implementation of vGICv3
hw/arm/virt: Add gic-version option to virt machine
Shannon Zhao (1):
hw/arm/virt-acpi-build: Fix wrong size of flash in ACPI table
Shlomo Pongratz (1):
hw/intc: Implement GIC-500 base class
MAINTAINERS | 6 +-
hw/arm/virt-acpi-build.c | 56 ++++++++------
hw/arm/virt.c | 124 ++++++++++++++++++++++++------
hw/intc/Makefile.objs | 2 +
hw/intc/arm_gic_kvm.c | 98 ++++++++----------------
hw/intc/arm_gicv3_common.c | 140 ++++++++++++++++++++++++++++++++++
hw/intc/arm_gicv3_kvm.c | 149 +++++++++++++++++++++++++++++++++++++
hw/intc/vgic_common.h | 35 +++++++++
include/hw/acpi/acpi-defs.h | 9 +++
include/hw/arm/virt-acpi-build.h | 1 +
include/hw/arm/virt.h | 4 +-
include/hw/intc/arm_gicv3_common.h | 68 +++++++++++++++++
include/sysemu/kvm.h | 26 +++++++
kvm-all.c | 34 +++++++++
target-arm/kvm.c | 19 +++--
target-arm/kvm_arm.h | 19 +++++
target-arm/machine.c | 18 +++++
17 files changed, 686 insertions(+), 122 deletions(-)
create mode 100644 hw/intc/arm_gicv3_common.c
create mode 100644 hw/intc/arm_gicv3_kvm.c
create mode 100644 hw/intc/vgic_common.h
create mode 100644 include/hw/intc/arm_gicv3_common.h
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-07-06 9:59 Peter Maydell
@ 2015-07-06 11:51 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-07-06 11:51 UTC (permalink / raw)
To: QEMU Developers
On 6 July 2015 at 10:59, Peter Maydell <peter.maydell@linaro.org> wrote:
> target-arm queue before hardfreeze: these are pretty much all
> bugfixes.
>
> -- PMM
>
> The following changes since commit f50a1640fb82708a5d528dee1ace42a224b95b15:
>
> Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (2015-07-05 20:35:47 +0100)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150706
>
> for you to fetch changes up to 257621a9566054472d1d55a819880d0f9da02bda:
>
> arm_mptimer: Respect IT bit state (2015-07-06 10:26:35 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * TLBI ALLEI1IS should operate on all CPUs, not just this one
> * Fix interval interrupt of cadence ttc in decrement mode
> * Implement YIELD insn to yield in ARM and Thumb translators
> * ARM GIC: reset all registers
> * arm_mptimer: fix timer shutdown and mode change
> * arm_mptimer: respect IT bit state
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2015-07-06 9:59 Peter Maydell
2015-07-06 11:51 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2015-07-06 9:59 UTC (permalink / raw)
To: qemu-devel
target-arm queue before hardfreeze: these are pretty much all
bugfixes.
-- PMM
The following changes since commit f50a1640fb82708a5d528dee1ace42a224b95b15:
Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (2015-07-05 20:35:47 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150706
for you to fetch changes up to 257621a9566054472d1d55a819880d0f9da02bda:
arm_mptimer: Respect IT bit state (2015-07-06 10:26:35 +0100)
----------------------------------------------------------------
target-arm queue:
* TLBI ALLEI1IS should operate on all CPUs, not just this one
* Fix interval interrupt of cadence ttc in decrement mode
* Implement YIELD insn to yield in ARM and Thumb translators
* ARM GIC: reset all registers
* arm_mptimer: fix timer shutdown and mode change
* arm_mptimer: respect IT bit state
----------------------------------------------------------------
Dmitry Osipenko (2):
arm_mptimer: Fix timer shutdown and mode change
arm_mptimer: Respect IT bit state
Johannes Schlatow (1):
Fix interval interrupt of cadence ttc when timer is in decrement mode
Peter Maydell (3):
target-arm: Split DISAS_YIELD from DISAS_WFE
target-arm: Implement YIELD insn to yield in ARM and Thumb translators
hw/intc/arm_gic_common.c: Reset all registers
Sergey Fedorov (1):
target-arm: fix write helper for TLBI ALLE1IS
hw/intc/arm_gic_common.c | 21 ++++++++++++++++++---
hw/timer/arm_mptimer.c | 13 ++++++++++---
hw/timer/cadence_ttc.c | 9 ++++-----
target-arm/helper.c | 2 +-
target-arm/helper.h | 1 +
target-arm/op_helper.c | 18 +++++++++++++++---
target-arm/translate-a64.c | 6 ++++++
target-arm/translate.c | 7 +++++++
target-arm/translate.h | 1 +
9 files changed, 63 insertions(+), 15 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2015-03-16 12:40 Peter Maydell
@ 2015-03-16 14:44 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2015-03-16 14:44 UTC (permalink / raw)
To: QEMU Developers
On 16 March 2015 at 12:40, Peter Maydell <peter.maydell@linaro.org> wrote:
> Last batch of bugfixes before hardfreeze...
>
> -- PMM
>
> The following changes since commit f421f05754ac5aabe15f12051390204116408b00:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/pull-seabios-1.8.1-20150316-1' into staging (2015-03-16 10:58:11 +0000)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150316
>
> for you to fetch changes up to b8d43285a4db12156c40ba6fdbd8002c383fcbca:
>
> linux-user: Access correct register for get/set_tls syscalls on ARM TZ CPUs (2015-03-16 12:30:47 +0000)
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2015-03-16 12:40 Peter Maydell
2015-03-16 14:44 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2015-03-16 12:40 UTC (permalink / raw)
To: qemu-devel
Last batch of bugfixes before hardfreeze...
-- PMM
The following changes since commit f421f05754ac5aabe15f12051390204116408b00:
Merge remote-tracking branch 'remotes/kraxel/tags/pull-seabios-1.8.1-20150316-1' into staging (2015-03-16 10:58:11 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150316
for you to fetch changes up to b8d43285a4db12156c40ba6fdbd8002c383fcbca:
linux-user: Access correct register for get/set_tls syscalls on ARM TZ CPUs (2015-03-16 12:30:47 +0000)
----------------------------------------------------------------
target-arm queue:
* fix handling of execute-never bits in page table walks
* tell kernel to initialize KVM GIC in realize function
* fix handling of STM (user) with r15 in register list
* ignore low bit of PC in M-profile exception return
* fix linux-user get/set_tls syscalls on CPUs with TZ
----------------------------------------------------------------
Andrew Jones (3):
target-arm: convert check_ap to ap_to_rw_prot
target-arm: fix get_phys_addr_v6/SCTLR_AFE access check
target-arm: get_phys_addr_lpae: more xn control
Eric Auger (1):
hw/intc/arm_gic: Initialize the vgic in the realize function
Mikhail Ilyin (1):
linux-user: Access correct register for get/set_tls syscalls on ARM TZ CPUs
Peter Maydell (2):
target-arm: Fix handling of STM (user) with r15 in register list
target-arm: Ignore low bit of PC in M-profile exception return
hw/intc/arm_gic_kvm.c | 7 ++
linux-user/arm/target_cpu.h | 15 ++-
linux-user/main.c | 2 +-
target-arm/helper.c | 222 ++++++++++++++++++++++++++++++++------------
target-arm/translate.c | 18 ++--
5 files changed, 197 insertions(+), 67 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [PULL 0/7] target-arm queue
2014-11-04 12:30 Peter Maydell
@ 2014-11-04 14:59 ` Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2014-11-04 14:59 UTC (permalink / raw)
To: QEMU Developers
On 4 November 2014 12:30, Peter Maydell <peter.maydell@linaro.org> wrote:
> Last handful of patches before hardfreeze; these are just
> refactoring/cleanup, but I'd like to get them in to avoid
> clashes and merge conflicts with other series like TZ.
>
> thanks
> -- PMM
>
> The following changes since commit 949ca9e479c381a63ddb257adca1a6f0c44d898e:
>
> Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging (2014-11-03 22:51:08 +0000)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20141104
>
> for you to fetch changes up to 9fae24f55496ea178e9e8e351f82a02f34ddaf4d:
>
> target-arm: Correct condition for taking VIRQ and VFIQ (2014-11-04 12:05:23 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * avoid passing CPU env pointer around in A32/T32 decoders
> * split M profile exception masking out from A/R profile
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2014-11-04 12:30 Peter Maydell
2014-11-04 14:59 ` Peter Maydell
0 siblings, 1 reply; 29+ messages in thread
From: Peter Maydell @ 2014-11-04 12:30 UTC (permalink / raw)
To: qemu-devel
Last handful of patches before hardfreeze; these are just
refactoring/cleanup, but I'd like to get them in to avoid
clashes and merge conflicts with other series like TZ.
thanks
-- PMM
The following changes since commit 949ca9e479c381a63ddb257adca1a6f0c44d898e:
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging (2014-11-03 22:51:08 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20141104
for you to fetch changes up to 9fae24f55496ea178e9e8e351f82a02f34ddaf4d:
target-arm: Correct condition for taking VIRQ and VFIQ (2014-11-04 12:05:23 +0000)
----------------------------------------------------------------
target-arm queue:
* avoid passing CPU env pointer around in A32/T32 decoders
* split M profile exception masking out from A/R profile
----------------------------------------------------------------
Peter Maydell (7):
target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macros
target-arm/translate.c: Use arm_dc_feature() rather than arm_feature()
target-arm/translate.c: Don't use IS_M()
target-arm/translate.c: Don't pass CPUARMState around in the decoder
target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn()
target-arm: Separate out M profile cpu_exec_interrupt handling
target-arm: Correct condition for taking VIRQ and VFIQ
target-arm/cpu.c | 49 +++++++--
target-arm/cpu.h | 20 +---
target-arm/translate.c | 280 +++++++++++++++++++++++++++----------------------
3 files changed, 197 insertions(+), 152 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Qemu-devel] [PULL 0/7] target-arm queue
@ 2011-10-20 13:16 Peter Maydell
0 siblings, 0 replies; 29+ messages in thread
From: Peter Maydell @ 2011-10-20 13:16 UTC (permalink / raw)
To: qemu-devel; +Cc: Anthony Liguori
Hi; these are the pending target-arm patches I'd like to get in for 1.0;
a couple of minor ones plus the A15 insn work. Please pull.
PS: I'm not sure who the best person to cc on target-arm pull requests
is; any suggestions?
thanks
-- PMM
The following changes since commit cfce6d8934243871c4dc6d0c5248b0b27a1b8d80:
i8259: Move to hw library (2011-10-16 11:11:56 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream
Christophe LYON (1):
rsqrte_f32: No need to copy sign bit.
Dmitry Koshelev (1):
target-arm/machine.c: Restore VFP registers correctly
Peter Maydell (5):
target-arm: v6 media multiply space: UNDEF on unassigned encodings
target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV
target-arm: Add ARM UDIV/SDIV support
softfloat: Implement fused multiply-add
target-arm: Implement VFPv4 fused multiply-accumulate insns
fpu/softfloat-specialize.h | 178 ++++++++++++++++++
fpu/softfloat.c | 427 ++++++++++++++++++++++++++++++++++++++++++++
fpu/softfloat.h | 14 ++
target-arm/cpu.h | 4 +-
target-arm/helper.c | 24 ++-
target-arm/helper.h | 3 +
target-arm/machine.c | 2 +-
target-arm/translate.c | 118 ++++++++++++-
8 files changed, 759 insertions(+), 11 deletions(-)
^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2017-11-07 14:33 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-26 13:31 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 1/7] hw/arm/virt-acpi-build: Fix table revision and some comments Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 2/7] hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT table Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 3/7] target-arm: default empty semihosting cmdline Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 4/7] target-arm: A64: Print ELR when taking exceptions Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 5/7] qdev-properties-system: Change set_pointer's parse callback to use Error Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 6/7] qdev-properties-system: Improve error message for drive assignment conflict Peter Maydell
2015-06-26 13:31 ` [Qemu-devel] [PULL 7/7] hw/arm/virt: Make block devices default to virtio Peter Maydell
2015-06-26 14:57 ` [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2017-11-07 13:35 Peter Maydell
2017-11-07 14:32 ` Peter Maydell
2017-07-31 12:22 Peter Maydell
2017-07-31 15:40 ` Peter Maydell
2015-11-10 13:51 Peter Maydell
2015-11-10 16:38 ` Peter Maydell
2015-11-10 17:12 ` Peter Crosthwaite
2015-11-10 17:13 ` Peter Maydell
2015-09-24 0:31 Peter Maydell
2015-09-24 8:36 ` Pavel Fedin
2015-09-24 16:04 ` Peter Maydell
2015-09-23 21:43 Peter Maydell
2015-09-24 0:26 ` Peter Maydell
2015-07-06 9:59 Peter Maydell
2015-07-06 11:51 ` Peter Maydell
2015-03-16 12:40 Peter Maydell
2015-03-16 14:44 ` Peter Maydell
2014-11-04 12:30 Peter Maydell
2014-11-04 14:59 ` Peter Maydell
2011-10-20 13:16 Peter Maydell
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