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* [PULL v2 00/34] tcg patch queue
@ 2021-06-14  1:20 Richard Henderson
  2021-06-14  1:20 ` [PULL v2 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state Richard Henderson
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Richard Henderson @ 2021-06-14  1:20 UTC (permalink / raw)
  To: qemu-devel

V2 fixes an error in patch 22 wrt MacOS.
It's a shame we don't have public CI for that.


r~


The following changes since commit 894fc4fd670aaf04a67dc7507739f914ff4bacf2:

  Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging (2021-06-11 09:21:48 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210613

for you to fetch changes up to a5a8b84772e13066c6c45f480cc5b5312bbde08e:

  docs/devel: Explain in more detail the TB chaining mechanisms (2021-06-13 17:42:40 -0700)

----------------------------------------------------------------
Clean up code_gen_buffer allocation.
Add tcg_remove_ops_after.
Fix tcg_constant_* documentation.
Improve TB chaining documentation.
Fix float32_exp2.
Fix arm tcg_out_op function signature.

----------------------------------------------------------------
Jose R. Ziviani (1):
      tcg/arm: Fix tcg_out_op function signature

Luis Pires (1):
      docs/devel: Explain in more detail the TB chaining mechanisms

Richard Henderson (32):
      meson: Split out tcg/meson.build
      meson: Split out fpu/meson.build
      tcg: Re-order tcg_region_init vs tcg_prologue_init
      tcg: Remove error return from tcg_region_initial_alloc__locked
      tcg: Split out tcg_region_initial_alloc
      tcg: Split out tcg_region_prologue_set
      tcg: Split out region.c
      accel/tcg: Inline cpu_gen_init
      accel/tcg: Move alloc_code_gen_buffer to tcg/region.c
      accel/tcg: Rename tcg_init to tcg_init_machine
      tcg: Create tcg_init
      accel/tcg: Merge tcg_exec_init into tcg_init_machine
      accel/tcg: Use MiB in tcg_init_machine
      accel/tcg: Pass down max_cpus to tcg_init
      tcg: Introduce tcg_max_ctxs
      tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h
      tcg: Replace region.end with region.total_size
      tcg: Rename region.start to region.after_prologue
      tcg: Tidy tcg_n_regions
      tcg: Tidy split_cross_256mb
      tcg: Move in_code_gen_buffer and tests to region.c
      tcg: Allocate code_gen_buffer into struct tcg_region_state
      tcg: Return the map protection from alloc_code_gen_buffer
      tcg: Sink qemu_madvise call to common code
      util/osdep: Add qemu_mprotect_rw
      tcg: Round the tb_size default from qemu_get_host_physmem
      tcg: Merge buffer protection and guard page protection
      tcg: When allocating for !splitwx, begin with PROT_NONE
      tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/
      tcg: Introduce tcg_remove_ops_after
      tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_*
      softfloat: Fix tp init in float32_exp2

 docs/devel/tcg.rst        | 101 ++++-
 meson.build               |  12 +-
 accel/tcg/internal.h      |   2 +
 include/qemu/osdep.h      |   1 +
 include/sysemu/tcg.h      |   2 -
 include/tcg/tcg.h         |  28 +-
 tcg/aarch64/tcg-target.h  |   1 +
 tcg/arm/tcg-target.h      |   1 +
 tcg/i386/tcg-target.h     |   2 +
 tcg/mips/tcg-target.h     |   6 +
 tcg/ppc/tcg-target.h      |   2 +
 tcg/riscv/tcg-target.h    |   1 +
 tcg/s390/tcg-target.h     |   3 +
 tcg/sparc/tcg-target.h    |   1 +
 tcg/tcg-internal.h        |  40 ++
 tcg/tci/tcg-target.h      |   1 +
 accel/tcg/tcg-all.c       |  32 +-
 accel/tcg/translate-all.c | 439 +-------------------
 bsd-user/main.c           |   3 +-
 fpu/softfloat.c           |   2 +-
 linux-user/main.c         |   1 -
 tcg/region.c              | 999 ++++++++++++++++++++++++++++++++++++++++++++++
 tcg/tcg.c                 | 649 +++---------------------------
 util/osdep.c              |   9 +
 tcg/arm/tcg-target.c.inc  |   3 +-
 fpu/meson.build           |   1 +
 tcg/meson.build           |  14 +
 27 files changed, 1266 insertions(+), 1090 deletions(-)
 create mode 100644 tcg/tcg-internal.h
 create mode 100644 tcg/region.c
 create mode 100644 fpu/meson.build
 create mode 100644 tcg/meson.build


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PULL v2 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state
  2021-06-14  1:20 [PULL v2 00/34] tcg patch queue Richard Henderson
@ 2021-06-14  1:20 ` Richard Henderson
  2021-06-14  5:24 ` [PULL v2 00/34] tcg patch queue Philippe Mathieu-Daudé
  2021-06-14 12:46 ` Peter Maydell
  2 siblings, 0 replies; 6+ messages in thread
From: Richard Henderson @ 2021-06-14  1:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: Luis Pires, Alex Bennée

Do not mess around with setting values within tcg_init_ctx.
Put the values into 'region' directly, which is where they
will live for the lifetime of the program.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/region.c | 64 ++++++++++++++++++++++------------------------------
 1 file changed, 27 insertions(+), 37 deletions(-)

diff --git a/tcg/region.c b/tcg/region.c
index 5beba41412..afa11ec5d7 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -70,13 +70,12 @@ static size_t tree_size;
 
 bool in_code_gen_buffer(const void *p)
 {
-    const TCGContext *s = &tcg_init_ctx;
     /*
      * Much like it is valid to have a pointer to the byte past the
      * end of an array (so long as you don't dereference it), allow
      * a pointer to the byte past the end of the code gen buffer.
      */
-    return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size;
+    return (size_t)(p - region.start_aligned) <= region.total_size;
 }
 
 #ifdef CONFIG_DEBUG_TCG
@@ -562,8 +561,8 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp)
     }
     qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE);
 
-    tcg_ctx->code_gen_buffer = buf;
-    tcg_ctx->code_gen_buffer_size = size;
+    region.start_aligned = buf;
+    region.total_size = size;
     return true;
 }
 #elif defined(_WIN32)
@@ -584,8 +583,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
         return false;
     }
 
-    tcg_ctx->code_gen_buffer = buf;
-    tcg_ctx->code_gen_buffer_size = size;
+    region.start_aligned = buf;
+    region.total_size = size;
     return true;
 }
 #else
@@ -637,8 +636,8 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot,
     /* Request large pages for the buffer.  */
     qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE);
 
-    tcg_ctx->code_gen_buffer = buf;
-    tcg_ctx->code_gen_buffer_size = size;
+    region.start_aligned = buf;
+    region.total_size = size;
     return true;
 }
 
@@ -659,8 +658,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
         return false;
     }
     /* The size of the mapping may have been adjusted. */
-    size = tcg_ctx->code_gen_buffer_size;
-    buf_rx = tcg_ctx->code_gen_buffer;
+    buf_rx = region.start_aligned;
+    size = region.total_size;
 #endif
 
     buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp);
@@ -682,8 +681,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
 #endif
 
     close(fd);
-    tcg_ctx->code_gen_buffer = buf_rw;
-    tcg_ctx->code_gen_buffer_size = size;
+    region.start_aligned = buf_rw;
+    region.total_size = size;
     tcg_splitwx_diff = buf_rx - buf_rw;
 
     /* Request large pages for the buffer and the splitwx.  */
@@ -734,7 +733,7 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp)
         return false;
     }
 
-    buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer;
+    buf_rw = (mach_vm_address_t)region.start_aligned;
     buf_rx = 0;
     ret = mach_vm_remap(mach_task_self(),
                         &buf_rx,
@@ -846,11 +845,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
  */
 void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
 {
-    void *buf, *aligned, *end;
-    size_t total_size;
     size_t page_size;
     size_t region_size;
-    size_t n_regions;
     size_t i;
     bool ok;
 
@@ -858,39 +854,33 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
                                splitwx, &error_fatal);
     assert(ok);
 
-    buf = tcg_init_ctx.code_gen_buffer;
-    total_size = tcg_init_ctx.code_gen_buffer_size;
-    page_size = qemu_real_host_page_size;
-    n_regions = tcg_n_regions(total_size, max_cpus);
-
-    /* The first region will be 'aligned - buf' bytes larger than the others */
-    aligned = QEMU_ALIGN_PTR_UP(buf, page_size);
-    g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size);
-
     /*
      * Make region_size a multiple of page_size, using aligned as the start.
      * As a result of this we might end up with a few extra pages at the end of
      * the buffer; we will assign those to the last region.
      */
-    region_size = (total_size - (aligned - buf)) / n_regions;
+    region.n = tcg_n_regions(region.total_size, max_cpus);
+    page_size = qemu_real_host_page_size;
+    region_size = region.total_size / region.n;
     region_size = QEMU_ALIGN_DOWN(region_size, page_size);
 
     /* A region must have at least 2 pages; one code, one guard */
     g_assert(region_size >= 2 * page_size);
+    region.stride = region_size;
+
+    /* Reserve space for guard pages. */
+    region.size = region_size - page_size;
+    region.total_size -= page_size;
+
+    /*
+     * The first region will be smaller than the others, via the prologue,
+     * which has yet to be allocated.  For now, the first region begins at
+     * the page boundary.
+     */
+    region.after_prologue = region.start_aligned;
 
     /* init the region struct */
     qemu_mutex_init(&region.lock);
-    region.n = n_regions;
-    region.size = region_size - page_size;
-    region.stride = region_size;
-    region.after_prologue = buf;
-    region.start_aligned = aligned;
-    /* page-align the end, since its last page will be a guard page */
-    end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size);
-    /* account for that last guard page */
-    end -= page_size;
-    total_size = end - aligned;
-    region.total_size = total_size;
 
     /*
      * Set guard pages in the rw buffer, as that's the one into which
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PULL v2 00/34] tcg patch queue
  2021-06-14  1:20 [PULL v2 00/34] tcg patch queue Richard Henderson
  2021-06-14  1:20 ` [PULL v2 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state Richard Henderson
@ 2021-06-14  5:24 ` Philippe Mathieu-Daudé
  2021-06-14 12:46 ` Peter Maydell
  2 siblings, 0 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-06-14  5:24 UTC (permalink / raw)
  To: Richard Henderson, qemu-devel
  Cc: Daniel P . Berrange, Alex Bennée, Stefan Weil

On 6/14/21 3:20 AM, Richard Henderson wrote:
> V2 fixes an error in patch 22 wrt MacOS.
> It's a shame we don't have public CI for that.

We do:

https://cirrus-ci.com/github/qemu/qemu

Maybe it is not documented well enough?

Apparently we could integrate it to gitlab pipeline:
https://potyarkin.ml/posts/2020/cirrus-ci-integration-for-gitlab-projects/

> 
> 
> r~


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PULL v2 00/34] tcg patch queue
  2021-06-14  1:20 [PULL v2 00/34] tcg patch queue Richard Henderson
  2021-06-14  1:20 ` [PULL v2 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state Richard Henderson
  2021-06-14  5:24 ` [PULL v2 00/34] tcg patch queue Philippe Mathieu-Daudé
@ 2021-06-14 12:46 ` Peter Maydell
  2 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2021-06-14 12:46 UTC (permalink / raw)
  To: Richard Henderson; +Cc: QEMU Developers

On Mon, 14 Jun 2021 at 02:21, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> V2 fixes an error in patch 22 wrt MacOS.
> It's a shame we don't have public CI for that.
>
>
> r~
>
>
> The following changes since commit 894fc4fd670aaf04a67dc7507739f914ff4bacf2:
>
>   Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging (2021-06-11 09:21:48 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210613
>
> for you to fetch changes up to a5a8b84772e13066c6c45f480cc5b5312bbde08e:
>
>   docs/devel: Explain in more detail the TB chaining mechanisms (2021-06-13 17:42:40 -0700)
>
> ----------------------------------------------------------------
> Clean up code_gen_buffer allocation.
> Add tcg_remove_ops_after.
> Fix tcg_constant_* documentation.
> Improve TB chaining documentation.
> Fix float32_exp2.
> Fix arm tcg_out_op function signature.
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PULL v2 00/34] tcg patch queue
  2020-01-16  1:40 Richard Henderson
@ 2020-01-17 13:08 ` Peter Maydell
  0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2020-01-17 13:08 UTC (permalink / raw)
  To: Richard Henderson; +Cc: QEMU Developers

On Thu, 16 Jan 2020 at 01:40, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> For version 2, drop the -static and -pie changes,
> i.e. patches 1-7 from version 1.
>
> I'll come back to those after the required linux-user changes are
> upstream.  In the meantime, it's still a large enough set of patches.
>
>
> r~
>
>
>
> The following changes since commit 3a63b24a1bbf166e6f455fe43a6bbd8dea413d92:
>
>   Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200114-pull-request' into staging (2020-01-14 16:00:31 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/rth7680/qemu.git tags/pull-tcg-20200115
>
> for you to fetch changes up to 3e5a01ef0268ee4c9d342a26dbf6624d6b5b20d6:
>
>   MAINTAINERS: Replace Claudio Fontana for tcg/aarch64 (2020-01-15 15:13:10 -1000)
>
> ----------------------------------------------------------------
> Add cpu_{ld,st}*_mmuidx_ra
> Remove MMU_MODE*_SUFFIX
> Move tcg headers under include/
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/5.0
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PULL v2 00/34] tcg patch queue
@ 2020-01-16  1:40 Richard Henderson
  2020-01-17 13:08 ` Peter Maydell
  0 siblings, 1 reply; 6+ messages in thread
From: Richard Henderson @ 2020-01-16  1:40 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell

For version 2, drop the -static and -pie changes,
i.e. patches 1-7 from version 1.

I'll come back to those after the required linux-user changes are
upstream.  In the meantime, it's still a large enough set of patches.


r~



The following changes since commit 3a63b24a1bbf166e6f455fe43a6bbd8dea413d92:

  Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200114-pull-request' into staging (2020-01-14 16:00:31 +0000)

are available in the Git repository at:

  https://github.com/rth7680/qemu.git tags/pull-tcg-20200115

for you to fetch changes up to 3e5a01ef0268ee4c9d342a26dbf6624d6b5b20d6:

  MAINTAINERS: Replace Claudio Fontana for tcg/aarch64 (2020-01-15 15:13:10 -1000)

----------------------------------------------------------------
Add cpu_{ld,st}*_mmuidx_ra
Remove MMU_MODE*_SUFFIX
Move tcg headers under include/

----------------------------------------------------------------
Philippe Mathieu-Daudé (4):
      tcg: Search includes from the project root source directory
      tcg: Search includes in the parent source directory
      tcg: Move TCG headers to include/tcg/
      configure: Remove tcg/ from the preprocessor include search list

Richard Henderson (30):
      target/xtensa: Use probe_access for itlb_hit_test
      cputlb: Use trace_mem_get_info instead of trace_mem_build_info
      trace: Remove trace_mem_build_info_no_se_[bl]e
      target/s390x: Include tcg.h in mem_helper.c
      target/arm: Include tcg.h in sve_helper.c
      accel/tcg: Include tcg.h in tcg-runtime.c
      linux-user: Include tcg.h in syscall.c
      linux-user: Include trace-root.h in syscall-trace.h
      plugins: Include trace/mem.h in api.c
      cputlb: Move body of cpu_ldst_template.h out of line
      translator: Use cpu_ld*_code instead of open-coding
      cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_code
      cputlb: Provide cpu_(ld,st}*_mmuidx_ra for user-only
      target/i386: Use cpu_*_mmuidx_ra instead of templates
      cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c
      target/nios2: Remove MMU_MODE{0,1}_SUFFIX
      target/alpha: Remove MMU_MODE{0,1}_SUFFIX
      target/cris: Remove MMU_MODE{0,1}_SUFFIX
      target/i386: Remove MMU_MODE{0,1,2}_SUFFIX
      target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX
      target/sh4: Remove MMU_MODE{0,1}_SUFFIX
      target/unicore32: Remove MMU_MODE{0,1}_SUFFIX
      target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX
      target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIX
      target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
      target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
      target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
      cputlb: Remove support for MMU_MODE*_SUFFIX
      cputlb: Expand cpu_ldst_template.h in cputlb.c
      MAINTAINERS: Replace Claudio Fontana for tcg/aarch64

 accel/tcg/atomic_template.h               |  67 ++---
 include/exec/cpu_ldst.h                   | 446 +++++++++---------------------
 include/exec/cpu_ldst_template.h          | 211 --------------
 include/exec/cpu_ldst_useronly_template.h | 159 -----------
 include/exec/translator.h                 |  48 +---
 {tcg => include/tcg}/tcg-gvec-desc.h      |   0
 {tcg => include/tcg}/tcg-mo.h             |   0
 {tcg => include/tcg}/tcg-op-gvec.h        |   0
 {tcg => include/tcg}/tcg-op.h             |   2 +-
 {tcg => include/tcg}/tcg-opc.h            |   0
 {tcg => include/tcg}/tcg.h                |  33 +--
 include/user/syscall-trace.h              |   2 +
 target/alpha/cpu.h                        |   2 -
 target/cris/cpu.h                         |   2 -
 target/i386/cpu.h                         |   3 -
 target/m68k/cpu.h                         |   2 -
 target/microblaze/cpu.h                   |   3 -
 target/mips/cpu.h                         |   4 -
 target/nios2/cpu.h                        |   2 -
 target/ppc/cpu.h                          |   2 -
 target/s390x/cpu.h                        |   5 -
 target/sh4/cpu.h                          |   2 -
 target/unicore32/cpu.h                    |   2 -
 target/xtensa/cpu.h                       |   4 -
 tcg/i386/tcg-target.h                     |   2 +-
 trace/mem-internal.h                      |  17 --
 accel/tcg/cpu-exec.c                      |   2 +-
 accel/tcg/cputlb.c                        | 315 ++++++++++++++++-----
 accel/tcg/tcg-runtime-gvec.c              |   2 +-
 accel/tcg/tcg-runtime.c                   |   1 +
 accel/tcg/translate-all.c                 |   2 +-
 accel/tcg/user-exec.c                     | 238 +++++++++++++++-
 bsd-user/main.c                           |   2 +-
 cpus.c                                    |   2 +-
 exec.c                                    |   2 +-
 linux-user/main.c                         |   2 +-
 linux-user/syscall.c                      |   1 +
 plugins/api.c                             |   1 +
 target/alpha/translate.c                  |   2 +-
 target/arm/helper-a64.c                   |   2 +-
 target/arm/sve_helper.c                   |   1 +
 target/arm/translate-a64.c                |   4 +-
 target/arm/translate-sve.c                |   6 +-
 target/arm/translate.c                    |   4 +-
 target/cris/translate.c                   |   2 +-
 target/hppa/translate.c                   |   2 +-
 target/i386/mem_helper.c                  |   2 +-
 target/i386/seg_helper.c                  |  56 ++--
 target/i386/translate.c                   |   2 +-
 target/lm32/translate.c                   |   2 +-
 target/m68k/op_helper.c                   |  77 ++++--
 target/m68k/translate.c                   |   2 +-
 target/microblaze/translate.c             |   2 +-
 target/mips/op_helper.c                   | 182 ++++--------
 target/mips/translate.c                   |   2 +-
 target/moxie/translate.c                  |   2 +-
 target/nios2/translate.c                  |   2 +-
 target/openrisc/translate.c               |   2 +-
 target/ppc/mem_helper.c                   |  13 +-
 target/ppc/translate.c                    |   4 +-
 target/riscv/cpu_helper.c                 |   2 +-
 target/riscv/translate.c                  |   2 +-
 target/s390x/mem_helper.c                 |  11 +-
 target/s390x/translate.c                  |   4 +-
 target/sh4/translate.c                    |   2 +-
 target/sparc/ldst_helper.c                |   2 +-
 target/sparc/translate.c                  |   2 +-
 target/tilegx/translate.c                 |   2 +-
 target/tricore/translate.c                |   2 +-
 target/unicore32/translate.c              |   2 +-
 target/xtensa/mmu_helper.c                |   5 +-
 target/xtensa/translate.c                 |   2 +-
 tcg/aarch64/tcg-target.inc.c              |   4 +-
 tcg/arm/tcg-target.inc.c                  |   4 +-
 tcg/i386/tcg-target.inc.c                 |   4 +-
 tcg/mips/tcg-target.inc.c                 |   2 +-
 tcg/optimize.c                            |   2 +-
 tcg/ppc/tcg-target.inc.c                  |   4 +-
 tcg/riscv/tcg-target.inc.c                |   4 +-
 tcg/s390/tcg-target.inc.c                 |   4 +-
 tcg/sparc/tcg-target.inc.c                |   2 +-
 tcg/tcg-common.c                          |   2 +-
 tcg/tcg-op-gvec.c                         |   8 +-
 tcg/tcg-op-vec.c                          |   6 +-
 tcg/tcg-op.c                              |   6 +-
 tcg/tcg.c                                 |   2 +-
 tcg/tci.c                                 |   2 +-
 MAINTAINERS                               |   4 +-
 configure                                 |   1 -
 docs/devel/loads-stores.rst               | 215 ++++++++++----
 90 files changed, 1037 insertions(+), 1240 deletions(-)
 delete mode 100644 include/exec/cpu_ldst_template.h
 delete mode 100644 include/exec/cpu_ldst_useronly_template.h
 rename {tcg => include/tcg}/tcg-gvec-desc.h (100%)
 rename {tcg => include/tcg}/tcg-mo.h (100%)
 rename {tcg => include/tcg}/tcg-op-gvec.h (100%)
 rename {tcg => include/tcg}/tcg-op.h (99%)
 rename {tcg => include/tcg}/tcg-opc.h (100%)
 rename {tcg => include/tcg}/tcg.h (96%)


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-06-14 12:51 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-14  1:20 [PULL v2 00/34] tcg patch queue Richard Henderson
2021-06-14  1:20 ` [PULL v2 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state Richard Henderson
2021-06-14  5:24 ` [PULL v2 00/34] tcg patch queue Philippe Mathieu-Daudé
2021-06-14 12:46 ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2020-01-16  1:40 Richard Henderson
2020-01-17 13:08 ` Peter Maydell

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