From: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> To: "Rafael J. Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org> Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, Linux PM <linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, freedreno <freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>, open list <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, "list-Y9sIeH5OGRo@public.gmane.org:IOMMU DRIVERS <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>, Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>, " <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>, robh+dt <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, linux-arm-msm <linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> Subject: Re: [PATCH v12 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops Date: Wed, 11 Jul 2018 16:25:26 +0530 [thread overview] Message-ID: <CAFp+6iHxJucfzJJeEvSToG4p2zADjDb9F0L8h053x-JKAy55mg@mail.gmail.com> (raw) In-Reply-To: <17407514.unFVTGoGrn-yvgW3jdyMHm1GS7QM15AGw@public.gmane.org> Hi Rafael, On Wed, Jul 11, 2018 at 3:20 PM, Rafael J. Wysocki <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org> wrote: > On Sunday, July 8, 2018 7:34:10 PM CEST Vivek Gautam wrote: >> From: Sricharan R <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> >> >> The smmu needs to be functional only when the respective >> master's using it are active. The device_link feature >> helps to track such functional dependencies, so that the >> iommu gets powered when the master device enables itself >> using pm_runtime. So by adapting the smmu driver for >> runtime pm, above said dependency can be addressed. >> >> This patch adds the pm runtime/sleep callbacks to the >> driver and also the functions to parse the smmu clocks >> from DT and enable them in resume/suspend. >> >> Signed-off-by: Sricharan R <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> >> Signed-off-by: Archit Taneja <architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> >> [vivek: Clock rework to request bulk of clocks] >> Signed-off-by: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> >> Reviewed-by: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> >> --- >> >> - No change since v11. >> >> drivers/iommu/arm-smmu.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 58 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index f7a96bcf94a6..a01d0dde21dd 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -48,6 +48,7 @@ >> #include <linux/of_iommu.h> >> #include <linux/pci.h> >> #include <linux/platform_device.h> >> +#include <linux/pm_runtime.h> >> #include <linux/slab.h> >> #include <linux/spinlock.h> >> >> @@ -205,6 +206,8 @@ struct arm_smmu_device { >> u32 num_global_irqs; >> u32 num_context_irqs; >> unsigned int *irqs; >> + struct clk_bulk_data *clks; >> + int num_clks; >> >> u32 cavium_id_base; /* Specific to Cavium */ >> >> @@ -1897,10 +1900,12 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) >> struct arm_smmu_match_data { >> enum arm_smmu_arch_version version; >> enum arm_smmu_implementation model; >> + const char * const *clks; >> + int num_clks; >> }; >> >> #define ARM_SMMU_MATCH_DATA(name, ver, imp) \ >> -static struct arm_smmu_match_data name = { .version = ver, .model = imp } >> +static const struct arm_smmu_match_data name = { .version = ver, .model = imp } >> >> ARM_SMMU_MATCH_DATA(smmu_generic_v1, ARM_SMMU_V1, GENERIC_SMMU); >> ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU); >> @@ -1919,6 +1924,23 @@ static const struct of_device_id arm_smmu_of_match[] = { >> }; >> MODULE_DEVICE_TABLE(of, arm_smmu_of_match); >> >> +static void arm_smmu_fill_clk_data(struct arm_smmu_device *smmu, >> + const char * const *clks) >> +{ >> + int i; >> + >> + if (smmu->num_clks < 1) >> + return; >> + >> + smmu->clks = devm_kcalloc(smmu->dev, smmu->num_clks, >> + sizeof(*smmu->clks), GFP_KERNEL); >> + if (!smmu->clks) >> + return; >> + >> + for (i = 0; i < smmu->num_clks; i++) >> + smmu->clks[i].id = clks[i]; >> +} >> + >> #ifdef CONFIG_ACPI >> static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) >> { >> @@ -2001,6 +2023,9 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev, >> data = of_device_get_match_data(dev); >> smmu->version = data->version; >> smmu->model = data->model; >> + smmu->num_clks = data->num_clks; >> + >> + arm_smmu_fill_clk_data(smmu, data->clks); >> >> parse_driver_options(smmu); >> >> @@ -2099,6 +2124,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev) >> smmu->irqs[i] = irq; >> } >> >> + err = devm_clk_bulk_get(smmu->dev, smmu->num_clks, smmu->clks); >> + if (err) >> + return err; >> + >> + err = clk_bulk_prepare(smmu->num_clks, smmu->clks); >> + if (err) >> + return err; >> + >> err = arm_smmu_device_cfg_probe(smmu); >> if (err) >> return err; >> @@ -2181,6 +2214,9 @@ static int arm_smmu_device_remove(struct platform_device *pdev) >> >> /* Turn the thing off */ >> writel(sCR0_CLIENTPD, ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0); >> + >> + clk_bulk_unprepare(smmu->num_clks, smmu->clks); >> + >> return 0; >> } >> >> @@ -2197,7 +2233,27 @@ static int __maybe_unused arm_smmu_pm_resume(struct device *dev) >> return 0; >> } >> >> -static SIMPLE_DEV_PM_OPS(arm_smmu_pm_ops, NULL, arm_smmu_pm_resume); >> +static int __maybe_unused arm_smmu_runtime_resume(struct device *dev) >> +{ >> + struct arm_smmu_device *smmu = dev_get_drvdata(dev); >> + >> + return clk_bulk_enable(smmu->num_clks, smmu->clks); >> +} >> + >> +static int __maybe_unused arm_smmu_runtime_suspend(struct device *dev) >> +{ >> + struct arm_smmu_device *smmu = dev_get_drvdata(dev); >> + >> + clk_bulk_disable(smmu->num_clks, smmu->clks); >> + >> + return 0; >> +} >> + >> +static const struct dev_pm_ops arm_smmu_pm_ops = { >> + SET_SYSTEM_SLEEP_PM_OPS(NULL, arm_smmu_pm_resume) > > This is suspicious. > > If you need a runtime suspend method, why do you think that it is not necessary > to suspend the device during system-wide transitions? Okay, so you suggest to put clock disabling in say arm_smmu_pm_suspend()? In that case the clocks have to be enabled in the resume path too. I remember Tomasz pointed to that we shouldn't need clock enable in resume path [1]. [1] https://lkml.org/lkml/2018/3/15/60 Best regards Vivek > >> + SET_RUNTIME_PM_OPS(arm_smmu_runtime_suspend, >> + arm_smmu_runtime_resume, NULL) >> +}; >> >> static struct platform_driver arm_smmu_driver = { >> .driver = { >> > > -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: Vivek Gautam <vivek.gautam@codeaurora.org> To: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: "list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>," <joro@8bytes.org>, "robh+dt" <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Robin Murphy <robin.murphy@arm.com>, Will Deacon <will.deacon@arm.com>, "list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>," <iommu@lists.linux-foundation.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, open list <linux-kernel@vger.kernel.org>, alex.williamson@redhat.com, Rob Clark <robdclark@gmail.com>, Linux PM <linux-pm@vger.kernel.org>, freedreno <freedreno@lists.freedesktop.org>, sboyd@kernel.org, Tomasz Figa <tfiga@chromium.org>, Sricharan R <sricharan@codeaurora.org>, Marek Szyprowski <m.szyprowski@samsung.com>, Archit Taneja <architt@codeaurora.org>, linux-arm-msm <linux-arm-msm@vger.kernel.org>, Jordan Crouse <jcrouse@codeaurora.org> Subject: Re: [PATCH v12 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops Date: Wed, 11 Jul 2018 16:25:26 +0530 [thread overview] Message-ID: <CAFp+6iHxJucfzJJeEvSToG4p2zADjDb9F0L8h053x-JKAy55mg@mail.gmail.com> (raw) In-Reply-To: <17407514.unFVTGoGrn@aspire.rjw.lan> Hi Rafael, On Wed, Jul 11, 2018 at 3:20 PM, Rafael J. Wysocki <rjw@rjwysocki.net> wrote: > On Sunday, July 8, 2018 7:34:10 PM CEST Vivek Gautam wrote: >> From: Sricharan R <sricharan@codeaurora.org> >> >> The smmu needs to be functional only when the respective >> master's using it are active. The device_link feature >> helps to track such functional dependencies, so that the >> iommu gets powered when the master device enables itself >> using pm_runtime. So by adapting the smmu driver for >> runtime pm, above said dependency can be addressed. >> >> This patch adds the pm runtime/sleep callbacks to the >> driver and also the functions to parse the smmu clocks >> from DT and enable them in resume/suspend. >> >> Signed-off-by: Sricharan R <sricharan@codeaurora.org> >> Signed-off-by: Archit Taneja <architt@codeaurora.org> >> [vivek: Clock rework to request bulk of clocks] >> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> >> Reviewed-by: Tomasz Figa <tfiga@chromium.org> >> --- >> >> - No change since v11. >> >> drivers/iommu/arm-smmu.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 58 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index f7a96bcf94a6..a01d0dde21dd 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -48,6 +48,7 @@ >> #include <linux/of_iommu.h> >> #include <linux/pci.h> >> #include <linux/platform_device.h> >> +#include <linux/pm_runtime.h> >> #include <linux/slab.h> >> #include <linux/spinlock.h> >> >> @@ -205,6 +206,8 @@ struct arm_smmu_device { >> u32 num_global_irqs; >> u32 num_context_irqs; >> unsigned int *irqs; >> + struct clk_bulk_data *clks; >> + int num_clks; >> >> u32 cavium_id_base; /* Specific to Cavium */ >> >> @@ -1897,10 +1900,12 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) >> struct arm_smmu_match_data { >> enum arm_smmu_arch_version version; >> enum arm_smmu_implementation model; >> + const char * const *clks; >> + int num_clks; >> }; >> >> #define ARM_SMMU_MATCH_DATA(name, ver, imp) \ >> -static struct arm_smmu_match_data name = { .version = ver, .model = imp } >> +static const struct arm_smmu_match_data name = { .version = ver, .model = imp } >> >> ARM_SMMU_MATCH_DATA(smmu_generic_v1, ARM_SMMU_V1, GENERIC_SMMU); >> ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU); >> @@ -1919,6 +1924,23 @@ static const struct of_device_id arm_smmu_of_match[] = { >> }; >> MODULE_DEVICE_TABLE(of, arm_smmu_of_match); >> >> +static void arm_smmu_fill_clk_data(struct arm_smmu_device *smmu, >> + const char * const *clks) >> +{ >> + int i; >> + >> + if (smmu->num_clks < 1) >> + return; >> + >> + smmu->clks = devm_kcalloc(smmu->dev, smmu->num_clks, >> + sizeof(*smmu->clks), GFP_KERNEL); >> + if (!smmu->clks) >> + return; >> + >> + for (i = 0; i < smmu->num_clks; i++) >> + smmu->clks[i].id = clks[i]; >> +} >> + >> #ifdef CONFIG_ACPI >> static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) >> { >> @@ -2001,6 +2023,9 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev, >> data = of_device_get_match_data(dev); >> smmu->version = data->version; >> smmu->model = data->model; >> + smmu->num_clks = data->num_clks; >> + >> + arm_smmu_fill_clk_data(smmu, data->clks); >> >> parse_driver_options(smmu); >> >> @@ -2099,6 +2124,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev) >> smmu->irqs[i] = irq; >> } >> >> + err = devm_clk_bulk_get(smmu->dev, smmu->num_clks, smmu->clks); >> + if (err) >> + return err; >> + >> + err = clk_bulk_prepare(smmu->num_clks, smmu->clks); >> + if (err) >> + return err; >> + >> err = arm_smmu_device_cfg_probe(smmu); >> if (err) >> return err; >> @@ -2181,6 +2214,9 @@ static int arm_smmu_device_remove(struct platform_device *pdev) >> >> /* Turn the thing off */ >> writel(sCR0_CLIENTPD, ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0); >> + >> + clk_bulk_unprepare(smmu->num_clks, smmu->clks); >> + >> return 0; >> } >> >> @@ -2197,7 +2233,27 @@ static int __maybe_unused arm_smmu_pm_resume(struct device *dev) >> return 0; >> } >> >> -static SIMPLE_DEV_PM_OPS(arm_smmu_pm_ops, NULL, arm_smmu_pm_resume); >> +static int __maybe_unused arm_smmu_runtime_resume(struct device *dev) >> +{ >> + struct arm_smmu_device *smmu = dev_get_drvdata(dev); >> + >> + return clk_bulk_enable(smmu->num_clks, smmu->clks); >> +} >> + >> +static int __maybe_unused arm_smmu_runtime_suspend(struct device *dev) >> +{ >> + struct arm_smmu_device *smmu = dev_get_drvdata(dev); >> + >> + clk_bulk_disable(smmu->num_clks, smmu->clks); >> + >> + return 0; >> +} >> + >> +static const struct dev_pm_ops arm_smmu_pm_ops = { >> + SET_SYSTEM_SLEEP_PM_OPS(NULL, arm_smmu_pm_resume) > > This is suspicious. > > If you need a runtime suspend method, why do you think that it is not necessary > to suspend the device during system-wide transitions? Okay, so you suggest to put clock disabling in say arm_smmu_pm_suspend()? In that case the clocks have to be enabled in the resume path too. I remember Tomasz pointed to that we shouldn't need clock enable in resume path [1]. [1] https://lkml.org/lkml/2018/3/15/60 Best regards Vivek > >> + SET_RUNTIME_PM_OPS(arm_smmu_runtime_suspend, >> + arm_smmu_runtime_resume, NULL) >> +}; >> >> static struct platform_driver arm_smmu_driver = { >> .driver = { >> > > -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2018-07-11 10:55 UTC|newest] Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-07-08 17:34 [PATCH v12 0/4] iommu/arm-smmu: Add runtime pm/sleep support Vivek Gautam 2018-07-08 17:34 ` Vivek Gautam [not found] ` <20180708173413.1965-1-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2018-07-08 17:34 ` [PATCH v12 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops Vivek Gautam 2018-07-08 17:34 ` Vivek Gautam 2018-07-11 9:50 ` Rafael J. Wysocki [not found] ` <17407514.unFVTGoGrn-yvgW3jdyMHm1GS7QM15AGw@public.gmane.org> 2018-07-11 10:55 ` Vivek Gautam [this message] 2018-07-11 10:55 ` Vivek Gautam [not found] ` <CAFp+6iHxJucfzJJeEvSToG4p2zADjDb9F0L8h053x-JKAy55mg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-11 11:11 ` Rafael J. Wysocki 2018-07-11 11:11 ` Rafael J. Wysocki [not found] ` <CAJZ5v0gbkdkx_+oHYiPz=SFdFCLm38hsi1TmJ2Jdc7j73TNtzg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-11 12:51 ` Tomasz Figa 2018-07-11 12:51 ` Tomasz Figa [not found] ` <CAAFQd5Cqd=J+_nqRc_sx=sq2ayxwSRMgygvffuHH9nC5R_LjdA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-11 13:40 ` Marek Szyprowski 2018-07-11 13:40 ` Marek Szyprowski 2018-07-11 20:36 ` Rafael J. Wysocki 2018-07-11 20:36 ` Rafael J. Wysocki [not found] ` <CAJZ5v0g0NwkLmd=tJ0sT4pc8FJSRE8sEu5GRQ7KUUd+YedzjMg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-23 5:59 ` Marek Szyprowski 2018-07-23 5:59 ` Marek Szyprowski [not found] ` <20180723055959eucas1p15a381f2a1287a28e4f78f1fb5fc8e37d~D6gOgxXLK0412704127eucas1p1R-MHMrYXj8g+pqW5MlFJXMulaTQe2KTcn/@public.gmane.org> 2018-07-23 11:05 ` Rafael J. Wysocki 2018-07-23 11:05 ` Rafael J. Wysocki 2018-07-12 10:57 ` Vivek Gautam 2018-07-12 10:57 ` Vivek Gautam [not found] ` <CAFp+6iFxiM0DDnRqUameH6XOYjgdAF8ysuXXAjkc8zsod-dVcQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-16 8:51 ` Rafael J. Wysocki 2018-07-16 8:51 ` Rafael J. Wysocki [not found] ` <CAJZ5v0hq3bLUbXNsr_ig7D72td_wqRP063x1AseP85F5UWs8VA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-16 10:11 ` Vivek Gautam 2018-07-16 10:11 ` Vivek Gautam [not found] ` <010cb56a-36e8-e729-1fe7-738048eb551d-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2018-07-16 10:23 ` Rafael J. Wysocki 2018-07-16 10:23 ` Rafael J. Wysocki 2018-07-08 17:34 ` [PATCH v12 2/4] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device Vivek Gautam 2018-07-08 17:34 ` Vivek Gautam 2018-07-11 9:51 ` Rafael J. Wysocki [not found] ` <1694664.FhRBrgajmF-yvgW3jdyMHm1GS7QM15AGw@public.gmane.org> 2018-07-11 10:05 ` Tomasz Figa 2018-07-11 10:05 ` Tomasz Figa [not found] ` <CAAFQd5COVfXRBuq2ofHoOvNb+cMVmAFDaekh5KM4DBB1ZEf5pA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-11 10:59 ` Rafael J. Wysocki 2018-07-11 10:59 ` Rafael J. Wysocki [not found] ` <CAJZ5v0hMQJQ0Z-H2OLaeCdT+-MW_eSWmg7saVzkpDqJ-=i3DnQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-11 11:30 ` Vivek Gautam 2018-07-11 11:30 ` Vivek Gautam 2018-07-08 17:34 ` [PATCH v12 3/4] iommu/arm-smmu: Add the device_link between masters and smmu Vivek Gautam 2018-07-08 17:34 ` Vivek Gautam 2018-07-11 9:53 ` Rafael J. Wysocki [not found] ` <5179668.PHK6S3sxLu-yvgW3jdyMHm1GS7QM15AGw@public.gmane.org> 2018-07-11 10:36 ` Vivek Gautam 2018-07-11 10:36 ` Vivek Gautam [not found] ` <741cc78b-59a7-5289-e42f-1511ebedb15d-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2018-07-12 12:41 ` Vivek Gautam 2018-07-12 12:41 ` Vivek Gautam [not found] ` <CAFp+6iFTgEhPLYQEyBX_Fb0k3n0OzGhKuSoBNV5XzpD01+V8qw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-16 8:55 ` Rafael J. Wysocki 2018-07-16 8:55 ` Rafael J. Wysocki [not found] ` <CAJZ5v0iQ2wxsXvuaLK2M9a_Jwe_fnwR2Afrq_Oa8h0--Ch7-5g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-16 11:46 ` Vivek Gautam 2018-07-16 11:46 ` Vivek Gautam [not found] ` <93d16301-4bef-203f-24de-4d010de84b22-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2018-07-17 7:46 ` Rafael J. Wysocki 2018-07-17 7:46 ` Rafael J. Wysocki [not found] ` <CAJZ5v0ijB6ZX9q0i+YrkWg1-nQBx+FuTjbGq1xRoJS113uoA-g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-17 8:30 ` Vivek Gautam 2018-07-17 8:30 ` Vivek Gautam 2018-07-18 9:30 ` Vivek Gautam 2018-07-18 9:30 ` Vivek Gautam [not found] ` <CAFp+6iGcwdK=wyPf++u3B+ORghuB1YhYmnJLSwvt1efG9H4YeA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2018-07-18 12:43 ` Robin Murphy 2018-07-18 12:43 ` Robin Murphy [not found] ` <48139f68-5a79-8531-00fa-fbdd787f50f5-5wv7dgnIgG8@public.gmane.org> 2018-07-18 13:31 ` Vivek Gautam 2018-07-18 13:31 ` Vivek Gautam 2018-07-08 17:34 ` [PATCH v12 4/4] iommu/arm-smmu: Add support for qcom, smmu-v2 variant Vivek Gautam 2018-07-08 17:34 ` [PATCH v12 4/4] iommu/arm-smmu: Add support for qcom,smmu-v2 variant Vivek Gautam
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