From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Christine Zhu <Christine.Zhu@mediatek.com>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
srv_heupstream <srv_heupstream@mediatek.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-watchdog@vger.kernel.org,
devicetree <devicetree@vger.kernel.org>,
Seiya Wang <seiya.wang@mediatek.com>,
Rex-BC Chen <Rex-BC.Chen@mediatek.com>
Subject: Re: [v6,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller header file
Date: Fri, 23 Jul 2021 11:54:17 +0200 [thread overview]
Message-ID: <CAFqH_539HesXQZz5F3mNXveHvHUjKTTBOkpZxmEf_BBOODHZcQ@mail.gmail.com> (raw)
In-Reply-To: <20210723094138.24793-3-Christine.Zhu@mediatek.com>
Hi Christine,
Thank you for your patch.
Missatge de Christine Zhu <Christine.Zhu@mediatek.com> del dia dv., 23
de jul. 2021 a les 11:45:
>
> Add toprgu reset-controller header file for MT8195 platform
>
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> ---
> .../reset-controller/mt8195-resets.h | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
> create mode 100644 include/dt-bindings/reset-controller/mt8195-resets.h
>
> diff --git a/include/dt-bindings/reset-controller/mt8195-resets.h b/include/dt-bindings/reset-controller/mt8195-resets.h
The DT binding includes for reset controllers are located in
`include/dt-bindings/reset/` Move the Mediatek reset constants there
instead of the `reset-controller`directory. We're doing this also for
current files that are there, see [1]
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210714121116.v2.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid/
> new file mode 100644
> index 000000000000..8176a3e5063f
> --- /dev/null
> +++ b/include/dt-bindings/reset-controller/mt8195-resets.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +/*
> + * This file is provided under a dual BSD/GPLv2 license. When using or
> + * redistributing this file, you may do so under either licens
This is implicit in the SPDX-License-Identifier, so you can remove
these two lines.
Thanks,
Enric
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Christine Zhu <christine.zhu@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +
> +#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
> +#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
> +#define MT8195_TOPRGU_APU_SW_RST 2
> +#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
> +#define MT8195_TOPRGU_MMSYS_SW_RST 7
> +#define MT8195_TOPRGU_MFG_SW_RST 8
> +#define MT8195_TOPRGU_VENC_SW_RST 9
> +#define MT8195_TOPRGU_VDEC_SW_RST 10
> +#define MT8195_TOPRGU_IMG_SW_RST 11
> +#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
> +#define MT8195_TOPRGU_AUDIO_SW_RST 14
> +#define MT8195_TOPRGU_CAMSYS_SW_RST 15
> +#define MT8195_TOPRGU_EDPTX_SW_RST 16
> +#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
> +#define MT8195_TOPRGU_DPTX_SW_RST 22
> +#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
> +
> +#define MT8195_TOPRGU_SW_RST_NUM 16
> +
> +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
> --
> 2.18.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Christine Zhu <Christine.Zhu@mediatek.com>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
srv_heupstream <srv_heupstream@mediatek.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-watchdog@vger.kernel.org,
devicetree <devicetree@vger.kernel.org>,
Seiya Wang <seiya.wang@mediatek.com>,
Rex-BC Chen <Rex-BC.Chen@mediatek.com>
Subject: Re: [v6, 2/3] dt-bindings: reset: mt8195: add toprgu reset-controller header file
Date: Fri, 23 Jul 2021 11:54:17 +0200 [thread overview]
Message-ID: <CAFqH_539HesXQZz5F3mNXveHvHUjKTTBOkpZxmEf_BBOODHZcQ@mail.gmail.com> (raw)
In-Reply-To: <20210723094138.24793-3-Christine.Zhu@mediatek.com>
Hi Christine,
Thank you for your patch.
Missatge de Christine Zhu <Christine.Zhu@mediatek.com> del dia dv., 23
de jul. 2021 a les 11:45:
>
> Add toprgu reset-controller header file for MT8195 platform
>
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> ---
> .../reset-controller/mt8195-resets.h | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
> create mode 100644 include/dt-bindings/reset-controller/mt8195-resets.h
>
> diff --git a/include/dt-bindings/reset-controller/mt8195-resets.h b/include/dt-bindings/reset-controller/mt8195-resets.h
The DT binding includes for reset controllers are located in
`include/dt-bindings/reset/` Move the Mediatek reset constants there
instead of the `reset-controller`directory. We're doing this also for
current files that are there, see [1]
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210714121116.v2.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid/
> new file mode 100644
> index 000000000000..8176a3e5063f
> --- /dev/null
> +++ b/include/dt-bindings/reset-controller/mt8195-resets.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +/*
> + * This file is provided under a dual BSD/GPLv2 license. When using or
> + * redistributing this file, you may do so under either licens
This is implicit in the SPDX-License-Identifier, so you can remove
these two lines.
Thanks,
Enric
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Christine Zhu <christine.zhu@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +
> +#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
> +#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
> +#define MT8195_TOPRGU_APU_SW_RST 2
> +#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
> +#define MT8195_TOPRGU_MMSYS_SW_RST 7
> +#define MT8195_TOPRGU_MFG_SW_RST 8
> +#define MT8195_TOPRGU_VENC_SW_RST 9
> +#define MT8195_TOPRGU_VDEC_SW_RST 10
> +#define MT8195_TOPRGU_IMG_SW_RST 11
> +#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
> +#define MT8195_TOPRGU_AUDIO_SW_RST 14
> +#define MT8195_TOPRGU_CAMSYS_SW_RST 15
> +#define MT8195_TOPRGU_EDPTX_SW_RST 16
> +#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
> +#define MT8195_TOPRGU_DPTX_SW_RST 22
> +#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
> +
> +#define MT8195_TOPRGU_SW_RST_NUM 16
> +
> +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
> --
> 2.18.0
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Christine Zhu <Christine.Zhu@mediatek.com>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
srv_heupstream <srv_heupstream@mediatek.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-watchdog@vger.kernel.org,
devicetree <devicetree@vger.kernel.org>,
Seiya Wang <seiya.wang@mediatek.com>,
Rex-BC Chen <Rex-BC.Chen@mediatek.com>
Subject: Re: [v6, 2/3] dt-bindings: reset: mt8195: add toprgu reset-controller header file
Date: Fri, 23 Jul 2021 11:54:17 +0200 [thread overview]
Message-ID: <CAFqH_539HesXQZz5F3mNXveHvHUjKTTBOkpZxmEf_BBOODHZcQ@mail.gmail.com> (raw)
In-Reply-To: <20210723094138.24793-3-Christine.Zhu@mediatek.com>
Hi Christine,
Thank you for your patch.
Missatge de Christine Zhu <Christine.Zhu@mediatek.com> del dia dv., 23
de jul. 2021 a les 11:45:
>
> Add toprgu reset-controller header file for MT8195 platform
>
> Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
> ---
> .../reset-controller/mt8195-resets.h | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
> create mode 100644 include/dt-bindings/reset-controller/mt8195-resets.h
>
> diff --git a/include/dt-bindings/reset-controller/mt8195-resets.h b/include/dt-bindings/reset-controller/mt8195-resets.h
The DT binding includes for reset controllers are located in
`include/dt-bindings/reset/` Move the Mediatek reset constants there
instead of the `reset-controller`directory. We're doing this also for
current files that are there, see [1]
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210714121116.v2.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid/
> new file mode 100644
> index 000000000000..8176a3e5063f
> --- /dev/null
> +++ b/include/dt-bindings/reset-controller/mt8195-resets.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +/*
> + * This file is provided under a dual BSD/GPLv2 license. When using or
> + * redistributing this file, you may do so under either licens
This is implicit in the SPDX-License-Identifier, so you can remove
these two lines.
Thanks,
Enric
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Christine Zhu <christine.zhu@mediatek.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
> +
> +#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
> +#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
> +#define MT8195_TOPRGU_APU_SW_RST 2
> +#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
> +#define MT8195_TOPRGU_MMSYS_SW_RST 7
> +#define MT8195_TOPRGU_MFG_SW_RST 8
> +#define MT8195_TOPRGU_VENC_SW_RST 9
> +#define MT8195_TOPRGU_VDEC_SW_RST 10
> +#define MT8195_TOPRGU_IMG_SW_RST 11
> +#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
> +#define MT8195_TOPRGU_AUDIO_SW_RST 14
> +#define MT8195_TOPRGU_CAMSYS_SW_RST 15
> +#define MT8195_TOPRGU_EDPTX_SW_RST 16
> +#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
> +#define MT8195_TOPRGU_DPTX_SW_RST 22
> +#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
> +
> +#define MT8195_TOPRGU_SW_RST_NUM 16
> +
> +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
> --
> 2.18.0
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-23 9:54 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-23 9:41 [v6,0/3] watchdog: mt8195: add wdt support Christine Zhu
2021-07-23 9:41 ` Christine Zhu
2021-07-23 9:41 ` [v6,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document Christine Zhu
2021-07-23 9:41 ` Christine Zhu
2021-07-23 9:41 ` Christine Zhu
2021-07-23 9:41 ` [v6,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller header file Christine Zhu
2021-07-23 9:41 ` [v6, 2/3] " Christine Zhu
2021-07-23 9:41 ` Christine Zhu
2021-07-23 9:54 ` Enric Balletbo Serra [this message]
2021-07-23 9:54 ` Enric Balletbo Serra
2021-07-23 9:54 ` Enric Balletbo Serra
2021-07-23 9:41 ` [v6,3/3] watchdog: mediatek: mt8195: add wdt support Christine Zhu
2021-07-23 9:41 ` Christine Zhu
2021-07-23 9:41 ` Christine Zhu
-- strict thread matches above, loose matches on Subject: below --
2021-07-23 9:31 [v6,0/3] watchdog: " Christine Zhu
2021-07-23 9:31 ` [v6,2/3] dt-bindings: reset: mt8195: add toprgu reset-controller header file Christine Zhu
2021-07-23 9:31 ` [v6, 2/3] " Christine Zhu
2021-07-23 9:31 ` Christine Zhu
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