From: Daniel Palmer <daniel@0x0f.com>
To: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: "Daniel Palmer" <daniel@thingy.jp>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
linux-mediatek@lists.infradead.org,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Marc Zyngier" <maz@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"YJ Chiang (江英杰)" <yj.chiang@mediatek.com>
Subject: Re: [PATCH v2] irqchip/irq-mst: Support polarity configuration
Date: Wed, 10 Mar 2021 19:20:27 +0900 [thread overview]
Message-ID: <CAFr9PX=dz1kt_BphpWr250asLiHFQNeBgNPhuPje==hzkcHWhg@mail.gmail.com> (raw)
In-Reply-To: <20210308143011.24538-1-mark-pk.tsai@mediatek.com>
Hi Mark-PK,
On Mon, 8 Mar 2021 at 23:30, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> From: Daniel Palmer <daniel@0x0f.com>
> >On Mon, 8 Mar 2021 at 15:05, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> >> +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type)
> > > +{
> >> + if (type != IRQ_TYPE_LEVEL_LOW && type != IRQ_TYPE_LEVEL_HIGH)
> >> + return -EINVAL;
> >> +
> >
> >Does this mean we can't do rising or falling edge interrupts?
>
> Yes, the interrupt of mst-intc is either level high or level low.
> Actually the input signal can be pulse, but it will be converted to level
> by the latch in mst-intc.
Are the GPIO connected interrupts meant to be configured as level
interrupts then?
For the MStar MSC313(e) there are 4 (that I know of) GPIO lines that
are wired into the mst-intc that requires EOI.
Until this patch with those lines configured as a rising edge a single
interrupt came each time the GPIO was pulled up as far as I remember.
I'm probably misunderstanding but a level interrupt doesn't seem to
make sense for a GPIO as it can't be serviced to clear the interrupt.
Thanks,
Daniel
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Palmer <daniel@0x0f.com>
To: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: "Daniel Palmer" <daniel@thingy.jp>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
linux-mediatek@lists.infradead.org,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Marc Zyngier" <maz@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"YJ Chiang (江英杰)" <yj.chiang@mediatek.com>
Subject: Re: [PATCH v2] irqchip/irq-mst: Support polarity configuration
Date: Wed, 10 Mar 2021 19:20:27 +0900 [thread overview]
Message-ID: <CAFr9PX=dz1kt_BphpWr250asLiHFQNeBgNPhuPje==hzkcHWhg@mail.gmail.com> (raw)
In-Reply-To: <20210308143011.24538-1-mark-pk.tsai@mediatek.com>
Hi Mark-PK,
On Mon, 8 Mar 2021 at 23:30, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> From: Daniel Palmer <daniel@0x0f.com>
> >On Mon, 8 Mar 2021 at 15:05, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> >> +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type)
> > > +{
> >> + if (type != IRQ_TYPE_LEVEL_LOW && type != IRQ_TYPE_LEVEL_HIGH)
> >> + return -EINVAL;
> >> +
> >
> >Does this mean we can't do rising or falling edge interrupts?
>
> Yes, the interrupt of mst-intc is either level high or level low.
> Actually the input signal can be pulse, but it will be converted to level
> by the latch in mst-intc.
Are the GPIO connected interrupts meant to be configured as level
interrupts then?
For the MStar MSC313(e) there are 4 (that I know of) GPIO lines that
are wired into the mst-intc that requires EOI.
Until this patch with those lines configured as a rising edge a single
interrupt came each time the GPIO was pulled up as far as I remember.
I'm probably misunderstanding but a level interrupt doesn't seem to
make sense for a GPIO as it can't be serviced to clear the interrupt.
Thanks,
Daniel
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Palmer <daniel@0x0f.com>
To: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: "Daniel Palmer" <daniel@thingy.jp>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
linux-mediatek@lists.infradead.org,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Marc Zyngier" <maz@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"YJ Chiang (江英杰)" <yj.chiang@mediatek.com>
Subject: Re: [PATCH v2] irqchip/irq-mst: Support polarity configuration
Date: Wed, 10 Mar 2021 19:20:27 +0900 [thread overview]
Message-ID: <CAFr9PX=dz1kt_BphpWr250asLiHFQNeBgNPhuPje==hzkcHWhg@mail.gmail.com> (raw)
In-Reply-To: <20210308143011.24538-1-mark-pk.tsai@mediatek.com>
Hi Mark-PK,
On Mon, 8 Mar 2021 at 23:30, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> From: Daniel Palmer <daniel@0x0f.com>
> >On Mon, 8 Mar 2021 at 15:05, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote:
> >> +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type)
> > > +{
> >> + if (type != IRQ_TYPE_LEVEL_LOW && type != IRQ_TYPE_LEVEL_HIGH)
> >> + return -EINVAL;
> >> +
> >
> >Does this mean we can't do rising or falling edge interrupts?
>
> Yes, the interrupt of mst-intc is either level high or level low.
> Actually the input signal can be pulse, but it will be converted to level
> by the latch in mst-intc.
Are the GPIO connected interrupts meant to be configured as level
interrupts then?
For the MStar MSC313(e) there are 4 (that I know of) GPIO lines that
are wired into the mst-intc that requires EOI.
Until this patch with those lines configured as a rising edge a single
interrupt came each time the GPIO was pulled up as far as I remember.
I'm probably misunderstanding but a level interrupt doesn't seem to
make sense for a GPIO as it can't be serviced to clear the interrupt.
Thanks,
Daniel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-10 10:19 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 6:05 [PATCH v2] irqchip/irq-mst: Support polarity configuration Mark-PK Tsai
2021-03-08 6:05 ` Mark-PK Tsai
2021-03-08 6:05 ` Mark-PK Tsai
2021-03-08 13:40 ` Daniel Palmer
2021-03-08 13:40 ` Daniel Palmer
2021-03-08 13:40 ` Daniel Palmer
2021-03-08 14:30 ` Mark-PK Tsai
2021-03-08 14:30 ` Mark-PK Tsai
2021-03-08 14:30 ` Mark-PK Tsai
2021-03-10 10:20 ` Daniel Palmer [this message]
2021-03-10 10:20 ` Daniel Palmer
2021-03-10 10:20 ` Daniel Palmer
2021-03-11 3:12 ` Mark-PK Tsai
2021-03-11 3:12 ` Mark-PK Tsai
2021-03-11 3:12 ` Mark-PK Tsai
2021-03-11 12:33 ` Daniel Palmer
2021-03-11 12:33 ` Daniel Palmer
2021-03-11 12:33 ` Daniel Palmer
2021-03-11 16:11 ` Mark-PK Tsai
2021-03-11 16:11 ` Mark-PK Tsai
2021-03-11 16:11 ` Mark-PK Tsai
2021-03-12 10:35 ` Daniel Palmer
2021-03-12 10:35 ` Daniel Palmer
2021-03-12 10:35 ` Daniel Palmer
2021-03-15 8:58 ` Mark-PK Tsai
2021-03-15 8:58 ` Mark-PK Tsai
2021-03-15 8:58 ` Mark-PK Tsai
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