* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
@ 2015-02-24 9:03 andrej at inversepath.com
2015-03-05 19:06 ` Chris Kuethe
` (2 more replies)
0 siblings, 3 replies; 15+ messages in thread
From: andrej at inversepath.com @ 2015-02-24 9:03 UTC (permalink / raw)
To: u-boot
From: Andrej Rosano <andrej@inversepath.com>
Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on Freescale i.MX53 SoC.
http://inversepath.com/usbarmory
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
---
arch/arm/Kconfig | 5 +
board/inversepath/usbarmory/Kconfig | 15 +
board/inversepath/usbarmory/MAINTAINERS | 6 +
board/inversepath/usbarmory/Makefile | 10 +
board/inversepath/usbarmory/imximage.cfg | 82 ++++++
board/inversepath/usbarmory/usbarmory.c | 440 ++++++++++++++++++++++++++++++
configs/usbarmory_defconfig | 3 +
include/configs/usbarmory.h | 115 ++++++++
8 files changed, 676 insertions(+)
create mode 100644 board/inversepath/usbarmory/Kconfig
create mode 100644 board/inversepath/usbarmory/MAINTAINERS
create mode 100644 board/inversepath/usbarmory/Makefile
create mode 100644 board/inversepath/usbarmory/imximage.cfg
create mode 100644 board/inversepath/usbarmory/usbarmory.c
create mode 100644 configs/usbarmory_defconfig
create mode 100644 include/configs/usbarmory.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 820ba1c..11f0e8b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -473,6 +473,10 @@ config TARGET_MX53SMD
bool "Support mx53smd"
select CPU_V7
+config TARGET_USBARMORY
+ bool "Support USB armory"
+ select CPU_V7
+
config TARGET_MX51_EFIKAMX
bool "Support mx51_efikamx"
select CPU_V7
@@ -818,6 +822,7 @@ source "board/h2200/Kconfig"
source "board/hale/tt01/Kconfig"
source "board/icpdas/lp8x4x/Kconfig"
source "board/imx31_phycore/Kconfig"
+source "board/inversepath/usbarmory/Kconfig"
source "board/isee/igep0033/Kconfig"
source "board/jornada/Kconfig"
source "board/karo/tx25/Kconfig"
diff --git a/board/inversepath/usbarmory/Kconfig b/board/inversepath/usbarmory/Kconfig
new file mode 100644
index 0000000..254b6c9
--- /dev/null
+++ b/board/inversepath/usbarmory/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_USBARMORY
+
+config SYS_BOARD
+ default "usbarmory"
+
+config SYS_VENDOR
+ default "inversepath"
+
+config SYS_SOC
+ default "mx5"
+
+config SYS_CONFIG_NAME
+ default "usbarmory"
+
+endif
diff --git a/board/inversepath/usbarmory/MAINTAINERS b/board/inversepath/usbarmory/MAINTAINERS
new file mode 100644
index 0000000..71a3dd4
--- /dev/null
+++ b/board/inversepath/usbarmory/MAINTAINERS
@@ -0,0 +1,6 @@
+USBARMORY BOARD
+M: Andrej Rosano <andrej@inversepath.com>
+S: Maintained
+F: board/inversepath/usbarmory/
+F: include/configs/usbarmory.h
+F: configs/usbarmory_defconfig
diff --git a/board/inversepath/usbarmory/Makefile b/board/inversepath/usbarmory/Makefile
new file mode 100644
index 0000000..9b8bd80
--- /dev/null
+++ b/board/inversepath/usbarmory/Makefile
@@ -0,0 +1,10 @@
+#
+# USB armory MkI board Makefile
+# http://inversepath.com/usbarmory
+#
+# Copyright (C) 2015, Inverse Path
+# Andrej Rosano <andrej@inversepath.com>
+#
+# SPDX-License-Identifier:|____GPL-2.0+
+
+obj-y := usbarmory.o
diff --git a/board/inversepath/usbarmory/imximage.cfg b/board/inversepath/usbarmory/imximage.cfg
new file mode 100644
index 0000000..392d2f9
--- /dev/null
+++ b/board/inversepath/usbarmory/imximage.cfg
@@ -0,0 +1,82 @@
+/*
+ * USB armory MkI board imximage configuration
+ * http://inversepath.com/usbarmory
+ *
+ * Copyright (C) 2015, Inverse Path
+ * Andrej Rosano <andrej@inversepath.com>
+ *
+ * SPDX-License-Identifier:|____GPL-2.0+
+ */
+
+IMAGE_VERSION 2
+BOOT_FROM sd
+
+
+/* IOMUX */
+
+DATA 4 0x53fa86f4 0x00000000 /* GRP_DDRMODE_CTL */
+DATA 4 0x53fa8714 0x00000000 /* GRP_DDRMODE */
+DATA 4 0x53fa86fc 0x00000000 /* GRP_DDRPKE */
+DATA 4 0x53fa8724 0x04000000 /* GRP_DDR_TYPE */
+
+DATA 4 0x53fa872c 0x00300000 /* GRP_B3DS */
+DATA 4 0x53fa8554 0x00300000 /* DRAM_DQM3 */
+DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */
+
+DATA 4 0x53fa8728 0x00300000 /* GRP_B2DS */
+DATA 4 0x53fa8560 0x00300000 /* DRAM_DQM2 */
+DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */
+
+DATA 4 0x53fa871c 0x00300000 /* GRP_B1DS */
+DATA 4 0x53fa8594 0x00300000 /* DRAM_DQM1 */
+DATA 4 0x53fa8590 0x00300040 /* DRAM_SDQS1 */
+
+DATA 4 0x53fa8718 0x00300000 /* GRP_B0DS */
+DATA 4 0x53fa8584 0x00300000 /* DRAM_DQM0 */
+DATA 4 0x53fa857c 0x00300040 /* DRAM_SDQS0 */
+
+DATA 4 0x53fa8578 0x00300000 /* DRAM_SDCLK0 */
+DATA 4 0x53fa8570 0x00300000 /* DRAM_SDCLK1 */
+
+DATA 4 0x53fa8574 0x00300000 /* DRAM_CAS */
+DATA 4 0x53fa8588 0x00300000 /* DRAM_RAS */
+DATA 4 0x53fa86f0 0x00300000 /* GRP_ADDS */
+DATA 4 0x53fa8720 0x00300000 /* GRP_CTLDS */
+
+DATA 4 0x53fa8564 0x00300040 /* DRAM_SDODT1 */
+DATA 4 0x53fa8580 0x00300040 /* DRAM_SDODT0 */
+
+
+/* ESDCTL */
+
+DATA 4 0x63fd9000 0x84180000 /* ESDCTL_ESDCTL */
+
+DATA 4 0x63fd9004 0x0002002d /* ESDCTL_ESDPTC */
+DATA 4 0x63fd9008 0x12273030 /* ESDCTL_ESDOTC */
+DATA 4 0x63fd900c 0x9f5152e3 /* ESDCTL_ESDCFG0 */
+DATA 4 0x63fd9010 0xb68e8a63 /* ESDCTL_ESDCFG1 */
+DATA 4 0x63fd9014 0x01ff00db /* ESDCTL_ESDCFG2 */
+DATA 4 0x63fd9018 0x00011740 /* ESDCTL_ESDMISC */
+
+DATA 4 0x63fd901c 0x00008032 /* ESDCTL_ESDSCR */
+DATA 4 0x63fd901c 0x00008033
+DATA 4 0x63fd901c 0x00028031
+DATA 4 0x63fd901c 0x052080b0
+DATA 4 0x63fd901c 0x04008040
+DATA 4 0x63fd901c 0x0000803a
+DATA 4 0x63fd901c 0x0000803b
+DATA 4 0x63fd901c 0x00028039
+DATA 4 0x63fd901c 0x05208138
+DATA 4 0x63fd901c 0x04008048
+DATA 4 0x63fd901c 0x00000000
+
+DATA 4 0x63fd9020 0x00005800 /* ESDCTL_ESDREF */
+DATA 4 0x63fd902c 0x000026d2 /* ESDCTL_ESDEWD */
+DATA 4 0x63fd9030 0x009f0e21 /* ESDCTL_ESDOR */
+DATA 4 0x63fd9040 0x05380003 /* ESDCTL_ZQHWCTRL */
+DATA 4 0x63fd9058 0x00022227 /* ESDCTL_ODTCTRL */
+
+DATA 4 0x63fd907c 0x01370138 /* ESDCTL_DGCTRL0 */
+DATA 4 0x63fd9080 0x013b013c /* ESDCTL_DGCTRL1 */
+DATA 4 0x63fd9088 0x35343535 /* ESDCTL_RDDLCTL */
+DATA 4 0x63fd9090 0x4d444c44 /* ESDCTL_WRDLCTL */
diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
new file mode 100644
index 0000000..2ebd697
--- /dev/null
+++ b/board/inversepath/usbarmory/usbarmory.c
@@ -0,0 +1,440 @@
+/*
+ * USB armory MkI board initialization
+ * http://inversepath.com/usbarmory
+ *
+ * Copyright (C) 2015, Inverse Path
+ * Andrej Rosano <andrej@inversepath.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux-mx53.h>
+#include <asm/errno.h>
+#include <i2c.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <asm/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank *bank = &iim->bank[0];
+ struct fuse_bank0_regs *fuse =
+ (struct fuse_bank0_regs *)bank->fuse_regs;
+
+ int rev = readl(&fuse->gp[6]);
+
+ return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
+}
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[1] = {
+ {MMC_SDHC1_BASE_ADDR}
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+ /* CD not present */
+ return 1;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+
+ return ret;
+}
+#endif
+
+#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
+ PAD_CTL_PUS_100K_UP)
+#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
+ PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
+#define PAD_CTRL_UP PAD_CTL_PUS_100K_UP
+#define PAD_CTRL_GND PAD_CTL_PUS_100K_DOWN
+
+static void setup_iomux_sd(void)
+{
+ static const iomux_v3_cfg_t pads[] = {
+ NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, MX53_SDHC_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
+ MX53_SDHC_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
+ MX53_SDHC_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
+ MX53_SDHC_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
+ MX53_SDHC_PAD_CTRL),
+ MX53_PAD_EIM_DA13__GPIO3_13,
+ };
+
+ imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
+}
+
+static void setup_iomux_led(void)
+{
+ static const iomux_v3_cfg_t pads[] = {
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT6__GPIO4_27,
+ PAD_CTL_PUS_100K_DOWN),
+ };
+
+ imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
+}
+
+static void setup_iomux_i2c(void)
+{
+ static const iomux_v3_cfg_t pads[] = {
+ NEW_PAD_CTRL(MX53_PAD_EIM_D28__I2C1_SDA, I2C_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D21__I2C1_SCL, I2C_PAD_CTRL),
+ };
+
+ imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
+}
+
+static void setup_iomux_pinheader(void)
+{
+ static const iomux_v3_cfg_t pads[] = {
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__GPIO5_26, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__GPIO5_27, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
+ MX53_UART_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,
+ MX53_UART_PAD_CTRL),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT12__GPIO5_30, PAD_CTRL_UP),
+ };
+
+ imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
+}
+
+static void setup_iomux_unused_boot(void)
+{
+ static const iomux_v3_cfg_t pads[] = {
+
+ /* Pulled-up pads */
+ NEW_PAD_CTRL(MX53_PAD_EIM_A21__GPIO2_17, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA0__GPIO3_0, PAD_CTRL_UP),
+
+ /* Grounded pads */
+ NEW_PAD_CTRL(MX53_PAD_EIM_LBA__GPIO2_27, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_EB0__GPIO2_28, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_EB1__GPIO2_29, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A16__GPIO2_22, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A17__GPIO2_21, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A18__GPIO2_20, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A19__GPIO2_19, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A20__GPIO2_18, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A22__GPIO2_16, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA1__GPIO3_1, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA2__GPIO3_2, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA3__GPIO3_3, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA4__GPIO3_4, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA5__GPIO3_5, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA6__GPIO3_6, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA7__GPIO3_7, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA8__GPIO3_8, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA9__GPIO3_9, PAD_CTRL_GND),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA10__GPIO3_10, PAD_CTRL_GND),
+ };
+
+ imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
+}
+
+static void setup_iomux_unused_nc(void)
+{
+ /* Out of reset values define the pin values before the
+ ROM is executed so we force all the not connected pins
+ to a known state */
+ static const iomux_v3_cfg_t pads[] = {
+
+ /* CONTROL PINS block */
+ NEW_PAD_CTRL(MX53_PAD_GPIO_0__GPIO1_0, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_1__GPIO1_1, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_2__GPIO1_2, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_3__GPIO1_3, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_4__GPIO1_4, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_5__GPIO1_5, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_6__GPIO1_6, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_7__GPIO1_7, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_8__GPIO1_8, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_9__GPIO1_9, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_10__GPIO4_0, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_11__GPIO4_1, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_12__GPIO4_2, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_13__GPIO4_3, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_14__GPIO4_4, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_16__GPIO7_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_17__GPIO7_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_18__GPIO7_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_GPIO_19__GPIO4_5, PAD_CTRL_UP),
+
+ /* EIM block */
+ NEW_PAD_CTRL(MX53_PAD_EIM_OE__GPIO2_25, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_WAIT__GPIO5_0, PAD_CTRL_UP),
+ /* EIM_LBA: setup_iomux_unused_boot() */
+ NEW_PAD_CTRL(MX53_PAD_EIM_RW__GPIO2_26, PAD_CTRL_UP),
+ /* EIM_EB0: setup_iomux_unused_boot() */
+ /* EIM_EB1: setup_iomux_unused_boot() */
+ NEW_PAD_CTRL(MX53_PAD_EIM_EB2__GPIO2_30, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_EB3__GPIO2_31, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_CS0__GPIO2_23, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_CS1__GPIO2_24, PAD_CTRL_UP),
+ /* EIM_A16: setup_iomux_unused_boot() */
+ /* EIM_A17: setup_iomux_unused_boot() */
+ /* EIM_A18: setup_iomux_unused_boot() */
+ /* EIM_A19: setup_iomux_unused_boot() */
+ /* EIM_A20: setup_iomux_unused_boot() */
+ /* EIM_A21: setup_iomux_unused_boot() */
+ /* EIM_A22: setup_iomux_unused_boot() */
+ NEW_PAD_CTRL(MX53_PAD_EIM_A23__GPIO6_6, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A24__GPIO5_4, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_A25__GPIO5_2, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D16__GPIO3_16, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D17__GPIO3_17, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D18__GPIO3_18, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D19__GPIO3_19, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D20__GPIO3_20, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D21__GPIO3_21, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D22__GPIO3_22, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D23__GPIO3_23, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D24__GPIO3_24, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D25__GPIO3_25, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D26__GPIO3_26, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D27__GPIO3_27, PAD_CTRL_UP),
+ /* EIM_D28: setup_iomux_unused_boot() */
+ /* EIM_D29: setup_iomux_unused_boot() */
+ NEW_PAD_CTRL(MX53_PAD_EIM_D30__GPIO3_30, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_D31__GPIO3_31, PAD_CTRL_UP),
+ /* EIM_DA0: setup_iomux_unused_boot() */
+ /* EIM_DA1: setup_iomux_unused_boot() */
+ /* EIM_DA2: setup_iomux_unused_boot() */
+ /* EIM_DA3: setup_iomux_unused_boot() */
+ /* EIM_DA4: setup_iomux_unused_boot() */
+ /* EIM_DA5: setup_iomux_unused_boot() */
+ /* EIM_DA6: setup_iomux_unused_boot() */
+ /* EIM_DA7: setup_iomux_unused_boot() */
+ /* EIM_DA8: setup_iomux_unused_boot() */
+ /* EIM_DA9: setup_iomux_unused_boot() */
+ /* EIM_DA10: setup_iomux_unused_boot() */
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA11__GPIO3_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA12__GPIO3_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA13__GPIO3_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA14__GPIO3_14, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_EIM_DA15__GPIO3_15, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_WE_B__GPIO6_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_RE_B__GPIO6_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_ALE__GPIO6_8, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_CLE__GPIO6_7, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_WP_B__GPIO6_9, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_RB0__GPIO6_10, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_CS0__GPIO6_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_CS1__GPIO6_14, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_CS2__GPIO6_15, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_NANDF_CS3__GPIO6_16, PAD_CTRL_UP),
+
+ /* MISC block */
+ NEW_PAD_CTRL(MX53_PAD_FEC_MDC__GPIO1_31, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__GPIO1_22, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__GPIO1_25, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__GPIO1_23, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__GPIO1_24, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__GPIO1_28, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__GPIO1_27, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__GPIO1_26, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__GPIO1_30, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__GPIO1_29, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_COL0__GPIO4_6, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_ROW0__GPIO4_7, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_COL1__GPIO4_8, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_ROW1__GPIO4_9, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_COL2__GPIO4_10, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_ROW2__GPIO4_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_COL3__GPIO4_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_ROW3__GPIO4_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_COL4__GPIO4_14, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_KEY_ROW4__GPIO4_15, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_SD2_CMD__GPIO1_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_SD2_CLK__GPIO1_10, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_SD2_DATA0__GPIO1_15, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_SD2_DATA1__GPIO1_14, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_SD2_DATA2__GPIO1_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_SD2_DATA3__GPIO1_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_BUFFER_EN__GPIO7_1, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_CS_0__GPIO7_9, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_CS_1__GPIO7_10, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DA_0__GPIO7_6, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DA_1__GPIO7_7, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DA_2__GPIO7_8, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__GPIO2_0, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__GPIO2_1, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__GPIO2_2, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__GPIO2_3, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA4__GPIO2_4, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA5__GPIO2_5, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA6__GPIO2_6, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA7__GPIO2_7, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__GPIO2_8, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__GPIO2_9, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__GPIO2_10, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__GPIO2_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA12__GPIO2_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA13__GPIO2_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA14__GPIO2_14, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DATA15__GPIO2_15, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DIOR__GPIO7_3, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__GPIO6_17, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__GPIO6_18, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_DMARQ__GPIO7_0, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_INTRQ__GPIO7_2, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__GPIO7_5, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__GPIO7_4, PAD_CTRL_UP),
+
+ /* IPU block */
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT4__GPIO5_22, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT5__GPIO5_23, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT6__GPIO5_24, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT7__GPIO5_25, PAD_CTRL_UP),
+ /* CSI0_DAT8: setup_iomux_pinheader() */
+ /* CSI0_DAT9: setup_iomux_pinheader() */
+ /* CSI0_DAT10: setup_iomux_pinheader() */
+ /* CSI0_DAT11: setup_iomux_pinheader() */
+ /* CSI0_DAT12: setup_iomux_pinheader() */
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT13__GPIO5_31, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT14__GPIO6_0, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT15__GPIO6_1, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT16__GPIO6_2, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT17__GPIO6_3, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT18__GPIO6_4, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DAT19__GPIO6_5, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_VSYNC__GPIO5_21, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_PIXCLK__GPIO5_18, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_MCLK__GPIO5_19, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_CSI0_DATA_EN__GPIO5_20, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DI0_PIN2__GPIO4_18, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DI0_PIN3__GPIO4_19, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DI0_PIN4__GPIO4_20, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DI0_PIN15__GPIO4_17, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT0__GPIO4_21, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT1__GPIO4_22, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT2__GPIO4_23, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT3__GPIO4_24, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT4__GPIO4_25, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT5__GPIO4_26, PAD_CTRL_UP),
+ /* DISP0_DAT6: setup_iomux_led() */
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT7__GPIO4_28, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT8__GPIO4_29, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT9__GPIO4_30, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT10__GPIO4_31, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT11__GPIO5_5, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT12__GPIO5_6, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT13__GPIO5_7, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT14__GPIO5_8, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT15__GPIO5_9, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT16__GPIO5_10, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT17__GPIO5_11, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT18__GPIO5_12, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT19__GPIO5_13, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT20__GPIO5_14, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT21__GPIO5_15, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT22__GPIO5_16, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DISP0_DAT23__GPIO5_17, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_DI0_DISP_CLK__GPIO4_16, PAD_CTRL_UP),
+
+ /* LVDS block */
+ NEW_PAD_CTRL(MX53_PAD_LVDS0_TX0_P__GPIO7_30, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS0_TX1_P__GPIO7_28, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS0_TX2_P__GPIO7_26, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS0_TX3_P__GPIO7_22, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS1_TX0_P__GPIO6_30, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS1_TX1_P__GPIO6_28, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS1_TX2_P__GPIO6_24, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS1_TX3_P__GPIO6_22, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS0_CLK_P__GPIO7_24, PAD_CTRL_UP),
+ NEW_PAD_CTRL(MX53_PAD_LVDS1_CLK_P__GPIO6_26, PAD_CTRL_UP),
+ };
+
+ imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
+}
+
+static void setup_gpio(void)
+{
+ int i, j;
+
+ /* set all GPIO ports as input */
+ for (i = 0; i < 8; i++) {
+ for (j = 0; j < 32; j++)
+ gpio_direction_input(IMX_GPIO_NR(i, j));
+ }
+}
+
+#define CPU_CLOCK 800
+
+static void set_clock(void)
+{
+ u32 ref_clk = MXC_HCLK;
+ const uint32_t cpuclk = CPU_CLOCK;
+ const uint32_t dramclk = 400;
+ int ret;
+
+ ret = mxc_set_clock(ref_clk, cpuclk, MXC_ARM_CLK);
+ if (ret)
+ printf("CPU: Switch CPU clock to %dMHZ failed\n", cpuclk);
+
+ ret = mxc_set_clock(ref_clk, dramclk, MXC_PERIPH_CLK);
+ if (ret)
+ printf("CPU: Switch peripheral clock to %dMHz failed\n",
+ dramclk);
+
+ ret = mxc_set_clock(ref_clk, dramclk, MXC_DDR_CLK);
+ if (ret)
+ printf("CPU: Switch DDR clock to %dMHz failed\n", dramclk);
+}
+
+int board_early_init_f(void)
+{
+ setup_iomux_unused_nc();
+ setup_iomux_unused_boot();
+ setup_iomux_sd();
+ setup_iomux_led();
+ setup_iomux_pinheader();
+ setup_gpio();
+
+ set_clock();
+ return 0;
+}
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+ setup_iomux_i2c();
+ return 0;
+}
+
+int board_late_init(void)
+{
+ print_cpuinfo();
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 1 << 30);
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: Inverse Path USB armory MkI\n");
+ return 0;
+}
diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
new file mode 100644
index 0000000..994d2c7
--- /dev/null
+++ b/configs/usbarmory_defconfig
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/inversepath/usbarmory/imximage.cfg"
+CONFIG_ARM=y
+CONFIG_TARGET_USBARMORY=y
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
new file mode 100644
index 0000000..e00ec7b
--- /dev/null
+++ b/include/configs/usbarmory.h
@@ -0,0 +1,115 @@
+/*
+ * USB armory MkI board configuration settings
+ * http://inversepath.com/usbarmory
+ *
+ * Copyright (C) 2015, Inverse Path
+ * Andrej Rosano <andrej@inversepath.com>
+ *
+ * SPDX-License-Identifier:|____GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MX53
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_OF_LIBFDT
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_MXC_GPIO
+
+#include <asm/arch/imx-regs.h>
+#include <config_cmd_default.h>
+
+/* U-Boot commands */
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_CMD_EXT2
+#undef CONFIG_CMD_IMLS
+
+/* U-Boot environment */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+/* U-Boot general configurations */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 512
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_CMDLINE_EDITING
+
+/* UART */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART1_BASE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+/* SD/MMC */
+#define CONFIG_CMD_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_ESDHC_NUM 2
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_DOS_PARTITION
+
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_USB_STORAGE
+#define CONFIG_MXC_USB_PORT 1
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+
+/* I2C */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+
+/* Fuse */
+#define CONFIG_CMD_FUSE
+#define CONFIG_FSL_IIM
+
+/* Linux boot */
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_LOADADDR 0x72000000
+#define CONFIG_SYS_TEXT_BASE 0x77800000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_HOSTNAME usbarmory
+#define CONFIG_BOOTARGS \
+ "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
+#define CONFIG_BOOTCOMMAND \
+ "ext2load mmc 0:1 0x70800000 /boot/uImage; ext2load mmc 0:1" \
+ "0x71000000 /boot/imx53-usbarmory.dtb; bootm 0x70800000 - 0x71000000"
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM CSD0_BASE_ADDR
+#define PHYS_SDRAM_SIZE (gd->ram_size)
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_SYS_MEMTEST_START 0x70000000
+#define CONFIG_SYS_MEMTEST_END 0x90000000
+
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
+
+#endif /* __CONFIG_H */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-02-24 9:03 [U-Boot] [PATCH] arm: mx5: Add support for USB armory board andrej at inversepath.com
@ 2015-03-05 19:06 ` Chris Kuethe
2015-03-16 16:50 ` Chris Kuethe
2015-03-19 16:55 ` [U-Boot] " Vagrant Cascadian
2 siblings, 0 replies; 15+ messages in thread
From: Chris Kuethe @ 2015-03-05 19:06 UTC (permalink / raw)
To: u-boot
I'll be able to test this next week, but I'd like to see usbarmory be
a supported board.
On Tue, Feb 24, 2015 at 1:03 AM, <andrej@inversepath.com> wrote:
> From: Andrej Rosano <andrej@inversepath.com>
>
> Add support for Inverse Path USB armory board, an open source
> flash-drive sized computer based on Freescale i.MX53 SoC.
>
> http://inversepath.com/usbarmory
>
> Signed-off-by: Andrej Rosano <andrej@inversepath.com>
> ---
> arch/arm/Kconfig | 5 +
> board/inversepath/usbarmory/Kconfig | 15 +
> board/inversepath/usbarmory/MAINTAINERS | 6 +
> board/inversepath/usbarmory/Makefile | 10 +
> board/inversepath/usbarmory/imximage.cfg | 82 ++++++
> board/inversepath/usbarmory/usbarmory.c | 440 ++++++++++++++++++++++++++++++
> configs/usbarmory_defconfig | 3 +
> include/configs/usbarmory.h | 115 ++++++++
> 8 files changed, 676 insertions(+)
> create mode 100644 board/inversepath/usbarmory/Kconfig
> create mode 100644 board/inversepath/usbarmory/MAINTAINERS
> create mode 100644 board/inversepath/usbarmory/Makefile
> create mode 100644 board/inversepath/usbarmory/imximage.cfg
> create mode 100644 board/inversepath/usbarmory/usbarmory.c
> create mode 100644 configs/usbarmory_defconfig
> create mode 100644 include/configs/usbarmory.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 820ba1c..11f0e8b 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -473,6 +473,10 @@ config TARGET_MX53SMD
> bool "Support mx53smd"
> select CPU_V7
>
> +config TARGET_USBARMORY
> + bool "Support USB armory"
> + select CPU_V7
> +
> config TARGET_MX51_EFIKAMX
> bool "Support mx51_efikamx"
> select CPU_V7
> @@ -818,6 +822,7 @@ source "board/h2200/Kconfig"
> source "board/hale/tt01/Kconfig"
> source "board/icpdas/lp8x4x/Kconfig"
> source "board/imx31_phycore/Kconfig"
> +source "board/inversepath/usbarmory/Kconfig"
> source "board/isee/igep0033/Kconfig"
> source "board/jornada/Kconfig"
> source "board/karo/tx25/Kconfig"
> diff --git a/board/inversepath/usbarmory/Kconfig b/board/inversepath/usbarmory/Kconfig
> new file mode 100644
> index 0000000..254b6c9
> --- /dev/null
> +++ b/board/inversepath/usbarmory/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_USBARMORY
> +
> +config SYS_BOARD
> + default "usbarmory"
> +
> +config SYS_VENDOR
> + default "inversepath"
> +
> +config SYS_SOC
> + default "mx5"
> +
> +config SYS_CONFIG_NAME
> + default "usbarmory"
> +
> +endif
> diff --git a/board/inversepath/usbarmory/MAINTAINERS b/board/inversepath/usbarmory/MAINTAINERS
> new file mode 100644
> index 0000000..71a3dd4
> --- /dev/null
> +++ b/board/inversepath/usbarmory/MAINTAINERS
> @@ -0,0 +1,6 @@
> +USBARMORY BOARD
> +M: Andrej Rosano <andrej@inversepath.com>
> +S: Maintained
> +F: board/inversepath/usbarmory/
> +F: include/configs/usbarmory.h
> +F: configs/usbarmory_defconfig
> diff --git a/board/inversepath/usbarmory/Makefile b/board/inversepath/usbarmory/Makefile
> new file mode 100644
> index 0000000..9b8bd80
> --- /dev/null
> +++ b/board/inversepath/usbarmory/Makefile
> @@ -0,0 +1,10 @@
> +#
> +# USB armory MkI board Makefile
> +# http://inversepath.com/usbarmory
> +#
> +# Copyright (C) 2015, Inverse Path
> +# Andrej Rosano <andrej@inversepath.com>
> +#
> +# SPDX-License-Identifier:|____GPL-2.0+
> +
> +obj-y := usbarmory.o
> diff --git a/board/inversepath/usbarmory/imximage.cfg b/board/inversepath/usbarmory/imximage.cfg
> new file mode 100644
> index 0000000..392d2f9
> --- /dev/null
> +++ b/board/inversepath/usbarmory/imximage.cfg
> @@ -0,0 +1,82 @@
> +/*
> + * USB armory MkI board imximage configuration
> + * http://inversepath.com/usbarmory
> + *
> + * Copyright (C) 2015, Inverse Path
> + * Andrej Rosano <andrej@inversepath.com>
> + *
> + * SPDX-License-Identifier:|____GPL-2.0+
> + */
> +
> +IMAGE_VERSION 2
> +BOOT_FROM sd
> +
> +
> +/* IOMUX */
> +
> +DATA 4 0x53fa86f4 0x00000000 /* GRP_DDRMODE_CTL */
> +DATA 4 0x53fa8714 0x00000000 /* GRP_DDRMODE */
> +DATA 4 0x53fa86fc 0x00000000 /* GRP_DDRPKE */
> +DATA 4 0x53fa8724 0x04000000 /* GRP_DDR_TYPE */
> +
> +DATA 4 0x53fa872c 0x00300000 /* GRP_B3DS */
> +DATA 4 0x53fa8554 0x00300000 /* DRAM_DQM3 */
> +DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */
> +
> +DATA 4 0x53fa8728 0x00300000 /* GRP_B2DS */
> +DATA 4 0x53fa8560 0x00300000 /* DRAM_DQM2 */
> +DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */
> +
> +DATA 4 0x53fa871c 0x00300000 /* GRP_B1DS */
> +DATA 4 0x53fa8594 0x00300000 /* DRAM_DQM1 */
> +DATA 4 0x53fa8590 0x00300040 /* DRAM_SDQS1 */
> +
> +DATA 4 0x53fa8718 0x00300000 /* GRP_B0DS */
> +DATA 4 0x53fa8584 0x00300000 /* DRAM_DQM0 */
> +DATA 4 0x53fa857c 0x00300040 /* DRAM_SDQS0 */
> +
> +DATA 4 0x53fa8578 0x00300000 /* DRAM_SDCLK0 */
> +DATA 4 0x53fa8570 0x00300000 /* DRAM_SDCLK1 */
> +
> +DATA 4 0x53fa8574 0x00300000 /* DRAM_CAS */
> +DATA 4 0x53fa8588 0x00300000 /* DRAM_RAS */
> +DATA 4 0x53fa86f0 0x00300000 /* GRP_ADDS */
> +DATA 4 0x53fa8720 0x00300000 /* GRP_CTLDS */
> +
> +DATA 4 0x53fa8564 0x00300040 /* DRAM_SDODT1 */
> +DATA 4 0x53fa8580 0x00300040 /* DRAM_SDODT0 */
> +
> +
> +/* ESDCTL */
> +
> +DATA 4 0x63fd9000 0x84180000 /* ESDCTL_ESDCTL */
> +
> +DATA 4 0x63fd9004 0x0002002d /* ESDCTL_ESDPTC */
> +DATA 4 0x63fd9008 0x12273030 /* ESDCTL_ESDOTC */
> +DATA 4 0x63fd900c 0x9f5152e3 /* ESDCTL_ESDCFG0 */
> +DATA 4 0x63fd9010 0xb68e8a63 /* ESDCTL_ESDCFG1 */
> +DATA 4 0x63fd9014 0x01ff00db /* ESDCTL_ESDCFG2 */
> +DATA 4 0x63fd9018 0x00011740 /* ESDCTL_ESDMISC */
> +
> +DATA 4 0x63fd901c 0x00008032 /* ESDCTL_ESDSCR */
> +DATA 4 0x63fd901c 0x00008033
> +DATA 4 0x63fd901c 0x00028031
> +DATA 4 0x63fd901c 0x052080b0
> +DATA 4 0x63fd901c 0x04008040
> +DATA 4 0x63fd901c 0x0000803a
> +DATA 4 0x63fd901c 0x0000803b
> +DATA 4 0x63fd901c 0x00028039
> +DATA 4 0x63fd901c 0x05208138
> +DATA 4 0x63fd901c 0x04008048
> +DATA 4 0x63fd901c 0x00000000
> +
> +DATA 4 0x63fd9020 0x00005800 /* ESDCTL_ESDREF */
> +DATA 4 0x63fd902c 0x000026d2 /* ESDCTL_ESDEWD */
> +DATA 4 0x63fd9030 0x009f0e21 /* ESDCTL_ESDOR */
> +DATA 4 0x63fd9040 0x05380003 /* ESDCTL_ZQHWCTRL */
> +DATA 4 0x63fd9058 0x00022227 /* ESDCTL_ODTCTRL */
> +
> +DATA 4 0x63fd907c 0x01370138 /* ESDCTL_DGCTRL0 */
> +DATA 4 0x63fd9080 0x013b013c /* ESDCTL_DGCTRL1 */
> +DATA 4 0x63fd9088 0x35343535 /* ESDCTL_RDDLCTL */
> +DATA 4 0x63fd9090 0x4d444c44 /* ESDCTL_WRDLCTL */
> diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
> new file mode 100644
> index 0000000..2ebd697
> --- /dev/null
> +++ b/board/inversepath/usbarmory/usbarmory.c
> @@ -0,0 +1,440 @@
> +/*
> + * USB armory MkI board initialization
> + * http://inversepath.com/usbarmory
> + *
> + * Copyright (C) 2015, Inverse Path
> + * Andrej Rosano <andrej@inversepath.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +#include <asm/arch/crm_regs.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/iomux-mx53.h>
> +#include <asm/errno.h>
> +#include <i2c.h>
> +#include <mmc.h>
> +#include <fsl_esdhc.h>
> +#include <asm/gpio.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +u32 get_board_rev(void)
> +{
> + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
> + struct fuse_bank *bank = &iim->bank[0];
> + struct fuse_bank0_regs *fuse =
> + (struct fuse_bank0_regs *)bank->fuse_regs;
> +
> + int rev = readl(&fuse->gp[6]);
> +
> + return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
> +}
> +
> +#ifdef CONFIG_FSL_ESDHC
> +struct fsl_esdhc_cfg esdhc_cfg[1] = {
> + {MMC_SDHC1_BASE_ADDR}
> +};
> +
> +int board_mmc_getcd(struct mmc *mmc)
> +{
> + /* CD not present */
> + return 1;
> +}
> +
> +int board_mmc_init(bd_t *bis)
> +{
> + int ret = 0;
> +
> + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
> + ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
> +
> + return ret;
> +}
> +#endif
> +
> +#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
> + PAD_CTL_PUS_100K_UP)
> +#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
> + PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
> +#define PAD_CTRL_UP PAD_CTL_PUS_100K_UP
> +#define PAD_CTRL_GND PAD_CTL_PUS_100K_DOWN
> +
> +static void setup_iomux_sd(void)
> +{
> + static const iomux_v3_cfg_t pads[] = {
> + NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, MX53_SDHC_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
> + MX53_SDHC_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
> + MX53_SDHC_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
> + MX53_SDHC_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
> + MX53_SDHC_PAD_CTRL),
> + MX53_PAD_EIM_DA13__GPIO3_13,
> + };
> +
> + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
> +}
> +
> +static void setup_iomux_led(void)
> +{
> + static const iomux_v3_cfg_t pads[] = {
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT6__GPIO4_27,
> + PAD_CTL_PUS_100K_DOWN),
> + };
> +
> + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
> +}
> +
> +static void setup_iomux_i2c(void)
> +{
> + static const iomux_v3_cfg_t pads[] = {
> + NEW_PAD_CTRL(MX53_PAD_EIM_D28__I2C1_SDA, I2C_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D21__I2C1_SCL, I2C_PAD_CTRL),
> + };
> +
> + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
> +}
> +
> +static void setup_iomux_pinheader(void)
> +{
> + static const iomux_v3_cfg_t pads[] = {
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__GPIO5_26, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__GPIO5_27, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
> + MX53_UART_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,
> + MX53_UART_PAD_CTRL),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT12__GPIO5_30, PAD_CTRL_UP),
> + };
> +
> + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
> +}
> +
> +static void setup_iomux_unused_boot(void)
> +{
> + static const iomux_v3_cfg_t pads[] = {
> +
> + /* Pulled-up pads */
> + NEW_PAD_CTRL(MX53_PAD_EIM_A21__GPIO2_17, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA0__GPIO3_0, PAD_CTRL_UP),
> +
> + /* Grounded pads */
> + NEW_PAD_CTRL(MX53_PAD_EIM_LBA__GPIO2_27, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_EB0__GPIO2_28, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_EB1__GPIO2_29, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A16__GPIO2_22, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A17__GPIO2_21, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A18__GPIO2_20, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A19__GPIO2_19, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A20__GPIO2_18, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A22__GPIO2_16, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA1__GPIO3_1, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA2__GPIO3_2, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA3__GPIO3_3, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA4__GPIO3_4, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA5__GPIO3_5, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA6__GPIO3_6, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA7__GPIO3_7, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA8__GPIO3_8, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA9__GPIO3_9, PAD_CTRL_GND),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA10__GPIO3_10, PAD_CTRL_GND),
> + };
> +
> + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
> +}
> +
> +static void setup_iomux_unused_nc(void)
> +{
> + /* Out of reset values define the pin values before the
> + ROM is executed so we force all the not connected pins
> + to a known state */
> + static const iomux_v3_cfg_t pads[] = {
> +
> + /* CONTROL PINS block */
> + NEW_PAD_CTRL(MX53_PAD_GPIO_0__GPIO1_0, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_1__GPIO1_1, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_2__GPIO1_2, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_3__GPIO1_3, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_4__GPIO1_4, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_5__GPIO1_5, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_6__GPIO1_6, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_7__GPIO1_7, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_8__GPIO1_8, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_9__GPIO1_9, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_10__GPIO4_0, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_11__GPIO4_1, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_12__GPIO4_2, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_13__GPIO4_3, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_14__GPIO4_4, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_16__GPIO7_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_17__GPIO7_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_18__GPIO7_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_GPIO_19__GPIO4_5, PAD_CTRL_UP),
> +
> + /* EIM block */
> + NEW_PAD_CTRL(MX53_PAD_EIM_OE__GPIO2_25, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_WAIT__GPIO5_0, PAD_CTRL_UP),
> + /* EIM_LBA: setup_iomux_unused_boot() */
> + NEW_PAD_CTRL(MX53_PAD_EIM_RW__GPIO2_26, PAD_CTRL_UP),
> + /* EIM_EB0: setup_iomux_unused_boot() */
> + /* EIM_EB1: setup_iomux_unused_boot() */
> + NEW_PAD_CTRL(MX53_PAD_EIM_EB2__GPIO2_30, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_EB3__GPIO2_31, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_CS0__GPIO2_23, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_CS1__GPIO2_24, PAD_CTRL_UP),
> + /* EIM_A16: setup_iomux_unused_boot() */
> + /* EIM_A17: setup_iomux_unused_boot() */
> + /* EIM_A18: setup_iomux_unused_boot() */
> + /* EIM_A19: setup_iomux_unused_boot() */
> + /* EIM_A20: setup_iomux_unused_boot() */
> + /* EIM_A21: setup_iomux_unused_boot() */
> + /* EIM_A22: setup_iomux_unused_boot() */
> + NEW_PAD_CTRL(MX53_PAD_EIM_A23__GPIO6_6, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A24__GPIO5_4, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_A25__GPIO5_2, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D16__GPIO3_16, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D17__GPIO3_17, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D18__GPIO3_18, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D19__GPIO3_19, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D20__GPIO3_20, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D21__GPIO3_21, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D22__GPIO3_22, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D23__GPIO3_23, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D24__GPIO3_24, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D25__GPIO3_25, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D26__GPIO3_26, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D27__GPIO3_27, PAD_CTRL_UP),
> + /* EIM_D28: setup_iomux_unused_boot() */
> + /* EIM_D29: setup_iomux_unused_boot() */
> + NEW_PAD_CTRL(MX53_PAD_EIM_D30__GPIO3_30, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_D31__GPIO3_31, PAD_CTRL_UP),
> + /* EIM_DA0: setup_iomux_unused_boot() */
> + /* EIM_DA1: setup_iomux_unused_boot() */
> + /* EIM_DA2: setup_iomux_unused_boot() */
> + /* EIM_DA3: setup_iomux_unused_boot() */
> + /* EIM_DA4: setup_iomux_unused_boot() */
> + /* EIM_DA5: setup_iomux_unused_boot() */
> + /* EIM_DA6: setup_iomux_unused_boot() */
> + /* EIM_DA7: setup_iomux_unused_boot() */
> + /* EIM_DA8: setup_iomux_unused_boot() */
> + /* EIM_DA9: setup_iomux_unused_boot() */
> + /* EIM_DA10: setup_iomux_unused_boot() */
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA11__GPIO3_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA12__GPIO3_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA13__GPIO3_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA14__GPIO3_14, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_EIM_DA15__GPIO3_15, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_WE_B__GPIO6_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_RE_B__GPIO6_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_ALE__GPIO6_8, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_CLE__GPIO6_7, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_WP_B__GPIO6_9, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_RB0__GPIO6_10, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_CS0__GPIO6_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_CS1__GPIO6_14, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_CS2__GPIO6_15, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_NANDF_CS3__GPIO6_16, PAD_CTRL_UP),
> +
> + /* MISC block */
> + NEW_PAD_CTRL(MX53_PAD_FEC_MDC__GPIO1_31, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__GPIO1_22, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__GPIO1_25, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__GPIO1_23, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__GPIO1_24, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__GPIO1_28, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__GPIO1_27, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__GPIO1_26, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__GPIO1_30, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__GPIO1_29, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_COL0__GPIO4_6, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_ROW0__GPIO4_7, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_COL1__GPIO4_8, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_ROW1__GPIO4_9, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_COL2__GPIO4_10, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_ROW2__GPIO4_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_COL3__GPIO4_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_ROW3__GPIO4_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_COL4__GPIO4_14, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_KEY_ROW4__GPIO4_15, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_SD2_CMD__GPIO1_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_SD2_CLK__GPIO1_10, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_SD2_DATA0__GPIO1_15, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_SD2_DATA1__GPIO1_14, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_SD2_DATA2__GPIO1_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_SD2_DATA3__GPIO1_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_BUFFER_EN__GPIO7_1, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_CS_0__GPIO7_9, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_CS_1__GPIO7_10, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DA_0__GPIO7_6, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DA_1__GPIO7_7, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DA_2__GPIO7_8, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__GPIO2_0, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__GPIO2_1, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__GPIO2_2, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__GPIO2_3, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA4__GPIO2_4, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA5__GPIO2_5, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA6__GPIO2_6, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA7__GPIO2_7, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__GPIO2_8, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__GPIO2_9, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__GPIO2_10, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__GPIO2_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA12__GPIO2_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA13__GPIO2_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA14__GPIO2_14, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DATA15__GPIO2_15, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DIOR__GPIO7_3, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__GPIO6_17, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__GPIO6_18, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_DMARQ__GPIO7_0, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_INTRQ__GPIO7_2, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__GPIO7_5, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__GPIO7_4, PAD_CTRL_UP),
> +
> + /* IPU block */
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT4__GPIO5_22, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT5__GPIO5_23, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT6__GPIO5_24, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT7__GPIO5_25, PAD_CTRL_UP),
> + /* CSI0_DAT8: setup_iomux_pinheader() */
> + /* CSI0_DAT9: setup_iomux_pinheader() */
> + /* CSI0_DAT10: setup_iomux_pinheader() */
> + /* CSI0_DAT11: setup_iomux_pinheader() */
> + /* CSI0_DAT12: setup_iomux_pinheader() */
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT13__GPIO5_31, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT14__GPIO6_0, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT15__GPIO6_1, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT16__GPIO6_2, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT17__GPIO6_3, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT18__GPIO6_4, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT19__GPIO6_5, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_VSYNC__GPIO5_21, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_PIXCLK__GPIO5_18, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_MCLK__GPIO5_19, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_CSI0_DATA_EN__GPIO5_20, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DI0_PIN2__GPIO4_18, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DI0_PIN3__GPIO4_19, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DI0_PIN4__GPIO4_20, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DI0_PIN15__GPIO4_17, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT0__GPIO4_21, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT1__GPIO4_22, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT2__GPIO4_23, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT3__GPIO4_24, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT4__GPIO4_25, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT5__GPIO4_26, PAD_CTRL_UP),
> + /* DISP0_DAT6: setup_iomux_led() */
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT7__GPIO4_28, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT8__GPIO4_29, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT9__GPIO4_30, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT10__GPIO4_31, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT11__GPIO5_5, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT12__GPIO5_6, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT13__GPIO5_7, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT14__GPIO5_8, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT15__GPIO5_9, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT16__GPIO5_10, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT17__GPIO5_11, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT18__GPIO5_12, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT19__GPIO5_13, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT20__GPIO5_14, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT21__GPIO5_15, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT22__GPIO5_16, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DISP0_DAT23__GPIO5_17, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_DI0_DISP_CLK__GPIO4_16, PAD_CTRL_UP),
> +
> + /* LVDS block */
> + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX0_P__GPIO7_30, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX1_P__GPIO7_28, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX2_P__GPIO7_26, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS0_TX3_P__GPIO7_22, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX0_P__GPIO6_30, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX1_P__GPIO6_28, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX2_P__GPIO6_24, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS1_TX3_P__GPIO6_22, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS0_CLK_P__GPIO7_24, PAD_CTRL_UP),
> + NEW_PAD_CTRL(MX53_PAD_LVDS1_CLK_P__GPIO6_26, PAD_CTRL_UP),
> + };
> +
> + imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads));
> +}
> +
> +static void setup_gpio(void)
> +{
> + int i, j;
> +
> + /* set all GPIO ports as input */
> + for (i = 0; i < 8; i++) {
> + for (j = 0; j < 32; j++)
> + gpio_direction_input(IMX_GPIO_NR(i, j));
> + }
> +}
> +
> +#define CPU_CLOCK 800
> +
> +static void set_clock(void)
> +{
> + u32 ref_clk = MXC_HCLK;
> + const uint32_t cpuclk = CPU_CLOCK;
> + const uint32_t dramclk = 400;
> + int ret;
> +
> + ret = mxc_set_clock(ref_clk, cpuclk, MXC_ARM_CLK);
> + if (ret)
> + printf("CPU: Switch CPU clock to %dMHZ failed\n", cpuclk);
> +
> + ret = mxc_set_clock(ref_clk, dramclk, MXC_PERIPH_CLK);
> + if (ret)
> + printf("CPU: Switch peripheral clock to %dMHz failed\n",
> + dramclk);
> +
> + ret = mxc_set_clock(ref_clk, dramclk, MXC_DDR_CLK);
> + if (ret)
> + printf("CPU: Switch DDR clock to %dMHz failed\n", dramclk);
> +}
> +
> +int board_early_init_f(void)
> +{
> + setup_iomux_unused_nc();
> + setup_iomux_unused_boot();
> + setup_iomux_sd();
> + setup_iomux_led();
> + setup_iomux_pinheader();
> + setup_gpio();
> +
> + set_clock();
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> + setup_iomux_i2c();
> + return 0;
> +}
> +
> +int board_late_init(void)
> +{
> + print_cpuinfo();
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 1 << 30);
> + return 0;
> +}
> +
> +int checkboard(void)
> +{
> + puts("Board: Inverse Path USB armory MkI\n");
> + return 0;
> +}
> diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
> new file mode 100644
> index 0000000..994d2c7
> --- /dev/null
> +++ b/configs/usbarmory_defconfig
> @@ -0,0 +1,3 @@
> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/inversepath/usbarmory/imximage.cfg"
> +CONFIG_ARM=y
> +CONFIG_TARGET_USBARMORY=y
> diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
> new file mode 100644
> index 0000000..e00ec7b
> --- /dev/null
> +++ b/include/configs/usbarmory.h
> @@ -0,0 +1,115 @@
> +/*
> + * USB armory MkI board configuration settings
> + * http://inversepath.com/usbarmory
> + *
> + * Copyright (C) 2015, Inverse Path
> + * Andrej Rosano <andrej@inversepath.com>
> + *
> + * SPDX-License-Identifier:|____GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#define CONFIG_MX53
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_BOARD_LATE_INIT
> +#define CONFIG_OF_LIBFDT
> +#define CONFIG_SYS_GENERIC_BOARD
> +#define CONFIG_MXC_GPIO
> +
> +#include <asm/arch/imx-regs.h>
> +#include <config_cmd_default.h>
> +
> +/* U-Boot commands */
> +#define CONFIG_CMD_BOOTZ
> +#define CONFIG_CMD_FAT
> +#define CONFIG_CMD_MEMTEST
> +#define CONFIG_CMD_EXT2
> +#undef CONFIG_CMD_IMLS
> +
> +/* U-Boot environment */
> +#define CONFIG_ENV_OVERWRITE
> +#define CONFIG_SYS_NO_FLASH
> +#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
> +#define CONFIG_ENV_SIZE (8 * 1024)
> +#define CONFIG_ENV_IS_IN_MMC
> +#define CONFIG_SYS_MMC_ENV_DEV 0
> +
> +/* U-Boot general configurations */
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_SYS_HUSH_PARSER
> +#define CONFIG_AUTO_COMPLETE
> +#define CONFIG_SYS_CBSIZE 512
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> +#define CONFIG_CMDLINE_EDITING
> +
> +/* UART */
> +#define CONFIG_MXC_UART
> +#define CONFIG_MXC_UART_BASE UART1_BASE
> +#define CONFIG_CONS_INDEX 1
> +#define CONFIG_BAUDRATE 115200
> +
> +/* SD/MMC */
> +#define CONFIG_CMD_MMC
> +#define CONFIG_FSL_ESDHC
> +#define CONFIG_SYS_FSL_ESDHC_ADDR 0
> +#define CONFIG_SYS_FSL_ESDHC_NUM 2
> +#define CONFIG_MMC
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_DOS_PARTITION
> +
> +/* USB */
> +#define CONFIG_CMD_USB
> +#define CONFIG_USB_EHCI
> +#define CONFIG_USB_EHCI_MX5
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_MXC_USB_PORT 1
> +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
> +#define CONFIG_MXC_USB_FLAGS 0
> +
> +/* I2C */
> +#define CONFIG_CMD_I2C
> +#define CONFIG_SYS_I2C
> +#define CONFIG_SYS_I2C_MXC
> +
> +/* Fuse */
> +#define CONFIG_CMD_FUSE
> +#define CONFIG_FSL_IIM
> +
> +/* Linux boot */
> +#define CONFIG_BOOTDELAY 1
> +#define CONFIG_LOADADDR 0x72000000
> +#define CONFIG_SYS_TEXT_BASE 0x77800000
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +#define CONFIG_HOSTNAME usbarmory
> +#define CONFIG_BOOTARGS \
> + "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
> +#define CONFIG_BOOTCOMMAND \
> + "ext2load mmc 0:1 0x70800000 /boot/uImage; ext2load mmc 0:1" \
> + "0x71000000 /boot/imx53-usbarmory.dtb; bootm 0x70800000 - 0x71000000"
> +
> +/* Physical Memory Map */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM CSD0_BASE_ADDR
> +#define PHYS_SDRAM_SIZE (gd->ram_size)
> +
> +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
> +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
> +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET \
> + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> +
> +#define CONFIG_SYS_MEMTEST_START 0x70000000
> +#define CONFIG_SYS_MEMTEST_END 0x90000000
> +
> +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
> +
> +#endif /* __CONFIG_H */
> --
> 1.7.10.4
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
--
GDB has a 'break' feature; why doesn't it have 'fix' too?
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-02-24 9:03 [U-Boot] [PATCH] arm: mx5: Add support for USB armory board andrej at inversepath.com
2015-03-05 19:06 ` Chris Kuethe
@ 2015-03-16 16:50 ` Chris Kuethe
2015-03-17 5:27 ` Chris Kuethe
2015-03-17 16:30 ` Fabio Estevam
2015-03-19 16:55 ` [U-Boot] " Vagrant Cascadian
2 siblings, 2 replies; 15+ messages in thread
From: Chris Kuethe @ 2015-03-16 16:50 UTC (permalink / raw)
To: u-boot
On Tue, Feb 24, 2015 at 1:03 AM, <andrej@inversepath.com> wrote:
> From: Andrej Rosano <andrej@inversepath.com>
>
> Add support for Inverse Path USB armory board, an open source
> flash-drive sized computer based on Freescale i.MX53 SoC.
>
> http://inversepath.com/usbarmory
>
> Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Tested-by: Chris Kuethe <chris.kuethe+github@gmail.com>
=> reset
resetting ...
U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Board: Inverse Path USB armory MkI
I2C: ready
DRAM: 512 MiB
MMC: FSL_SDHC: 0
In: serial
Out: serial
Err: serial
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: unknown reset
Net: CPU Net Initialization Failed
No ethernet found.
--
GDB has a 'break' feature; why doesn't it have 'fix' too?
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-16 16:50 ` Chris Kuethe
@ 2015-03-17 5:27 ` Chris Kuethe
2015-03-17 16:30 ` Fabio Estevam
1 sibling, 0 replies; 15+ messages in thread
From: Chris Kuethe @ 2015-03-17 5:27 UTC (permalink / raw)
To: u-boot
On Mon, Mar 16, 2015 at 9:50 AM, Chris Kuethe <chris.kuethe@gmail.com> wrote:
> On Tue, Feb 24, 2015 at 1:03 AM, <andrej@inversepath.com> wrote:
>> From: Andrej Rosano <andrej@inversepath.com>
>>
>> Add support for Inverse Path USB armory board, an open source
>> flash-drive sized computer based on Freescale i.MX53 SoC.
>>
>> http://inversepath.com/usbarmory
>>
>> Signed-off-by: Andrej Rosano <andrej@inversepath.com>
>
> Tested-by: Chris Kuethe <chris.kuethe+github@gmail.com>
Derp. I didn't notice this before because I had a saved boot command...
+#define CONFIG_BOOTCOMMAND \
+ "ext2load mmc 0:1 0x70800000 /boot/uImage; ext2load mmc 0:1" \
+ "0x71000000 /boot/imx53-usbarmory.dtb; bootm 0x70800000 - 0x71000000"
Needs a space after "mmc 0:1" or before "0x71000000", otherwise you
get "ext2load mmc 0:10x71000000" which won't boot.
--
GDB has a 'break' feature; why doesn't it have 'fix' too?
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-16 16:50 ` Chris Kuethe
2015-03-17 5:27 ` Chris Kuethe
@ 2015-03-17 16:30 ` Fabio Estevam
2015-03-17 16:49 ` Chris Kuethe
` (2 more replies)
1 sibling, 3 replies; 15+ messages in thread
From: Fabio Estevam @ 2015-03-17 16:30 UTC (permalink / raw)
To: u-boot
On Mon, Mar 16, 2015 at 1:50 PM, Chris Kuethe <chris.kuethe@gmail.com> wrote:
> U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
>
> CPU: Freescale i.MX53 rev2.1 at 800 MHz
> Reset cause: WDOG
Here the reset cause is printed correctly.
> Board: Inverse Path USB armory MkI
> I2C: ready
> DRAM: 512 MiB
> MMC: FSL_SDHC: 0
> In: serial
> Out: serial
> Err: serial
> CPU: Freescale i.MX53 rev2.1 at 800 MHz
> Reset cause: unknown reset
,but here it fails.
Why does CPU version and reset cause are printed twice?
Is this happening with all mx53 boards or only with this one?
I currently don't have access to any mx53 board to test this myself.
I am adding some folks on Cc who may have access to other mx53 boards
and could probably test whether we have a common mx53 issue here.
Regards,
Fabio Estevam
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-17 16:30 ` Fabio Estevam
@ 2015-03-17 16:49 ` Chris Kuethe
2015-03-17 16:51 ` Eric Nelson
2015-03-18 23:00 ` Andrej Rosano
2 siblings, 0 replies; 15+ messages in thread
From: Chris Kuethe @ 2015-03-17 16:49 UTC (permalink / raw)
To: u-boot
On Tue, Mar 17, 2015 at 9:30 AM, Fabio Estevam <festevam@gmail.com> wrote:
> On Mon, Mar 16, 2015 at 1:50 PM, Chris Kuethe <chris.kuethe@gmail.com> wrote:
>
>> U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
>>
>> CPU: Freescale i.MX53 rev2.1 at 800 MHz
>> Reset cause: WDOG
>
> Here the reset cause is printed correctly.
> ...
> ,but here it fails.
>
> Why does CPU version and reset cause are printed twice?
I noticed that too - will investigate that later tonight.
> Is this happening with all mx53 boards or only with this one?
> I currently don't have access to any mx53 board to test this myself.
Can't say if this happens on other boards as this is the only mx53 I
have. It also happens on -rc2
=============
U-Boot 2015.04-rc2 (Mar 17 2015 - 01:35:15)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: POR
Board: Inverse Path USB armory MkI
I2C: ready
DRAM: 512 MiB
MMC: FSL_SDHC: 0
In: serial
Out: serial
Err: serial
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: unknown reset
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
=============
> I am adding some folks on Cc who may have access to other mx53 boards
> and could probably test whether we have a common mx53 issue here.
There was some discussion not long ago about reset cause handling
(especially on mx6) which I haven't had a chance to fully digest yet.
--
GDB has a 'break' feature; why doesn't it have 'fix' too?
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-17 16:30 ` Fabio Estevam
2015-03-17 16:49 ` Chris Kuethe
@ 2015-03-17 16:51 ` Eric Nelson
2015-03-17 17:09 ` Stefano Babic
2015-03-18 23:00 ` Andrej Rosano
2 siblings, 1 reply; 15+ messages in thread
From: Eric Nelson @ 2015-03-17 16:51 UTC (permalink / raw)
To: u-boot
Hi Fabio,
On 03/17/2015 09:30 AM, Fabio Estevam wrote:
> On Mon, Mar 16, 2015 at 1:50 PM, Chris Kuethe <chris.kuethe@gmail.com> wrote:
>
>> U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
>>
>> CPU: Freescale i.MX53 rev2.1 at 800 MHz
>> Reset cause: WDOG
>
> Here the reset cause is printed correctly.
>
>> Board: Inverse Path USB armory MkI
>> I2C: ready
>> DRAM: 512 MiB
>> MMC: FSL_SDHC: 0
>> In: serial
>> Out: serial
>> Err: serial
>> CPU: Freescale i.MX53 rev2.1 at 800 MHz
>> Reset cause: unknown reset
>
> ,but here it fails.
>
> Why does CPU version and reset cause are printed twice?
>
It appears that get_reset_cause() is being called twice,
and since it's destructive, the second will say "unknown reset".
This patch will fix the value of the return value:
http://patchwork.ozlabs.org/patch/439934/
> Is this happening with all mx53 boards or only with this one?
>
I have no idea about this, but there appear to be multiple
calls to print_cpuinfo().
Regards,
Eric
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-17 16:51 ` Eric Nelson
@ 2015-03-17 17:09 ` Stefano Babic
2015-03-17 17:27 ` Fabio Estevam
0 siblings, 1 reply; 15+ messages in thread
From: Stefano Babic @ 2015-03-17 17:09 UTC (permalink / raw)
To: u-boot
Hi Fabio, Eric,
On 17/03/2015 17:51, Eric Nelson wrote:
> Hi Fabio,
>
> On 03/17/2015 09:30 AM, Fabio Estevam wrote:
>> On Mon, Mar 16, 2015 at 1:50 PM, Chris Kuethe <chris.kuethe@gmail.com> wrote:
>>
>>> U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
>>>
>>> CPU: Freescale i.MX53 rev2.1 at 800 MHz
>>> Reset cause: WDOG
>>
>> Here the reset cause is printed correctly.
>>
>>> Board: Inverse Path USB armory MkI
>>> I2C: ready
>>> DRAM: 512 MiB
>>> MMC: FSL_SDHC: 0
>>> In: serial
>>> Out: serial
>>> Err: serial
>>> CPU: Freescale i.MX53 rev2.1 at 800 MHz
>>> Reset cause: unknown reset
>>
>> ,but here it fails.
>>
>> Why does CPU version and reset cause are printed twice?
>>
>
The arm library calls always print_cpuinfo(), where get_reset_cause() is
called. In this patch, print_cpuinfo() is called the second time in
board_late_init(), too. It should be dropped.
Without testing, I think that this issue hits the mx53loco, too.
Best regards,
Stefano
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-17 17:09 ` Stefano Babic
@ 2015-03-17 17:27 ` Fabio Estevam
0 siblings, 0 replies; 15+ messages in thread
From: Fabio Estevam @ 2015-03-17 17:27 UTC (permalink / raw)
To: u-boot
Hi Stefano,
On Tue, Mar 17, 2015 at 2:09 PM, Stefano Babic <sbabic@denx.de> wrote:
> The arm library calls always print_cpuinfo(), where get_reset_cause() is
> called. In this patch, print_cpuinfo() is called the second time in
> board_late_init(), too. It should be dropped.
>
> Without testing, I think that this issue hits the mx53loco, too.
Yes, you are right.
The reason I called print_cpuinfo() inside board_late_init() was
because I wanted to print the cpu speed after the PMIC voltage has
been bumped and the clock was set to 1GHz.
Without doing so I always got CPU frequency as 800MHz.
At that time, I was not able to get the PMIC to setup the required
voltage for 1GHz operation early enough so that print_cpuinfo shows
1GHz instead of 800MHz.
Maybe this is possible now, but haven't tried it. Will only have
access to mx53qsb when I am back to the office on the week of April
6th.
Regards,
Fabio Estevam
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] arm: mx5: Add support for USB armory board
2015-03-17 16:30 ` Fabio Estevam
2015-03-17 16:49 ` Chris Kuethe
2015-03-17 16:51 ` Eric Nelson
@ 2015-03-18 23:00 ` Andrej Rosano
2 siblings, 0 replies; 15+ messages in thread
From: Andrej Rosano @ 2015-03-18 23:00 UTC (permalink / raw)
To: u-boot
On Tue, Mar 17, 2015 at 01:30:12PM -0300, Fabio Estevam wrote:
> On Mon, Mar 16, 2015 at 1:50 PM, Chris Kuethe <chris.kuethe@gmail.com> wrote:
>
> > U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
> >
> > CPU: Freescale i.MX53 rev2.1 at 800 MHz
> > Reset cause: WDOG
>
> Here the reset cause is printed correctly.
>
> > Board: Inverse Path USB armory MkI
> > I2C: ready
> > DRAM: 512 MiB
> > MMC: FSL_SDHC: 0
> > In: serial
> > Out: serial
> > Err: serial
> > CPU: Freescale i.MX53 rev2.1 at 800 MHz
> > Reset cause: unknown reset
>
> ,but here it fails.
>
> Why does CPU version and reset cause are printed twice?
The print_cpuinfo() was called twice, fixed in the v2 patch
I just submitted.
>
> Is this happening with all mx53 boards or only with this one?
mx53loco should have the same issue, but I did not tested it.
Andrej
>
> I currently don't have access to any mx53 board to test this myself.
>
> I am adding some folks on Cc who may have access to other mx53 boards
> and could probably test whether we have a common mx53 issue here.
>
> Regards,
>
> Fabio Estevam
--
Andrej Rosano Inverse Path Srl
<andrej@inversepath.com> http://www.inversepath.com
0x01939B21 5BB8 574E 68E8 D841 E18F D5E9 CEAD E0CF 0193 9B21
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] arm: mx5: Add support for USB armory board
2015-02-24 9:03 [U-Boot] [PATCH] arm: mx5: Add support for USB armory board andrej at inversepath.com
2015-03-05 19:06 ` Chris Kuethe
2015-03-16 16:50 ` Chris Kuethe
@ 2015-03-19 16:55 ` Vagrant Cascadian
2015-03-19 17:03 ` Otavio Salvador
2015-03-19 19:18 ` Andrej Rosano
2 siblings, 2 replies; 15+ messages in thread
From: Vagrant Cascadian @ 2015-03-19 16:55 UTC (permalink / raw)
To: u-boot
On 2015-02-24, andrej at inversepath.com wrote:
> Add support for Inverse Path USB armory board, an open source
> flash-drive sized computer based on Freescale i.MX53 SoC.
...
> diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
> new file mode 100644
> index 0000000..e00ec7b
> --- /dev/null
> +++ b/include/configs/usbarmory.h
...
> +#include <asm/arch/imx-regs.h>
> +#include <config_cmd_default.h>
Would you consider patches that include config_distro_defaults.h and
config_distro_bootcmd.h, documented in doc/README.distro? It may require
adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r,
ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr,
documented in README and doc/README.distro. I'd be happy to work on
patches.
I'd like to enable the usbarmory target in Debian's u-boot packages, and
this would make it easier for it to behave more-or-less consistantly
with several other platforms, and allow for more flexibility when
booting.
live well,
vagrant
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] arm: mx5: Add support for USB armory board
2015-03-19 16:55 ` [U-Boot] " Vagrant Cascadian
@ 2015-03-19 17:03 ` Otavio Salvador
2015-03-19 19:18 ` Andrej Rosano
1 sibling, 0 replies; 15+ messages in thread
From: Otavio Salvador @ 2015-03-19 17:03 UTC (permalink / raw)
To: u-boot
Hello Vagrant,
On Thu, Mar 19, 2015 at 1:55 PM, Vagrant Cascadian <vagrant@debian.org> wrote:
> On 2015-02-24, andrej at inversepath.com wrote:
>> Add support for Inverse Path USB armory board, an open source
>> flash-drive sized computer based on Freescale i.MX53 SoC.
> ...
>> diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
>> new file mode 100644
>> index 0000000..e00ec7b
>> --- /dev/null
>> +++ b/include/configs/usbarmory.h
> ...
>> +#include <asm/arch/imx-regs.h>
>> +#include <config_cmd_default.h>
>
> Would you consider patches that include config_distro_defaults.h and
> config_distro_bootcmd.h, documented in doc/README.distro? It may require
> adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r,
> ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr,
> documented in README and doc/README.distro. I'd be happy to work on
> patches.
>
> I'd like to enable the usbarmory target in Debian's u-boot packages, and
> this would make it easier for it to behave more-or-less consistantly
> with several other platforms, and allow for more flexibility when
> booting.
It'd be nice to do the same for other reference boards. If you want to
work on this I can help working on the Yocto Project BSP to support it
as well :)
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.br http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854 Mobile: +1 (347) 903-9750
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] arm: mx5: Add support for USB armory board
2015-03-19 16:55 ` [U-Boot] " Vagrant Cascadian
2015-03-19 17:03 ` Otavio Salvador
@ 2015-03-19 19:18 ` Andrej Rosano
2015-03-21 15:12 ` Vagrant Cascadian
1 sibling, 1 reply; 15+ messages in thread
From: Andrej Rosano @ 2015-03-19 19:18 UTC (permalink / raw)
To: u-boot
Hi Vagrant,
On Thu, Mar 19, 2015 at 09:55:26AM -0700, Vagrant Cascadian wrote:
> On 2015-02-24, andrej at inversepath.com wrote:
> > Add support for Inverse Path USB armory board, an open source
> > flash-drive sized computer based on Freescale i.MX53 SoC.
> ...
> > diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
> > new file mode 100644
> > index 0000000..e00ec7b
> > --- /dev/null
> > +++ b/include/configs/usbarmory.h
> ...
> > +#include <asm/arch/imx-regs.h>
> > +#include <config_cmd_default.h>
>
> Would you consider patches that include config_distro_defaults.h and
> config_distro_bootcmd.h, documented in doc/README.distro? It may require
> adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r,
> ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr,
> documented in README and doc/README.distro. I'd be happy to work on
> patches.
>
> I'd like to enable the usbarmory target in Debian's u-boot packages, and
> this would make it easier for it to behave more-or-less consistantly
> with several other platforms, and allow for more flexibility when
> booting.
Sure, it would be nice to have this included in the patch.
I didn't know about this, I will take a look as well. Let me know if
you need any help from my side.
Thanks
Andrej
>
>
> live well,
> vagrant
--
Andrej Rosano Inverse Path Srl
<andrej@inversepath.com> http://www.inversepath.com
0x01939B21 5BB8 574E 68E8 D841 E18F D5E9 CEAD E0CF 0193 9B21
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] arm: mx5: Add support for USB armory board
2015-03-19 19:18 ` Andrej Rosano
@ 2015-03-21 15:12 ` Vagrant Cascadian
2015-03-24 13:32 ` Andrej Rosano
0 siblings, 1 reply; 15+ messages in thread
From: Vagrant Cascadian @ 2015-03-21 15:12 UTC (permalink / raw)
To: u-boot
On 2015-03-19, Andrej Rosano wrote:
> On Thu, Mar 19, 2015 at 09:55:26AM -0700, Vagrant Cascadian wrote:
>> On 2015-02-24, andrej at inversepath.com wrote:
>> > Add support for Inverse Path USB armory board, an open source
>> > flash-drive sized computer based on Freescale i.MX53 SoC.
...
>> Would you consider patches that include config_distro_defaults.h and
>> config_distro_bootcmd.h, documented in doc/README.distro? It may require
>> adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r,
>> ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr,
>> documented in README and doc/README.distro. I'd be happy to work on
>> patches.
...
> Sure, it would be nice to have this included in the patch.
> I didn't know about this, I will take a look as well. Let me know if
> you need any help from my side.
Ok, here's a quick patch on top of your existing patch. It compiles, but
I haven't tested that it boots (waiting on some header pins to hook up
the serial console).
I tried to preserve default behavior, the only difference is that it
will first check for extlinux.conf and boot.scr before running the
default boot action, and has a 2 second rather than 1 second bootdelay.
Many of the things defined in config_distro_defaults.h were redundant.
Not sure if CONFIG_LOADADDR needs to be different from
kernel_addr_r/scriptaddr/pxefile_addr_r, if they can all be the same,
then they could be defined with CONFIG_LOADADDR. Hopefully
ramdisk_addr_r is at a reasonable location so it won't be clobbered by
the fdt or kernel being loaded to a lower address. It may require
removing the default bootargs to work with boot scripts.
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index e00ec7b..7e4cc68 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -22,12 +22,10 @@
#include <asm/arch/imx-regs.h>
#include <config_cmd_default.h>
+#include <config_distro_defaults.h>
/* U-Boot commands */
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_CMD_FAT
#define CONFIG_CMD_MEMTEST
-#define CONFIG_CMD_EXT2
#undef CONFIG_CMD_IMLS
/* U-Boot environment */
@@ -39,14 +37,10 @@
#define CONFIG_SYS_MMC_ENV_DEV 0
/* U-Boot general configurations */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_CMDLINE_EDITING
/* UART */
#define CONFIG_MXC_UART
@@ -61,7 +55,6 @@
#define CONFIG_SYS_FSL_ESDHC_NUM 2
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
/* USB */
#define CONFIG_CMD_USB
@@ -82,7 +75,6 @@
#define CONFIG_FSL_IIM
/* Linux boot */
-#define CONFIG_BOOTDELAY 1
#define CONFIG_LOADADDR 0x72000000
#define CONFIG_SYS_TEXT_BASE 0x77800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -90,8 +82,28 @@
#define CONFIG_BOOTARGS \
"console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
#define CONFIG_BOOTCOMMAND \
- "ext2load mmc 0:1 0x70800000 /boot/uImage; ext2load mmc 0:1" \
- "0x71000000 /boot/imx53-usbarmory.dtb; bootm 0x70800000 - 0x71000000"
+ "run distro_bootcmd; " \
+ "ext2load mmc 0:1 ${kernel_addr_r} /boot/uImage; " \
+ "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
+ "bootm ${kernel_addr_r} - ${fdt_addr_r}"
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0)
+
+#include <config_distro_bootcmd.h>
+
+#define MEM_LAYOUT_ENV_SETTINGS \
+ "kernel_addr_r=0x70800000\0" \
+ "fdt_addr_r=0x71000000\0" \
+ "scriptaddr=0x70800000\0" \
+ "pxefile_addr_r=0x70800000\0" \
+ "ramdisk_addr_r=0x73000000\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ MEM_LAYOUT_ENV_SETTINGS \
+ "fdtfile=imx53-usbarmory.dtb\0" \
+ "console=ttymxc0,115200\0" \
+ BOOTENV
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
live well,
vagrant
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] arm: mx5: Add support for USB armory board
2015-03-21 15:12 ` Vagrant Cascadian
@ 2015-03-24 13:32 ` Andrej Rosano
0 siblings, 0 replies; 15+ messages in thread
From: Andrej Rosano @ 2015-03-24 13:32 UTC (permalink / raw)
To: u-boot
Hi Vagrant,
On Sat, Mar 21, 2015 at 08:12:28AM -0700, Vagrant Cascadian wrote:
> On 2015-03-19, Andrej Rosano wrote:
> > On Thu, Mar 19, 2015 at 09:55:26AM -0700, Vagrant Cascadian wrote:
> >> On 2015-02-24, andrej at inversepath.com wrote:
> >> > Add support for Inverse Path USB armory board, an open source
> >> > flash-drive sized computer based on Freescale i.MX53 SoC.
> ...
> >> Would you consider patches that include config_distro_defaults.h and
> >> config_distro_bootcmd.h, documented in doc/README.distro? It may require
> >> adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r,
> >> ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr,
> >> documented in README and doc/README.distro. I'd be happy to work on
> >> patches.
> ...
> > Sure, it would be nice to have this included in the patch.
> > I didn't know about this, I will take a look as well. Let me know if
> > you need any help from my side.
>
> Ok, here's a quick patch on top of your existing patch. It compiles, but
> I haven't tested that it boots (waiting on some header pins to hook up
> the serial console).
>
> I tried to preserve default behavior, the only difference is that it
> will first check for extlinux.conf and boot.scr before running the
> default boot action, and has a 2 second rather than 1 second bootdelay.
>
> Many of the things defined in config_distro_defaults.h were redundant.
>
> Not sure if CONFIG_LOADADDR needs to be different from
> kernel_addr_r/scriptaddr/pxefile_addr_r, if they can all be the same,
> then they could be defined with CONFIG_LOADADDR. Hopefully
> ramdisk_addr_r is at a reasonable location so it won't be clobbered by
> the fdt or kernel being loaded to a lower address. It may require
> removing the default bootargs to work with boot scripts.
Tested and it works as expected. I have just submitted an updated patch (v3).
Thanks
Andrej
>
> diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
> index e00ec7b..7e4cc68 100644
> --- a/include/configs/usbarmory.h
> +++ b/include/configs/usbarmory.h
> @@ -22,12 +22,10 @@
>
> #include <asm/arch/imx-regs.h>
> #include <config_cmd_default.h>
> +#include <config_distro_defaults.h>
>
> /* U-Boot commands */
> -#define CONFIG_CMD_BOOTZ
> -#define CONFIG_CMD_FAT
> #define CONFIG_CMD_MEMTEST
> -#define CONFIG_CMD_EXT2
> #undef CONFIG_CMD_IMLS
>
> /* U-Boot environment */
> @@ -39,14 +37,10 @@
> #define CONFIG_SYS_MMC_ENV_DEV 0
>
> /* U-Boot general configurations */
> -#define CONFIG_SYS_LONGHELP
> -#define CONFIG_SYS_HUSH_PARSER
> -#define CONFIG_AUTO_COMPLETE
> #define CONFIG_SYS_CBSIZE 512
> #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> #define CONFIG_SYS_MAXARGS 16
> #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> -#define CONFIG_CMDLINE_EDITING
>
> /* UART */
> #define CONFIG_MXC_UART
> @@ -61,7 +55,6 @@
> #define CONFIG_SYS_FSL_ESDHC_NUM 2
> #define CONFIG_MMC
> #define CONFIG_GENERIC_MMC
> -#define CONFIG_DOS_PARTITION
>
> /* USB */
> #define CONFIG_CMD_USB
> @@ -82,7 +75,6 @@
> #define CONFIG_FSL_IIM
>
> /* Linux boot */
> -#define CONFIG_BOOTDELAY 1
> #define CONFIG_LOADADDR 0x72000000
> #define CONFIG_SYS_TEXT_BASE 0x77800000
> #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> @@ -90,8 +82,28 @@
> #define CONFIG_BOOTARGS \
> "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
> #define CONFIG_BOOTCOMMAND \
> - "ext2load mmc 0:1 0x70800000 /boot/uImage; ext2load mmc 0:1" \
> - "0x71000000 /boot/imx53-usbarmory.dtb; bootm 0x70800000 - 0x71000000"
> + "run distro_bootcmd; " \
> + "ext2load mmc 0:1 ${kernel_addr_r} /boot/uImage; " \
> + "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
> + "bootm ${kernel_addr_r} - ${fdt_addr_r}"
> +
> +#define BOOT_TARGET_DEVICES(func) \
> + func(MMC, mmc, 0)
> +
> +#include <config_distro_bootcmd.h>
> +
> +#define MEM_LAYOUT_ENV_SETTINGS \
> + "kernel_addr_r=0x70800000\0" \
> + "fdt_addr_r=0x71000000\0" \
> + "scriptaddr=0x70800000\0" \
> + "pxefile_addr_r=0x70800000\0" \
> + "ramdisk_addr_r=0x73000000\0"
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + MEM_LAYOUT_ENV_SETTINGS \
> + "fdtfile=imx53-usbarmory.dtb\0" \
> + "console=ttymxc0,115200\0" \
> + BOOTENV
>
> /* Physical Memory Map */
> #define CONFIG_NR_DRAM_BANKS 1
>
>
> live well,
> vagrant
--
Andrej Rosano Inverse Path Srl
<andrej@inversepath.com> http://www.inversepath.com
0x01939B21 5BB8 574E 68E8 D841 E18F D5E9 CEAD E0CF 0193 9B21
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2015-03-24 13:32 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-02-24 9:03 [U-Boot] [PATCH] arm: mx5: Add support for USB armory board andrej at inversepath.com
2015-03-05 19:06 ` Chris Kuethe
2015-03-16 16:50 ` Chris Kuethe
2015-03-17 5:27 ` Chris Kuethe
2015-03-17 16:30 ` Fabio Estevam
2015-03-17 16:49 ` Chris Kuethe
2015-03-17 16:51 ` Eric Nelson
2015-03-17 17:09 ` Stefano Babic
2015-03-17 17:27 ` Fabio Estevam
2015-03-18 23:00 ` Andrej Rosano
2015-03-19 16:55 ` [U-Boot] " Vagrant Cascadian
2015-03-19 17:03 ` Otavio Salvador
2015-03-19 19:18 ` Andrej Rosano
2015-03-21 15:12 ` Vagrant Cascadian
2015-03-24 13:32 ` Andrej Rosano
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