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* [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12
@ 2016-10-08 11:08 Chenhui Zhao
  2016-10-13  9:52 ` Chen-Yu Tsai
  0 siblings, 1 reply; 6+ messages in thread
From: Chenhui Zhao @ 2016-10-08 11:08 UTC (permalink / raw)
  To: u-boot

Save and restore core registers from r4 to r12 so that PSCI code won't
break their value.

Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
---
 arch/arm/cpu/armv7/psci.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 6a36208..746297c 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -152,7 +152,7 @@ _psci_table:
 	.word	0
 
 _smc_psci:
-	push	{r4-r7,lr}
+	push	{r4-r12,lr}
 
 	@ Switch to secure
 	mrc	p15, 0, r7, c1, c1, 0
@@ -175,7 +175,7 @@ _smc_psci:
 	@ Switch back to non-secure
 2:	mcr	p15, 0, r7, c1, c1, 0
 
-	pop	{r4-r7, lr}
+	pop	{r4-r12, lr}
 	movs	pc, lr			@ Return to the kernel
 
 @ Requires dense and single-cluster CPU ID space
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12
  2016-10-08 11:08 [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12 Chenhui Zhao
@ 2016-10-13  9:52 ` Chen-Yu Tsai
  2016-10-13 10:37   ` C.H. Zhao
  2016-10-14  0:14   ` Chenhui Zhao
  0 siblings, 2 replies; 6+ messages in thread
From: Chen-Yu Tsai @ 2016-10-13  9:52 UTC (permalink / raw)
  To: u-boot

On Sat, Oct 8, 2016 at 7:08 PM, Chenhui Zhao <chenhui.zhao@nxp.com> wrote:
> Save and restore core registers from r4 to r12 so that PSCI code won't
> break their value.
>
> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
> ---
>  arch/arm/cpu/armv7/psci.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
> index 6a36208..746297c 100644
> --- a/arch/arm/cpu/armv7/psci.S
> +++ b/arch/arm/cpu/armv7/psci.S
> @@ -152,7 +152,7 @@ _psci_table:
>         .word   0
>
>  _smc_psci:
> -       push    {r4-r7,lr}
> +       push    {r4-r12,lr}

This change is not needed. This function only uses r4-r7.
Any subroutines called should save variable registers (r4-r12)
themselves, per the ARM calling conventions.

ChenYu

>
>         @ Switch to secure
>         mrc     p15, 0, r7, c1, c1, 0
> @@ -175,7 +175,7 @@ _smc_psci:
>         @ Switch back to non-secure
>  2:     mcr     p15, 0, r7, c1, c1, 0
>
> -       pop     {r4-r7, lr}
> +       pop     {r4-r12, lr}
>         movs    pc, lr                  @ Return to the kernel
>
>  @ Requires dense and single-cluster CPU ID space
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12
  2016-10-13  9:52 ` Chen-Yu Tsai
@ 2016-10-13 10:37   ` C.H. Zhao
  2016-10-14  0:14   ` Chenhui Zhao
  1 sibling, 0 replies; 6+ messages in thread
From: C.H. Zhao @ 2016-10-13 10:37 UTC (permalink / raw)
  To: u-boot



________________________________
From: Chen-Yu Tsai <wens@csie.org>
Sent: Thursday, October 13, 2016 5:52 PM
To: C.H. Zhao
Cc: U-Boot Mailing List; Albert ARIBAUD; z.chenhui at gmail.com
Subject: Re: [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12

On Sat, Oct 8, 2016 at 7:08 PM, Chenhui Zhao <chenhui.zhao@nxp.com> wrote:
> Save and restore core registers from r4 to r12 so that PSCI code won't
> break their value.
>
> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
> ---
>  arch/arm/cpu/armv7/psci.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
> index 6a36208..746297c 100644
> --- a/arch/arm/cpu/armv7/psci.S
> +++ b/arch/arm/cpu/armv7/psci.S
> @@ -152,7 +152,7 @@ _psci_table:
>         .word   0
>
>  _smc_psci:
> -       push    {r4-r7,lr}
> +       push    {r4-r12,lr}

This change is not needed. This function only uses r4-r7.
Any subroutines called should save variable registers (r4-r12)
themselves, per the ARM calling conventions.

ChenYu


[Chenhui] I do not think it is a normal calling, instead it is an exception handler. In the exception context,
it is necessary to save/restore all registers.

>
>         @ Switch to secure
>         mrc     p15, 0, r7, c1, c1, 0
> @@ -175,7 +175,7 @@ _smc_psci:
>         @ Switch back to non-secure
>  2:     mcr     p15, 0, r7, c1, c1, 0
>
> -       pop     {r4-r7, lr}
> +       pop     {r4-r12, lr}
>         movs    pc, lr                  @ Return to the kernel
>
>  @ Requires dense and single-cluster CPU ID space
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
U-Boot Info Page - lists.denx.de Mailing Lists<http://lists.denx.de/mailman/listinfo/u-boot>
lists.denx.de
To see the collection of prior postings to the list, visit the U-Boot Archives. Using U-Boot: To post a message to all the list members, send email to ...

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12
  2016-10-13  9:52 ` Chen-Yu Tsai
  2016-10-13 10:37   ` C.H. Zhao
@ 2016-10-14  0:14   ` Chenhui Zhao
  2016-10-17 16:46     ` Chen-Yu Tsai
  1 sibling, 1 reply; 6+ messages in thread
From: Chenhui Zhao @ 2016-10-14  0:14 UTC (permalink / raw)
  To: u-boot

On Thu, Oct 13, 2016 at 5:52 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Sat, Oct 8, 2016 at 7:08 PM, Chenhui Zhao <chenhui.zhao@nxp.com> wrote:
>> Save and restore core registers from r4 to r12 so that PSCI code won't
>> break their value.
>>
>> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
>> Signed-off-by: Alison Wang <alison.wang@nxp.com>
>> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
>> ---
>>  arch/arm/cpu/armv7/psci.S | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
>> index 6a36208..746297c 100644
>> --- a/arch/arm/cpu/armv7/psci.S
>> +++ b/arch/arm/cpu/armv7/psci.S
>> @@ -152,7 +152,7 @@ _psci_table:
>>         .word   0
>>
>>  _smc_psci:
>> -       push    {r4-r7,lr}
>> +       push    {r4-r12,lr}
>
> This change is not needed. This function only uses r4-r7.
> Any subroutines called should save variable registers (r4-r12)
> themselves, per the ARM calling conventions.
>
> ChenYu
>

I do not think it is a normal calling, instead it is an exception
handler. In the exception context,
it is necessary to save/restore all registers.

Sorry, my mail server has something wrong.

Chenhui

>>
>>         @ Switch to secure
>>         mrc     p15, 0, r7, c1, c1, 0
>> @@ -175,7 +175,7 @@ _smc_psci:
>>         @ Switch back to non-secure
>>  2:     mcr     p15, 0, r7, c1, c1, 0
>>
>> -       pop     {r4-r7, lr}
>> +       pop     {r4-r12, lr}
>>         movs    pc, lr                  @ Return to the kernel
>>
>>  @ Requires dense and single-cluster CPU ID space
>> --
>> 1.9.1
>>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12
  2016-10-14  0:14   ` Chenhui Zhao
@ 2016-10-17 16:46     ` Chen-Yu Tsai
  0 siblings, 0 replies; 6+ messages in thread
From: Chen-Yu Tsai @ 2016-10-17 16:46 UTC (permalink / raw)
  To: u-boot

On Fri, Oct 14, 2016 at 8:14 AM, Chenhui Zhao <z.chenhui@gmail.com> wrote:
> On Thu, Oct 13, 2016 at 5:52 PM, Chen-Yu Tsai <wens@csie.org> wrote:
>> On Sat, Oct 8, 2016 at 7:08 PM, Chenhui Zhao <chenhui.zhao@nxp.com> wrote:
>>> Save and restore core registers from r4 to r12 so that PSCI code won't
>>> break their value.
>>>
>>> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
>>> Signed-off-by: Alison Wang <alison.wang@nxp.com>
>>> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
>>> ---
>>>  arch/arm/cpu/armv7/psci.S | 4 ++--
>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
>>> index 6a36208..746297c 100644
>>> --- a/arch/arm/cpu/armv7/psci.S
>>> +++ b/arch/arm/cpu/armv7/psci.S
>>> @@ -152,7 +152,7 @@ _psci_table:
>>>         .word   0
>>>
>>>  _smc_psci:
>>> -       push    {r4-r7,lr}
>>> +       push    {r4-r12,lr}
>>
>> This change is not needed. This function only uses r4-r7.
>> Any subroutines called should save variable registers (r4-r12)
>> themselves, per the ARM calling conventions.
>>
>> ChenYu
>>
>
> I do not think it is a normal calling, instead it is an exception
> handler. In the exception context,
> it is necessary to save/restore all registers.

It should be the same for an exception handler. You only save the
registers that you clobber, at each function level.

ChenYu

>
> Sorry, my mail server has something wrong.
>
> Chenhui
>
>>>
>>>         @ Switch to secure
>>>         mrc     p15, 0, r7, c1, c1, 0
>>> @@ -175,7 +175,7 @@ _smc_psci:
>>>         @ Switch back to non-secure
>>>  2:     mcr     p15, 0, r7, c1, c1, 0
>>>
>>> -       pop     {r4-r7, lr}
>>> +       pop     {r4-r12, lr}
>>>         movs    pc, lr                  @ Return to the kernel
>>>
>>>  @ Requires dense and single-cluster CPU ID space
>>> --
>>> 1.9.1
>>>
>>> _______________________________________________
>>> U-Boot mailing list
>>> U-Boot at lists.denx.de
>>> http://lists.denx.de/mailman/listinfo/u-boot

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12
@ 2016-10-08 10:31 Chenhui Zhao
  0 siblings, 0 replies; 6+ messages in thread
From: Chenhui Zhao @ 2016-10-08 10:31 UTC (permalink / raw)
  To: u-boot

Save and restore core registers from r4 to r12 so that PSCI code won't
break their value.

Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
---
 arch/arm/cpu/armv7/psci.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 6a36208..746297c 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -152,7 +152,7 @@ _psci_table:
 	.word	0
 
 _smc_psci:
-	push	{r4-r7,lr}
+	push	{r4-r12,lr}
 
 	@ Switch to secure
 	mrc	p15, 0, r7, c1, c1, 0
@@ -175,7 +175,7 @@ _smc_psci:
 	@ Switch back to non-secure
 2:	mcr	p15, 0, r7, c1, c1, 0
 
-	pop	{r4-r7, lr}
+	pop	{r4-r12, lr}
 	movs	pc, lr			@ Return to the kernel
 
 @ Requires dense and single-cluster CPU ID space
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2016-10-17 16:46 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-10-08 11:08 [U-Boot] [PATCH] arm: psci: save and restore registers from r4 to r12 Chenhui Zhao
2016-10-13  9:52 ` Chen-Yu Tsai
2016-10-13 10:37   ` C.H. Zhao
2016-10-14  0:14   ` Chenhui Zhao
2016-10-17 16:46     ` Chen-Yu Tsai
  -- strict thread matches above, loose matches on Subject: below --
2016-10-08 10:31 Chenhui Zhao

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