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From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Icenowy Zheng <icenowy@aosc.xyz>,
	Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Bin Liu <b-liu@ti.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	"linux-sunxi@googlegroups.com" <linux-sunxi@googlegroups.com>
Subject: Re: [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode
Date: Wed, 18 Jan 2017 04:09:32 +0800	[thread overview]
Message-ID: <CAGb2v67kYtrTdw9YMS7wvRa=2MWYJ=BEc9SmUOds7hNYZKOz9g@mail.gmail.com> (raw)
In-Reply-To: <20170117200658.gcrcxeanthdtwg26@lukather>

Hi,

On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Jan 18, 2017 at 12:57:08AM +0800, Icenowy Zheng wrote:
>>
>>
>> 17.01.2017, 16:06, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
>> > On Tue, Jan 17, 2017 at 03:14:46AM +0800, Icenowy Zheng wrote:
>> >>  The PHY0 on H3 can be wired either to MUSB controller or OHCI/EHCI
>> >>  controller.
>> >>
>> >>  The original driver wired it to OHCI/EHCI controller; however, as the
>> >>  code to use PHY0 as OHCI/EHCI is missing, it makes the PHY fully
>> >>  unusable.
>> >>
>> >>  Rename the register (according to its function and the name in BSP
>> >>  driver), and remove the code which wires the PHY0 to OHCI/EHCI, as MUSB
>> >>  can support both peripheral and host mode (although the host mode of
>> >>  MUSB is buggy).
>> >
>> > Can you elaborate on that? What's wrong with it?
>>
>> The configuration is at bit 0 of register 0x20 in PHY.
>>
>> When the PHY is reseted, it defaults as MUSB mode.
>>
>> However, the original author of the H3 PHY code seems to be lack of
>> this knowledge (He named it PHY_UNK_H3), and changed the PHY to HCI
>> mode.
>>
>> I just removed the code that wires it to HCI mode, thus it will work
>> in MUSB mode, with my sun8i-h3-musb patch.
>
> I have no idea what you mean by MUSB mode.
>
> Do you mean that the previous code was only working in host mode, and
> now it only works in peripheral?

>From what I understand, with the H3, Allwinner has put a mux
in front of the MUSB controller. The mux can send the USB data
to/from the MUSB controller, or a standard EHCI/OHCI pair.
This register controls said mux.

This means we can use a proper USB host for host mode,
instead of the limited support in MUSB.

ChenYu

>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
To: Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
	Greg Kroah-Hartman
	<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
	Bin Liu <b-liu-l0cyMroinI0@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org"
	<linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>
Subject: Re: [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode
Date: Wed, 18 Jan 2017 04:09:32 +0800	[thread overview]
Message-ID: <CAGb2v67kYtrTdw9YMS7wvRa=2MWYJ=BEc9SmUOds7hNYZKOz9g@mail.gmail.com> (raw)
In-Reply-To: <20170117200658.gcrcxeanthdtwg26@lukather>

Hi,

On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> On Wed, Jan 18, 2017 at 12:57:08AM +0800, Icenowy Zheng wrote:
>>
>>
>> 17.01.2017, 16:06, "Maxime Ripard" <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>:
>> > On Tue, Jan 17, 2017 at 03:14:46AM +0800, Icenowy Zheng wrote:
>> >>  The PHY0 on H3 can be wired either to MUSB controller or OHCI/EHCI
>> >>  controller.
>> >>
>> >>  The original driver wired it to OHCI/EHCI controller; however, as the
>> >>  code to use PHY0 as OHCI/EHCI is missing, it makes the PHY fully
>> >>  unusable.
>> >>
>> >>  Rename the register (according to its function and the name in BSP
>> >>  driver), and remove the code which wires the PHY0 to OHCI/EHCI, as MUSB
>> >>  can support both peripheral and host mode (although the host mode of
>> >>  MUSB is buggy).
>> >
>> > Can you elaborate on that? What's wrong with it?
>>
>> The configuration is at bit 0 of register 0x20 in PHY.
>>
>> When the PHY is reseted, it defaults as MUSB mode.
>>
>> However, the original author of the H3 PHY code seems to be lack of
>> this knowledge (He named it PHY_UNK_H3), and changed the PHY to HCI
>> mode.
>>
>> I just removed the code that wires it to HCI mode, thus it will work
>> in MUSB mode, with my sun8i-h3-musb patch.
>
> I have no idea what you mean by MUSB mode.
>
> Do you mean that the previous code was only working in host mode, and
> now it only works in peripheral?

>From what I understand, with the H3, Allwinner has put a mux
in front of the MUSB controller. The mux can send the USB data
to/from the MUSB controller, or a standard EHCI/OHCI pair.
This register controls said mux.

This means we can use a proper USB host for host mode,
instead of the limited support in MUSB.

ChenYu

>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode
Date: Wed, 18 Jan 2017 04:09:32 +0800	[thread overview]
Message-ID: <CAGb2v67kYtrTdw9YMS7wvRa=2MWYJ=BEc9SmUOds7hNYZKOz9g@mail.gmail.com> (raw)
In-Reply-To: <20170117200658.gcrcxeanthdtwg26@lukather>

Hi,

On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Jan 18, 2017 at 12:57:08AM +0800, Icenowy Zheng wrote:
>>
>>
>> 17.01.2017, 16:06, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
>> > On Tue, Jan 17, 2017 at 03:14:46AM +0800, Icenowy Zheng wrote:
>> >>  The PHY0 on H3 can be wired either to MUSB controller or OHCI/EHCI
>> >>  controller.
>> >>
>> >>  The original driver wired it to OHCI/EHCI controller; however, as the
>> >>  code to use PHY0 as OHCI/EHCI is missing, it makes the PHY fully
>> >>  unusable.
>> >>
>> >>  Rename the register (according to its function and the name in BSP
>> >>  driver), and remove the code which wires the PHY0 to OHCI/EHCI, as MUSB
>> >>  can support both peripheral and host mode (although the host mode of
>> >>  MUSB is buggy).
>> >
>> > Can you elaborate on that? What's wrong with it?
>>
>> The configuration is at bit 0 of register 0x20 in PHY.
>>
>> When the PHY is reseted, it defaults as MUSB mode.
>>
>> However, the original author of the H3 PHY code seems to be lack of
>> this knowledge (He named it PHY_UNK_H3), and changed the PHY to HCI
>> mode.
>>
>> I just removed the code that wires it to HCI mode, thus it will work
>> in MUSB mode, with my sun8i-h3-musb patch.
>
> I have no idea what you mean by MUSB mode.
>
> Do you mean that the previous code was only working in host mode, and
> now it only works in peripheral?

>From what I understand, with the H3, Allwinner has put a mux
in front of the MUSB controller. The mux can send the USB data
to/from the MUSB controller, or a standard EHCI/OHCI pair.
This register controls said mux.

This means we can use a proper USB host for host mode,
instead of the limited support in MUSB.

ChenYu

>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

  reply	other threads:[~2017-01-17 20:11 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-16 19:14 [PATCH 0/4] Enable USB OTG on Allwinner H3 and two boards Icenowy Zheng
2017-01-16 19:14 ` Icenowy Zheng
     [not found] ` <20170116191449.50397-1-icenowy-ymACFijhrKM@public.gmane.org>
2017-01-16 19:14   ` [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode Icenowy Zheng
2017-01-16 19:14     ` Icenowy Zheng
2017-01-16 22:57     ` [linux-sunxi] " Ondřej Jirman
2017-01-16 22:57       ` Ondřej Jirman
2017-01-16 22:57       ` Ondřej Jirman
2017-01-17  8:06     ` Maxime Ripard
2017-01-17  8:06       ` Maxime Ripard
2017-01-17  8:06       ` Maxime Ripard
2017-01-17 16:57       ` Icenowy Zheng
2017-01-17 16:57         ` Icenowy Zheng
2017-01-17 20:06         ` Maxime Ripard
2017-01-17 20:06           ` Maxime Ripard
2017-01-17 20:06           ` Maxime Ripard
2017-01-17 20:09           ` Chen-Yu Tsai [this message]
2017-01-17 20:09             ` Chen-Yu Tsai
2017-01-17 20:09             ` Chen-Yu Tsai
2017-01-19 14:34             ` Maxime Ripard
2017-01-19 14:34               ` Maxime Ripard
2017-01-19 14:34               ` Maxime Ripard
2017-01-19 15:10               ` Icenowy Zheng
2017-01-19 15:10                 ` Icenowy Zheng
2017-01-19 20:27                 ` [linux-sunxi] " Karsten Merker
2017-01-19 20:27                   ` Karsten Merker
2017-01-20  8:04                   ` [linux-sunxi] " Hans de Goede
2017-01-20  8:04                     ` Hans de Goede
2017-01-20  8:04                     ` Hans de Goede
     [not found]                     ` <93a01892-47b5-5445-d802-f56bdac8371f-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-01-22  9:39                       ` Icenowy Zheng
2017-01-22  9:39                         ` [linux-sunxi] " Icenowy Zheng
2017-01-22  9:58                         ` Hans de Goede
2017-01-22  9:58                           ` Hans de Goede
2017-01-22  9:58                           ` Hans de Goede
2017-01-16 19:14   ` [PATCH 2/4] ARM: dts: sun8i: add MUSB node to H3 SoC Icenowy Zheng
2017-01-16 19:14     ` Icenowy Zheng
2017-01-16 19:14   ` [PATCH 3/4] ARM: dts: sun8i: enable USB OTG for Orange Pi Zero board Icenowy Zheng
2017-01-16 19:14     ` Icenowy Zheng
2017-01-16 19:14   ` [PATCH 4/4] ARM: dts: sun8i: enable USB OTG on Orange Pi One board Icenowy Zheng
2017-01-16 19:14     ` Icenowy Zheng
2017-01-17  1:26 [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode Icenowy Zheng
2017-01-18  3:13 Icenowy Zheng

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