From: Ramon Fried <rfried.dev@gmail.com>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>,
U-Boot Mailing List <u-boot@lists.denx.de>,
Claudiu Manoil <claudiu.manoil@nxp.com>,
Priyanka Jain <priyanka.jain@nxp.com>,
Bin Meng <bmeng.cn@gmail.com>
Subject: Re: [PATCH v2 1/6] arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS
Date: Wed, 30 Jun 2021 01:56:44 +0300 [thread overview]
Message-ID: <CAGi-RUJPfF-4WdbbBr+ex2rJpoKYDgvrUKy9QaPRRiPHEHOX+g@mail.gmail.com> (raw)
In-Reply-To: <20210617222604.2563375-2-vladimir.oltean@nxp.com>
On Fri, Jun 18, 2021 at 1:26 AM Vladimir Oltean <vladimir.oltean@nxp.com> wrote:
>
> Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
> switch got accepted with all ports disabled by default and with no link
> to the DSA master - this needs to be done on a per board basis.
>
> Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
> presumably at some point it might become. Explicitly enable it in the
> QDS device trees anyway, to proactively avoid issues when that happens.
>
> Fixes: a7fdac7e2a2a ("arm: dts: ls1028a: define QDS networking protocol combinations")
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> v1->v2: none
>
> arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi | 9 +++++++++
> arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi | 9 +++++++++
> 8 files changed, 72 insertions(+)
>
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
> index fb1836a8aef3..5a0f060c16e5 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
> @@ -20,6 +20,10 @@
> #include "fsl-sch-30841.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -47,3 +51,8 @@
> phy-mode = "sgmii-2500";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
> index 1d02a3e11def..39a83e10c4ce 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
> @@ -9,6 +9,10 @@
> #include "fsl-sch-30841.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -24,3 +28,8 @@
> phy-mode = "sgmii-2500";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
> index c92dd1bd2e95..021fe3fbc67a 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
> @@ -34,6 +34,10 @@
> #include "fsl-sch-24801.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -61,3 +65,8 @@
> phy-mode = "sgmii";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
> index 941f7472eb09..b6704d8089a8 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
> @@ -19,6 +19,10 @@
> #include "fsl-sch-24801.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -46,3 +50,8 @@
> phy-mode = "sgmii";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
> index 7e483e656e28..8c10897e565c 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
> @@ -19,6 +19,10 @@
> #include "fsl-sch-30841.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -46,3 +50,8 @@
> phy-mode = "usxgmii";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
> index 49fffdb9cb2a..1d800dacef89 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
> @@ -13,6 +13,10 @@
> #include "fsl-sch-28021.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -40,3 +44,8 @@
> phy-mode = "qsgmii";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
> index 8347462f4cb0..1fb2cdf0c244 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
> @@ -9,6 +9,10 @@
> #include "fsl-sch-30842.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -18,3 +22,8 @@
> phy-mode = "sgmii-2500";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
> index 6be3b5094c81..2333f74e5ae1 100644
> --- a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
> @@ -9,6 +9,10 @@
> #include "fsl-sch-30842.dtsi"
> };
>
> +&enetc2 {
> + status = "okay";
> +};
> +
> &mscc_felix {
> status = "okay";
> };
> @@ -18,3 +22,8 @@
> phy-mode = "sgmii-2500";
> phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
> };
> +
> +&mscc_felix_port4 {
> + ethernet = <&enetc2>;
> + status = "okay";
> +};
> --
> 2.25.1
>
Applied to u-boot-net/master, Thanks !
Ramon
next prev parent reply other threads:[~2021-06-29 22:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 22:25 [PATCH v2 0/6] Fixes for the NXP LS1028A-QDS boards Vladimir Oltean
2021-06-17 22:25 ` [PATCH v2 1/6] arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS Vladimir Oltean
2021-06-29 22:56 ` Ramon Fried [this message]
2021-06-17 22:26 ` [PATCH v2 2/6] arm: dts: ls1028a: enable internal RGMII delays for the LS1028A-QDS AR8035 PHY Vladimir Oltean
2021-06-17 22:26 ` [PATCH v2 3/6] arm: dts: ls1028a: declare the fixed-link speeds for the internal ENETC ports Vladimir Oltean
2021-06-17 22:26 ` [PATCH v2 4/6] arm: dts: ls1028a: disable enetc-2 by default Vladimir Oltean
2021-06-17 22:26 ` [PATCH v2 5/6] drivers: net: fsl_enetc: require a PHY device when probing Vladimir Oltean
2021-06-17 22:26 ` [PATCH v2 6/6] drivers: net: fsl_enetc: force the RGMII MAC speed/duplex instead of using in-band signaling Vladimir Oltean
2021-06-18 8:19 ` Ramon Fried
2021-06-22 9:20 ` Vladimir Oltean
2021-06-29 22:58 ` Ramon Fried
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