* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-19 9:53 ` Linus Walleij 0 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-19 9:53 UTC (permalink / raw) To: linux-kernel, linux-arm-kernel, Grant Likely Cc: Lee Jones, Stephen Warren, Joe Perches, Russell King, Linaro Dev, Linus Walleij From: Linus Walleij <linus.walleij@linaro.org> This is the fourth iteration of the pin controller subsystem, most changes are described in the first patch, copied here for reference: ChangeLog v3->v4: - Define a number space per controller instead of globally, Stephen and Grant requested the same thing so now maps need to define target controller, and the radix tree of pin descriptors is a property on each pin controller device. - Add a compulsory pinctrl device entry to the pinctrl mapping table. This must match the pinctrl device, like "pinctrl.0" - Split the file core.c in two: core.c and pinmux.c where the latter carry all pinmux stuff, the core is for generic pin control, and use local headers to access functionality between files. It is now possible to implement a "blank" pin controller without pinmux capabilities. This split will make new additions like pindrive.c, pinbias.c etc possible for combined drivers and chunks of functionality which is a GoodThing(TM). - Rewrite the interaction with the GPIO subsystem - the pin controller descriptor now handles this by defining an offset into the GPIO numberspace for its handled pin range. This is used to look up the apropriate pin controller for a GPIO pin. Then that specific GPIO range is matched 1-1 for the target controller instance. - Fixed a number of review comments from Joe Perches. - Broke out a header file pinctrl.h for the core pin handling stuff that will be reused by other stuff than pinmux. - Fixed some erroneous EXPORT() stuff. - Remove mispatched U300 Kconfig and Makefile entries - Fixed a number of review comments from Stephen Warren, not all of them - still WIP. But I think the new mapping that will specify which function goes to which pin mux controller address 50% of your concerns (else beat me up). Linus Walleij (4): drivers: create a pinmux subsystem v4 pinmux: add a driver for the U300 pinmux amba: request muxing for PrimeCell devices mach-u300: activate pinmux driver, delete old padmux driver Documentation/ABI/testing/sysfs-class-pinmux | 11 + Documentation/pinctrl.txt | 512 +++++++++++++++++++ MAINTAINERS | 5 + arch/arm/mach-u300/Kconfig | 2 + arch/arm/mach-u300/Makefile | 2 +- arch/arm/mach-u300/core.c | 31 ++- arch/arm/mach-u300/include/mach/syscon.h | 136 ----- arch/arm/mach-u300/mmc.c | 16 - arch/arm/mach-u300/padmux.c | 367 -------------- arch/arm/mach-u300/padmux.h | 39 -- arch/arm/mach-u300/spi.c | 20 - drivers/Kconfig | 4 + drivers/Makefile | 2 + drivers/amba/bus.c | 49 ++- drivers/pinctrl/Kconfig | 36 ++ drivers/pinctrl/Makefile | 7 + drivers/pinctrl/core.c | 437 ++++++++++++++++ drivers/pinctrl/core.h | 22 + drivers/pinctrl/pinmux-u300.c | 421 ++++++++++++++++ drivers/pinctrl/pinmux-u300.h | 141 ++++++ drivers/pinctrl/pinmux.c | 700 ++++++++++++++++++++++++++ drivers/pinctrl/pinmux.h | 4 + include/linux/amba/bus.h | 2 + include/linux/pinctrl/machine.h | 62 +++ include/linux/pinctrl/pinctrl.h | 120 +++++ include/linux/pinctrl/pinmux.h | 122 +++++ 26 files changed, 2687 insertions(+), 583 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-class-pinmux create mode 100644 Documentation/pinctrl.txt delete mode 100644 arch/arm/mach-u300/padmux.c delete mode 100644 arch/arm/mach-u300/padmux.h create mode 100644 drivers/pinctrl/Kconfig create mode 100644 drivers/pinctrl/Makefile create mode 100644 drivers/pinctrl/core.c create mode 100644 drivers/pinctrl/core.h create mode 100644 drivers/pinctrl/pinmux-u300.c create mode 100644 drivers/pinctrl/pinmux-u300.h create mode 100644 drivers/pinctrl/pinmux.c create mode 100644 drivers/pinctrl/pinmux.h create mode 100644 include/linux/pinctrl/machine.h create mode 100644 include/linux/pinctrl/pinctrl.h create mode 100644 include/linux/pinctrl/pinmux.h -- 1.7.3.2 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-19 9:53 ` Linus Walleij 0 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-19 9:53 UTC (permalink / raw) To: linux-arm-kernel From: Linus Walleij <linus.walleij@linaro.org> This is the fourth iteration of the pin controller subsystem, most changes are described in the first patch, copied here for reference: ChangeLog v3->v4: - Define a number space per controller instead of globally, Stephen and Grant requested the same thing so now maps need to define target controller, and the radix tree of pin descriptors is a property on each pin controller device. - Add a compulsory pinctrl device entry to the pinctrl mapping table. This must match the pinctrl device, like "pinctrl.0" - Split the file core.c in two: core.c and pinmux.c where the latter carry all pinmux stuff, the core is for generic pin control, and use local headers to access functionality between files. It is now possible to implement a "blank" pin controller without pinmux capabilities. This split will make new additions like pindrive.c, pinbias.c etc possible for combined drivers and chunks of functionality which is a GoodThing(TM). - Rewrite the interaction with the GPIO subsystem - the pin controller descriptor now handles this by defining an offset into the GPIO numberspace for its handled pin range. This is used to look up the apropriate pin controller for a GPIO pin. Then that specific GPIO range is matched 1-1 for the target controller instance. - Fixed a number of review comments from Joe Perches. - Broke out a header file pinctrl.h for the core pin handling stuff that will be reused by other stuff than pinmux. - Fixed some erroneous EXPORT() stuff. - Remove mispatched U300 Kconfig and Makefile entries - Fixed a number of review comments from Stephen Warren, not all of them - still WIP. But I think the new mapping that will specify which function goes to which pin mux controller address 50% of your concerns (else beat me up). Linus Walleij (4): drivers: create a pinmux subsystem v4 pinmux: add a driver for the U300 pinmux amba: request muxing for PrimeCell devices mach-u300: activate pinmux driver, delete old padmux driver Documentation/ABI/testing/sysfs-class-pinmux | 11 + Documentation/pinctrl.txt | 512 +++++++++++++++++++ MAINTAINERS | 5 + arch/arm/mach-u300/Kconfig | 2 + arch/arm/mach-u300/Makefile | 2 +- arch/arm/mach-u300/core.c | 31 ++- arch/arm/mach-u300/include/mach/syscon.h | 136 ----- arch/arm/mach-u300/mmc.c | 16 - arch/arm/mach-u300/padmux.c | 367 -------------- arch/arm/mach-u300/padmux.h | 39 -- arch/arm/mach-u300/spi.c | 20 - drivers/Kconfig | 4 + drivers/Makefile | 2 + drivers/amba/bus.c | 49 ++- drivers/pinctrl/Kconfig | 36 ++ drivers/pinctrl/Makefile | 7 + drivers/pinctrl/core.c | 437 ++++++++++++++++ drivers/pinctrl/core.h | 22 + drivers/pinctrl/pinmux-u300.c | 421 ++++++++++++++++ drivers/pinctrl/pinmux-u300.h | 141 ++++++ drivers/pinctrl/pinmux.c | 700 ++++++++++++++++++++++++++ drivers/pinctrl/pinmux.h | 4 + include/linux/amba/bus.h | 2 + include/linux/pinctrl/machine.h | 62 +++ include/linux/pinctrl/pinctrl.h | 120 +++++ include/linux/pinctrl/pinmux.h | 122 +++++ 26 files changed, 2687 insertions(+), 583 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-class-pinmux create mode 100644 Documentation/pinctrl.txt delete mode 100644 arch/arm/mach-u300/padmux.c delete mode 100644 arch/arm/mach-u300/padmux.h create mode 100644 drivers/pinctrl/Kconfig create mode 100644 drivers/pinctrl/Makefile create mode 100644 drivers/pinctrl/core.c create mode 100644 drivers/pinctrl/core.h create mode 100644 drivers/pinctrl/pinmux-u300.c create mode 100644 drivers/pinctrl/pinmux-u300.h create mode 100644 drivers/pinctrl/pinmux.c create mode 100644 drivers/pinctrl/pinmux.h create mode 100644 include/linux/pinctrl/machine.h create mode 100644 include/linux/pinctrl/pinctrl.h create mode 100644 include/linux/pinctrl/pinmux.h -- 1.7.3.2 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/4 v4] pin controller subsystem v4 2011-08-19 9:53 ` Linus Walleij @ 2011-08-21 14:42 ` Barry Song -1 siblings, 0 replies; 14+ messages in thread From: Barry Song @ 2011-08-21 14:42 UTC (permalink / raw) To: Linus Walleij Cc: linux-kernel, linux-arm-kernel, Grant Likely, Stephen Warren, Linus Walleij, Russell King, Joe Perches, Linaro Dev, Lee Jones > - Rewrite the interaction with the GPIO subsystem - the pin > controller descriptor now handles this by defining an offset > into the GPIO numberspace for its handled pin range. This is > used to look up the apropriate pin controller for a GPIO pin. > Then that specific GPIO range is matched 1-1 for the target > controller instance. ... > > Linus Walleij (4): > drivers: create a pinmux subsystem v4 > pinmux: add a driver for the U300 pinmux > amba: request muxing for PrimeCell devices > mach-u300: activate pinmux driver, delete old padmux driver it seems there is not an actual example that gpio requests pin from pinctrl yet. i might give one on SiRFprimaII. Thanks Barry ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-21 14:42 ` Barry Song 0 siblings, 0 replies; 14+ messages in thread From: Barry Song @ 2011-08-21 14:42 UTC (permalink / raw) To: linux-arm-kernel > - Rewrite the interaction with the GPIO subsystem - the pin > ?controller descriptor now handles this by defining an offset > ?into the GPIO numberspace for its handled pin range. This is > ?used to look up the apropriate pin controller for a GPIO pin. > ?Then that specific GPIO range is matched 1-1 for the target > ?controller instance. ... > > Linus Walleij (4): > ?drivers: create a pinmux subsystem v4 > ?pinmux: add a driver for the U300 pinmux > ?amba: request muxing for PrimeCell devices > ?mach-u300: activate pinmux driver, delete old padmux driver it seems there is not an actual example that gpio requests pin from pinctrl yet. i might give one on SiRFprimaII. Thanks Barry ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/4 v4] pin controller subsystem v4 2011-08-21 14:42 ` Barry Song @ 2011-08-22 12:28 ` Linus Walleij -1 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-22 12:28 UTC (permalink / raw) To: Barry Song Cc: Linus Walleij, linux-kernel, linux-arm-kernel, Grant Likely, Stephen Warren, Russell King, Joe Perches, Linaro Dev, Lee Jones On Sun, Aug 21, 2011 at 4:42 PM, Barry Song <21cnbao@gmail.com> wrote: > it seems there is not an actual example that gpio requests pin from > pinctrl yet. i might give one on SiRFprimaII. No good example yet, no. The reason is that for the U300 that I use as guinea pig, the GPIO driver is tangled up in discussions about how to handle the special control mechanics like requesting muxing and biasing pins. Right now it seems easier to rewrite all that to use the new pinctrl subsystem rather than actually trying to work it into the GPIO subsystem first and refactor from there, and that needs quite a bit of upfront work... Linus Walleij ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-22 12:28 ` Linus Walleij 0 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-22 12:28 UTC (permalink / raw) To: linux-arm-kernel On Sun, Aug 21, 2011 at 4:42 PM, Barry Song <21cnbao@gmail.com> wrote: > it seems there is not an actual example that gpio requests pin from > pinctrl yet. i might give one on SiRFprimaII. No good example yet, no. The reason is that for the U300 that I use as guinea pig, the GPIO driver is tangled up in discussions about how to handle the special control mechanics like requesting muxing and biasing pins. Right now it seems easier to rewrite all that to use the new pinctrl subsystem rather than actually trying to work it into the GPIO subsystem first and refactor from there, and that needs quite a bit of upfront work... Linus Walleij ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/4 v4] pin controller subsystem v4 2011-08-22 12:28 ` Linus Walleij @ 2011-08-26 1:58 ` Barry Song -1 siblings, 0 replies; 14+ messages in thread From: Barry Song @ 2011-08-26 1:58 UTC (permalink / raw) To: Linus Walleij Cc: Linus Walleij, linux-kernel, linux-arm-kernel, Grant Likely, Stephen Warren, Russell King, Joe Perches, Linaro Dev, Lee Jones 2011/8/22 Linus Walleij <linus.walleij@linaro.org>: > On Sun, Aug 21, 2011 at 4:42 PM, Barry Song <21cnbao@gmail.com> wrote: > >> it seems there is not an actual example that gpio requests pin from >> pinctrl yet. i might give one on SiRFprimaII. > > No good example yet, no. > > The reason is that for the U300 that I use as guinea pig, the > GPIO driver is tangled up in discussions about how to handle > the special control mechanics like requesting muxing and > biasing pins. Right now it seems easier to rewrite all that > to use the new pinctrl subsystem rather than actually trying > to work it into the GPIO subsystem first and refactor from > there, and that needs quite a bit of upfront work... Do you want the pinmux_request_gpio called by the gpiolib driver or by every device driver who uses this gpio? Do you think the following make sense in gpiolib driver? static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) { int ret = 0; ret = pinmux_request_gpio(chip->base + offset); if (ret) goto out; ..... out: return ret; } > > Linus Walleij > Thanks Barry ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-26 1:58 ` Barry Song 0 siblings, 0 replies; 14+ messages in thread From: Barry Song @ 2011-08-26 1:58 UTC (permalink / raw) To: linux-arm-kernel 2011/8/22 Linus Walleij <linus.walleij@linaro.org>: > On Sun, Aug 21, 2011 at 4:42 PM, Barry Song <21cnbao@gmail.com> wrote: > >> it seems there is not an actual example that gpio requests pin from >> pinctrl yet. i might give one on SiRFprimaII. > > No good example yet, no. > > The reason is that for the U300 that I use as guinea pig, the > GPIO driver is tangled up in discussions about how to handle > the special control mechanics like requesting muxing and > biasing pins. Right now it seems easier to rewrite all that > to use the new pinctrl subsystem rather than actually trying > to work it into the GPIO subsystem first and refactor from > there, and that needs quite a bit of upfront work... Do you want the pinmux_request_gpio called by the gpiolib driver or by every device driver who uses this gpio? Do you think the following make sense in gpiolib driver? static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) { int ret = 0; ret = pinmux_request_gpio(chip->base + offset); if (ret) goto out; ..... out: return ret; } > > Linus Walleij > Thanks Barry ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/4 v4] pin controller subsystem v4 2011-08-26 1:58 ` Barry Song @ 2011-08-26 7:57 ` Linus Walleij -1 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-26 7:57 UTC (permalink / raw) To: Barry Song Cc: Linus Walleij, linux-kernel, linux-arm-kernel, Grant Likely, Stephen Warren, Russell King, Joe Perches, Linaro Dev, Lee Jones On Fri, Aug 26, 2011 at 3:58 AM, Barry Song <21cnbao@gmail.com> wrote: > Do you want the pinmux_request_gpio called by the gpiolib driver or by > every device driver who uses this gpio? I always thought about the gpiolib driver. I think Grant told me he wanted drivers with combined GPIO and pinmuxing to reside in drivers/pinctrl and expose an additional gpiolib interface. > Do you think the following make sense in gpiolib driver? > static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) > { > int ret = 0; > > ret = pinmux_request_gpio(chip->base + offset); > if (ret) > goto out; > ..... > out: > return ret; > } Looks sane to me. It's a bit unfortunate to have to subtract the base and then add it again before passing to pinmux but the idea is to drop the global GPIO pinspace down the road and then it makes more sense. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-26 7:57 ` Linus Walleij 0 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-26 7:57 UTC (permalink / raw) To: linux-arm-kernel On Fri, Aug 26, 2011 at 3:58 AM, Barry Song <21cnbao@gmail.com> wrote: > Do you want the pinmux_request_gpio called by the gpiolib driver or by > every device driver who uses this gpio? I always thought about the gpiolib driver. I think Grant told me he wanted drivers with combined GPIO and pinmuxing to reside in drivers/pinctrl and expose an additional gpiolib interface. > Do you think the following make sense in gpiolib driver? > static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) > { > ? ? ? ?int ret = 0; > > ? ? ? ?ret = pinmux_request_gpio(chip->base + offset); > ? ? ? ?if (ret) > ? ? ? ? ? ? ? ?goto out; > ? ? ? ?..... > out: > ? ? ? ?return ret; > } Looks sane to me. It's a bit unfortunate to have to subtract the base and then add it again before passing to pinmux but the idea is to drop the global GPIO pinspace down the road and then it makes more sense. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 0/4 v4] pin controller subsystem v4 2011-08-26 1:58 ` Barry Song @ 2011-08-26 17:12 ` Stephen Warren -1 siblings, 0 replies; 14+ messages in thread From: Stephen Warren @ 2011-08-26 17:12 UTC (permalink / raw) To: Barry Song, Linus Walleij Cc: Linus Walleij, linux-kernel, linux-arm-kernel, Grant Likely, Russell King, Joe Perches, Linaro Dev, Lee Jones [-- Warning: decoded text below may be mangled, UTF-8 assumed --] [-- Attachment #1: Type: text/plain; charset="utf-8", Size: 3680 bytes --] Barry Song wrote at Thursday, August 25, 2011 7:59 PM: > 2011/8/22 Linus Walleij <linus.walleij@linaro.org>: > > On Sun, Aug 21, 2011 at 4:42 PM, Barry Song <21cnbao@gmail.com> wrote: > > > >> it seems there is not an actual example that gpio requests pin from > >> pinctrl yet. i might give one on SiRFprimaII. > > > > No good example yet, no. > > > > The reason is that for the U300 that I use as guinea pig, the > > GPIO driver is tangled up in discussions about how to handle > > the special control mechanics like requesting muxing and > > biasing pins. Right now it seems easier to rewrite all that > > to use the new pinctrl subsystem rather than actually trying > > to work it into the GPIO subsystem first and refactor from > > there, and that needs quite a bit of upfront work... > > Do you want the pinmux_request_gpio called by the gpiolib driver or by > every device driver who uses this gpio? > Do you think the following make sense in gpiolib driver? > > static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) > { > int ret = 0; > > ret = pinmux_request_gpio(chip->base + offset); > if (ret) > goto out; > ..... > out: > return ret; > } I would have expected this to work the other way around; "gpio" is just another function that can be assigned to a pin. This has the benefit of catering to the following cases: Below, "SF" == "some special function" 1) Pin is SF or a particular GPIO. 2) Pin is SF or a particular GPIO from GPIO controller A, or a particular GPIO from controller B 3) Pin is SF, or one of a number of user-selectable GPIOs. Case (1) is covered by the code quoted above from earlier in the thread. Cases (2) and (3) can't be covered by that code, and according to comments in earlier replies, both actually exist in real HW. For reference, here's how I'd imagine modeling those three cases in pinmux (all based on my earlier comments about the data model I imagine, rather than what's currently in the pinmux patches): 1) Have a single function "gpio" that can be applied to any pin that supports it. The actual GPIO number that gets mux'd onto the pin differs per pin, and is determine by HW design. But logically, we're connecting that pin to function "gpio", so we only need one function name for that. 2) Have a function for each GPIO controller that can be attached to a pin; "gpioa" or "gpiob". Based on the pin being configured, and which of those two GPIO functions is selected, the HW determines the specific GPIO number that's assigned to the pin. 3) Where the GPIO ID assigned to pins is user-selectable, have a function per GPIO ID; "gpio1", "gpio2", "gpio3", ... "gpio31". This sounds like it'd cause a huge explosion in the number of functions; one to represent each GPIO ID. However, I suspect this won't be too bad in practice, since there's presumably some practical limit to the amount of muxing logic that can be applied to each pin in HW, so the set of options won't be too large. If the set of GPIO IDs that can be assigned to any particular pin is a subset of the whole GPIO number space, e.g.: pina: gpio1, gpio2, gpio3, gpio4 pinb: gpio2, gpio3, gpio4, gpio5 pinc: gpio3, gpio4, gpio5, gpio6 ... then I imagine HW has already defined an enumerator gpioa, gpiob, gpioc, gpiod and a mapping from those to the specific GPIO ID that each means when assigned to a given pin, so those gpioa/b/c/d values could be used as the function exposed by the pinmux driver. -- nvpublic ÿôèº{.nÇ+·®+%Ëÿ±éݶ\x17¥wÿº{.nÇ+·¥{±þG«éÿ{ayº\x1dÊÚë,j\a¢f£¢·hïêÿêçz_è®\x03(éÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?¨èÚ&£ø§~á¶iOæ¬z·vØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?I¥ ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-26 17:12 ` Stephen Warren 0 siblings, 0 replies; 14+ messages in thread From: Stephen Warren @ 2011-08-26 17:12 UTC (permalink / raw) To: linux-arm-kernel Barry Song wrote at Thursday, August 25, 2011 7:59 PM: > 2011/8/22 Linus Walleij <linus.walleij@linaro.org>: > > On Sun, Aug 21, 2011 at 4:42 PM, Barry Song <21cnbao@gmail.com> wrote: > > > >> it seems there is not an actual example that gpio requests pin from > >> pinctrl yet. i might give one on SiRFprimaII. > > > > No good example yet, no. > > > > The reason is that for the U300 that I use as guinea pig, the > > GPIO driver is tangled up in discussions about how to handle > > the special control mechanics like requesting muxing and > > biasing pins. Right now it seems easier to rewrite all that > > to use the new pinctrl subsystem rather than actually trying > > to work it into the GPIO subsystem first and refactor from > > there, and that needs quite a bit of upfront work... > > Do you want the pinmux_request_gpio called by the gpiolib driver or by > every device driver who uses this gpio? > Do you think the following make sense in gpiolib driver? > > static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) > { > int ret = 0; > > ret = pinmux_request_gpio(chip->base + offset); > if (ret) > goto out; > ..... > out: > return ret; > } I would have expected this to work the other way around; "gpio" is just another function that can be assigned to a pin. This has the benefit of catering to the following cases: Below, "SF" == "some special function" 1) Pin is SF or a particular GPIO. 2) Pin is SF or a particular GPIO from GPIO controller A, or a particular GPIO from controller B 3) Pin is SF, or one of a number of user-selectable GPIOs. Case (1) is covered by the code quoted above from earlier in the thread. Cases (2) and (3) can't be covered by that code, and according to comments in earlier replies, both actually exist in real HW. For reference, here's how I'd imagine modeling those three cases in pinmux (all based on my earlier comments about the data model I imagine, rather than what's currently in the pinmux patches): 1) Have a single function "gpio" that can be applied to any pin that supports it. The actual GPIO number that gets mux'd onto the pin differs per pin, and is determine by HW design. But logically, we're connecting that pin to function "gpio", so we only need one function name for that. 2) Have a function for each GPIO controller that can be attached to a pin; "gpioa" or "gpiob". Based on the pin being configured, and which of those two GPIO functions is selected, the HW determines the specific GPIO number that's assigned to the pin. 3) Where the GPIO ID assigned to pins is user-selectable, have a function per GPIO ID; "gpio1", "gpio2", "gpio3", ... "gpio31". This sounds like it'd cause a huge explosion in the number of functions; one to represent each GPIO ID. However, I suspect this won't be too bad in practice, since there's presumably some practical limit to the amount of muxing logic that can be applied to each pin in HW, so the set of options won't be too large. If the set of GPIO IDs that can be assigned to any particular pin is a subset of the whole GPIO number space, e.g.: pina: gpio1, gpio2, gpio3, gpio4 pinb: gpio2, gpio3, gpio4, gpio5 pinc: gpio3, gpio4, gpio5, gpio6 ... then I imagine HW has already defined an enumerator gpioa, gpiob, gpioc, gpiod and a mapping from those to the specific GPIO ID that each means when assigned to a given pin, so those gpioa/b/c/d values could be used as the function exposed by the pinmux driver. -- nvpublic ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/4 v4] pin controller subsystem v4 2011-08-26 17:12 ` Stephen Warren @ 2011-08-29 8:33 ` Linus Walleij -1 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-29 8:33 UTC (permalink / raw) To: Stephen Warren Cc: Barry Song, Linus Walleij, linux-kernel, linux-arm-kernel, Grant Likely, Russell King, Joe Perches, Linaro Dev, Lee Jones On Fri, Aug 26, 2011 at 7:12 PM, Stephen Warren <swarren@nvidia.com> wrote: > [Barry] >> static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) >> { >> int ret = 0; >> >> ret = pinmux_request_gpio(chip->base + offset); >> if (ret) >> goto out; >> ..... >> out: >> return ret; >> } > > I would have expected this to work the other way around; "gpio" is just > another function that can be assigned to a pin. That's basically how it work internally, what I noticed is that GPIO requests seem to come in single pins (not groups) so there is a special function to request a pin by passing in the number from the GPIO pinspace and this optionally propagates all the way to the driver if there is a quick way to request this pin to be muxed in as GPIO. > 1) Pin is SF or a particular GPIO. > > 2) Pin is SF or a particular GPIO from GPIO controller A, or a particular > GPIO from controller B > > 3) Pin is SF, or one of a number of user-selectable GPIOs. > > Case (1) is covered by the code quoted above from earlier in the thread. > Cases (2) and (3) can't be covered by that code, and according to comments > in earlier replies, both actually exist in real HW. I think we can handle this quite well conceptually, but I don't know if we have the proper interaction with the drivers yet, so let's rinse and repeat a bit here. I'll post v5 today with your proposed changes (if you recognize them...) > 1) Have a single function "gpio" that can be applied to any pin that > supports it. The actual GPIO number that gets mux'd onto the pin differs > per pin, and is determine by HW design. But logically, we're connecting > that pin to function "gpio", so we only need one function name for that. Actually I think the new code can do this, one function "gpio" with multiple what I call "positions", so "gpio" can be on pin {1, 5, 95, ..} > 2) Have a function for each GPIO controller that can be attached to a > pin; "gpioa" or "gpiob". Based on the pin being configured, and which of > those two GPIO functions is selected, the HW determines the specific GPIO > number that's assigned to the pin. Should also work now with functions and positions per function I hope. > 3) Where the GPIO ID assigned to pins is user-selectable, have a function > per GPIO ID; "gpio1", "gpio2", "gpio3", ... "gpio31". This sounds like > it'd cause a huge explosion in the number of functions; one to represent > each GPIO ID. However, I suspect this won't be too bad in practice, since > there's presumably some practical limit to the amount of muxing logic that > can be applied to each pin in HW, so the set of options won't be too large. What happens right now is that the pinmux core system names the pin as taken by "gpioN" where N is the number from the GPIOlib number space. However that is just a name, not a function, and we have this special callback to the driver to mux in a single pin for GPIO. So what I need to do to support this is to support machine mappings for the GPIOs as function with positions which currently not available. Lemme see what I can do about that in v6. > If the set of GPIO IDs that can be assigned to any particular pin is a subset > of the whole GPIO number space, e.g.: > > pina: gpio1, gpio2, gpio3, gpio4 > pinb: gpio2, gpio3, gpio4, gpio5 > pinc: gpio3, gpio4, gpio5, gpio6 > > ... then I imagine HW has already defined an enumerator gpioa, gpiob, gpioc, > gpiod and a mapping from those to the specific GPIO ID that each means when > assigned to a given pin, so those gpioa/b/c/d values could be used as the > function exposed by the pinmux driver. Yep should be possible to make it work that way. Just need a way to map that for the machine. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/4 v4] pin controller subsystem v4 @ 2011-08-29 8:33 ` Linus Walleij 0 siblings, 0 replies; 14+ messages in thread From: Linus Walleij @ 2011-08-29 8:33 UTC (permalink / raw) To: linux-arm-kernel On Fri, Aug 26, 2011 at 7:12 PM, Stephen Warren <swarren@nvidia.com> wrote: > [Barry] >> static int xxx_gpio_request(struct gpio_chip *chip, unsigned offset) >> { >> ? ? ? ? int ret = 0; >> >> ? ? ? ? ret = pinmux_request_gpio(chip->base + offset); >> ? ? ? ? if (ret) >> ? ? ? ? ? ? ? ? goto out; >> ? ? ? ? ..... >> out: >> ? ? ? ? return ret; >> } > > I would have expected this to work the other way around; "gpio" is just > another function that can be assigned to a pin. That's basically how it work internally, what I noticed is that GPIO requests seem to come in single pins (not groups) so there is a special function to request a pin by passing in the number from the GPIO pinspace and this optionally propagates all the way to the driver if there is a quick way to request this pin to be muxed in as GPIO. > 1) Pin is SF or a particular GPIO. > > 2) Pin is SF or a particular GPIO from GPIO controller A, or a particular > ? GPIO from controller B > > 3) Pin is SF, or one of a number of user-selectable GPIOs. > > Case (1) is covered by the code quoted above from earlier in the thread. > Cases (2) and (3) can't be covered by that code, and according to comments > in earlier replies, both actually exist in real HW. I think we can handle this quite well conceptually, but I don't know if we have the proper interaction with the drivers yet, so let's rinse and repeat a bit here. I'll post v5 today with your proposed changes (if you recognize them...) > 1) Have a single function "gpio" that can be applied to any pin that > supports it. The actual GPIO number that gets mux'd onto the pin differs > per pin, and is determine by HW design. But logically, we're connecting > that pin to function "gpio", so we only need one function name for that. Actually I think the new code can do this, one function "gpio" with multiple what I call "positions", so "gpio" can be on pin {1, 5, 95, ..} > 2) Have a function for each GPIO controller that can be attached to a > pin; "gpioa" or "gpiob". Based on the pin being configured, and which of > those two GPIO functions is selected, the HW determines the specific GPIO > number that's assigned to the pin. Should also work now with functions and positions per function I hope. > 3) Where the GPIO ID assigned to pins is user-selectable, have a function > per GPIO ID; "gpio1", "gpio2", "gpio3", ... "gpio31". This sounds like > it'd cause a huge explosion in the number of functions; one to represent > each GPIO ID. However, I suspect this won't be too bad in practice, since > there's presumably some practical limit to the amount of muxing logic that > can be applied to each pin in HW, so the set of options won't be too large. What happens right now is that the pinmux core system names the pin as taken by "gpioN" where N is the number from the GPIOlib number space. However that is just a name, not a function, and we have this special callback to the driver to mux in a single pin for GPIO. So what I need to do to support this is to support machine mappings for the GPIOs as function with positions which currently not available. Lemme see what I can do about that in v6. > If the set of GPIO IDs that can be assigned to any particular pin is a subset > of the whole GPIO number space, e.g.: > > pina: gpio1, gpio2, gpio3, gpio4 > pinb: gpio2, gpio3, gpio4, gpio5 > pinc: gpio3, gpio4, gpio5, gpio6 > > ... then I imagine HW has already defined an enumerator gpioa, gpiob, gpioc, > gpiod and a mapping from those to the specific GPIO ID that each means when > assigned to a given pin, so those gpioa/b/c/d values could be used as the > function exposed by the pinmux driver. Yep should be possible to make it work that way. Just need a way to map that for the machine. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2011-08-29 8:33 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2011-08-19 9:53 [PATCH 0/4 v4] pin controller subsystem v4 Linus Walleij 2011-08-19 9:53 ` Linus Walleij 2011-08-21 14:42 ` Barry Song 2011-08-21 14:42 ` Barry Song 2011-08-22 12:28 ` Linus Walleij 2011-08-22 12:28 ` Linus Walleij 2011-08-26 1:58 ` Barry Song 2011-08-26 1:58 ` Barry Song 2011-08-26 7:57 ` Linus Walleij 2011-08-26 7:57 ` Linus Walleij 2011-08-26 17:12 ` Stephen Warren 2011-08-26 17:12 ` Stephen Warren 2011-08-29 8:33 ` Linus Walleij 2011-08-29 8:33 ` Linus Walleij
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