Re: [Qemu-devel] [RFC 4/4] Relevant changes to enable KVM to TCG migration

[alvise rigo <a.rigo@virtualopensystems.com>]

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I agree that this is a sort of workaround, but it seems to me that a
proper solution is not possible without changing the ideas contemplated
now in the migration code.
Are we willing to accept some major changes in the code to embrace
this type of migration?

Thanks,
alvise


On Tue, Feb 25, 2014 at 7:25 PM, Peter Maydell <peter.maydell@linaro.org>wrote:

> On 25 February 2014 16:52, Alvise Rigo <a.rigo@virtualopensystems.com>
> wrote:
> > CPUARMState:
> > * added adfsr cp register.
> > * added aifsr cp register.
> > These registers have been added because they are migrated by KVM. This
> prevents
> > the migration from failing when trying to copy their values.
>
> This should be done in a separate patch.
>
> > ARMCPRegInfo:
> > * added a pointer to the parent that generated the register (if any).
> > * a flag to inform that we have already copied the value of the register:
> >   this prevents the register from being overwritten by the parent
> register
> >   value, which could be not set.
> >
> > helper.c:
> > * added mechanism to track the cp register "parent".
> > * compare_cpreg_array(): compare the incoming cp registers with the
> >   cpreg_list keeping a list of the registers that do not succeeded the
> >   match.
> > * handle_cpreg_kvm2tcg_migration(): try to solve the mismatch of
> >   cp registers coming from KVM; without this additional step the
> >   migration would fail even if it's feasible.
> >
> > Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com>
> > ---
> >  target-arm/cpu.h     |  43 +++++++++++++
> >  target-arm/helper.c  | 167
> +++++++++++++++++++++++++++++++++++++++++++++++++--
> >  target-arm/machine.c |  46 ++++++++++----
> >  3 files changed, 238 insertions(+), 18 deletions(-)
> >
> > diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> > index 3c8a2db..a97246d 100644
> > --- a/target-arm/cpu.h
> > +++ b/target-arm/cpu.h
> > @@ -184,6 +184,8 @@ typedef struct CPUARMState {
> >                          MPU write buffer control.  */
> >          uint32_t c5_insn; /* Fault status registers.  */
> >          uint32_t c5_data;
> > +        uint32_t c5_adfsr;
> > +        uint32_t c5_aifsr;
> >          uint32_t c6_region[8]; /* MPU base/size registers.  */
> >          uint32_t c6_insn; /* Fault address registers.  */
> >          uint32_t c6_data;
> > @@ -197,6 +199,7 @@ typedef struct CPUARMState {
> >          uint32_t c9_pmxevtyper; /* perf monitor event type */
> >          uint32_t c9_pmuserenr; /* perf monitor user enable */
> >          uint32_t c9_pminten; /* perf monitor interrupt enables */
> > +        uint32_t c9_l2ctlr; /* L2 Control Register */
> >          uint32_t c12_vbar; /* vector base address register */
> >          uint32_t c13_fcse; /* FCSE PID.  */
> >          uint32_t c13_context; /* Context ID.  */
> > @@ -867,6 +870,15 @@ struct ARMCPRegInfo {
> >      uint8_t opc0;
> >      uint8_t opc1;
> >      uint8_t opc2;
> > +    /* When migrating this flag tells if the register's value has
> already
> > +     * been copied. This is used in some unlikely cases where KVM
> migrates
> > +     * a register that in TCG is generated by a wildcarded or
> > +     * ARM_CP_STATE_BOTH parent (hence a not migratable register);
> > +     * in those cases, we will set the field "parent" to point to the
> > +     * generating register. Most of the time this field can stay false.
> > +     * */
> > +    bool skip_cpreglist;
>
> This reads to me like it's papering over a problem rather
> than fixing it.
>
> thanks
> -- PMM
>

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