[PATCH v3 0/2] Add ufs power-domain entries for SM8150

[PATCH v3 0/2] Add ufs power-domain entries for SM8150

[Bhupesh Sharma]

Changes since v2:
----------------
- v2 can be found here: https://lore.kernel.org/linux-arm-msm/20220228144607.456194-1-bhupesh.sharma@linaro.org/T/
- Modified [PATCH 2/2] from v2 to include gdsc driver structs and
  support code for UFS_PHY and UFS_CARD (in addition to defines for the
  same).

Changes since v1:
----------------
- v1 can be found here: https://lore.kernel.org/lkml/202201220442.bMRI74m1-lkp@intel.com/T/
- Broke down another separately sent out PATCH (see [1]), into a 3 patches (one each for emac, pci
  and ufs gdsc defines) - one of which is carried as [PATCH 1/2]
  in this series, which fixes a compilation error reported by 'kernel test robot'.
  The rest would be sent out as separate patch(es).

[1]. https://patchwork.kernel.org/project/netdevbpf/patch/20220126221725.710167-4-bhupesh.sharma@linaro.org/

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>

Bhupesh Sharma (2):
  clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150
  arm64: dts: qcom: sm8150: Add ufs power-domain entries

 arch/arm64/boot/dts/qcom/sm8150.dtsi        |  5 +++++
 drivers/clk/qcom/gcc-sm8150.c               | 20 ++++++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-sm8150.h |  2 ++
 3 files changed, 27 insertions(+)

-- 
2.35.1

[PATCH v3 1/2] clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150

[Bhupesh Sharma]

Add the UFS_CARD and UFS_PHY GDSC defines & driver structures
for SM8150.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 drivers/clk/qcom/gcc-sm8150.c               | 20 ++++++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-sm8150.h |  2 ++
 2 files changed, 22 insertions(+)

diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 245794485719..ef0f26c43ec1 100644
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -3448,6 +3448,24 @@ static struct clk_branch gcc_video_xo_clk = {
 	},
 };
 
+static struct gdsc ufs_card_gdsc = {
+	.gdscr = 0x75004,
+	.pd = {
+		.name = "ufs_card_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
+static struct gdsc ufs_phy_gdsc = {
+	.gdscr = 0x77004,
+	.pd = {
+		.name = "ufs_phy_gdsc",
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = POLL_CFG_GDSCR,
+};
+
 static struct gdsc usb30_prim_gdsc = {
 		.gdscr = 0xf004,
 		.pd = {
@@ -3714,6 +3732,8 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = {
 };
 
 static struct gdsc *gcc_sm8150_gdscs[] = {
+	[UFS_CARD_GDSC] = &ufs_card_gdsc,
+	[UFS_PHY_GDSC] = &ufs_phy_gdsc,
 	[USB30_PRIM_GDSC] = &usb30_prim_gdsc,
 	[USB30_SEC_GDSC] = &usb30_sec_gdsc,
 };
diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h
index 3e1a91876610..1bd65cc581c3 100644
--- a/include/dt-bindings/clock/qcom,gcc-sm8150.h
+++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h
@@ -241,6 +241,8 @@
 #define GCC_USB_PHY_CFG_AHB2PHY_BCR				28
 
 /* GCC GDSCRs */
+#define UFS_CARD_GDSC                                          2
+#define UFS_PHY_GDSC                                           3
 #define USB30_PRIM_GDSC                     4
 #define USB30_SEC_GDSC						5
 
-- 
2.35.1

[PATCH v3 2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries

[Bhupesh Sharma]

Add power-domain entries for UFS controller & phy nodes
in sm8150 dts.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 6012322a5984..7aa879eb24d7 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -1637,6 +1637,8 @@ ufs_mem_hc: ufshc@1d84000 {
 			phy-names = "ufsphy";
 			lanes-per-direction = <2>;
 			#reset-cells = <1>;
+
+			power-domains = <&gcc UFS_PHY_GDSC>;
 			resets = <&gcc GCC_UFS_PHY_BCR>;
 			reset-names = "rst";
 
@@ -1687,6 +1689,9 @@ ufs_mem_phy: phy@1d87000 {
 			clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
 				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
 
+			power-domains = <&gcc UFS_CARD_GDSC>,
+					<&gcc UFS_PHY_GDSC>;
+			power-domain-names = "ufs_card_gdsc", "ufs_phy_gdsc";
 			resets = <&ufs_mem_hc 0>;
 			reset-names = "ufsphy";
 			status = "disabled";
-- 
2.35.1

Re: [PATCH v3 2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries

[Dmitry Baryshkov]

On Thu, 3 Mar 2022 at 11:22, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
>
> Add power-domain entries for UFS controller & phy nodes
> in sm8150 dts.
>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 6012322a5984..7aa879eb24d7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1637,6 +1637,8 @@ ufs_mem_hc: ufshc@1d84000 {
>                         phy-names = "ufsphy";
>                         lanes-per-direction = <2>;
>                         #reset-cells = <1>;
> +
> +                       power-domains = <&gcc UFS_PHY_GDSC>;
>                         resets = <&gcc GCC_UFS_PHY_BCR>;
>                         reset-names = "rst";
>
> @@ -1687,6 +1689,9 @@ ufs_mem_phy: phy@1d87000 {
>                         clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>                                  <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>
> +                       power-domains = <&gcc UFS_CARD_GDSC>,
> +                                       <&gcc UFS_PHY_GDSC>;
> +                       power-domain-names = "ufs_card_gdsc", "ufs_phy_gdsc";

This will not work, if I'm not mistaken. Platform drivers won't bind
two power-domains by default. And the qmp driver lacks handling for
power domains.

Also a generic question. I see that other platforms use UFS_PHY_GDSC
for the host controller and completely ingore the UFS_CARD_GDSC. What
makes sm8150 so different from the rest of the platforms?

>                         resets = <&ufs_mem_hc 0>;
>                         reset-names = "ufsphy";
>                         status = "disabled";
> --
> 2.35.1
>


-- 
With best wishes
Dmitry

Re: [PATCH v3 2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries

[Bjorn Andersson]

On Thu 03 Mar 02:21 CST 2022, Bhupesh Sharma wrote:

> Add power-domain entries for UFS controller & phy nodes
> in sm8150 dts.
> 
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 6012322a5984..7aa879eb24d7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1637,6 +1637,8 @@ ufs_mem_hc: ufshc@1d84000 {
>  			phy-names = "ufsphy";
>  			lanes-per-direction = <2>;
>  			#reset-cells = <1>;
> +
> +			power-domains = <&gcc UFS_PHY_GDSC>;

It seems odd that the controller would be in the PHY power-domain?

>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>  			reset-names = "rst";
>  
> @@ -1687,6 +1689,9 @@ ufs_mem_phy: phy@1d87000 {
>  			clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>  				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>  
> +			power-domains = <&gcc UFS_CARD_GDSC>,
> +					<&gcc UFS_PHY_GDSC>;

And "card" is typically related to the second UFS interface, so I
suspect you only would need the last one of these?

Regards,
Bjorn

> +			power-domain-names = "ufs_card_gdsc", "ufs_phy_gdsc";
>  			resets = <&ufs_mem_hc 0>;
>  			reset-names = "ufsphy";
>  			status = "disabled";
> -- 
> 2.35.1
> 

Re: [PATCH v3 0/2] Add ufs power-domain entries for SM8150

[patchwork-bot+linux-arm-msm]

Hello:

This series was applied to qcom/linux.git (for-next)
by Bjorn Andersson <bjorn.andersson@linaro.org>:

On Thu,  3 Mar 2022 13:51:38 +0530 you wrote:
> Changes since v2:
> ----------------
> - v2 can be found here: https://lore.kernel.org/linux-arm-msm/20220228144607.456194-1-bhupesh.sharma@linaro.org/T/
> - Modified [PATCH 2/2] from v2 to include gdsc driver structs and
>   support code for UFS_PHY and UFS_CARD (in addition to defines for the
>   same).
> 
> [...]

Here is the summary with links:
  - [v3,1/2] clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150
    https://git.kernel.org/qcom/c/53f4a832166c
  - [v3,2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [PATCH v3 2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries

[Bhupesh Sharma]

Hi Dmitry,

On Thu, 3 Mar 2022 at 16:02, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> On Thu, 3 Mar 2022 at 11:22, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
> >
> > Add power-domain entries for UFS controller & phy nodes
> > in sm8150 dts.
> >
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Rob Herring <robh@kernel.org>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index 6012322a5984..7aa879eb24d7 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -1637,6 +1637,8 @@ ufs_mem_hc: ufshc@1d84000 {
> >                         phy-names = "ufsphy";
> >                         lanes-per-direction = <2>;
> >                         #reset-cells = <1>;
> > +
> > +                       power-domains = <&gcc UFS_PHY_GDSC>;
> >                         resets = <&gcc GCC_UFS_PHY_BCR>;
> >                         reset-names = "rst";
> >
> > @@ -1687,6 +1689,9 @@ ufs_mem_phy: phy@1d87000 {
> >                         clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
> >                                  <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
> >
> > +                       power-domains = <&gcc UFS_CARD_GDSC>,
> > +                                       <&gcc UFS_PHY_GDSC>;
> > +                       power-domain-names = "ufs_card_gdsc", "ufs_phy_gdsc";
>
> This will not work, if I'm not mistaken. Platform drivers won't bind
> two power-domains by default. And the qmp driver lacks handling for
> power domains.
>
> Also a generic question. I see that other platforms use UFS_PHY_GDSC
> for the host controller and completely ingore the UFS_CARD_GDSC. What
> makes sm8150 so different from the rest of the platforms?

You are right. I used the UFS power-domain constructs presently used
downstream, but I think using UFS_PHY_GDSC only is sufficient for our
use case upstream.

So, I will send a fixed v4 version.

Thanks,
Bhupesh

> >                         resets = <&ufs_mem_hc 0>;
> >                         reset-names = "ufsphy";
> >                         status = "disabled";
> > --
> > 2.35.1
> >
>
>
> --
> With best wishes
> Dmitry

Re: [PATCH v3 2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries

[Bhupesh Sharma]

Hi Bjorn,

On Wed, 9 Mar 2022 at 04:35, Bjorn Andersson <bjorn.andersson@linaro.org> wrote:
>
> On Thu 03 Mar 02:21 CST 2022, Bhupesh Sharma wrote:
>
> > Add power-domain entries for UFS controller & phy nodes
> > in sm8150 dts.
> >
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Rob Herring <robh@kernel.org>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index 6012322a5984..7aa879eb24d7 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -1637,6 +1637,8 @@ ufs_mem_hc: ufshc@1d84000 {
> >                       phy-names = "ufsphy";
> >                       lanes-per-direction = <2>;
> >                       #reset-cells = <1>;
> > +
> > +                     power-domains = <&gcc UFS_PHY_GDSC>;
>
> It seems odd that the controller would be in the PHY power-domain?

Ok.

> >                       resets = <&gcc GCC_UFS_PHY_BCR>;
> >                       reset-names = "rst";
> >
> > @@ -1687,6 +1689,9 @@ ufs_mem_phy: phy@1d87000 {
> >                       clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
> >                                <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
> >
> > +                     power-domains = <&gcc UFS_CARD_GDSC>,
> > +                                     <&gcc UFS_PHY_GDSC>;
>
> And "card" is typically related to the second UFS interface, so I
> suspect you only would need the last one of these?

Right, I will send a fixed v4 version shortly.

Thanks,
Bhupesh

> > +                     power-domain-names = "ufs_card_gdsc", "ufs_phy_gdsc";
> >                       resets = <&ufs_mem_hc 0>;
> >                       reset-names = "ufsphy";
> >                       status = "disabled";
> > --
> > 2.35.1
> >