Re: Questions regarding regarding idt/renesas versaclock5 driver

[Adam Ford <aford173@gmail.com>]

On Mon, Feb 28, 2022 at 10:04 AM Sean Anderson <sean.anderson@seco.com> wrote:
>
>
>
> On 2/28/22 7:35 AM, Fillion, Claude wrote:
> >
> > You don't often get email from claude.fillion@mksinst.com. Learn why this is important <http://aka.ms/LearnAboutSenderIdentification>
> >
> >
> > Hello  Sean,
> >
> >

+ Luca Ceresoli

> >
> > I have a design that is looking to use the Renesas 5P49V6965 or 5P49V690 clock chip and am looking to use the versaclock 5 driver (https://github.com/Xilinx/linux-xlnx/blob/master/drivers/clk/clk-versaclock5.c).
> >
> >
> >
> > I am new to writing drivers and have two questions I am hoping you can help me with:
> >
> > 1) In the driver I see the following code:
> >
> > static const struct vc5_chip_info idt_5p49v6901_info = {
> >
> >             .model = IDT_VC6_5P49V6901,
> >
> >             .clk_fod_cnt = 4,
> >
> >             .clk_out_cnt = 5,
> >
> >             .flags = VC5_HAS_PFD_FREQ_DBL,
> >
> > };
> >
> >
> >
> > static const struct vc5_chip_info idt_5p49v6965_info = {
> >
> >             .model = IDT_VC6_5P49V6965,
> >
> >             .clk_fod_cnt = 4,
> >
> >             .clk_out_cnt = 5,
> >
> >             .flags =  VC5_HAS_BYPASS_SYNC_BIT,
> >
> > };
> >
> >
> >
> > However, the 6965 part also has the same frequency doubling bit as the 6901.  Would it be better to set the flags for the 6965 to something like this?
> >
> >
> >
> > static const struct vc5_chip_info idt_5p49v6965_info = {
> >
> >             .model = IDT_VC6_5P49V6965,
> >
> >             .clk_fod_cnt = 4,
> >
> >             .clk_out_cnt = 5,
> >
> >             .flags = VC5_HAS_PFD_FREQ_DBL | VC5_HAS_BYPASS_SYNC_BIT,
> >
> > };
>
> I think Adam will have a better idea about this.
>
> > 2) I am unclear how to set the output frequencies for the device. For my application I would like to set output clock 1 to 250MHz and output clock 2 to 46.8MHz but I am unclear how to do so.  I have looked at the documentation at https://mjmwired.net/kernel/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml but remain unclear how to set the output frequencies.  Any insight you could provide would be greatly appreciated.
>
> Use assigned-clock-frequencies as described in
> Documentation/devicetree/bindings/clock/clock-bindings.txt
>

I agree that the clock-bindings have the instructions on how to set
them.  If you check
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi, there are some
examples of how to set the frequency.
In my instance,  the chip wasn't enabling the output by default, so I
needed to submit some patches upstream to make sure the device that
was being clocked by this device had get and enable functions to make
sure the clock chip would turn on the clock when requested.

>
> > I saw your name mentioned so I am emailing  you directly.  If there is a better place to ask these questions can you please direct me there?  Thanks you so much.
>
> Adam (CC'd) wrote the original driver, so he's probably a
> better person to start with. You should also CC the linux-clk
> mailing list for questions about clock drivers.

I've reviewed the datasheet for the 6965, and it doesn't explicitly
show the multiplier, but the programmer's guide does appear to show
the existence of bit that when set, it will "double the reference
frequency for the Phase frequency detector" but on the programmer's
guide for the 6901, the same bit reads "Enables frequency doubler when
set to 1" so it's not clear to me that these functions are exactly the
same, but implies that it might be.  I'll need some time to test this,
but if I find it works, I can push a patch to this driver.  I added
Luca, as he is the maintainer for this driver as well.

adam
>
> --Sean