[PATCH V7 0/4] soc: imx: add i.MX BLK-CTL support

[PATCH V7 0/4] soc: imx: add i.MX BLK-CTL support

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

V7:
 patch 2: update patch title per Shawn 
 Patch 3: Addressed several comments from Shawn

V6:
 Thanks for Adam's report on V5.
 Resolve the error message dump, it is the child device reuse
 the parent device node and matches the parent driver.
 Filled the remove function for child device.
 A diff dts file for upstream:
 https://gist.github.com/MrVan/d73888d8273c43ea4a3b28fa668ca1d0

V5:
 Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power
 domain to fix the potential handshake issue.
 I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes
 I only drop R-b tag for Patch 3, since it has big change.
 An example, the pgc_mipi not take pgc_dispmix as parent:

	pgc_dispmix: power-domain@10 {
		#power-domain-cells = <0>;
		reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;
		clocks = <&clk IMX8MM_CLK_DISP_ROOT>,
			 <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
	};

	pgc_mipi: power-domain@11 {
		#power-domain-cells = <0>;
		reg = <IMX8MM_POWER_DOMAIN_MIPI>;
		power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;
	};

	dispmix_blk_ctl: clock-controller@32e28000 {
		compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
		reg = <0x32e28000 0x100>;
		#power-domain-cells = <1>;
		power-domains = <&pgc_dispmix>, <&pgc_mipi>;
		power-domain-names = "dispmix", "mipi";
		clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
	};

V4:
 Add R-b tag
 Typo fix
 Update the power domain macro names Per Abel and Frieder

V3:
 Add explaination for not listing items in patch 2 commit log Per Rob.
 Addressed comments from Lucas and Frieder on patch [3,4].
 A few comments from Jacky was ignored, because following gpcv2
 coding style.

V2:
 Fix yaml check failure.

Previously there is an effort from Abel that take BLK-CTL as clock
provider, but it turns out that there is A/B lock issue and we are
not able resolve that.

Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL
as a power domain provider and use GPC's domain as parent, the consumer
node take BLK-CTL as power domain input.

This patchset has been tested on i.MX8MM EVK board, but one hack
is not included in the patchset is that the DISPMIX BLK-CTL
MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a MIPI
DPHY driver, so fine to leave it.

Thanks for Lucas's suggestion, Frieder Schrempf for collecting
all the patches, Abel's previous BLK-CTL work, Jacky Bai on help
debug issues.


Peng Fan (4):
  dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains
  dt-bindings: soc: imx: Add bindings for i.MX BLK_CTL
  soc: imx: Add generic blk-ctl driver
  soc: imx: Add blk-ctl driver for i.MX8MM

 .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++
 drivers/soc/imx/Makefile                      |   2 +-
 drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++
 drivers/soc/imx/blk-ctl.c                     | 325 ++++++++++++++++++
 drivers/soc/imx/blk-ctl.h                     |  85 +++++
 include/dt-bindings/power/imx8mm-power.h      |  13 +
 6 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
 create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
 create mode 100644 drivers/soc/imx/blk-ctl.c
 create mode 100644 drivers/soc/imx/blk-ctl.h

-- 
2.30.0

[PATCH V7 0/4] soc: imx: add i.MX BLK-CTL support

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

V7:
 patch 2: update patch title per Shawn 
 Patch 3: Addressed several comments from Shawn

V6:
 Thanks for Adam's report on V5.
 Resolve the error message dump, it is the child device reuse
 the parent device node and matches the parent driver.
 Filled the remove function for child device.
 A diff dts file for upstream:
 https://gist.github.com/MrVan/d73888d8273c43ea4a3b28fa668ca1d0

V5:
 Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power
 domain to fix the potential handshake issue.
 I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes
 I only drop R-b tag for Patch 3, since it has big change.
 An example, the pgc_mipi not take pgc_dispmix as parent:

	pgc_dispmix: power-domain@10 {
		#power-domain-cells = <0>;
		reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;
		clocks = <&clk IMX8MM_CLK_DISP_ROOT>,
			 <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
	};

	pgc_mipi: power-domain@11 {
		#power-domain-cells = <0>;
		reg = <IMX8MM_POWER_DOMAIN_MIPI>;
		power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;
	};

	dispmix_blk_ctl: clock-controller@32e28000 {
		compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
		reg = <0x32e28000 0x100>;
		#power-domain-cells = <1>;
		power-domains = <&pgc_dispmix>, <&pgc_mipi>;
		power-domain-names = "dispmix", "mipi";
		clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
	};

V4:
 Add R-b tag
 Typo fix
 Update the power domain macro names Per Abel and Frieder

V3:
 Add explaination for not listing items in patch 2 commit log Per Rob.
 Addressed comments from Lucas and Frieder on patch [3,4].
 A few comments from Jacky was ignored, because following gpcv2
 coding style.

V2:
 Fix yaml check failure.

Previously there is an effort from Abel that take BLK-CTL as clock
provider, but it turns out that there is A/B lock issue and we are
not able resolve that.

Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL
as a power domain provider and use GPC's domain as parent, the consumer
node take BLK-CTL as power domain input.

This patchset has been tested on i.MX8MM EVK board, but one hack
is not included in the patchset is that the DISPMIX BLK-CTL
MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a MIPI
DPHY driver, so fine to leave it.

Thanks for Lucas's suggestion, Frieder Schrempf for collecting
all the patches, Abel's previous BLK-CTL work, Jacky Bai on help
debug issues.


Peng Fan (4):
  dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains
  dt-bindings: soc: imx: Add bindings for i.MX BLK_CTL
  soc: imx: Add generic blk-ctl driver
  soc: imx: Add blk-ctl driver for i.MX8MM

 .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++
 drivers/soc/imx/Makefile                      |   2 +-
 drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++
 drivers/soc/imx/blk-ctl.c                     | 325 ++++++++++++++++++
 drivers/soc/imx/blk-ctl.h                     |  85 +++++
 include/dt-bindings/power/imx8mm-power.h      |  13 +
 6 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
 create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
 create mode 100644 drivers/soc/imx/blk-ctl.c
 create mode 100644 drivers/soc/imx/blk-ctl.h

-- 
2.30.0


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH V7 1/4] dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Adding the defines for i.MX8MM BLK-CTL power domains.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Rob Herring <robh@kernel.org>
---
 include/dt-bindings/power/imx8mm-power.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h
index fc9c2e16aadc..982ca2939cdc 100644
--- a/include/dt-bindings/power/imx8mm-power.h
+++ b/include/dt-bindings/power/imx8mm-power.h
@@ -19,4 +19,17 @@
 #define IMX8MM_POWER_DOMAIN_DISPMIX	10
 #define IMX8MM_POWER_DOMAIN_MIPI	11
 
+#define IMX8MM_BLK_CTL_PD_VPU_G2		0
+#define IMX8MM_BLK_CTL_PD_VPU_G1		1
+#define IMX8MM_BLK_CTL_PD_VPU_H1		2
+#define IMX8MM_BLK_CTL_PD_VPU_BUS		3
+#define IMX8MM_BLK_CTL_PD_VPU_MAX		4
+
+#define IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE	0
+#define IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF		1
+#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI	2
+#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI	3
+#define IMX8MM_BLK_CTL_PD_DISPMIX_BUS		4
+#define IMX8MM_BLK_CTL_PD_DISPMIX_MAX		5
+
 #endif
-- 
2.30.0

[PATCH V7 1/4] dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Adding the defines for i.MX8MM BLK-CTL power domains.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Rob Herring <robh@kernel.org>
---
 include/dt-bindings/power/imx8mm-power.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h
index fc9c2e16aadc..982ca2939cdc 100644
--- a/include/dt-bindings/power/imx8mm-power.h
+++ b/include/dt-bindings/power/imx8mm-power.h
@@ -19,4 +19,17 @@
 #define IMX8MM_POWER_DOMAIN_DISPMIX	10
 #define IMX8MM_POWER_DOMAIN_MIPI	11
 
+#define IMX8MM_BLK_CTL_PD_VPU_G2		0
+#define IMX8MM_BLK_CTL_PD_VPU_G1		1
+#define IMX8MM_BLK_CTL_PD_VPU_H1		2
+#define IMX8MM_BLK_CTL_PD_VPU_BUS		3
+#define IMX8MM_BLK_CTL_PD_VPU_MAX		4
+
+#define IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE	0
+#define IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF		1
+#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI	2
+#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI	3
+#define IMX8MM_BLK_CTL_PD_DISPMIX_BUS		4
+#define IMX8MM_BLK_CTL_PD_DISPMIX_MAX		5
+
 #endif
-- 
2.30.0


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[PATCH V7 2/4] dt-bindings: soc: imx: Add bindings for i.MX BLK_CTL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Document the i.MX BLK_CTL with its devicetree properties.

Each BLK CTL have different power domain inputs and they have different
names, so we are not able to list all the power domain names for each
BLK CTL here.

For example:
i.MX8MM dispmix BLK CTL, it has
	power-domains = <&pgc_dispmix>, <&pgc_mipi>;
	power-domain-names = "dispmix", "mipi";

vpumix BLK CTL, it has
	power-domains = <&vpumix_pd>, <&vpu_g1_pd>, <&vpu_g2_pd>,
			<&vpu_h1_pd>;
	power-domain-names = "vpumix", "g1", "g2", "h1";

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
new file mode 100644
index 000000000000..a66f11acc6b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx-blk-ctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX BLK_CTL
+
+maintainers:
+  - Peng Fan <peng.fan@nxp.com>
+
+description:
+  i.MX BLK_CTL is a conglomerate of different GPRs that are
+  dedicated to a specific subsystem. It usually contains
+  clocks and resets amongst other things. Here we take the clocks
+  and resets as virtual PDs, the reason we could not take it as
+  clock provider is there is A/B lock issue between power domain
+  and clock.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8mm-dispmix-blk-ctl
+          - fsl,imx8mm-vpumix-blk-ctl
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  "#power-domain-cells":
+    const: 1
+
+  power-domains:
+    minItems: 1
+    maxItems: 32
+
+  power-domain-names:
+    minItems: 1
+    maxItems: 32
+
+  clocks:
+    minItems: 1
+    maxItems: 32
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - power-domain-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mm-clock.h>
+
+    dispmix_blk_ctl: blk-ctl@32e28000 {
+      compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
+      reg = <0x32e28000 0x100>;
+      #power-domain-cells = <1>;
+      power-domains = <&pgc_dispmix>, <&pgc_mipi>;
+      power-domain-names = "dispmix", "mipi";
+      clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
+               <&clk IMX8MM_CLK_DISP_APB_ROOT>;
+    };
-- 
2.30.0

[PATCH V7 2/4] dt-bindings: soc: imx: Add bindings for i.MX BLK_CTL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Document the i.MX BLK_CTL with its devicetree properties.

Each BLK CTL have different power domain inputs and they have different
names, so we are not able to list all the power domain names for each
BLK CTL here.

For example:
i.MX8MM dispmix BLK CTL, it has
	power-domains = <&pgc_dispmix>, <&pgc_mipi>;
	power-domain-names = "dispmix", "mipi";

vpumix BLK CTL, it has
	power-domains = <&vpumix_pd>, <&vpu_g1_pd>, <&vpu_g2_pd>,
			<&vpu_h1_pd>;
	power-domain-names = "vpumix", "g1", "g2", "h1";

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
new file mode 100644
index 000000000000..a66f11acc6b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx-blk-ctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX BLK_CTL
+
+maintainers:
+  - Peng Fan <peng.fan@nxp.com>
+
+description:
+  i.MX BLK_CTL is a conglomerate of different GPRs that are
+  dedicated to a specific subsystem. It usually contains
+  clocks and resets amongst other things. Here we take the clocks
+  and resets as virtual PDs, the reason we could not take it as
+  clock provider is there is A/B lock issue between power domain
+  and clock.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8mm-dispmix-blk-ctl
+          - fsl,imx8mm-vpumix-blk-ctl
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  "#power-domain-cells":
+    const: 1
+
+  power-domains:
+    minItems: 1
+    maxItems: 32
+
+  power-domain-names:
+    minItems: 1
+    maxItems: 32
+
+  clocks:
+    minItems: 1
+    maxItems: 32
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - power-domain-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mm-clock.h>
+
+    dispmix_blk_ctl: blk-ctl@32e28000 {
+      compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
+      reg = <0x32e28000 0x100>;
+      #power-domain-cells = <1>;
+      power-domains = <&pgc_dispmix>, <&pgc_mipi>;
+      power-domain-names = "dispmix", "mipi";
+      clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
+               <&clk IMX8MM_CLK_DISP_APB_ROOT>;
+    };
-- 
2.30.0


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[PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX8MM introduces an IP named BLK_CTL and usually is comprised of
some GPRs.

The GPRs has some clock bits and reset bits, but here we take it
as virtual PDs, because of the clock and power domain A/B lock issue
when taking it as a clock controller.

For some bits, it might be good to also make it as a reset controller,
but to i.MX8MM, we not add that support for now.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/Makefile  |   2 +-
 drivers/soc/imx/blk-ctl.c | 325 ++++++++++++++++++++++++++++++++++++++
 drivers/soc/imx/blk-ctl.h |  85 ++++++++++
 3 files changed, 411 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/imx/blk-ctl.c
 create mode 100644 drivers/soc/imx/blk-ctl.h

diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 078dc918f4f3..d3d2b49a386c 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
 endif
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
-obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
+obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
diff --git a/drivers/soc/imx/blk-ctl.c b/drivers/soc/imx/blk-ctl.c
new file mode 100644
index 000000000000..3464e4cf7fe6
--- /dev/null
+++ b/drivers/soc/imx/blk-ctl.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2021 NXP.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/pm_domain.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#include "blk-ctl.h"
+
+static inline struct imx_blk_ctl_domain *to_imx_blk_ctl_pd(struct generic_pm_domain *genpd)
+{
+	return container_of(genpd, struct imx_blk_ctl_domain, genpd);
+}
+
+static int imx_blk_ctl_enable_hsk(struct device *dev)
+{
+	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
+	const struct imx_blk_ctl_hw *hw = blk_ctl->dev_data->hw_hsk;
+	struct regmap *regmap = blk_ctl->regmap;
+	int ret;
+
+	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
+		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
+		if (ret)
+			return ret;
+	}
+
+	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
+
+	/* Wait for handshake */
+	udelay(5);
+
+	return ret;
+}
+
+static int imx_blk_ctl_power_on(struct generic_pm_domain *domain)
+{
+	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
+	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
+	struct regmap *regmap = blk_ctl->regmap;
+	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
+	int ret;
+
+	mutex_lock(&blk_ctl->lock);
+
+	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
+	if (ret) {
+		mutex_unlock(&blk_ctl->lock);
+		return ret;
+	}
+
+	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
+		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
+		if (ret) {
+			dev_err(blk_ctl->dev, "Hankshake failed when power on\n");
+			goto disable_clk;
+		}
+	}
+
+	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
+		ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
+		if (ret)
+			goto disable_clk;
+
+		/* Wait for reset propagate */
+		udelay(5);
+
+		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
+		if (ret)
+			goto disable_clk;
+	}
+
+	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
+
+disable_clk:
+	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
+
+	mutex_unlock(&blk_ctl->lock);
+
+	return ret;
+}
+
+static int imx_blk_ctl_power_off(struct generic_pm_domain *domain)
+{
+	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
+	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
+	struct regmap *regmap = blk_ctl->regmap;
+	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
+	int ret;
+
+	mutex_lock(&blk_ctl->lock);
+
+	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
+	if (ret) {
+		mutex_unlock(&blk_ctl->lock);
+		return ret;
+	}
+
+	if (!(hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)) {
+		ret = regmap_clear_bits(regmap, hw->offset, hw->mask);
+		if (ret)
+			goto disable_clk;
+
+		if (hw->flags & IMX_BLK_CTL_PD_RESET) {
+			ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
+			if (ret)
+				goto disable_clk;
+		}
+	}
+
+	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
+		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
+		if (ret)
+			dev_err(blk_ctl->dev, "Hankshake failed when power off\n");
+	}
+
+disable_clk:
+	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
+
+	mutex_unlock(&blk_ctl->lock);
+
+	return ret;
+}
+
+static int imx_blk_ctl_probe(struct platform_device *pdev)
+{
+	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
+	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
+	struct generic_pm_domain *parent_genpd;
+	struct device *dev = &pdev->dev;
+	struct device *active_pd;
+	int ret;
+
+	pdev->dev.of_node = blk_ctl->dev->of_node;
+
+	if (domain->hw->active_pd_name) {
+		active_pd = dev_pm_domain_attach_by_name(dev, domain->hw->active_pd_name);
+		if (IS_ERR_OR_NULL(active_pd)) {
+			ret = PTR_ERR(active_pd) ? : -ENODATA;
+			pdev->dev.of_node = NULL;
+			return ret;
+		}
+
+		domain->active_pd = active_pd;
+	} else {
+		if (!blk_ctl->bus_domain) {
+			pdev->dev.of_node = NULL;
+			return -EPROBE_DEFER;
+		}
+	}
+
+	if (domain->hw->active_pd_name)
+		parent_genpd = pd_to_genpd(active_pd->pm_domain);
+	else
+		parent_genpd = blk_ctl->bus_domain;
+
+	if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
+		dev_warn(dev, "failed to add subdomain: %s\n", domain->genpd.name);
+	} else {
+		mutex_lock(&blk_ctl->lock);
+		domain->hooked = true;
+		mutex_unlock(&blk_ctl->lock);
+	}
+
+	return 0;
+}
+
+static int imx_blk_ctl_remove(struct platform_device *pdev)
+{
+	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
+	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
+	struct generic_pm_domain *parent_genpd;
+	struct device *active_pd;
+
+	if (domain->hw->active_pd_name)
+		parent_genpd = pd_to_genpd(active_pd->pm_domain);
+	else
+		parent_genpd = blk_ctl->bus_domain;
+
+	pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
+
+	mutex_lock(&blk_ctl->lock);
+	domain->hooked = false;
+	mutex_unlock(&blk_ctl->lock);
+
+	if (domain->hw->active_pd_name)
+		dev_pm_domain_detach(domain->active_pd, false);
+
+	return 0;
+}
+
+static const struct platform_device_id imx_blk_ctl_id[] = {
+	{ "imx-vpumix-blk-ctl", },
+	{ "imx-dispmix-blk-ctl", },
+	{ },
+};
+
+static struct platform_driver imx_blk_ctl_driver = {
+	.driver = {
+		.name = "imx-blk-ctl",
+	},
+	.probe    = imx_blk_ctl_probe,
+	.remove   = imx_blk_ctl_remove,
+	.id_table = imx_blk_ctl_id,
+};
+builtin_platform_driver(imx_blk_ctl_driver)
+
+static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct of_phandle_args *genpdspec,
+							 void *data)
+{
+	struct genpd_onecell_data *genpd_data = data;
+	unsigned int idx = genpdspec->args[0];
+	struct imx_blk_ctl_domain *domain;
+	struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
+
+	if (genpdspec->args_count != 1)
+		return ERR_PTR(-EINVAL);
+
+	if (idx >= genpd_data->num_domains)
+		return ERR_PTR(-EINVAL);
+
+	if (!genpd_data->domains[idx])
+		return ERR_PTR(-ENOENT);
+
+	domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
+
+	mutex_lock(&domain->blk_ctl->lock);
+	if (domain->hooked)
+		genpd = genpd_data->domains[idx];
+	mutex_unlock(&domain->blk_ctl->lock);
+
+	return genpd;
+}
+
+int imx_blk_ctl_register(struct device *dev)
+{
+	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
+	const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
+	int num = dev_data->pds_num;
+	struct imx_blk_ctl_domain *domain;
+	struct generic_pm_domain *genpd;
+	struct platform_device *pd_pdev;
+	int domain_index;
+	int i, ret;
+
+	blk_ctl->onecell_data.num_domains = num;
+	blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
+	blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct generic_pm_domain *),
+						     GFP_KERNEL);
+	if (!blk_ctl->onecell_data.domains)
+		return -ENOMEM;
+
+	for (i = 0; i < num; i++) {
+		domain_index = dev_data->pds[i].id;
+		if (domain_index >= num) {
+			dev_warn(dev, "Domain index %d is out of bounds\n", domain_index);
+			continue;
+		}
+
+		domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain), GFP_KERNEL);
+		if (!domain)
+			goto error;
+
+		pd_pdev = platform_device_alloc(dev_data->name, domain_index);
+		if (!pd_pdev) {
+			dev_err(dev, "Failed to allocate platform device\n");
+			goto error;
+		}
+
+		pd_pdev->dev.platform_data = domain;
+
+		domain->blk_ctl = blk_ctl;
+		domain->hw = &dev_data->pds[i];
+		domain->id = domain_index;
+		domain->genpd.name = dev_data->pds[i].name;
+		domain->genpd.power_off = imx_blk_ctl_power_off;
+		domain->genpd.power_on = imx_blk_ctl_power_on;
+		domain->dev = &pd_pdev->dev;
+		domain->hooked = false;
+
+		ret = pm_genpd_init(&domain->genpd, NULL, true);
+		pd_pdev->dev.parent = dev;
+
+		if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
+			blk_ctl->bus_domain = &domain->genpd;
+
+		ret = platform_device_add(pd_pdev);
+		if (ret) {
+			platform_device_put(pd_pdev);
+			goto error;
+		}
+		blk_ctl->onecell_data.domains[i] = &domain->genpd;
+	}
+
+	return of_genpd_add_provider_onecell(dev->of_node, &blk_ctl->onecell_data);
+
+error:
+	for (; i >= 0; i--) {
+		genpd = blk_ctl->onecell_data.domains[i];
+		if (!genpd)
+			continue;
+		domain = to_imx_blk_ctl_pd(genpd);
+		if (domain->dev)
+			platform_device_put(to_platform_device(domain->dev));
+	}
+	return ret;
+}
+EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
+
+const struct dev_pm_ops imx_blk_ctl_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
+};
+EXPORT_SYMBOL_GPL(imx_blk_ctl_pm_ops);
diff --git a/drivers/soc/imx/blk-ctl.h b/drivers/soc/imx/blk-ctl.h
new file mode 100644
index 000000000000..6780d00ec8c5
--- /dev/null
+++ b/drivers/soc/imx/blk-ctl.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __SOC_IMX_BLK_CTL_H
+#define __SOC_IMX_BLK_CTL_H
+
+enum imx_blk_ctl_pd_type {
+	BLK_CTL_PD,
+};
+
+struct imx_blk_ctl_hw {
+	int type;
+	char *name;
+	char *active_pd_name;
+	u32 offset;
+	u32 mask;
+	u32 flags;
+	u32 id;
+	u32 rst_offset;
+	u32 rst_mask;
+	u32 errata;
+};
+
+struct imx_blk_ctl_domain {
+	struct generic_pm_domain genpd;
+	struct device *active_pd;
+	struct imx_blk_ctl *blk_ctl;
+	struct imx_blk_ctl_hw *hw;
+	struct device *dev;
+	bool hooked;
+	u32 id;
+};
+
+struct imx_blk_ctl_dev_data {
+	struct regmap_config config;
+	struct imx_blk_ctl_hw *pds;
+	struct imx_blk_ctl_hw *hw_hsk;
+	u32 pds_num;
+	u32 max_num;
+	char *name;
+};
+
+struct imx_blk_ctl {
+	struct device *dev;
+	struct regmap *regmap;
+	struct genpd_onecell_data onecell_data;
+	const struct imx_blk_ctl_dev_data *dev_data;
+	struct clk_bulk_data *clks;
+	u32 num_clks;
+	struct generic_pm_domain *bus_domain;
+
+	struct mutex lock;
+};
+
+#define IMX_BLK_CTL(_type, _name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,	\
+		    _flags, _errata)								\
+	{											\
+		.type = _type,									\
+		.name = _name,									\
+		.active_pd_name = _active_pd,							\
+		.id = _id,									\
+		.offset = _offset,								\
+		.mask = _mask,									\
+		.flags = _flags,								\
+		.rst_offset = _rst_offset,							\
+		.rst_mask = _rst_mask,								\
+		.errata = _errata,								\
+	}
+
+#define IMX_BLK_CTL_PD(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask, _flags)	\
+	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,		\
+		    _rst_mask, _flags, 0)
+
+#define IMX_BLK_CTL_PD_ERRATA(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,	\
+			      _flags, _errata)							\
+	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,		\
+		    _rst_mask, _flags, _errata)
+
+int imx_blk_ctl_register(struct device *dev);
+
+#define IMX_BLK_CTL_PD_HANDSHAKE	BIT(0)
+#define IMX_BLK_CTL_PD_RESET		BIT(1)
+#define IMX_BLK_CTL_PD_BUS		BIT(2)
+
+const extern struct dev_pm_ops imx_blk_ctl_pm_ops;
+
+#endif
-- 
2.30.0

[PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX8MM introduces an IP named BLK_CTL and usually is comprised of
some GPRs.

The GPRs has some clock bits and reset bits, but here we take it
as virtual PDs, because of the clock and power domain A/B lock issue
when taking it as a clock controller.

For some bits, it might be good to also make it as a reset controller,
but to i.MX8MM, we not add that support for now.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/Makefile  |   2 +-
 drivers/soc/imx/blk-ctl.c | 325 ++++++++++++++++++++++++++++++++++++++
 drivers/soc/imx/blk-ctl.h |  85 ++++++++++
 3 files changed, 411 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/imx/blk-ctl.c
 create mode 100644 drivers/soc/imx/blk-ctl.h

diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 078dc918f4f3..d3d2b49a386c 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
 endif
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
-obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
+obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
diff --git a/drivers/soc/imx/blk-ctl.c b/drivers/soc/imx/blk-ctl.c
new file mode 100644
index 000000000000..3464e4cf7fe6
--- /dev/null
+++ b/drivers/soc/imx/blk-ctl.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2021 NXP.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/pm_domain.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#include "blk-ctl.h"
+
+static inline struct imx_blk_ctl_domain *to_imx_blk_ctl_pd(struct generic_pm_domain *genpd)
+{
+	return container_of(genpd, struct imx_blk_ctl_domain, genpd);
+}
+
+static int imx_blk_ctl_enable_hsk(struct device *dev)
+{
+	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
+	const struct imx_blk_ctl_hw *hw = blk_ctl->dev_data->hw_hsk;
+	struct regmap *regmap = blk_ctl->regmap;
+	int ret;
+
+	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
+		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
+		if (ret)
+			return ret;
+	}
+
+	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
+
+	/* Wait for handshake */
+	udelay(5);
+
+	return ret;
+}
+
+static int imx_blk_ctl_power_on(struct generic_pm_domain *domain)
+{
+	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
+	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
+	struct regmap *regmap = blk_ctl->regmap;
+	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
+	int ret;
+
+	mutex_lock(&blk_ctl->lock);
+
+	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
+	if (ret) {
+		mutex_unlock(&blk_ctl->lock);
+		return ret;
+	}
+
+	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
+		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
+		if (ret) {
+			dev_err(blk_ctl->dev, "Hankshake failed when power on\n");
+			goto disable_clk;
+		}
+	}
+
+	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
+		ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
+		if (ret)
+			goto disable_clk;
+
+		/* Wait for reset propagate */
+		udelay(5);
+
+		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
+		if (ret)
+			goto disable_clk;
+	}
+
+	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
+
+disable_clk:
+	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
+
+	mutex_unlock(&blk_ctl->lock);
+
+	return ret;
+}
+
+static int imx_blk_ctl_power_off(struct generic_pm_domain *domain)
+{
+	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
+	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
+	struct regmap *regmap = blk_ctl->regmap;
+	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
+	int ret;
+
+	mutex_lock(&blk_ctl->lock);
+
+	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
+	if (ret) {
+		mutex_unlock(&blk_ctl->lock);
+		return ret;
+	}
+
+	if (!(hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)) {
+		ret = regmap_clear_bits(regmap, hw->offset, hw->mask);
+		if (ret)
+			goto disable_clk;
+
+		if (hw->flags & IMX_BLK_CTL_PD_RESET) {
+			ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
+			if (ret)
+				goto disable_clk;
+		}
+	}
+
+	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
+		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
+		if (ret)
+			dev_err(blk_ctl->dev, "Hankshake failed when power off\n");
+	}
+
+disable_clk:
+	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
+
+	mutex_unlock(&blk_ctl->lock);
+
+	return ret;
+}
+
+static int imx_blk_ctl_probe(struct platform_device *pdev)
+{
+	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
+	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
+	struct generic_pm_domain *parent_genpd;
+	struct device *dev = &pdev->dev;
+	struct device *active_pd;
+	int ret;
+
+	pdev->dev.of_node = blk_ctl->dev->of_node;
+
+	if (domain->hw->active_pd_name) {
+		active_pd = dev_pm_domain_attach_by_name(dev, domain->hw->active_pd_name);
+		if (IS_ERR_OR_NULL(active_pd)) {
+			ret = PTR_ERR(active_pd) ? : -ENODATA;
+			pdev->dev.of_node = NULL;
+			return ret;
+		}
+
+		domain->active_pd = active_pd;
+	} else {
+		if (!blk_ctl->bus_domain) {
+			pdev->dev.of_node = NULL;
+			return -EPROBE_DEFER;
+		}
+	}
+
+	if (domain->hw->active_pd_name)
+		parent_genpd = pd_to_genpd(active_pd->pm_domain);
+	else
+		parent_genpd = blk_ctl->bus_domain;
+
+	if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
+		dev_warn(dev, "failed to add subdomain: %s\n", domain->genpd.name);
+	} else {
+		mutex_lock(&blk_ctl->lock);
+		domain->hooked = true;
+		mutex_unlock(&blk_ctl->lock);
+	}
+
+	return 0;
+}
+
+static int imx_blk_ctl_remove(struct platform_device *pdev)
+{
+	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
+	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
+	struct generic_pm_domain *parent_genpd;
+	struct device *active_pd;
+
+	if (domain->hw->active_pd_name)
+		parent_genpd = pd_to_genpd(active_pd->pm_domain);
+	else
+		parent_genpd = blk_ctl->bus_domain;
+
+	pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
+
+	mutex_lock(&blk_ctl->lock);
+	domain->hooked = false;
+	mutex_unlock(&blk_ctl->lock);
+
+	if (domain->hw->active_pd_name)
+		dev_pm_domain_detach(domain->active_pd, false);
+
+	return 0;
+}
+
+static const struct platform_device_id imx_blk_ctl_id[] = {
+	{ "imx-vpumix-blk-ctl", },
+	{ "imx-dispmix-blk-ctl", },
+	{ },
+};
+
+static struct platform_driver imx_blk_ctl_driver = {
+	.driver = {
+		.name = "imx-blk-ctl",
+	},
+	.probe    = imx_blk_ctl_probe,
+	.remove   = imx_blk_ctl_remove,
+	.id_table = imx_blk_ctl_id,
+};
+builtin_platform_driver(imx_blk_ctl_driver)
+
+static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct of_phandle_args *genpdspec,
+							 void *data)
+{
+	struct genpd_onecell_data *genpd_data = data;
+	unsigned int idx = genpdspec->args[0];
+	struct imx_blk_ctl_domain *domain;
+	struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
+
+	if (genpdspec->args_count != 1)
+		return ERR_PTR(-EINVAL);
+
+	if (idx >= genpd_data->num_domains)
+		return ERR_PTR(-EINVAL);
+
+	if (!genpd_data->domains[idx])
+		return ERR_PTR(-ENOENT);
+
+	domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
+
+	mutex_lock(&domain->blk_ctl->lock);
+	if (domain->hooked)
+		genpd = genpd_data->domains[idx];
+	mutex_unlock(&domain->blk_ctl->lock);
+
+	return genpd;
+}
+
+int imx_blk_ctl_register(struct device *dev)
+{
+	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
+	const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
+	int num = dev_data->pds_num;
+	struct imx_blk_ctl_domain *domain;
+	struct generic_pm_domain *genpd;
+	struct platform_device *pd_pdev;
+	int domain_index;
+	int i, ret;
+
+	blk_ctl->onecell_data.num_domains = num;
+	blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
+	blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct generic_pm_domain *),
+						     GFP_KERNEL);
+	if (!blk_ctl->onecell_data.domains)
+		return -ENOMEM;
+
+	for (i = 0; i < num; i++) {
+		domain_index = dev_data->pds[i].id;
+		if (domain_index >= num) {
+			dev_warn(dev, "Domain index %d is out of bounds\n", domain_index);
+			continue;
+		}
+
+		domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain), GFP_KERNEL);
+		if (!domain)
+			goto error;
+
+		pd_pdev = platform_device_alloc(dev_data->name, domain_index);
+		if (!pd_pdev) {
+			dev_err(dev, "Failed to allocate platform device\n");
+			goto error;
+		}
+
+		pd_pdev->dev.platform_data = domain;
+
+		domain->blk_ctl = blk_ctl;
+		domain->hw = &dev_data->pds[i];
+		domain->id = domain_index;
+		domain->genpd.name = dev_data->pds[i].name;
+		domain->genpd.power_off = imx_blk_ctl_power_off;
+		domain->genpd.power_on = imx_blk_ctl_power_on;
+		domain->dev = &pd_pdev->dev;
+		domain->hooked = false;
+
+		ret = pm_genpd_init(&domain->genpd, NULL, true);
+		pd_pdev->dev.parent = dev;
+
+		if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
+			blk_ctl->bus_domain = &domain->genpd;
+
+		ret = platform_device_add(pd_pdev);
+		if (ret) {
+			platform_device_put(pd_pdev);
+			goto error;
+		}
+		blk_ctl->onecell_data.domains[i] = &domain->genpd;
+	}
+
+	return of_genpd_add_provider_onecell(dev->of_node, &blk_ctl->onecell_data);
+
+error:
+	for (; i >= 0; i--) {
+		genpd = blk_ctl->onecell_data.domains[i];
+		if (!genpd)
+			continue;
+		domain = to_imx_blk_ctl_pd(genpd);
+		if (domain->dev)
+			platform_device_put(to_platform_device(domain->dev));
+	}
+	return ret;
+}
+EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
+
+const struct dev_pm_ops imx_blk_ctl_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
+};
+EXPORT_SYMBOL_GPL(imx_blk_ctl_pm_ops);
diff --git a/drivers/soc/imx/blk-ctl.h b/drivers/soc/imx/blk-ctl.h
new file mode 100644
index 000000000000..6780d00ec8c5
--- /dev/null
+++ b/drivers/soc/imx/blk-ctl.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __SOC_IMX_BLK_CTL_H
+#define __SOC_IMX_BLK_CTL_H
+
+enum imx_blk_ctl_pd_type {
+	BLK_CTL_PD,
+};
+
+struct imx_blk_ctl_hw {
+	int type;
+	char *name;
+	char *active_pd_name;
+	u32 offset;
+	u32 mask;
+	u32 flags;
+	u32 id;
+	u32 rst_offset;
+	u32 rst_mask;
+	u32 errata;
+};
+
+struct imx_blk_ctl_domain {
+	struct generic_pm_domain genpd;
+	struct device *active_pd;
+	struct imx_blk_ctl *blk_ctl;
+	struct imx_blk_ctl_hw *hw;
+	struct device *dev;
+	bool hooked;
+	u32 id;
+};
+
+struct imx_blk_ctl_dev_data {
+	struct regmap_config config;
+	struct imx_blk_ctl_hw *pds;
+	struct imx_blk_ctl_hw *hw_hsk;
+	u32 pds_num;
+	u32 max_num;
+	char *name;
+};
+
+struct imx_blk_ctl {
+	struct device *dev;
+	struct regmap *regmap;
+	struct genpd_onecell_data onecell_data;
+	const struct imx_blk_ctl_dev_data *dev_data;
+	struct clk_bulk_data *clks;
+	u32 num_clks;
+	struct generic_pm_domain *bus_domain;
+
+	struct mutex lock;
+};
+
+#define IMX_BLK_CTL(_type, _name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,	\
+		    _flags, _errata)								\
+	{											\
+		.type = _type,									\
+		.name = _name,									\
+		.active_pd_name = _active_pd,							\
+		.id = _id,									\
+		.offset = _offset,								\
+		.mask = _mask,									\
+		.flags = _flags,								\
+		.rst_offset = _rst_offset,							\
+		.rst_mask = _rst_mask,								\
+		.errata = _errata,								\
+	}
+
+#define IMX_BLK_CTL_PD(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask, _flags)	\
+	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,		\
+		    _rst_mask, _flags, 0)
+
+#define IMX_BLK_CTL_PD_ERRATA(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,	\
+			      _flags, _errata)							\
+	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,		\
+		    _rst_mask, _flags, _errata)
+
+int imx_blk_ctl_register(struct device *dev);
+
+#define IMX_BLK_CTL_PD_HANDSHAKE	BIT(0)
+#define IMX_BLK_CTL_PD_RESET		BIT(1)
+#define IMX_BLK_CTL_PD_BUS		BIT(2)
+
+const extern struct dev_pm_ops imx_blk_ctl_pm_ops;
+
+#endif
-- 
2.30.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
that support in this driver.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/Makefile         |   2 +-
 drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
 2 files changed, 140 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c

diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index d3d2b49a386c..c260b962f495 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
 endif
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
-obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
+obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
new file mode 100644
index 000000000000..59443588f892
--- /dev/null
+++ b/drivers/soc/imx/blk-ctl-imx8mm.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2021 NXP
+ */
+
+#include <dt-bindings/clock/imx8mm-clock.h>
+#include <dt-bindings/power/imx8mm-power.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/pm_domain.h>
+#include <linux/regmap.h>
+
+#include "blk-ctl.h"
+
+#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN			BIT(6)
+#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN			BIT(5)
+#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN			BIT(4)
+#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN			BIT(3)
+#define MEDIA_BLK_CSI_BRIDGE_SFT_EN				GENMASK(2, 0)
+
+#define MEDIA_BLK_BUS_PD_MASK					BIT(12)
+#define MEDIA_BLK_MIPI_CSI_PD_MASK				GENMASK(11, 10)
+#define MEDIA_BLK_MIPI_DSI_PD_MASK				GENMASK(9, 8)
+#define MEDIA_BLK_LCDIF_PD_MASK					GENMASK(7, 6)
+#define MEDIA_BLK_CSI_BRIDGE_PD_MASK				GENMASK(5, 0)
+
+static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
+	IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
+		       MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
+		       IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
+		       MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
+	IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
+		       MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
+		       IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
+		       MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
+		       MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
+		       IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
+		       MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
+		       IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
+};
+
+static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
+		       BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
+		       BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
+		       BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
+		       BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
+};
+
+static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
+	.reg_bits		= 32,
+	.reg_stride		= 4,
+	.val_bits		= 32,
+	.max_register		= 0x30,
+	.fast_io		= true,
+};
+
+static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
+	.pds = imx8mm_vpumix_blk_ctl_pds,
+	.pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
+	.max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
+	.hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
+	.config = imx8mm_blk_ctl_regmap_config,
+	.name = "imx-vpumix-blk-ctl",
+};
+
+static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
+	.pds = imx8mm_dispmix_blk_ctl_pds,
+	.pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
+	.max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
+	.hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
+	.config = imx8mm_blk_ctl_regmap_config,
+	.name = "imx-dispmix-blk-ctl",
+};
+
+static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
+	struct regmap *regmap;
+	struct imx_blk_ctl *ctl;
+	void __iomem *base;
+
+	ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
+	if (!ctl)
+		return -ENOMEM;
+
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	ctl->regmap = regmap;
+	ctl->dev = dev;
+	mutex_init(&ctl->lock);
+
+	ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
+	if (ctl->num_clks < 0)
+		return ctl->num_clks;
+
+	dev_set_drvdata(dev, ctl);
+	ctl->dev_data = dev_data;
+
+	return imx_blk_ctl_register(dev);
+}
+
+static const struct of_device_id imx_blk_ctl_of_match[] = {
+	{ .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
+	{ .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
+	{ /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
+
+static struct platform_driver imx_blk_ctl_driver = {
+	.probe = imx8mm_blk_ctl_probe,
+	.driver = {
+		.name = "imx8mm-blk-ctl",
+		.of_match_table = of_match_ptr(imx_blk_ctl_of_match),
+		.pm = &imx_blk_ctl_pm_ops,
+	},
+};
+module_platform_driver(imx_blk_ctl_driver);
-- 
2.30.0

[PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
that support in this driver.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/Makefile         |   2 +-
 drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
 2 files changed, 140 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c

diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index d3d2b49a386c..c260b962f495 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
 endif
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
-obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
+obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
new file mode 100644
index 000000000000..59443588f892
--- /dev/null
+++ b/drivers/soc/imx/blk-ctl-imx8mm.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2021 NXP
+ */
+
+#include <dt-bindings/clock/imx8mm-clock.h>
+#include <dt-bindings/power/imx8mm-power.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/pm_domain.h>
+#include <linux/regmap.h>
+
+#include "blk-ctl.h"
+
+#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN			BIT(6)
+#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN			BIT(5)
+#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN			BIT(4)
+#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN			BIT(3)
+#define MEDIA_BLK_CSI_BRIDGE_SFT_EN				GENMASK(2, 0)
+
+#define MEDIA_BLK_BUS_PD_MASK					BIT(12)
+#define MEDIA_BLK_MIPI_CSI_PD_MASK				GENMASK(11, 10)
+#define MEDIA_BLK_MIPI_DSI_PD_MASK				GENMASK(9, 8)
+#define MEDIA_BLK_LCDIF_PD_MASK					GENMASK(7, 6)
+#define MEDIA_BLK_CSI_BRIDGE_PD_MASK				GENMASK(5, 0)
+
+static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
+	IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
+		       MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
+		       IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
+		       MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
+	IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
+		       MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
+		       IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
+		       MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
+		       MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
+		       IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
+		       MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
+		       IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
+};
+
+static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
+		       BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
+		       BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
+		       BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
+	IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
+		       BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
+};
+
+static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
+	.reg_bits		= 32,
+	.reg_stride		= 4,
+	.val_bits		= 32,
+	.max_register		= 0x30,
+	.fast_io		= true,
+};
+
+static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
+	.pds = imx8mm_vpumix_blk_ctl_pds,
+	.pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
+	.max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
+	.hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
+	.config = imx8mm_blk_ctl_regmap_config,
+	.name = "imx-vpumix-blk-ctl",
+};
+
+static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
+	.pds = imx8mm_dispmix_blk_ctl_pds,
+	.pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
+	.max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
+	.hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
+	.config = imx8mm_blk_ctl_regmap_config,
+	.name = "imx-dispmix-blk-ctl",
+};
+
+static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
+	struct regmap *regmap;
+	struct imx_blk_ctl *ctl;
+	void __iomem *base;
+
+	ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
+	if (!ctl)
+		return -ENOMEM;
+
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	ctl->regmap = regmap;
+	ctl->dev = dev;
+	mutex_init(&ctl->lock);
+
+	ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
+	if (ctl->num_clks < 0)
+		return ctl->num_clks;
+
+	dev_set_drvdata(dev, ctl);
+	ctl->dev_data = dev_data;
+
+	return imx_blk_ctl_register(dev);
+}
+
+static const struct of_device_id imx_blk_ctl_of_match[] = {
+	{ .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
+	{ .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
+	{ /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
+
+static struct platform_driver imx_blk_ctl_driver = {
+	.probe = imx8mm_blk_ctl_probe,
+	.driver = {
+		.name = "imx8mm-blk-ctl",
+		.of_match_table = of_match_ptr(imx_blk_ctl_of_match),
+		.pm = &imx_blk_ctl_pm_ops,
+	},
+};
+module_platform_driver(imx_blk_ctl_driver);
-- 
2.30.0


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Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> that support in this driver.
>
> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Maybe my TF-A is too old, but I am not able to wake the device from
suspend-to-ram with this series.  I used the device tree from [1] to
enable both the GPCv2 and the blk-ctl stuff.

[1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/

I based both off Shawn's for-next branch.

adam

> ---
>  drivers/soc/imx/Makefile         |   2 +-
>  drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
>  2 files changed, 140 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
>
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index d3d2b49a386c..c260b962f495 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
>  endif
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
> new file mode 100644
> index 000000000000..59443588f892
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> @@ -0,0 +1,139 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2021 NXP
> + */
> +
> +#include <dt-bindings/clock/imx8mm-clock.h>
> +#include <dt-bindings/power/imx8mm-power.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/types.h>
> +#include <linux/pm_domain.h>
> +#include <linux/regmap.h>
> +
> +#include "blk-ctl.h"
> +
> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
> +
> +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
> +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
> +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
> +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
> +
> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> +                      IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> +                      IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> +                      IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> +};
> +
> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> +};
> +
> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> +       .reg_bits               = 32,
> +       .reg_stride             = 4,
> +       .val_bits               = 32,
> +       .max_register           = 0x30,
> +       .fast_io                = true,
> +};
> +
> +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> +       .config = imx8mm_blk_ctl_regmap_config,
> +       .name = "imx-vpumix-blk-ctl",
> +};
> +
> +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> +       .config = imx8mm_blk_ctl_regmap_config,
> +       .name = "imx-dispmix-blk-ctl",
> +};
> +
> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
> +       struct regmap *regmap;
> +       struct imx_blk_ctl *ctl;
> +       void __iomem *base;
> +
> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> +       if (!ctl)
> +               return -ENOMEM;
> +
> +       base = devm_platform_ioremap_resource(pdev, 0);
> +       if (IS_ERR(base))
> +               return PTR_ERR(base);
> +
> +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
> +       if (IS_ERR(regmap))
> +               return PTR_ERR(regmap);
> +
> +       ctl->regmap = regmap;
> +       ctl->dev = dev;
> +       mutex_init(&ctl->lock);
> +
> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> +       if (ctl->num_clks < 0)
> +               return ctl->num_clks;
> +
> +       dev_set_drvdata(dev, ctl);
> +       ctl->dev_data = dev_data;
> +
> +       return imx_blk_ctl_register(dev);
> +}
> +
> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
> +       { /* Sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> +
> +static struct platform_driver imx_blk_ctl_driver = {
> +       .probe = imx8mm_blk_ctl_probe,
> +       .driver = {
> +               .name = "imx8mm-blk-ctl",
> +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
> +               .pm = &imx_blk_ctl_pm_ops,
> +       },
> +};
> +module_platform_driver(imx_blk_ctl_driver);
> --
> 2.30.0
>

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> that support in this driver.
>
> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Maybe my TF-A is too old, but I am not able to wake the device from
suspend-to-ram with this series.  I used the device tree from [1] to
enable both the GPCv2 and the blk-ctl stuff.

[1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/

I based both off Shawn's for-next branch.

adam

> ---
>  drivers/soc/imx/Makefile         |   2 +-
>  drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
>  2 files changed, 140 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
>
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index d3d2b49a386c..c260b962f495 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
>  endif
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
> new file mode 100644
> index 000000000000..59443588f892
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> @@ -0,0 +1,139 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2021 NXP
> + */
> +
> +#include <dt-bindings/clock/imx8mm-clock.h>
> +#include <dt-bindings/power/imx8mm-power.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/types.h>
> +#include <linux/pm_domain.h>
> +#include <linux/regmap.h>
> +
> +#include "blk-ctl.h"
> +
> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
> +
> +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
> +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
> +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
> +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
> +
> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> +                      IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> +                      IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> +                      IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> +};
> +
> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> +};
> +
> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> +       .reg_bits               = 32,
> +       .reg_stride             = 4,
> +       .val_bits               = 32,
> +       .max_register           = 0x30,
> +       .fast_io                = true,
> +};
> +
> +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> +       .config = imx8mm_blk_ctl_regmap_config,
> +       .name = "imx-vpumix-blk-ctl",
> +};
> +
> +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> +       .config = imx8mm_blk_ctl_regmap_config,
> +       .name = "imx-dispmix-blk-ctl",
> +};
> +
> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
> +       struct regmap *regmap;
> +       struct imx_blk_ctl *ctl;
> +       void __iomem *base;
> +
> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> +       if (!ctl)
> +               return -ENOMEM;
> +
> +       base = devm_platform_ioremap_resource(pdev, 0);
> +       if (IS_ERR(base))
> +               return PTR_ERR(base);
> +
> +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
> +       if (IS_ERR(regmap))
> +               return PTR_ERR(regmap);
> +
> +       ctl->regmap = regmap;
> +       ctl->dev = dev;
> +       mutex_init(&ctl->lock);
> +
> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> +       if (ctl->num_clks < 0)
> +               return ctl->num_clks;
> +
> +       dev_set_drvdata(dev, ctl);
> +       ctl->dev_data = dev_data;
> +
> +       return imx_blk_ctl_register(dev);
> +}
> +
> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
> +       { /* Sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> +
> +static struct platform_driver imx_blk_ctl_driver = {
> +       .probe = imx8mm_blk_ctl_probe,
> +       .driver = {
> +               .name = "imx8mm-blk-ctl",
> +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
> +               .pm = &imx_blk_ctl_pm_ops,
> +       },
> +};
> +module_platform_driver(imx_blk_ctl_driver);
> --
> 2.30.0
>

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Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com> wrote:
>
> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> > that support in this driver.
> >
> > Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
>
> Maybe my TF-A is too old, but I am not able to wake the device from
> suspend-to-ram with this series.  I used the device tree from [1] to
> enable both the GPCv2 and the blk-ctl stuff.
>
> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
>
> I based both off Shawn's for-next branch.

I tried to enable USB with the GPCv2 stuff pulled into Shawn's
for-next branch, and my board hangs when USB is loaded, but USB
doesn't use blk-ctl, it just uses GPCv2.

I looked at some of the changes with GPCv2, and I noticed a comment in
the GPCv2 function called imx_pgc_power_up.  The comment reads:

/*
* ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, reg_val,
*   (reg_val & domain->bits.hskack), 0,
*   USEC_PER_MSEC);
* Technically we need the commented code to wait handshake. But that needs
* the BLK-CTL module BUS clk-en bit being set.
*
* There is a separate BLK-CTL module and we will have such a driver for it,
* that driver will set the BUS clk-en bit and handshake will be triggered
* automatically there. Just add a delay and suppose the handshake finish
* after that.
*/

I didn't see a delay here despite the comment saying we should add one.

With the blk-ctl enabled, I attempted to uncomment the above line of
code without much success in preventing the board from hanging.

If BUS clk-en bit needs to be set in order for the handshake to work,
should all these power domains reference it to bring it up?  If we
decide against using the BUS clk-en bit, what should this delay be?

adam
>
> adam
>
> > ---
> >  drivers/soc/imx/Makefile         |   2 +-
> >  drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
> >  2 files changed, 140 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> >
> > diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > index d3d2b49a386c..c260b962f495 100644
> > --- a/drivers/soc/imx/Makefile
> > +++ b/drivers/soc/imx/Makefile
> > @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> >  endif
> >  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> >  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> > diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
> > new file mode 100644
> > index 000000000000..59443588f892
> > --- /dev/null
> > +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > @@ -0,0 +1,139 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2021 NXP
> > + */
> > +
> > +#include <dt-bindings/clock/imx8mm-clock.h>
> > +#include <dt-bindings/power/imx8mm-power.h>
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/mutex.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/slab.h>
> > +#include <linux/types.h>
> > +#include <linux/pm_domain.h>
> > +#include <linux/regmap.h>
> > +
> > +#include "blk-ctl.h"
> > +
> > +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
> > +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
> > +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
> > +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
> > +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
> > +
> > +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
> > +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
> > +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
> > +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
> > +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
> > +
> > +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > +                      IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > +                      IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > +                      IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> > +};
> > +
> > +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> > +};
> > +
> > +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > +       .reg_bits               = 32,
> > +       .reg_stride             = 4,
> > +       .val_bits               = 32,
> > +       .max_register           = 0x30,
> > +       .fast_io                = true,
> > +};
> > +
> > +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
> > +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > +       .config = imx8mm_blk_ctl_regmap_config,
> > +       .name = "imx-vpumix-blk-ctl",
> > +};
> > +
> > +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
> > +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > +       .config = imx8mm_blk_ctl_regmap_config,
> > +       .name = "imx-dispmix-blk-ctl",
> > +};
> > +
> > +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
> > +       struct regmap *regmap;
> > +       struct imx_blk_ctl *ctl;
> > +       void __iomem *base;
> > +
> > +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > +       if (!ctl)
> > +               return -ENOMEM;
> > +
> > +       base = devm_platform_ioremap_resource(pdev, 0);
> > +       if (IS_ERR(base))
> > +               return PTR_ERR(base);
> > +
> > +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
> > +       if (IS_ERR(regmap))
> > +               return PTR_ERR(regmap);
> > +
> > +       ctl->regmap = regmap;
> > +       ctl->dev = dev;
> > +       mutex_init(&ctl->lock);
> > +
> > +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > +       if (ctl->num_clks < 0)
> > +               return ctl->num_clks;
> > +
> > +       dev_set_drvdata(dev, ctl);
> > +       ctl->dev_data = dev_data;
> > +
> > +       return imx_blk_ctl_register(dev);
> > +}
> > +
> > +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
> > +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
> > +       { /* Sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > +
> > +static struct platform_driver imx_blk_ctl_driver = {
> > +       .probe = imx8mm_blk_ctl_probe,
> > +       .driver = {
> > +               .name = "imx8mm-blk-ctl",
> > +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
> > +               .pm = &imx_blk_ctl_pm_ops,
> > +       },
> > +};
> > +module_platform_driver(imx_blk_ctl_driver);
> > --
> > 2.30.0
> >

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com> wrote:
>
> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> > that support in this driver.
> >
> > Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
>
> Maybe my TF-A is too old, but I am not able to wake the device from
> suspend-to-ram with this series.  I used the device tree from [1] to
> enable both the GPCv2 and the blk-ctl stuff.
>
> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
>
> I based both off Shawn's for-next branch.

I tried to enable USB with the GPCv2 stuff pulled into Shawn's
for-next branch, and my board hangs when USB is loaded, but USB
doesn't use blk-ctl, it just uses GPCv2.

I looked at some of the changes with GPCv2, and I noticed a comment in
the GPCv2 function called imx_pgc_power_up.  The comment reads:

/*
* ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, reg_val,
*   (reg_val & domain->bits.hskack), 0,
*   USEC_PER_MSEC);
* Technically we need the commented code to wait handshake. But that needs
* the BLK-CTL module BUS clk-en bit being set.
*
* There is a separate BLK-CTL module and we will have such a driver for it,
* that driver will set the BUS clk-en bit and handshake will be triggered
* automatically there. Just add a delay and suppose the handshake finish
* after that.
*/

I didn't see a delay here despite the comment saying we should add one.

With the blk-ctl enabled, I attempted to uncomment the above line of
code without much success in preventing the board from hanging.

If BUS clk-en bit needs to be set in order for the handshake to work,
should all these power domains reference it to bring it up?  If we
decide against using the BUS clk-en bit, what should this delay be?

adam
>
> adam
>
> > ---
> >  drivers/soc/imx/Makefile         |   2 +-
> >  drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
> >  2 files changed, 140 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> >
> > diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > index d3d2b49a386c..c260b962f495 100644
> > --- a/drivers/soc/imx/Makefile
> > +++ b/drivers/soc/imx/Makefile
> > @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> >  endif
> >  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> >  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> > diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
> > new file mode 100644
> > index 000000000000..59443588f892
> > --- /dev/null
> > +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > @@ -0,0 +1,139 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2021 NXP
> > + */
> > +
> > +#include <dt-bindings/clock/imx8mm-clock.h>
> > +#include <dt-bindings/power/imx8mm-power.h>
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/mutex.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/slab.h>
> > +#include <linux/types.h>
> > +#include <linux/pm_domain.h>
> > +#include <linux/regmap.h>
> > +
> > +#include "blk-ctl.h"
> > +
> > +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
> > +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
> > +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
> > +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
> > +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
> > +
> > +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
> > +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
> > +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
> > +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
> > +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
> > +
> > +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > +                      IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > +                      IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > +                      IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> > +};
> > +
> > +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
> > +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> > +};
> > +
> > +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > +       .reg_bits               = 32,
> > +       .reg_stride             = 4,
> > +       .val_bits               = 32,
> > +       .max_register           = 0x30,
> > +       .fast_io                = true,
> > +};
> > +
> > +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
> > +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > +       .config = imx8mm_blk_ctl_regmap_config,
> > +       .name = "imx-vpumix-blk-ctl",
> > +};
> > +
> > +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
> > +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > +       .config = imx8mm_blk_ctl_regmap_config,
> > +       .name = "imx-dispmix-blk-ctl",
> > +};
> > +
> > +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
> > +       struct regmap *regmap;
> > +       struct imx_blk_ctl *ctl;
> > +       void __iomem *base;
> > +
> > +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > +       if (!ctl)
> > +               return -ENOMEM;
> > +
> > +       base = devm_platform_ioremap_resource(pdev, 0);
> > +       if (IS_ERR(base))
> > +               return PTR_ERR(base);
> > +
> > +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
> > +       if (IS_ERR(regmap))
> > +               return PTR_ERR(regmap);
> > +
> > +       ctl->regmap = regmap;
> > +       ctl->dev = dev;
> > +       mutex_init(&ctl->lock);
> > +
> > +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > +       if (ctl->num_clks < 0)
> > +               return ctl->num_clks;
> > +
> > +       dev_set_drvdata(dev, ctl);
> > +       ctl->dev_data = dev_data;
> > +
> > +       return imx_blk_ctl_register(dev);
> > +}
> > +
> > +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
> > +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
> > +       { /* Sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > +
> > +static struct platform_driver imx_blk_ctl_driver = {
> > +       .probe = imx8mm_blk_ctl_probe,
> > +       .driver = {
> > +               .name = "imx8mm-blk-ctl",
> > +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
> > +               .pm = &imx_blk_ctl_pm_ops,
> > +       },
> > +};
> > +module_platform_driver(imx_blk_ctl_driver);
> > --
> > 2.30.0
> >

_______________________________________________
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linux-arm-kernel@lists.infradead.org
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Re: [PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Adam Ford]

On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX8MM introduces an IP named BLK_CTL and usually is comprised of
> some GPRs.
>
> The GPRs has some clock bits and reset bits, but here we take it
> as virtual PDs, because of the clock and power domain A/B lock issue
> when taking it as a clock controller.
>
> For some bits, it might be good to also make it as a reset controller,
> but to i.MX8MM, we not add that support for now.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/soc/imx/Makefile  |   2 +-
>  drivers/soc/imx/blk-ctl.c | 325 ++++++++++++++++++++++++++++++++++++++
>  drivers/soc/imx/blk-ctl.h |  85 ++++++++++
>  3 files changed, 411 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/soc/imx/blk-ctl.c
>  create mode 100644 drivers/soc/imx/blk-ctl.h
>
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index 078dc918f4f3..d3d2b49a386c 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
>  endif
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> diff --git a/drivers/soc/imx/blk-ctl.c b/drivers/soc/imx/blk-ctl.c
> new file mode 100644
> index 000000000000..3464e4cf7fe6
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.c
> @@ -0,0 +1,325 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2021 NXP.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/pm_domain.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +
> +#include "blk-ctl.h"
> +
> +static inline struct imx_blk_ctl_domain *to_imx_blk_ctl_pd(struct generic_pm_domain *genpd)
> +{
> +       return container_of(genpd, struct imx_blk_ctl_domain, genpd);
> +}
> +
> +static int imx_blk_ctl_enable_hsk(struct device *dev)
> +{
> +       struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +       const struct imx_blk_ctl_hw *hw = blk_ctl->dev_data->hw_hsk;
> +       struct regmap *regmap = blk_ctl->regmap;
> +       int ret;
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +               ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +       /* Wait for handshake */
> +       udelay(5);
> +
> +       return ret;
> +}
> +
> +static int imx_blk_ctl_power_on(struct generic_pm_domain *domain)
> +{
> +       struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +       struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +       struct regmap *regmap = blk_ctl->regmap;
> +       const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +       int ret;
> +
> +       mutex_lock(&blk_ctl->lock);
> +
> +       ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +       if (ret) {
> +               mutex_unlock(&blk_ctl->lock);
> +               return ret;
> +       }
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +               ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +               if (ret) {
> +                       dev_err(blk_ctl->dev, "Hankshake failed when power on\n");

handshake

> +                       goto disable_clk;
> +               }
> +       }
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +               ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +               if (ret)
> +                       goto disable_clk;
> +
> +               /* Wait for reset propagate */
> +               udelay(5);
> +
> +               ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
> +               if (ret)
> +                       goto disable_clk;
> +       }
> +
> +       ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +disable_clk:
> +       clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +       mutex_unlock(&blk_ctl->lock);
> +
> +       return ret;
> +}
> +
> +static int imx_blk_ctl_power_off(struct generic_pm_domain *domain)
> +{
> +       struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +       struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +       struct regmap *regmap = blk_ctl->regmap;
> +       const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +       int ret;
> +
> +       mutex_lock(&blk_ctl->lock);
> +
> +       ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +       if (ret) {
> +               mutex_unlock(&blk_ctl->lock);
> +               return ret;
> +       }
> +
> +       if (!(hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)) {
> +               ret = regmap_clear_bits(regmap, hw->offset, hw->mask);
> +               if (ret)
> +                       goto disable_clk;
> +
> +               if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +                       ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +                       if (ret)
> +                               goto disable_clk;
> +               }
> +       }
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +               ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +               if (ret)
> +                       dev_err(blk_ctl->dev, "Hankshake failed when power off\n");

handshake

> +       }
> +
> +disable_clk:
> +       clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +       mutex_unlock(&blk_ctl->lock);
> +
> +       return ret;
> +}
> +
> +static int imx_blk_ctl_probe(struct platform_device *pdev)
> +{
> +       struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +       struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +       struct generic_pm_domain *parent_genpd;
> +       struct device *dev = &pdev->dev;
> +       struct device *active_pd;
> +       int ret;
> +
> +       pdev->dev.of_node = blk_ctl->dev->of_node;
> +
> +       if (domain->hw->active_pd_name) {
> +               active_pd = dev_pm_domain_attach_by_name(dev, domain->hw->active_pd_name);
> +               if (IS_ERR_OR_NULL(active_pd)) {
> +                       ret = PTR_ERR(active_pd) ? : -ENODATA;
> +                       pdev->dev.of_node = NULL;
> +                       return ret;
> +               }
> +
> +               domain->active_pd = active_pd;
> +       } else {
> +               if (!blk_ctl->bus_domain) {
> +                       pdev->dev.of_node = NULL;
> +                       return -EPROBE_DEFER;
> +               }
> +       }
> +
> +       if (domain->hw->active_pd_name)
> +               parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +       else
> +               parent_genpd = blk_ctl->bus_domain;
> +
> +       if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
> +               dev_warn(dev, "failed to add subdomain: %s\n", domain->genpd.name);
> +       } else {
> +               mutex_lock(&blk_ctl->lock);
> +               domain->hooked = true;
> +               mutex_unlock(&blk_ctl->lock);
> +       }
> +
> +       return 0;
> +}
> +
> +static int imx_blk_ctl_remove(struct platform_device *pdev)
> +{
> +       struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +       struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +       struct generic_pm_domain *parent_genpd;
> +       struct device *active_pd;
> +
> +       if (domain->hw->active_pd_name)
> +               parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +       else
> +               parent_genpd = blk_ctl->bus_domain;
> +
> +       pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
> +
> +       mutex_lock(&blk_ctl->lock);
> +       domain->hooked = false;
> +       mutex_unlock(&blk_ctl->lock);
> +
> +       if (domain->hw->active_pd_name)
> +               dev_pm_domain_detach(domain->active_pd, false);
> +
> +       return 0;
> +}
> +
> +static const struct platform_device_id imx_blk_ctl_id[] = {
> +       { "imx-vpumix-blk-ctl", },
> +       { "imx-dispmix-blk-ctl", },
> +       { },
> +};
> +
> +static struct platform_driver imx_blk_ctl_driver = {
> +       .driver = {
> +               .name = "imx-blk-ctl",
> +       },
> +       .probe    = imx_blk_ctl_probe,
> +       .remove   = imx_blk_ctl_remove,
> +       .id_table = imx_blk_ctl_id,
> +};
> +builtin_platform_driver(imx_blk_ctl_driver)
> +
> +static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct of_phandle_args *genpdspec,
> +                                                        void *data)
> +{
> +       struct genpd_onecell_data *genpd_data = data;
> +       unsigned int idx = genpdspec->args[0];
> +       struct imx_blk_ctl_domain *domain;
> +       struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
> +
> +       if (genpdspec->args_count != 1)
> +               return ERR_PTR(-EINVAL);
> +
> +       if (idx >= genpd_data->num_domains)
> +               return ERR_PTR(-EINVAL);
> +
> +       if (!genpd_data->domains[idx])
> +               return ERR_PTR(-ENOENT);
> +
> +       domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
> +
> +       mutex_lock(&domain->blk_ctl->lock);
> +       if (domain->hooked)
> +               genpd = genpd_data->domains[idx];
> +       mutex_unlock(&domain->blk_ctl->lock);
> +
> +       return genpd;
> +}
> +
> +int imx_blk_ctl_register(struct device *dev)
> +{
> +       struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +       const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
> +       int num = dev_data->pds_num;
> +       struct imx_blk_ctl_domain *domain;
> +       struct generic_pm_domain *genpd;
> +       struct platform_device *pd_pdev;
> +       int domain_index;
> +       int i, ret;
> +
> +       blk_ctl->onecell_data.num_domains = num;
> +       blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
> +       blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct generic_pm_domain *),
> +                                                    GFP_KERNEL);
> +       if (!blk_ctl->onecell_data.domains)
> +               return -ENOMEM;
> +
> +       for (i = 0; i < num; i++) {
> +               domain_index = dev_data->pds[i].id;
> +               if (domain_index >= num) {
> +                       dev_warn(dev, "Domain index %d is out of bounds\n", domain_index);
> +                       continue;
> +               }
> +
> +               domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain), GFP_KERNEL);
> +               if (!domain)
> +                       goto error;
> +
> +               pd_pdev = platform_device_alloc(dev_data->name, domain_index);
> +               if (!pd_pdev) {
> +                       dev_err(dev, "Failed to allocate platform device\n");
> +                       goto error;
> +               }
> +
> +               pd_pdev->dev.platform_data = domain;
> +
> +               domain->blk_ctl = blk_ctl;
> +               domain->hw = &dev_data->pds[i];
> +               domain->id = domain_index;
> +               domain->genpd.name = dev_data->pds[i].name;
> +               domain->genpd.power_off = imx_blk_ctl_power_off;
> +               domain->genpd.power_on = imx_blk_ctl_power_on;
> +               domain->dev = &pd_pdev->dev;
> +               domain->hooked = false;
> +
> +               ret = pm_genpd_init(&domain->genpd, NULL, true);
> +               pd_pdev->dev.parent = dev;
> +
> +               if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
> +                       blk_ctl->bus_domain = &domain->genpd;
> +
> +               ret = platform_device_add(pd_pdev);
> +               if (ret) {
> +                       platform_device_put(pd_pdev);
> +                       goto error;
> +               }
> +               blk_ctl->onecell_data.domains[i] = &domain->genpd;
> +       }
> +
> +       return of_genpd_add_provider_onecell(dev->of_node, &blk_ctl->onecell_data);
> +
> +error:
> +       for (; i >= 0; i--) {
> +               genpd = blk_ctl->onecell_data.domains[i];
> +               if (!genpd)
> +                       continue;
> +               domain = to_imx_blk_ctl_pd(genpd);
> +               if (domain->dev)
> +                       platform_device_put(to_platform_device(domain->dev));
> +       }
> +       return ret;
> +}
> +EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
> +
> +const struct dev_pm_ops imx_blk_ctl_pm_ops = {
> +       SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> +};
> +EXPORT_SYMBOL_GPL(imx_blk_ctl_pm_ops);
> diff --git a/drivers/soc/imx/blk-ctl.h b/drivers/soc/imx/blk-ctl.h
> new file mode 100644
> index 000000000000..6780d00ec8c5
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.h
> @@ -0,0 +1,85 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __SOC_IMX_BLK_CTL_H
> +#define __SOC_IMX_BLK_CTL_H
> +
> +enum imx_blk_ctl_pd_type {
> +       BLK_CTL_PD,
> +};
> +
> +struct imx_blk_ctl_hw {
> +       int type;
> +       char *name;
> +       char *active_pd_name;
> +       u32 offset;
> +       u32 mask;
> +       u32 flags;
> +       u32 id;
> +       u32 rst_offset;
> +       u32 rst_mask;
> +       u32 errata;
> +};
> +
> +struct imx_blk_ctl_domain {
> +       struct generic_pm_domain genpd;
> +       struct device *active_pd;
> +       struct imx_blk_ctl *blk_ctl;
> +       struct imx_blk_ctl_hw *hw;
> +       struct device *dev;
> +       bool hooked;
> +       u32 id;
> +};
> +
> +struct imx_blk_ctl_dev_data {
> +       struct regmap_config config;
> +       struct imx_blk_ctl_hw *pds;
> +       struct imx_blk_ctl_hw *hw_hsk;
> +       u32 pds_num;
> +       u32 max_num;
> +       char *name;
> +};
> +
> +struct imx_blk_ctl {
> +       struct device *dev;
> +       struct regmap *regmap;
> +       struct genpd_onecell_data onecell_data;
> +       const struct imx_blk_ctl_dev_data *dev_data;
> +       struct clk_bulk_data *clks;
> +       u32 num_clks;
> +       struct generic_pm_domain *bus_domain;
> +
> +       struct mutex lock;
> +};
> +
> +#define IMX_BLK_CTL(_type, _name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,     \
> +                   _flags, _errata)                                                            \
> +       {                                                                                       \
> +               .type = _type,                                                                  \
> +               .name = _name,                                                                  \
> +               .active_pd_name = _active_pd,                                                   \
> +               .id = _id,                                                                      \
> +               .offset = _offset,                                                              \
> +               .mask = _mask,                                                                  \
> +               .flags = _flags,                                                                \
> +               .rst_offset = _rst_offset,                                                      \
> +               .rst_mask = _rst_mask,                                                          \
> +               .errata = _errata,                                                              \
> +       }
> +
> +#define IMX_BLK_CTL_PD(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask, _flags) \
> +       IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,            \
> +                   _rst_mask, _flags, 0)
> +
> +#define IMX_BLK_CTL_PD_ERRATA(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,  \
> +                             _flags, _errata)                                                  \
> +       IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,            \
> +                   _rst_mask, _flags, _errata)
> +
> +int imx_blk_ctl_register(struct device *dev);
> +
> +#define IMX_BLK_CTL_PD_HANDSHAKE       BIT(0)
> +#define IMX_BLK_CTL_PD_RESET           BIT(1)
> +#define IMX_BLK_CTL_PD_BUS             BIT(2)
> +
> +const extern struct dev_pm_ops imx_blk_ctl_pm_ops;
> +
> +#endif
> --
> 2.30.0
>

Re: [PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Adam Ford]

On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX8MM introduces an IP named BLK_CTL and usually is comprised of
> some GPRs.
>
> The GPRs has some clock bits and reset bits, but here we take it
> as virtual PDs, because of the clock and power domain A/B lock issue
> when taking it as a clock controller.
>
> For some bits, it might be good to also make it as a reset controller,
> but to i.MX8MM, we not add that support for now.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/soc/imx/Makefile  |   2 +-
>  drivers/soc/imx/blk-ctl.c | 325 ++++++++++++++++++++++++++++++++++++++
>  drivers/soc/imx/blk-ctl.h |  85 ++++++++++
>  3 files changed, 411 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/soc/imx/blk-ctl.c
>  create mode 100644 drivers/soc/imx/blk-ctl.h
>
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index 078dc918f4f3..d3d2b49a386c 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
>  endif
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> diff --git a/drivers/soc/imx/blk-ctl.c b/drivers/soc/imx/blk-ctl.c
> new file mode 100644
> index 000000000000..3464e4cf7fe6
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.c
> @@ -0,0 +1,325 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2021 NXP.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/pm_domain.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +
> +#include "blk-ctl.h"
> +
> +static inline struct imx_blk_ctl_domain *to_imx_blk_ctl_pd(struct generic_pm_domain *genpd)
> +{
> +       return container_of(genpd, struct imx_blk_ctl_domain, genpd);
> +}
> +
> +static int imx_blk_ctl_enable_hsk(struct device *dev)
> +{
> +       struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +       const struct imx_blk_ctl_hw *hw = blk_ctl->dev_data->hw_hsk;
> +       struct regmap *regmap = blk_ctl->regmap;
> +       int ret;
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +               ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +       /* Wait for handshake */
> +       udelay(5);
> +
> +       return ret;
> +}
> +
> +static int imx_blk_ctl_power_on(struct generic_pm_domain *domain)
> +{
> +       struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +       struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +       struct regmap *regmap = blk_ctl->regmap;
> +       const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +       int ret;
> +
> +       mutex_lock(&blk_ctl->lock);
> +
> +       ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +       if (ret) {
> +               mutex_unlock(&blk_ctl->lock);
> +               return ret;
> +       }
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +               ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +               if (ret) {
> +                       dev_err(blk_ctl->dev, "Hankshake failed when power on\n");

handshake

> +                       goto disable_clk;
> +               }
> +       }
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +               ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +               if (ret)
> +                       goto disable_clk;
> +
> +               /* Wait for reset propagate */
> +               udelay(5);
> +
> +               ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask, hw->rst_mask);
> +               if (ret)
> +                       goto disable_clk;
> +       }
> +
> +       ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +disable_clk:
> +       clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +       mutex_unlock(&blk_ctl->lock);
> +
> +       return ret;
> +}
> +
> +static int imx_blk_ctl_power_off(struct generic_pm_domain *domain)
> +{
> +       struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +       struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +       struct regmap *regmap = blk_ctl->regmap;
> +       const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +       int ret;
> +
> +       mutex_lock(&blk_ctl->lock);
> +
> +       ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +       if (ret) {
> +               mutex_unlock(&blk_ctl->lock);
> +               return ret;
> +       }
> +
> +       if (!(hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)) {
> +               ret = regmap_clear_bits(regmap, hw->offset, hw->mask);
> +               if (ret)
> +                       goto disable_clk;
> +
> +               if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +                       ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +                       if (ret)
> +                               goto disable_clk;
> +               }
> +       }
> +
> +       if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +               ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +               if (ret)
> +                       dev_err(blk_ctl->dev, "Hankshake failed when power off\n");

handshake

> +       }
> +
> +disable_clk:
> +       clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +       mutex_unlock(&blk_ctl->lock);
> +
> +       return ret;
> +}
> +
> +static int imx_blk_ctl_probe(struct platform_device *pdev)
> +{
> +       struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +       struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +       struct generic_pm_domain *parent_genpd;
> +       struct device *dev = &pdev->dev;
> +       struct device *active_pd;
> +       int ret;
> +
> +       pdev->dev.of_node = blk_ctl->dev->of_node;
> +
> +       if (domain->hw->active_pd_name) {
> +               active_pd = dev_pm_domain_attach_by_name(dev, domain->hw->active_pd_name);
> +               if (IS_ERR_OR_NULL(active_pd)) {
> +                       ret = PTR_ERR(active_pd) ? : -ENODATA;
> +                       pdev->dev.of_node = NULL;
> +                       return ret;
> +               }
> +
> +               domain->active_pd = active_pd;
> +       } else {
> +               if (!blk_ctl->bus_domain) {
> +                       pdev->dev.of_node = NULL;
> +                       return -EPROBE_DEFER;
> +               }
> +       }
> +
> +       if (domain->hw->active_pd_name)
> +               parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +       else
> +               parent_genpd = blk_ctl->bus_domain;
> +
> +       if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
> +               dev_warn(dev, "failed to add subdomain: %s\n", domain->genpd.name);
> +       } else {
> +               mutex_lock(&blk_ctl->lock);
> +               domain->hooked = true;
> +               mutex_unlock(&blk_ctl->lock);
> +       }
> +
> +       return 0;
> +}
> +
> +static int imx_blk_ctl_remove(struct platform_device *pdev)
> +{
> +       struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +       struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +       struct generic_pm_domain *parent_genpd;
> +       struct device *active_pd;
> +
> +       if (domain->hw->active_pd_name)
> +               parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +       else
> +               parent_genpd = blk_ctl->bus_domain;
> +
> +       pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
> +
> +       mutex_lock(&blk_ctl->lock);
> +       domain->hooked = false;
> +       mutex_unlock(&blk_ctl->lock);
> +
> +       if (domain->hw->active_pd_name)
> +               dev_pm_domain_detach(domain->active_pd, false);
> +
> +       return 0;
> +}
> +
> +static const struct platform_device_id imx_blk_ctl_id[] = {
> +       { "imx-vpumix-blk-ctl", },
> +       { "imx-dispmix-blk-ctl", },
> +       { },
> +};
> +
> +static struct platform_driver imx_blk_ctl_driver = {
> +       .driver = {
> +               .name = "imx-blk-ctl",
> +       },
> +       .probe    = imx_blk_ctl_probe,
> +       .remove   = imx_blk_ctl_remove,
> +       .id_table = imx_blk_ctl_id,
> +};
> +builtin_platform_driver(imx_blk_ctl_driver)
> +
> +static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct of_phandle_args *genpdspec,
> +                                                        void *data)
> +{
> +       struct genpd_onecell_data *genpd_data = data;
> +       unsigned int idx = genpdspec->args[0];
> +       struct imx_blk_ctl_domain *domain;
> +       struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
> +
> +       if (genpdspec->args_count != 1)
> +               return ERR_PTR(-EINVAL);
> +
> +       if (idx >= genpd_data->num_domains)
> +               return ERR_PTR(-EINVAL);
> +
> +       if (!genpd_data->domains[idx])
> +               return ERR_PTR(-ENOENT);
> +
> +       domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
> +
> +       mutex_lock(&domain->blk_ctl->lock);
> +       if (domain->hooked)
> +               genpd = genpd_data->domains[idx];
> +       mutex_unlock(&domain->blk_ctl->lock);
> +
> +       return genpd;
> +}
> +
> +int imx_blk_ctl_register(struct device *dev)
> +{
> +       struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +       const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
> +       int num = dev_data->pds_num;
> +       struct imx_blk_ctl_domain *domain;
> +       struct generic_pm_domain *genpd;
> +       struct platform_device *pd_pdev;
> +       int domain_index;
> +       int i, ret;
> +
> +       blk_ctl->onecell_data.num_domains = num;
> +       blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
> +       blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct generic_pm_domain *),
> +                                                    GFP_KERNEL);
> +       if (!blk_ctl->onecell_data.domains)
> +               return -ENOMEM;
> +
> +       for (i = 0; i < num; i++) {
> +               domain_index = dev_data->pds[i].id;
> +               if (domain_index >= num) {
> +                       dev_warn(dev, "Domain index %d is out of bounds\n", domain_index);
> +                       continue;
> +               }
> +
> +               domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain), GFP_KERNEL);
> +               if (!domain)
> +                       goto error;
> +
> +               pd_pdev = platform_device_alloc(dev_data->name, domain_index);
> +               if (!pd_pdev) {
> +                       dev_err(dev, "Failed to allocate platform device\n");
> +                       goto error;
> +               }
> +
> +               pd_pdev->dev.platform_data = domain;
> +
> +               domain->blk_ctl = blk_ctl;
> +               domain->hw = &dev_data->pds[i];
> +               domain->id = domain_index;
> +               domain->genpd.name = dev_data->pds[i].name;
> +               domain->genpd.power_off = imx_blk_ctl_power_off;
> +               domain->genpd.power_on = imx_blk_ctl_power_on;
> +               domain->dev = &pd_pdev->dev;
> +               domain->hooked = false;
> +
> +               ret = pm_genpd_init(&domain->genpd, NULL, true);
> +               pd_pdev->dev.parent = dev;
> +
> +               if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
> +                       blk_ctl->bus_domain = &domain->genpd;
> +
> +               ret = platform_device_add(pd_pdev);
> +               if (ret) {
> +                       platform_device_put(pd_pdev);
> +                       goto error;
> +               }
> +               blk_ctl->onecell_data.domains[i] = &domain->genpd;
> +       }
> +
> +       return of_genpd_add_provider_onecell(dev->of_node, &blk_ctl->onecell_data);
> +
> +error:
> +       for (; i >= 0; i--) {
> +               genpd = blk_ctl->onecell_data.domains[i];
> +               if (!genpd)
> +                       continue;
> +               domain = to_imx_blk_ctl_pd(genpd);
> +               if (domain->dev)
> +                       platform_device_put(to_platform_device(domain->dev));
> +       }
> +       return ret;
> +}
> +EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
> +
> +const struct dev_pm_ops imx_blk_ctl_pm_ops = {
> +       SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> +};
> +EXPORT_SYMBOL_GPL(imx_blk_ctl_pm_ops);
> diff --git a/drivers/soc/imx/blk-ctl.h b/drivers/soc/imx/blk-ctl.h
> new file mode 100644
> index 000000000000..6780d00ec8c5
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.h
> @@ -0,0 +1,85 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __SOC_IMX_BLK_CTL_H
> +#define __SOC_IMX_BLK_CTL_H
> +
> +enum imx_blk_ctl_pd_type {
> +       BLK_CTL_PD,
> +};
> +
> +struct imx_blk_ctl_hw {
> +       int type;
> +       char *name;
> +       char *active_pd_name;
> +       u32 offset;
> +       u32 mask;
> +       u32 flags;
> +       u32 id;
> +       u32 rst_offset;
> +       u32 rst_mask;
> +       u32 errata;
> +};
> +
> +struct imx_blk_ctl_domain {
> +       struct generic_pm_domain genpd;
> +       struct device *active_pd;
> +       struct imx_blk_ctl *blk_ctl;
> +       struct imx_blk_ctl_hw *hw;
> +       struct device *dev;
> +       bool hooked;
> +       u32 id;
> +};
> +
> +struct imx_blk_ctl_dev_data {
> +       struct regmap_config config;
> +       struct imx_blk_ctl_hw *pds;
> +       struct imx_blk_ctl_hw *hw_hsk;
> +       u32 pds_num;
> +       u32 max_num;
> +       char *name;
> +};
> +
> +struct imx_blk_ctl {
> +       struct device *dev;
> +       struct regmap *regmap;
> +       struct genpd_onecell_data onecell_data;
> +       const struct imx_blk_ctl_dev_data *dev_data;
> +       struct clk_bulk_data *clks;
> +       u32 num_clks;
> +       struct generic_pm_domain *bus_domain;
> +
> +       struct mutex lock;
> +};
> +
> +#define IMX_BLK_CTL(_type, _name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,     \
> +                   _flags, _errata)                                                            \
> +       {                                                                                       \
> +               .type = _type,                                                                  \
> +               .name = _name,                                                                  \
> +               .active_pd_name = _active_pd,                                                   \
> +               .id = _id,                                                                      \
> +               .offset = _offset,                                                              \
> +               .mask = _mask,                                                                  \
> +               .flags = _flags,                                                                \
> +               .rst_offset = _rst_offset,                                                      \
> +               .rst_mask = _rst_mask,                                                          \
> +               .errata = _errata,                                                              \
> +       }
> +
> +#define IMX_BLK_CTL_PD(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask, _flags) \
> +       IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,            \
> +                   _rst_mask, _flags, 0)
> +
> +#define IMX_BLK_CTL_PD_ERRATA(_name, _active_pd, _id, _offset, _mask, _rst_offset, _rst_mask,  \
> +                             _flags, _errata)                                                  \
> +       IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask, _rst_offset,            \
> +                   _rst_mask, _flags, _errata)
> +
> +int imx_blk_ctl_register(struct device *dev);
> +
> +#define IMX_BLK_CTL_PD_HANDSHAKE       BIT(0)
> +#define IMX_BLK_CTL_PD_RESET           BIT(1)
> +#define IMX_BLK_CTL_PD_BUS             BIT(2)
> +
> +const extern struct dev_pm_ops imx_blk_ctl_pm_ops;
> +
> +#endif
> --
> 2.30.0
>

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Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

On 2021/6/15 3:29, Adam Ford wrote:
> On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com> wrote:
>>
>> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>>>
>>> From: Peng Fan <peng.fan@nxp.com>
>>>
>>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
>>> that support in this driver.
>>>
>>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
>>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
>>
>> Maybe my TF-A is too old, but I am not able to wake the device from
>> suspend-to-ram with this series.  I used the device tree from [1] to
>> enable both the GPCv2 and the blk-ctl stuff.
>>
>> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
>>
>> I based both off Shawn's for-next branch.
> 
> I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> for-next branch, and my board hangs when USB is loaded, but USB
> doesn't use blk-ctl, it just uses GPCv2.
> 
> I looked at some of the changes with GPCv2, and I noticed a comment in
> the GPCv2 function called imx_pgc_power_up.  The comment reads:
> 
> /*
> * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, reg_val,
> *   (reg_val & domain->bits.hskack), 0,
> *   USEC_PER_MSEC);
> * Technically we need the commented code to wait handshake. But that needs
> * the BLK-CTL module BUS clk-en bit being set.
> *
> * There is a separate BLK-CTL module and we will have such a driver for it,
> * that driver will set the BUS clk-en bit and handshake will be triggered
> * automatically there. Just add a delay and suppose the handshake finish
> * after that.
> */
> 
> I didn't see a delay here despite the comment saying we should add one.
> 
> With the blk-ctl enabled, I attempted to uncomment the above line of
> code without much success in preventing the board from hanging.
> 
> If BUS clk-en bit needs to be set in order for the handshake to work,
> should all these power domains reference it to bring it up?  If we
> decide against using the BUS clk-en bit, what should this delay be?

It is only for power domain has mix and need delay for the handshake.
USB no need that handshake.

Could you post a github branch, then I could give a look?

Thanks,
Peng.

> 
> adam
>>
>> adam
>>
>>> ---
>>>   drivers/soc/imx/Makefile         |   2 +-
>>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
>>>   2 files changed, 140 insertions(+), 1 deletion(-)
>>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
>>>
>>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
>>> index d3d2b49a386c..c260b962f495 100644
>>> --- a/drivers/soc/imx/Makefile
>>> +++ b/drivers/soc/imx/Makefile
>>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
>>>   endif
>>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
>>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
>>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
>>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
>>> new file mode 100644
>>> index 000000000000..59443588f892
>>> --- /dev/null
>>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
>>> @@ -0,0 +1,139 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * Copyright 2021 NXP
>>> + */
>>> +
>>> +#include <dt-bindings/clock/imx8mm-clock.h>
>>> +#include <dt-bindings/power/imx8mm-power.h>
>>> +#include <linux/clk.h>
>>> +#include <linux/err.h>
>>> +#include <linux/io.h>
>>> +#include <linux/module.h>
>>> +#include <linux/mutex.h>
>>> +#include <linux/of_address.h>
>>> +#include <linux/of_device.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/slab.h>
>>> +#include <linux/types.h>
>>> +#include <linux/pm_domain.h>
>>> +#include <linux/regmap.h>
>>> +
>>> +#include "blk-ctl.h"
>>> +
>>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
>>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
>>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
>>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
>>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
>>> +
>>> +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
>>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
>>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
>>> +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
>>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
>>> +
>>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
>>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
>>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
>>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
>>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
>>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
>>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
>>> +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
>>> +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
>>> +};
>>> +
>>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
>>> +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
>>> +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
>>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
>>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
>>> +};
>>> +
>>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
>>> +       .reg_bits               = 32,
>>> +       .reg_stride             = 4,
>>> +       .val_bits               = 32,
>>> +       .max_register           = 0x30,
>>> +       .fast_io                = true,
>>> +};
>>> +
>>> +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
>>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
>>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
>>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
>>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
>>> +       .config = imx8mm_blk_ctl_regmap_config,
>>> +       .name = "imx-vpumix-blk-ctl",
>>> +};
>>> +
>>> +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
>>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
>>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
>>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
>>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
>>> +       .config = imx8mm_blk_ctl_regmap_config,
>>> +       .name = "imx-dispmix-blk-ctl",
>>> +};
>>> +
>>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
>>> +{
>>> +       struct device *dev = &pdev->dev;
>>> +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
>>> +       struct regmap *regmap;
>>> +       struct imx_blk_ctl *ctl;
>>> +       void __iomem *base;
>>> +
>>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
>>> +       if (!ctl)
>>> +               return -ENOMEM;
>>> +
>>> +       base = devm_platform_ioremap_resource(pdev, 0);
>>> +       if (IS_ERR(base))
>>> +               return PTR_ERR(base);
>>> +
>>> +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
>>> +       if (IS_ERR(regmap))
>>> +               return PTR_ERR(regmap);
>>> +
>>> +       ctl->regmap = regmap;
>>> +       ctl->dev = dev;
>>> +       mutex_init(&ctl->lock);
>>> +
>>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
>>> +       if (ctl->num_clks < 0)
>>> +               return ctl->num_clks;
>>> +
>>> +       dev_set_drvdata(dev, ctl);
>>> +       ctl->dev_data = dev_data;
>>> +
>>> +       return imx_blk_ctl_register(dev);
>>> +}
>>> +
>>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
>>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
>>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
>>> +       { /* Sentinel */ }
>>> +};
>>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
>>> +
>>> +static struct platform_driver imx_blk_ctl_driver = {
>>> +       .probe = imx8mm_blk_ctl_probe,
>>> +       .driver = {
>>> +               .name = "imx8mm-blk-ctl",
>>> +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
>>> +               .pm = &imx_blk_ctl_pm_ops,
>>> +       },
>>> +};
>>> +module_platform_driver(imx_blk_ctl_driver);
>>> --
>>> 2.30.0
>>>

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

On 2021/6/15 3:29, Adam Ford wrote:
> On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com> wrote:
>>
>> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>>>
>>> From: Peng Fan <peng.fan@nxp.com>
>>>
>>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
>>> that support in this driver.
>>>
>>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
>>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
>>
>> Maybe my TF-A is too old, but I am not able to wake the device from
>> suspend-to-ram with this series.  I used the device tree from [1] to
>> enable both the GPCv2 and the blk-ctl stuff.
>>
>> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
>>
>> I based both off Shawn's for-next branch.
> 
> I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> for-next branch, and my board hangs when USB is loaded, but USB
> doesn't use blk-ctl, it just uses GPCv2.
> 
> I looked at some of the changes with GPCv2, and I noticed a comment in
> the GPCv2 function called imx_pgc_power_up.  The comment reads:
> 
> /*
> * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, reg_val,
> *   (reg_val & domain->bits.hskack), 0,
> *   USEC_PER_MSEC);
> * Technically we need the commented code to wait handshake. But that needs
> * the BLK-CTL module BUS clk-en bit being set.
> *
> * There is a separate BLK-CTL module and we will have such a driver for it,
> * that driver will set the BUS clk-en bit and handshake will be triggered
> * automatically there. Just add a delay and suppose the handshake finish
> * after that.
> */
> 
> I didn't see a delay here despite the comment saying we should add one.
> 
> With the blk-ctl enabled, I attempted to uncomment the above line of
> code without much success in preventing the board from hanging.
> 
> If BUS clk-en bit needs to be set in order for the handshake to work,
> should all these power domains reference it to bring it up?  If we
> decide against using the BUS clk-en bit, what should this delay be?

It is only for power domain has mix and need delay for the handshake.
USB no need that handshake.

Could you post a github branch, then I could give a look?

Thanks,
Peng.

> 
> adam
>>
>> adam
>>
>>> ---
>>>   drivers/soc/imx/Makefile         |   2 +-
>>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
>>>   2 files changed, 140 insertions(+), 1 deletion(-)
>>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
>>>
>>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
>>> index d3d2b49a386c..c260b962f495 100644
>>> --- a/drivers/soc/imx/Makefile
>>> +++ b/drivers/soc/imx/Makefile
>>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
>>>   endif
>>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
>>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
>>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
>>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
>>> new file mode 100644
>>> index 000000000000..59443588f892
>>> --- /dev/null
>>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
>>> @@ -0,0 +1,139 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * Copyright 2021 NXP
>>> + */
>>> +
>>> +#include <dt-bindings/clock/imx8mm-clock.h>
>>> +#include <dt-bindings/power/imx8mm-power.h>
>>> +#include <linux/clk.h>
>>> +#include <linux/err.h>
>>> +#include <linux/io.h>
>>> +#include <linux/module.h>
>>> +#include <linux/mutex.h>
>>> +#include <linux/of_address.h>
>>> +#include <linux/of_device.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/slab.h>
>>> +#include <linux/types.h>
>>> +#include <linux/pm_domain.h>
>>> +#include <linux/regmap.h>
>>> +
>>> +#include "blk-ctl.h"
>>> +
>>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
>>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
>>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
>>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
>>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
>>> +
>>> +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
>>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
>>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
>>> +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
>>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
>>> +
>>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
>>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
>>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
>>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
>>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
>>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
>>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
>>> +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
>>> +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
>>> +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
>>> +};
>>> +
>>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
>>> +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
>>> +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
>>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
>>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
>>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
>>> +};
>>> +
>>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
>>> +       .reg_bits               = 32,
>>> +       .reg_stride             = 4,
>>> +       .val_bits               = 32,
>>> +       .max_register           = 0x30,
>>> +       .fast_io                = true,
>>> +};
>>> +
>>> +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
>>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
>>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
>>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
>>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
>>> +       .config = imx8mm_blk_ctl_regmap_config,
>>> +       .name = "imx-vpumix-blk-ctl",
>>> +};
>>> +
>>> +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
>>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
>>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
>>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
>>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
>>> +       .config = imx8mm_blk_ctl_regmap_config,
>>> +       .name = "imx-dispmix-blk-ctl",
>>> +};
>>> +
>>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
>>> +{
>>> +       struct device *dev = &pdev->dev;
>>> +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
>>> +       struct regmap *regmap;
>>> +       struct imx_blk_ctl *ctl;
>>> +       void __iomem *base;
>>> +
>>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
>>> +       if (!ctl)
>>> +               return -ENOMEM;
>>> +
>>> +       base = devm_platform_ioremap_resource(pdev, 0);
>>> +       if (IS_ERR(base))
>>> +               return PTR_ERR(base);
>>> +
>>> +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
>>> +       if (IS_ERR(regmap))
>>> +               return PTR_ERR(regmap);
>>> +
>>> +       ctl->regmap = regmap;
>>> +       ctl->dev = dev;
>>> +       mutex_init(&ctl->lock);
>>> +
>>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
>>> +       if (ctl->num_clks < 0)
>>> +               return ctl->num_clks;
>>> +
>>> +       dev_set_drvdata(dev, ctl);
>>> +       ctl->dev_data = dev_data;
>>> +
>>> +       return imx_blk_ctl_register(dev);
>>> +}
>>> +
>>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
>>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
>>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
>>> +       { /* Sentinel */ }
>>> +};
>>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
>>> +
>>> +static struct platform_driver imx_blk_ctl_driver = {
>>> +       .probe = imx8mm_blk_ctl_probe,
>>> +       .driver = {
>>> +               .name = "imx8mm-blk-ctl",
>>> +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
>>> +               .pm = &imx_blk_ctl_pm_ops,
>>> +       },
>>> +};
>>> +module_platform_driver(imx_blk_ctl_driver);
>>> --
>>> 2.30.0
>>>

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Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
>
> On 2021/6/15 3:29, Adam Ford wrote:
> > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com> wrote:
> >>
> >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
> >>>
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> >>> that support in this driver.
> >>>
> >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >>
> >> Maybe my TF-A is too old, but I am not able to wake the device from
> >> suspend-to-ram with this series.  I used the device tree from [1] to
> >> enable both the GPCv2 and the blk-ctl stuff.
> >>
> >> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
> >>
> >> I based both off Shawn's for-next branch.
> >
> > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > for-next branch, and my board hangs when USB is loaded, but USB
> > doesn't use blk-ctl, it just uses GPCv2.
> >
> > I looked at some of the changes with GPCv2, and I noticed a comment in
> > the GPCv2 function called imx_pgc_power_up.  The comment reads:
> >
> > /*
> > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, reg_val,
> > *   (reg_val & domain->bits.hskack), 0,
> > *   USEC_PER_MSEC);
> > * Technically we need the commented code to wait handshake. But that needs
> > * the BLK-CTL module BUS clk-en bit being set.
> > *
> > * There is a separate BLK-CTL module and we will have such a driver for it,
> > * that driver will set the BUS clk-en bit and handshake will be triggered
> > * automatically there. Just add a delay and suppose the handshake finish
> > * after that.
> > */
> >
> > I didn't see a delay here despite the comment saying we should add one.
> >
> > With the blk-ctl enabled, I attempted to uncomment the above line of
> > code without much success in preventing the board from hanging.
> >
> > If BUS clk-en bit needs to be set in order for the handshake to work,
> > should all these power domains reference it to bring it up?  If we
> > decide against using the BUS clk-en bit, what should this delay be?
>
> It is only for power domain has mix and need delay for the handshake.
> USB no need that handshake.

Don't the OTG domains depend on hsiomix?

>
> Could you post a github branch, then I could give a look?

No problem.

https://github.com/aford173/linux/tree/for-next

thanks

adam

>
> Thanks,
> Peng.
>
> >
> > adam
> >>
> >> adam
> >>
> >>> ---
> >>>   drivers/soc/imx/Makefile         |   2 +-
> >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
> >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> >>>
> >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> >>> index d3d2b49a386c..c260b962f495 100644
> >>> --- a/drivers/soc/imx/Makefile
> >>> +++ b/drivers/soc/imx/Makefile
> >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> >>>   endif
> >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
> >>> new file mode 100644
> >>> index 000000000000..59443588f892
> >>> --- /dev/null
> >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> >>> @@ -0,0 +1,139 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +/*
> >>> + * Copyright 2021 NXP
> >>> + */
> >>> +
> >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> >>> +#include <dt-bindings/power/imx8mm-power.h>
> >>> +#include <linux/clk.h>
> >>> +#include <linux/err.h>
> >>> +#include <linux/io.h>
> >>> +#include <linux/module.h>
> >>> +#include <linux/mutex.h>
> >>> +#include <linux/of_address.h>
> >>> +#include <linux/of_device.h>
> >>> +#include <linux/platform_device.h>
> >>> +#include <linux/slab.h>
> >>> +#include <linux/types.h>
> >>> +#include <linux/pm_domain.h>
> >>> +#include <linux/regmap.h>
> >>> +
> >>> +#include "blk-ctl.h"
> >>> +
> >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
> >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
> >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
> >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
> >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
> >>> +
> >>> +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
> >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
> >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
> >>> +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
> >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
> >>> +
> >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> >>> +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> >>> +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> >>> +};
> >>> +
> >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> >>> +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> >>> +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> >>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> >>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> >>> +};
> >>> +
> >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> >>> +       .reg_bits               = 32,
> >>> +       .reg_stride             = 4,
> >>> +       .val_bits               = 32,
> >>> +       .max_register           = 0x30,
> >>> +       .fast_io                = true,
> >>> +};
> >>> +
> >>> +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
> >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> >>> +       .config = imx8mm_blk_ctl_regmap_config,
> >>> +       .name = "imx-vpumix-blk-ctl",
> >>> +};
> >>> +
> >>> +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
> >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> >>> +       .config = imx8mm_blk_ctl_regmap_config,
> >>> +       .name = "imx-dispmix-blk-ctl",
> >>> +};
> >>> +
> >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
> >>> +{
> >>> +       struct device *dev = &pdev->dev;
> >>> +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
> >>> +       struct regmap *regmap;
> >>> +       struct imx_blk_ctl *ctl;
> >>> +       void __iomem *base;
> >>> +
> >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> >>> +       if (!ctl)
> >>> +               return -ENOMEM;
> >>> +
> >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> >>> +       if (IS_ERR(base))
> >>> +               return PTR_ERR(base);
> >>> +
> >>> +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
> >>> +       if (IS_ERR(regmap))
> >>> +               return PTR_ERR(regmap);
> >>> +
> >>> +       ctl->regmap = regmap;
> >>> +       ctl->dev = dev;
> >>> +       mutex_init(&ctl->lock);
> >>> +
> >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> >>> +       if (ctl->num_clks < 0)
> >>> +               return ctl->num_clks;
> >>> +
> >>> +       dev_set_drvdata(dev, ctl);
> >>> +       ctl->dev_data = dev_data;
> >>> +
> >>> +       return imx_blk_ctl_register(dev);
> >>> +}
> >>> +
> >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
> >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
> >>> +       { /* Sentinel */ }
> >>> +};
> >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> >>> +
> >>> +static struct platform_driver imx_blk_ctl_driver = {
> >>> +       .probe = imx8mm_blk_ctl_probe,
> >>> +       .driver = {
> >>> +               .name = "imx8mm-blk-ctl",
> >>> +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
> >>> +               .pm = &imx_blk_ctl_pm_ops,
> >>> +       },
> >>> +};
> >>> +module_platform_driver(imx_blk_ctl_driver);
> >>> --
> >>> 2.30.0
> >>>

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
>
> On 2021/6/15 3:29, Adam Ford wrote:
> > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com> wrote:
> >>
> >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
> >>>
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> >>> that support in this driver.
> >>>
> >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >>
> >> Maybe my TF-A is too old, but I am not able to wake the device from
> >> suspend-to-ram with this series.  I used the device tree from [1] to
> >> enable both the GPCv2 and the blk-ctl stuff.
> >>
> >> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
> >>
> >> I based both off Shawn's for-next branch.
> >
> > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > for-next branch, and my board hangs when USB is loaded, but USB
> > doesn't use blk-ctl, it just uses GPCv2.
> >
> > I looked at some of the changes with GPCv2, and I noticed a comment in
> > the GPCv2 function called imx_pgc_power_up.  The comment reads:
> >
> > /*
> > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, reg_val,
> > *   (reg_val & domain->bits.hskack), 0,
> > *   USEC_PER_MSEC);
> > * Technically we need the commented code to wait handshake. But that needs
> > * the BLK-CTL module BUS clk-en bit being set.
> > *
> > * There is a separate BLK-CTL module and we will have such a driver for it,
> > * that driver will set the BUS clk-en bit and handshake will be triggered
> > * automatically there. Just add a delay and suppose the handshake finish
> > * after that.
> > */
> >
> > I didn't see a delay here despite the comment saying we should add one.
> >
> > With the blk-ctl enabled, I attempted to uncomment the above line of
> > code without much success in preventing the board from hanging.
> >
> > If BUS clk-en bit needs to be set in order for the handshake to work,
> > should all these power domains reference it to bring it up?  If we
> > decide against using the BUS clk-en bit, what should this delay be?
>
> It is only for power domain has mix and need delay for the handshake.
> USB no need that handshake.

Don't the OTG domains depend on hsiomix?

>
> Could you post a github branch, then I could give a look?

No problem.

https://github.com/aford173/linux/tree/for-next

thanks

adam

>
> Thanks,
> Peng.
>
> >
> > adam
> >>
> >> adam
> >>
> >>> ---
> >>>   drivers/soc/imx/Makefile         |   2 +-
> >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139 +++++++++++++++++++++++++++++++
> >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> >>>
> >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> >>> index d3d2b49a386c..c260b962f495 100644
> >>> --- a/drivers/soc/imx/Makefile
> >>> +++ b/drivers/soc/imx/Makefile
> >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> >>>   endif
> >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c
> >>> new file mode 100644
> >>> index 000000000000..59443588f892
> >>> --- /dev/null
> >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> >>> @@ -0,0 +1,139 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +/*
> >>> + * Copyright 2021 NXP
> >>> + */
> >>> +
> >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> >>> +#include <dt-bindings/power/imx8mm-power.h>
> >>> +#include <linux/clk.h>
> >>> +#include <linux/err.h>
> >>> +#include <linux/io.h>
> >>> +#include <linux/module.h>
> >>> +#include <linux/mutex.h>
> >>> +#include <linux/of_address.h>
> >>> +#include <linux/of_device.h>
> >>> +#include <linux/platform_device.h>
> >>> +#include <linux/slab.h>
> >>> +#include <linux/types.h>
> >>> +#include <linux/pm_domain.h>
> >>> +#include <linux/regmap.h>
> >>> +
> >>> +#include "blk-ctl.h"
> >>> +
> >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN                     BIT(6)
> >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN                    BIT(5)
> >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN                    BIT(4)
> >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN                  BIT(3)
> >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN                            GENMASK(2, 0)
> >>> +
> >>> +#define MEDIA_BLK_BUS_PD_MASK                                  BIT(12)
> >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK                             GENMASK(11, 10)
> >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK                             GENMASK(9, 8)
> >>> +#define MEDIA_BLK_LCDIF_PD_MASK                                        GENMASK(7, 6)
> >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK                           GENMASK(5, 0)
> >>> +
> >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("LCDIF", NULL, IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> >>> +                      MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> >>> +                      MEDIA_BLK_BUS_PD_MASK, 0, MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> >>> +                      IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> >>> +};
> >>> +
> >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> >>> +                      BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> >>> +                      BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> >>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_RESET),
> >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> >>> +                      BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET)
> >>> +};
> >>> +
> >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> >>> +       .reg_bits               = 32,
> >>> +       .reg_stride             = 4,
> >>> +       .val_bits               = 32,
> >>> +       .max_register           = 0x30,
> >>> +       .fast_io                = true,
> >>> +};
> >>> +
> >>> +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = {
> >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> >>> +       .config = imx8mm_blk_ctl_regmap_config,
> >>> +       .name = "imx-vpumix-blk-ctl",
> >>> +};
> >>> +
> >>> +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = {
> >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> >>> +       .config = imx8mm_blk_ctl_regmap_config,
> >>> +       .name = "imx-dispmix-blk-ctl",
> >>> +};
> >>> +
> >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
> >>> +{
> >>> +       struct device *dev = &pdev->dev;
> >>> +       const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
> >>> +       struct regmap *regmap;
> >>> +       struct imx_blk_ctl *ctl;
> >>> +       void __iomem *base;
> >>> +
> >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> >>> +       if (!ctl)
> >>> +               return -ENOMEM;
> >>> +
> >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> >>> +       if (IS_ERR(base))
> >>> +               return PTR_ERR(base);
> >>> +
> >>> +       regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
> >>> +       if (IS_ERR(regmap))
> >>> +               return PTR_ERR(regmap);
> >>> +
> >>> +       ctl->regmap = regmap;
> >>> +       ctl->dev = dev;
> >>> +       mutex_init(&ctl->lock);
> >>> +
> >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> >>> +       if (ctl->num_clks < 0)
> >>> +               return ctl->num_clks;
> >>> +
> >>> +       dev_set_drvdata(dev, ctl);
> >>> +       ctl->dev_data = dev_data;
> >>> +
> >>> +       return imx_blk_ctl_register(dev);
> >>> +}
> >>> +
> >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data },
> >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data },
> >>> +       { /* Sentinel */ }
> >>> +};
> >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> >>> +
> >>> +static struct platform_driver imx_blk_ctl_driver = {
> >>> +       .probe = imx8mm_blk_ctl_probe,
> >>> +       .driver = {
> >>> +               .name = "imx8mm-blk-ctl",
> >>> +               .of_match_table = of_match_ptr(imx_blk_ctl_of_match),
> >>> +               .pm = &imx_blk_ctl_pm_ops,
> >>> +       },
> >>> +};
> >>> +module_platform_driver(imx_blk_ctl_driver);
> >>> --
> >>> 2.30.0
> >>>

_______________________________________________
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linux-arm-kernel@lists.infradead.org
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RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >
> >
> > On 2021/6/15 3:29, Adam Ford wrote:
> > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com>
> wrote:
> > >>
> > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> > >>>
> > >>> From: Peng Fan <peng.fan@nxp.com>
> > >>>
> > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we
> add
> > >>> that support in this driver.
> > >>>
> > >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > >>
> > >> Maybe my TF-A is too old, but I am not able to wake the device from
> > >> suspend-to-ram with this series.  I used the device tree from [1]
> > >> to enable both the GPCv2 and the blk-ctl stuff.
> > >>
> > >> [1] -
> > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >>
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604
> > >>
> 111005.6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.
> fan
> > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92
> > >>
> cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF
> pbGZsb3d8
> > >>
> eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%
> > >>
> 7C1000&amp;sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj
> jQ8%3D
> > >> &amp;reserved=0
> > >>
> > >> I based both off Shawn's for-next branch.
> > >
> > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > > for-next branch, and my board hangs when USB is loaded, but USB
> > > doesn't use blk-ctl, it just uses GPCv2.
> > >
> > > I looked at some of the changes with GPCv2, and I noticed a comment
> > > in the GPCv2 function called imx_pgc_power_up.  The comment reads:
> > >
> > > /*
> > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
> reg_val,
> > > *   (reg_val & domain->bits.hskack), 0,
> > > *   USEC_PER_MSEC);
> > > * Technically we need the commented code to wait handshake. But that
> > > needs
> > > * the BLK-CTL module BUS clk-en bit being set.
> > > *
> > > * There is a separate BLK-CTL module and we will have such a driver
> > > for it,
> > > * that driver will set the BUS clk-en bit and handshake will be
> > > triggered
> > > * automatically there. Just add a delay and suppose the handshake
> > > finish
> > > * after that.
> > > */
> > >
> > > I didn't see a delay here despite the comment saying we should add one.
> > >
> > > With the blk-ctl enabled, I attempted to uncomment the above line of
> > > code without much success in preventing the board from hanging.
> > >
> > > If BUS clk-en bit needs to be set in order for the handshake to
> > > work, should all these power domains reference it to bring it up?
> > > If we decide against using the BUS clk-en bit, what should this delay be?
> >
> > It is only for power domain has mix and need delay for the handshake.
> > USB no need that handshake.
> 
> Don't the OTG domains depend on hsiomix?

Sorry, I mean hsiomix has no blkctl. It no need handshake and no pu for hsiomix.

> 
> >
> > Could you post a github branch, then I could give a look?
> 
> No problem.

I'll give a try. Per my try, I tested VPU/DISP which are complicated cases, for usb,
actually it has nothing to do with blk-ctl, it should be gpcv2 handling has issue.

Thanks,
Peng.
> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.
> com%2Faford173%2Flinux%2Ftree%2Ffor-next&amp;data=04%7C01%7Cpen
> g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6tiEiL7TMioVeb88WKHTYxVPxE
> MT1pboN%2FSMxiKA1yM%3D&amp;reserved=0
> 
> thanks
> 
> adam
> 
> >
> > Thanks,
> > Peng.
> >
> > >
> > > adam
> > >>
> > >> adam
> > >>
> > >>> ---
> > >>>   drivers/soc/imx/Makefile         |   2 +-
> > >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139
> +++++++++++++++++++++++++++++++
> > >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> > >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> > >>>
> > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > >>> index d3d2b49a386c..c260b962f495 100644
> > >>> --- a/drivers/soc/imx/Makefile
> > >>> +++ b/drivers/soc/imx/Makefile
> > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> > >>>   endif
> > >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> > >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> blk-ctl-imx8mm.o
> > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> new file mode 100644
> > >>> index 000000000000..59443588f892
> > >>> --- /dev/null
> > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> @@ -0,0 +1,139 @@
> > >>> +// SPDX-License-Identifier: GPL-2.0
> > >>> +/*
> > >>> + * Copyright 2021 NXP
> > >>> + */
> > >>> +
> > >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> > >>> +#include <dt-bindings/power/imx8mm-power.h>
> > >>> +#include <linux/clk.h>
> > >>> +#include <linux/err.h>
> > >>> +#include <linux/io.h>
> > >>> +#include <linux/module.h>
> > >>> +#include <linux/mutex.h>
> > >>> +#include <linux/of_address.h>
> > >>> +#include <linux/of_device.h>
> > >>> +#include <linux/platform_device.h> #include <linux/slab.h>
> > >>> +#include <linux/types.h> #include <linux/pm_domain.h> #include
> > >>> +<linux/regmap.h>
> > >>> +
> > >>> +#include "blk-ctl.h"
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN
> BIT(6)
> > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN
> BIT(5)
> > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN
> BIT(4)
> > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> BIT(3)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN
> GENMASK(2, 0)
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_PD_MASK
> BIT(12)
> > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK
> GENMASK(11, 10)
> > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK
> GENMASK(9, 8)
> > >>> +#define MEDIA_BLK_LCDIF_PD_MASK
> GENMASK(7, 6)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK
> GENMASK(5, 0)
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("LCDIF", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > >>> +
> MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix",
> IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > >>> +                      MEDIA_BLK_BUS_PD_MASK, 0,
> MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_HANDSHAKE |
> > >>> +IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > >>> +                      BIT(0), 0, BIT(0),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > >>> +                      BIT(1), 0, BIT(1),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix",
> IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_HANDSHAKE
> > >>> +| IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > >>> +       .reg_bits               = 32,
> > >>> +       .reg_stride             = 4,
> > >>> +       .val_bits               = 32,
> > >>> +       .max_register           = 0x30,
> > >>> +       .fast_io                = true,
> > >>> +};
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_vpumix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-vpumix-blk-ctl", };
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_dispmix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-dispmix-blk-ctl", };
> > >>> +
> > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > >>> +       struct device *dev = &pdev->dev;
> > >>> +       const struct imx_blk_ctl_dev_data *dev_data =
> of_device_get_match_data(dev);
> > >>> +       struct regmap *regmap;
> > >>> +       struct imx_blk_ctl *ctl;
> > >>> +       void __iomem *base;
> > >>> +
> > >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > >>> +       if (!ctl)
> > >>> +               return -ENOMEM;
> > >>> +
> > >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> > >>> +       if (IS_ERR(base))
> > >>> +               return PTR_ERR(base);
> > >>> +
> > >>> +       regmap = devm_regmap_init_mmio(dev, base,
> &dev_data->config);
> > >>> +       if (IS_ERR(regmap))
> > >>> +               return PTR_ERR(regmap);
> > >>> +
> > >>> +       ctl->regmap = regmap;
> > >>> +       ctl->dev = dev;
> > >>> +       mutex_init(&ctl->lock);
> > >>> +
> > >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > >>> +       if (ctl->num_clks < 0)
> > >>> +               return ctl->num_clks;
> > >>> +
> > >>> +       dev_set_drvdata(dev, ctl);
> > >>> +       ctl->dev_data = dev_data;
> > >>> +
> > >>> +       return imx_blk_ctl_register(dev); }
> > >>> +
> > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data =
> &imx8mm_vpumix_blk_ctl_dev_data },
> > >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data =
> &imx8mm_dispmix_blk_ctl_dev_data },
> > >>> +       { /* Sentinel */ }
> > >>> +};
> > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > >>> +
> > >>> +static struct platform_driver imx_blk_ctl_driver = {
> > >>> +       .probe = imx8mm_blk_ctl_probe,
> > >>> +       .driver = {
> > >>> +               .name = "imx8mm-blk-ctl",
> > >>> +               .of_match_table =
> of_match_ptr(imx_blk_ctl_of_match),
> > >>> +               .pm = &imx_blk_ctl_pm_ops,
> > >>> +       },
> > >>> +};
> > >>> +module_platform_driver(imx_blk_ctl_driver);
> > >>> --
> > >>> 2.30.0
> > >>>

RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >
> >
> > On 2021/6/15 3:29, Adam Ford wrote:
> > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com>
> wrote:
> > >>
> > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> > >>>
> > >>> From: Peng Fan <peng.fan@nxp.com>
> > >>>
> > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we
> add
> > >>> that support in this driver.
> > >>>
> > >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > >>
> > >> Maybe my TF-A is too old, but I am not able to wake the device from
> > >> suspend-to-ram with this series.  I used the device tree from [1]
> > >> to enable both the GPCv2 and the blk-ctl stuff.
> > >>
> > >> [1] -
> > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >>
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604
> > >>
> 111005.6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.
> fan
> > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92
> > >>
> cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF
> pbGZsb3d8
> > >>
> eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%
> > >>
> 7C1000&amp;sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj
> jQ8%3D
> > >> &amp;reserved=0
> > >>
> > >> I based both off Shawn's for-next branch.
> > >
> > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > > for-next branch, and my board hangs when USB is loaded, but USB
> > > doesn't use blk-ctl, it just uses GPCv2.
> > >
> > > I looked at some of the changes with GPCv2, and I noticed a comment
> > > in the GPCv2 function called imx_pgc_power_up.  The comment reads:
> > >
> > > /*
> > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
> reg_val,
> > > *   (reg_val & domain->bits.hskack), 0,
> > > *   USEC_PER_MSEC);
> > > * Technically we need the commented code to wait handshake. But that
> > > needs
> > > * the BLK-CTL module BUS clk-en bit being set.
> > > *
> > > * There is a separate BLK-CTL module and we will have such a driver
> > > for it,
> > > * that driver will set the BUS clk-en bit and handshake will be
> > > triggered
> > > * automatically there. Just add a delay and suppose the handshake
> > > finish
> > > * after that.
> > > */
> > >
> > > I didn't see a delay here despite the comment saying we should add one.
> > >
> > > With the blk-ctl enabled, I attempted to uncomment the above line of
> > > code without much success in preventing the board from hanging.
> > >
> > > If BUS clk-en bit needs to be set in order for the handshake to
> > > work, should all these power domains reference it to bring it up?
> > > If we decide against using the BUS clk-en bit, what should this delay be?
> >
> > It is only for power domain has mix and need delay for the handshake.
> > USB no need that handshake.
> 
> Don't the OTG domains depend on hsiomix?

Sorry, I mean hsiomix has no blkctl. It no need handshake and no pu for hsiomix.

> 
> >
> > Could you post a github branch, then I could give a look?
> 
> No problem.

I'll give a try. Per my try, I tested VPU/DISP which are complicated cases, for usb,
actually it has nothing to do with blk-ctl, it should be gpcv2 handling has issue.

Thanks,
Peng.
> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.
> com%2Faford173%2Flinux%2Ftree%2Ffor-next&amp;data=04%7C01%7Cpen
> g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6tiEiL7TMioVeb88WKHTYxVPxE
> MT1pboN%2FSMxiKA1yM%3D&amp;reserved=0
> 
> thanks
> 
> adam
> 
> >
> > Thanks,
> > Peng.
> >
> > >
> > > adam
> > >>
> > >> adam
> > >>
> > >>> ---
> > >>>   drivers/soc/imx/Makefile         |   2 +-
> > >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139
> +++++++++++++++++++++++++++++++
> > >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> > >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> > >>>
> > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > >>> index d3d2b49a386c..c260b962f495 100644
> > >>> --- a/drivers/soc/imx/Makefile
> > >>> +++ b/drivers/soc/imx/Makefile
> > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> > >>>   endif
> > >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> > >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> blk-ctl-imx8mm.o
> > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> new file mode 100644
> > >>> index 000000000000..59443588f892
> > >>> --- /dev/null
> > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> @@ -0,0 +1,139 @@
> > >>> +// SPDX-License-Identifier: GPL-2.0
> > >>> +/*
> > >>> + * Copyright 2021 NXP
> > >>> + */
> > >>> +
> > >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> > >>> +#include <dt-bindings/power/imx8mm-power.h>
> > >>> +#include <linux/clk.h>
> > >>> +#include <linux/err.h>
> > >>> +#include <linux/io.h>
> > >>> +#include <linux/module.h>
> > >>> +#include <linux/mutex.h>
> > >>> +#include <linux/of_address.h>
> > >>> +#include <linux/of_device.h>
> > >>> +#include <linux/platform_device.h> #include <linux/slab.h>
> > >>> +#include <linux/types.h> #include <linux/pm_domain.h> #include
> > >>> +<linux/regmap.h>
> > >>> +
> > >>> +#include "blk-ctl.h"
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN
> BIT(6)
> > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN
> BIT(5)
> > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN
> BIT(4)
> > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> BIT(3)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN
> GENMASK(2, 0)
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_PD_MASK
> BIT(12)
> > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK
> GENMASK(11, 10)
> > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK
> GENMASK(9, 8)
> > >>> +#define MEDIA_BLK_LCDIF_PD_MASK
> GENMASK(7, 6)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK
> GENMASK(5, 0)
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("LCDIF", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > >>> +
> MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix",
> IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > >>> +                      MEDIA_BLK_BUS_PD_MASK, 0,
> MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_HANDSHAKE |
> > >>> +IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > >>> +                      BIT(0), 0, BIT(0),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > >>> +                      BIT(1), 0, BIT(1),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix",
> IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_HANDSHAKE
> > >>> +| IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > >>> +       .reg_bits               = 32,
> > >>> +       .reg_stride             = 4,
> > >>> +       .val_bits               = 32,
> > >>> +       .max_register           = 0x30,
> > >>> +       .fast_io                = true,
> > >>> +};
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_vpumix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-vpumix-blk-ctl", };
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_dispmix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-dispmix-blk-ctl", };
> > >>> +
> > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > >>> +       struct device *dev = &pdev->dev;
> > >>> +       const struct imx_blk_ctl_dev_data *dev_data =
> of_device_get_match_data(dev);
> > >>> +       struct regmap *regmap;
> > >>> +       struct imx_blk_ctl *ctl;
> > >>> +       void __iomem *base;
> > >>> +
> > >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > >>> +       if (!ctl)
> > >>> +               return -ENOMEM;
> > >>> +
> > >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> > >>> +       if (IS_ERR(base))
> > >>> +               return PTR_ERR(base);
> > >>> +
> > >>> +       regmap = devm_regmap_init_mmio(dev, base,
> &dev_data->config);
> > >>> +       if (IS_ERR(regmap))
> > >>> +               return PTR_ERR(regmap);
> > >>> +
> > >>> +       ctl->regmap = regmap;
> > >>> +       ctl->dev = dev;
> > >>> +       mutex_init(&ctl->lock);
> > >>> +
> > >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > >>> +       if (ctl->num_clks < 0)
> > >>> +               return ctl->num_clks;
> > >>> +
> > >>> +       dev_set_drvdata(dev, ctl);
> > >>> +       ctl->dev_data = dev_data;
> > >>> +
> > >>> +       return imx_blk_ctl_register(dev); }
> > >>> +
> > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data =
> &imx8mm_vpumix_blk_ctl_dev_data },
> > >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data =
> &imx8mm_dispmix_blk_ctl_dev_data },
> > >>> +       { /* Sentinel */ }
> > >>> +};
> > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > >>> +
> > >>> +static struct platform_driver imx_blk_ctl_driver = {
> > >>> +       .probe = imx8mm_blk_ctl_probe,
> > >>> +       .driver = {
> > >>> +               .name = "imx8mm-blk-ctl",
> > >>> +               .of_match_table =
> of_match_ptr(imx_blk_ctl_of_match),
> > >>> +               .pm = &imx_blk_ctl_pm_ops,
> > >>> +       },
> > >>> +};
> > >>> +module_platform_driver(imx_blk_ctl_driver);
> > >>> --
> > >>> 2.30.0
> > >>>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >
> >
> > On 2021/6/15 3:29, Adam Ford wrote:
> > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com>
> wrote:
> > >>
> > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> > >>>
> > >>> From: Peng Fan <peng.fan@nxp.com>
> > >>>
> > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we
> add
> > >>> that support in this driver.
> > >>>
> > >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > >>
> > >> Maybe my TF-A is too old, but I am not able to wake the device from
> > >> suspend-to-ram with this series.  I used the device tree from [1]
> > >> to enable both the GPCv2 and the blk-ctl stuff.
> > >>
> > >> [1] -
> > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >>
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604
> > >>
> 111005.6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.
> fan
> > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92
> > >>
> cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF
> pbGZsb3d8
> > >>
> eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%
> > >>
> 7C1000&amp;sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj
> jQ8%3D
> > >> &amp;reserved=0
> > >>
> > >> I based both off Shawn's for-next branch.
> > >
> > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > > for-next branch, and my board hangs when USB is loaded, but USB
> > > doesn't use blk-ctl, it just uses GPCv2.
> > >
> > > I looked at some of the changes with GPCv2, and I noticed a comment
> > > in the GPCv2 function called imx_pgc_power_up.  The comment reads:
> > >
> > > /*
> > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
> reg_val,
> > > *   (reg_val & domain->bits.hskack), 0,
> > > *   USEC_PER_MSEC);
> > > * Technically we need the commented code to wait handshake. But that
> > > needs
> > > * the BLK-CTL module BUS clk-en bit being set.
> > > *
> > > * There is a separate BLK-CTL module and we will have such a driver
> > > for it,
> > > * that driver will set the BUS clk-en bit and handshake will be
> > > triggered
> > > * automatically there. Just add a delay and suppose the handshake
> > > finish
> > > * after that.
> > > */
> > >
> > > I didn't see a delay here despite the comment saying we should add one.
> > >
> > > With the blk-ctl enabled, I attempted to uncomment the above line of
> > > code without much success in preventing the board from hanging.
> > >
> > > If BUS clk-en bit needs to be set in order for the handshake to
> > > work, should all these power domains reference it to bring it up?
> > > If we decide against using the BUS clk-en bit, what should this delay be?
> >
> > It is only for power domain has mix and need delay for the handshake.
> > USB no need that handshake.
> 
> Don't the OTG domains depend on hsiomix?


It works well with this change in dtsi.
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 0e01ff649956..e930ae3122ec 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1087,6 +1087,7 @@ usbotg1: usb@32e40000 {
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
                                fsl,usbphy = <&usbphynop1>;
                                fsl,usbmisc = <&usbmisc1 0>;
+                               power-domains = <&pgc_otg1>;
                                status = "disabled";
                        };

@@ -1106,6 +1107,7 @@ usbotg2: usb@32e50000 {
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
                                fsl,usbphy = <&usbphynop2>;
                                fsl,usbmisc = <&usbmisc2 0>;
+                               power-domains = <&pgc_otg2>;
                                status = "disabled";
                        };


Regards,
Peng.

> 
> >
> > Could you post a github branch, then I could give a look?
> 
> No problem.
> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.
> com%2Faford173%2Flinux%2Ftree%2Ffor-next&amp;data=04%7C01%7Cpen
> g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6tiEiL7TMioVeb88WKHTYxVPxE
> MT1pboN%2FSMxiKA1yM%3D&amp;reserved=0
> 
> thanks
> 
> adam
> 
> >
> > Thanks,
> > Peng.
> >
> > >
> > > adam
> > >>
> > >> adam
> > >>
> > >>> ---
> > >>>   drivers/soc/imx/Makefile         |   2 +-
> > >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139
> +++++++++++++++++++++++++++++++
> > >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> > >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> > >>>
> > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > >>> index d3d2b49a386c..c260b962f495 100644
> > >>> --- a/drivers/soc/imx/Makefile
> > >>> +++ b/drivers/soc/imx/Makefile
> > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> > >>>   endif
> > >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> > >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> blk-ctl-imx8mm.o
> > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> new file mode 100644
> > >>> index 000000000000..59443588f892
> > >>> --- /dev/null
> > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> @@ -0,0 +1,139 @@
> > >>> +// SPDX-License-Identifier: GPL-2.0
> > >>> +/*
> > >>> + * Copyright 2021 NXP
> > >>> + */
> > >>> +
> > >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> > >>> +#include <dt-bindings/power/imx8mm-power.h>
> > >>> +#include <linux/clk.h>
> > >>> +#include <linux/err.h>
> > >>> +#include <linux/io.h>
> > >>> +#include <linux/module.h>
> > >>> +#include <linux/mutex.h>
> > >>> +#include <linux/of_address.h>
> > >>> +#include <linux/of_device.h>
> > >>> +#include <linux/platform_device.h> #include <linux/slab.h>
> > >>> +#include <linux/types.h> #include <linux/pm_domain.h> #include
> > >>> +<linux/regmap.h>
> > >>> +
> > >>> +#include "blk-ctl.h"
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN
> BIT(6)
> > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN
> BIT(5)
> > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN
> BIT(4)
> > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> BIT(3)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN
> GENMASK(2, 0)
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_PD_MASK
> BIT(12)
> > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK
> GENMASK(11, 10)
> > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK
> GENMASK(9, 8)
> > >>> +#define MEDIA_BLK_LCDIF_PD_MASK
> GENMASK(7, 6)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK
> GENMASK(5, 0)
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("LCDIF", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > >>> +
> MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix",
> IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > >>> +                      MEDIA_BLK_BUS_PD_MASK, 0,
> MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_HANDSHAKE |
> > >>> +IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > >>> +                      BIT(0), 0, BIT(0),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > >>> +                      BIT(1), 0, BIT(1),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix",
> IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_HANDSHAKE
> > >>> +| IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > >>> +       .reg_bits               = 32,
> > >>> +       .reg_stride             = 4,
> > >>> +       .val_bits               = 32,
> > >>> +       .max_register           = 0x30,
> > >>> +       .fast_io                = true,
> > >>> +};
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_vpumix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-vpumix-blk-ctl", };
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_dispmix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-dispmix-blk-ctl", };
> > >>> +
> > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > >>> +       struct device *dev = &pdev->dev;
> > >>> +       const struct imx_blk_ctl_dev_data *dev_data =
> of_device_get_match_data(dev);
> > >>> +       struct regmap *regmap;
> > >>> +       struct imx_blk_ctl *ctl;
> > >>> +       void __iomem *base;
> > >>> +
> > >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > >>> +       if (!ctl)
> > >>> +               return -ENOMEM;
> > >>> +
> > >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> > >>> +       if (IS_ERR(base))
> > >>> +               return PTR_ERR(base);
> > >>> +
> > >>> +       regmap = devm_regmap_init_mmio(dev, base,
> &dev_data->config);
> > >>> +       if (IS_ERR(regmap))
> > >>> +               return PTR_ERR(regmap);
> > >>> +
> > >>> +       ctl->regmap = regmap;
> > >>> +       ctl->dev = dev;
> > >>> +       mutex_init(&ctl->lock);
> > >>> +
> > >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > >>> +       if (ctl->num_clks < 0)
> > >>> +               return ctl->num_clks;
> > >>> +
> > >>> +       dev_set_drvdata(dev, ctl);
> > >>> +       ctl->dev_data = dev_data;
> > >>> +
> > >>> +       return imx_blk_ctl_register(dev); }
> > >>> +
> > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data =
> &imx8mm_vpumix_blk_ctl_dev_data },
> > >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data =
> &imx8mm_dispmix_blk_ctl_dev_data },
> > >>> +       { /* Sentinel */ }
> > >>> +};
> > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > >>> +
> > >>> +static struct platform_driver imx_blk_ctl_driver = {
> > >>> +       .probe = imx8mm_blk_ctl_probe,
> > >>> +       .driver = {
> > >>> +               .name = "imx8mm-blk-ctl",
> > >>> +               .of_match_table =
> of_match_ptr(imx_blk_ctl_of_match),
> > >>> +               .pm = &imx_blk_ctl_pm_ops,
> > >>> +       },
> > >>> +};
> > >>> +module_platform_driver(imx_blk_ctl_driver);
> > >>> --
> > >>> 2.30.0
> > >>>

RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan (OSS)]

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >
> >
> > On 2021/6/15 3:29, Adam Ford wrote:
> > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com>
> wrote:
> > >>
> > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> > >>>
> > >>> From: Peng Fan <peng.fan@nxp.com>
> > >>>
> > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we
> add
> > >>> that support in this driver.
> > >>>
> > >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > >>
> > >> Maybe my TF-A is too old, but I am not able to wake the device from
> > >> suspend-to-ram with this series.  I used the device tree from [1]
> > >> to enable both the GPCv2 and the blk-ctl stuff.
> > >>
> > >> [1] -
> > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >>
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604
> > >>
> 111005.6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.
> fan
> > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92
> > >>
> cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF
> pbGZsb3d8
> > >>
> eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%
> > >>
> 7C1000&amp;sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj
> jQ8%3D
> > >> &amp;reserved=0
> > >>
> > >> I based both off Shawn's for-next branch.
> > >
> > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > > for-next branch, and my board hangs when USB is loaded, but USB
> > > doesn't use blk-ctl, it just uses GPCv2.
> > >
> > > I looked at some of the changes with GPCv2, and I noticed a comment
> > > in the GPCv2 function called imx_pgc_power_up.  The comment reads:
> > >
> > > /*
> > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
> reg_val,
> > > *   (reg_val & domain->bits.hskack), 0,
> > > *   USEC_PER_MSEC);
> > > * Technically we need the commented code to wait handshake. But that
> > > needs
> > > * the BLK-CTL module BUS clk-en bit being set.
> > > *
> > > * There is a separate BLK-CTL module and we will have such a driver
> > > for it,
> > > * that driver will set the BUS clk-en bit and handshake will be
> > > triggered
> > > * automatically there. Just add a delay and suppose the handshake
> > > finish
> > > * after that.
> > > */
> > >
> > > I didn't see a delay here despite the comment saying we should add one.
> > >
> > > With the blk-ctl enabled, I attempted to uncomment the above line of
> > > code without much success in preventing the board from hanging.
> > >
> > > If BUS clk-en bit needs to be set in order for the handshake to
> > > work, should all these power domains reference it to bring it up?
> > > If we decide against using the BUS clk-en bit, what should this delay be?
> >
> > It is only for power domain has mix and need delay for the handshake.
> > USB no need that handshake.
> 
> Don't the OTG domains depend on hsiomix?


It works well with this change in dtsi.
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 0e01ff649956..e930ae3122ec 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1087,6 +1087,7 @@ usbotg1: usb@32e40000 {
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
                                fsl,usbphy = <&usbphynop1>;
                                fsl,usbmisc = <&usbmisc1 0>;
+                               power-domains = <&pgc_otg1>;
                                status = "disabled";
                        };

@@ -1106,6 +1107,7 @@ usbotg2: usb@32e50000 {
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
                                fsl,usbphy = <&usbphynop2>;
                                fsl,usbmisc = <&usbmisc2 0>;
+                               power-domains = <&pgc_otg2>;
                                status = "disabled";
                        };


Regards,
Peng.

> 
> >
> > Could you post a github branch, then I could give a look?
> 
> No problem.
> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.
> com%2Faford173%2Flinux%2Ftree%2Ffor-next&amp;data=04%7C01%7Cpen
> g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6tiEiL7TMioVeb88WKHTYxVPxE
> MT1pboN%2FSMxiKA1yM%3D&amp;reserved=0
> 
> thanks
> 
> adam
> 
> >
> > Thanks,
> > Peng.
> >
> > >
> > > adam
> > >>
> > >> adam
> > >>
> > >>> ---
> > >>>   drivers/soc/imx/Makefile         |   2 +-
> > >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139
> +++++++++++++++++++++++++++++++
> > >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> > >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> > >>>
> > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > >>> index d3d2b49a386c..c260b962f495 100644
> > >>> --- a/drivers/soc/imx/Makefile
> > >>> +++ b/drivers/soc/imx/Makefile
> > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> > >>>   endif
> > >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> > >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> blk-ctl-imx8mm.o
> > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> new file mode 100644
> > >>> index 000000000000..59443588f892
> > >>> --- /dev/null
> > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > >>> @@ -0,0 +1,139 @@
> > >>> +// SPDX-License-Identifier: GPL-2.0
> > >>> +/*
> > >>> + * Copyright 2021 NXP
> > >>> + */
> > >>> +
> > >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> > >>> +#include <dt-bindings/power/imx8mm-power.h>
> > >>> +#include <linux/clk.h>
> > >>> +#include <linux/err.h>
> > >>> +#include <linux/io.h>
> > >>> +#include <linux/module.h>
> > >>> +#include <linux/mutex.h>
> > >>> +#include <linux/of_address.h>
> > >>> +#include <linux/of_device.h>
> > >>> +#include <linux/platform_device.h> #include <linux/slab.h>
> > >>> +#include <linux/types.h> #include <linux/pm_domain.h> #include
> > >>> +<linux/regmap.h>
> > >>> +
> > >>> +#include "blk-ctl.h"
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN
> BIT(6)
> > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN
> BIT(5)
> > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN
> BIT(4)
> > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> BIT(3)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN
> GENMASK(2, 0)
> > >>> +
> > >>> +#define MEDIA_BLK_BUS_PD_MASK
> BIT(12)
> > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK
> GENMASK(11, 10)
> > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK
> GENMASK(9, 8)
> > >>> +#define MEDIA_BLK_LCDIF_PD_MASK
> GENMASK(7, 6)
> > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK
> GENMASK(5, 0)
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("LCDIF", NULL,
> IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > >>> +
> MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix",
> IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > >>> +                      MEDIA_BLK_BUS_PD_MASK, 0,
> MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > >>> +                      IMX_BLK_CTL_PD_HANDSHAKE |
> > >>> +IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > >>> +                      BIT(0), 0, BIT(0),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > >>> +                      BIT(1), 0, BIT(1),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_RESET),
> > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix",
> IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > >>> +                      BIT(2), 0, BIT(2),
> IMX_BLK_CTL_PD_HANDSHAKE
> > >>> +| IMX_BLK_CTL_PD_RESET) };
> > >>> +
> > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > >>> +       .reg_bits               = 32,
> > >>> +       .reg_stride             = 4,
> > >>> +       .val_bits               = 32,
> > >>> +       .max_register           = 0x30,
> > >>> +       .fast_io                = true,
> > >>> +};
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_vpumix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-vpumix-blk-ctl", };
> > >>> +
> > >>> +static const struct imx_blk_ctl_dev_data
> imx8mm_dispmix_blk_ctl_dev_data = {
> > >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > >>> +       .name = "imx-dispmix-blk-ctl", };
> > >>> +
> > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > >>> +       struct device *dev = &pdev->dev;
> > >>> +       const struct imx_blk_ctl_dev_data *dev_data =
> of_device_get_match_data(dev);
> > >>> +       struct regmap *regmap;
> > >>> +       struct imx_blk_ctl *ctl;
> > >>> +       void __iomem *base;
> > >>> +
> > >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > >>> +       if (!ctl)
> > >>> +               return -ENOMEM;
> > >>> +
> > >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> > >>> +       if (IS_ERR(base))
> > >>> +               return PTR_ERR(base);
> > >>> +
> > >>> +       regmap = devm_regmap_init_mmio(dev, base,
> &dev_data->config);
> > >>> +       if (IS_ERR(regmap))
> > >>> +               return PTR_ERR(regmap);
> > >>> +
> > >>> +       ctl->regmap = regmap;
> > >>> +       ctl->dev = dev;
> > >>> +       mutex_init(&ctl->lock);
> > >>> +
> > >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > >>> +       if (ctl->num_clks < 0)
> > >>> +               return ctl->num_clks;
> > >>> +
> > >>> +       dev_set_drvdata(dev, ctl);
> > >>> +       ctl->dev_data = dev_data;
> > >>> +
> > >>> +       return imx_blk_ctl_register(dev); }
> > >>> +
> > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data =
> &imx8mm_vpumix_blk_ctl_dev_data },
> > >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data =
> &imx8mm_dispmix_blk_ctl_dev_data },
> > >>> +       { /* Sentinel */ }
> > >>> +};
> > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > >>> +
> > >>> +static struct platform_driver imx_blk_ctl_driver = {
> > >>> +       .probe = imx8mm_blk_ctl_probe,
> > >>> +       .driver = {
> > >>> +               .name = "imx8mm-blk-ctl",
> > >>> +               .of_match_table =
> of_match_ptr(imx_blk_ctl_of_match),
> > >>> +               .pm = &imx_blk_ctl_pm_ops,
> > >>> +       },
> > >>> +};
> > >>> +module_platform_driver(imx_blk_ctl_driver);
> > >>> --
> > >>> 2.30.0
> > >>>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

RE: [PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Aisheng Dong]

Hi Lucas,

Would you share your comments on this patch? 
We'd like to reach an agreement with Pengutronix on the direction of this solution for MX8M
(e.g. MX8MM, MX8MP). And we respect your professional comments.

Regards
Aisheng

> From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> Sent: Saturday, June 12, 2021 9:32 PM
> 
> From: Peng Fan <peng.fan@nxp.com>
> 
> The i.MX8MM introduces an IP named BLK_CTL and usually is comprised of
> some GPRs.
> 
> The GPRs has some clock bits and reset bits, but here we take it as virtual PDs,
> because of the clock and power domain A/B lock issue when taking it as a
> clock controller.
> 
> For some bits, it might be good to also make it as a reset controller, but to
> i.MX8MM, we not add that support for now.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/soc/imx/Makefile  |   2 +-
>  drivers/soc/imx/blk-ctl.c | 325
> ++++++++++++++++++++++++++++++++++++++
>  drivers/soc/imx/blk-ctl.h |  85 ++++++++++
>  3 files changed, 411 insertions(+), 1 deletion(-)  create mode 100644
> drivers/soc/imx/blk-ctl.c  create mode 100644 drivers/soc/imx/blk-ctl.h
> 
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index
> 078dc918f4f3..d3d2b49a386c 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o  endif
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> diff --git a/drivers/soc/imx/blk-ctl.c b/drivers/soc/imx/blk-ctl.c new file mode
> 100644 index 000000000000..3464e4cf7fe6
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.c
> @@ -0,0 +1,325 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2021 NXP.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/pm_domain.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +
> +#include "blk-ctl.h"
> +
> +static inline struct imx_blk_ctl_domain *to_imx_blk_ctl_pd(struct
> +generic_pm_domain *genpd) {
> +	return container_of(genpd, struct imx_blk_ctl_domain, genpd); }
> +
> +static int imx_blk_ctl_enable_hsk(struct device *dev) {
> +	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +	const struct imx_blk_ctl_hw *hw = blk_ctl->dev_data->hw_hsk;
> +	struct regmap *regmap = blk_ctl->regmap;
> +	int ret;
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask,
> hw->rst_mask);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +	/* Wait for handshake */
> +	udelay(5);
> +
> +	return ret;
> +}
> +
> +static int imx_blk_ctl_power_on(struct generic_pm_domain *domain) {
> +	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +	struct regmap *regmap = blk_ctl->regmap;
> +	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +	int ret;
> +
> +	mutex_lock(&blk_ctl->lock);
> +
> +	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +	if (ret) {
> +		mutex_unlock(&blk_ctl->lock);
> +		return ret;
> +	}
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +		if (ret) {
> +			dev_err(blk_ctl->dev, "Hankshake failed when power on\n");
> +			goto disable_clk;
> +		}
> +	}
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +		ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +		if (ret)
> +			goto disable_clk;
> +
> +		/* Wait for reset propagate */
> +		udelay(5);
> +
> +		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask,
> hw->rst_mask);
> +		if (ret)
> +			goto disable_clk;
> +	}
> +
> +	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +disable_clk:
> +	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +	mutex_unlock(&blk_ctl->lock);
> +
> +	return ret;
> +}
> +
> +static int imx_blk_ctl_power_off(struct generic_pm_domain *domain) {
> +	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +	struct regmap *regmap = blk_ctl->regmap;
> +	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +	int ret;
> +
> +	mutex_lock(&blk_ctl->lock);
> +
> +	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +	if (ret) {
> +		mutex_unlock(&blk_ctl->lock);
> +		return ret;
> +	}
> +
> +	if (!(hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)) {
> +		ret = regmap_clear_bits(regmap, hw->offset, hw->mask);
> +		if (ret)
> +			goto disable_clk;
> +
> +		if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +			ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +			if (ret)
> +				goto disable_clk;
> +		}
> +	}
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +		if (ret)
> +			dev_err(blk_ctl->dev, "Hankshake failed when power off\n");
> +	}
> +
> +disable_clk:
> +	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +	mutex_unlock(&blk_ctl->lock);
> +
> +	return ret;
> +}
> +
> +static int imx_blk_ctl_probe(struct platform_device *pdev) {
> +	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +	struct generic_pm_domain *parent_genpd;
> +	struct device *dev = &pdev->dev;
> +	struct device *active_pd;
> +	int ret;
> +
> +	pdev->dev.of_node = blk_ctl->dev->of_node;
> +
> +	if (domain->hw->active_pd_name) {
> +		active_pd = dev_pm_domain_attach_by_name(dev,
> domain->hw->active_pd_name);
> +		if (IS_ERR_OR_NULL(active_pd)) {
> +			ret = PTR_ERR(active_pd) ? : -ENODATA;
> +			pdev->dev.of_node = NULL;
> +			return ret;
> +		}
> +
> +		domain->active_pd = active_pd;
> +	} else {
> +		if (!blk_ctl->bus_domain) {
> +			pdev->dev.of_node = NULL;
> +			return -EPROBE_DEFER;
> +		}
> +	}
> +
> +	if (domain->hw->active_pd_name)
> +		parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +	else
> +		parent_genpd = blk_ctl->bus_domain;
> +
> +	if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
> +		dev_warn(dev, "failed to add subdomain: %s\n",
> domain->genpd.name);
> +	} else {
> +		mutex_lock(&blk_ctl->lock);
> +		domain->hooked = true;
> +		mutex_unlock(&blk_ctl->lock);
> +	}
> +
> +	return 0;
> +}
> +
> +static int imx_blk_ctl_remove(struct platform_device *pdev) {
> +	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +	struct generic_pm_domain *parent_genpd;
> +	struct device *active_pd;
> +
> +	if (domain->hw->active_pd_name)
> +		parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +	else
> +		parent_genpd = blk_ctl->bus_domain;
> +
> +	pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
> +
> +	mutex_lock(&blk_ctl->lock);
> +	domain->hooked = false;
> +	mutex_unlock(&blk_ctl->lock);
> +
> +	if (domain->hw->active_pd_name)
> +		dev_pm_domain_detach(domain->active_pd, false);
> +
> +	return 0;
> +}
> +
> +static const struct platform_device_id imx_blk_ctl_id[] = {
> +	{ "imx-vpumix-blk-ctl", },
> +	{ "imx-dispmix-blk-ctl", },
> +	{ },
> +};
> +
> +static struct platform_driver imx_blk_ctl_driver = {
> +	.driver = {
> +		.name = "imx-blk-ctl",
> +	},
> +	.probe    = imx_blk_ctl_probe,
> +	.remove   = imx_blk_ctl_remove,
> +	.id_table = imx_blk_ctl_id,
> +};
> +builtin_platform_driver(imx_blk_ctl_driver)
> +
> +static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct
> of_phandle_args *genpdspec,
> +							 void *data)
> +{
> +	struct genpd_onecell_data *genpd_data = data;
> +	unsigned int idx = genpdspec->args[0];
> +	struct imx_blk_ctl_domain *domain;
> +	struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
> +
> +	if (genpdspec->args_count != 1)
> +		return ERR_PTR(-EINVAL);
> +
> +	if (idx >= genpd_data->num_domains)
> +		return ERR_PTR(-EINVAL);
> +
> +	if (!genpd_data->domains[idx])
> +		return ERR_PTR(-ENOENT);
> +
> +	domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
> +
> +	mutex_lock(&domain->blk_ctl->lock);
> +	if (domain->hooked)
> +		genpd = genpd_data->domains[idx];
> +	mutex_unlock(&domain->blk_ctl->lock);
> +
> +	return genpd;
> +}
> +
> +int imx_blk_ctl_register(struct device *dev) {
> +	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +	const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
> +	int num = dev_data->pds_num;
> +	struct imx_blk_ctl_domain *domain;
> +	struct generic_pm_domain *genpd;
> +	struct platform_device *pd_pdev;
> +	int domain_index;
> +	int i, ret;
> +
> +	blk_ctl->onecell_data.num_domains = num;
> +	blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
> +	blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct
> generic_pm_domain *),
> +						     GFP_KERNEL);
> +	if (!blk_ctl->onecell_data.domains)
> +		return -ENOMEM;
> +
> +	for (i = 0; i < num; i++) {
> +		domain_index = dev_data->pds[i].id;
> +		if (domain_index >= num) {
> +			dev_warn(dev, "Domain index %d is out of bounds\n",
> domain_index);
> +			continue;
> +		}
> +
> +		domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain),
> GFP_KERNEL);
> +		if (!domain)
> +			goto error;
> +
> +		pd_pdev = platform_device_alloc(dev_data->name, domain_index);
> +		if (!pd_pdev) {
> +			dev_err(dev, "Failed to allocate platform device\n");
> +			goto error;
> +		}
> +
> +		pd_pdev->dev.platform_data = domain;
> +
> +		domain->blk_ctl = blk_ctl;
> +		domain->hw = &dev_data->pds[i];
> +		domain->id = domain_index;
> +		domain->genpd.name = dev_data->pds[i].name;
> +		domain->genpd.power_off = imx_blk_ctl_power_off;
> +		domain->genpd.power_on = imx_blk_ctl_power_on;
> +		domain->dev = &pd_pdev->dev;
> +		domain->hooked = false;
> +
> +		ret = pm_genpd_init(&domain->genpd, NULL, true);
> +		pd_pdev->dev.parent = dev;
> +
> +		if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
> +			blk_ctl->bus_domain = &domain->genpd;
> +
> +		ret = platform_device_add(pd_pdev);
> +		if (ret) {
> +			platform_device_put(pd_pdev);
> +			goto error;
> +		}
> +		blk_ctl->onecell_data.domains[i] = &domain->genpd;
> +	}
> +
> +	return of_genpd_add_provider_onecell(dev->of_node,
> +&blk_ctl->onecell_data);
> +
> +error:
> +	for (; i >= 0; i--) {
> +		genpd = blk_ctl->onecell_data.domains[i];
> +		if (!genpd)
> +			continue;
> +		domain = to_imx_blk_ctl_pd(genpd);
> +		if (domain->dev)
> +			platform_device_put(to_platform_device(domain->dev));
> +	}
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
> +
> +const struct dev_pm_ops imx_blk_ctl_pm_ops = {
> +	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
> +pm_runtime_force_resume) }; EXPORT_SYMBOL_GPL(imx_blk_ctl_pm_ops);
> diff --git a/drivers/soc/imx/blk-ctl.h b/drivers/soc/imx/blk-ctl.h new file mode
> 100644 index 000000000000..6780d00ec8c5
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.h
> @@ -0,0 +1,85 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __SOC_IMX_BLK_CTL_H
> +#define __SOC_IMX_BLK_CTL_H
> +
> +enum imx_blk_ctl_pd_type {
> +	BLK_CTL_PD,
> +};
> +
> +struct imx_blk_ctl_hw {
> +	int type;
> +	char *name;
> +	char *active_pd_name;
> +	u32 offset;
> +	u32 mask;
> +	u32 flags;
> +	u32 id;
> +	u32 rst_offset;
> +	u32 rst_mask;
> +	u32 errata;
> +};
> +
> +struct imx_blk_ctl_domain {
> +	struct generic_pm_domain genpd;
> +	struct device *active_pd;
> +	struct imx_blk_ctl *blk_ctl;
> +	struct imx_blk_ctl_hw *hw;
> +	struct device *dev;
> +	bool hooked;
> +	u32 id;
> +};
> +
> +struct imx_blk_ctl_dev_data {
> +	struct regmap_config config;
> +	struct imx_blk_ctl_hw *pds;
> +	struct imx_blk_ctl_hw *hw_hsk;
> +	u32 pds_num;
> +	u32 max_num;
> +	char *name;
> +};
> +
> +struct imx_blk_ctl {
> +	struct device *dev;
> +	struct regmap *regmap;
> +	struct genpd_onecell_data onecell_data;
> +	const struct imx_blk_ctl_dev_data *dev_data;
> +	struct clk_bulk_data *clks;
> +	u32 num_clks;
> +	struct generic_pm_domain *bus_domain;
> +
> +	struct mutex lock;
> +};
> +
> +#define IMX_BLK_CTL(_type, _name, _active_pd, _id, _offset, _mask,
> _rst_offset, _rst_mask,	\
> +		    _flags, _errata)								\
> +	{											\
> +		.type = _type,									\
> +		.name = _name,									\
> +		.active_pd_name = _active_pd,							\
> +		.id = _id,									\
> +		.offset = _offset,								\
> +		.mask = _mask,									\
> +		.flags = _flags,								\
> +		.rst_offset = _rst_offset,							\
> +		.rst_mask = _rst_mask,								\
> +		.errata = _errata,								\
> +	}
> +
> +#define IMX_BLK_CTL_PD(_name, _active_pd, _id, _offset, _mask, _rst_offset,
> _rst_mask, _flags)	\
> +	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask,
> _rst_offset,		\
> +		    _rst_mask, _flags, 0)
> +
> +#define IMX_BLK_CTL_PD_ERRATA(_name, _active_pd, _id, _offset, _mask,
> _rst_offset, _rst_mask,	\
> +			      _flags, _errata)							\
> +	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask,
> _rst_offset,		\
> +		    _rst_mask, _flags, _errata)
> +
> +int imx_blk_ctl_register(struct device *dev);
> +
> +#define IMX_BLK_CTL_PD_HANDSHAKE	BIT(0)
> +#define IMX_BLK_CTL_PD_RESET		BIT(1)
> +#define IMX_BLK_CTL_PD_BUS		BIT(2)
> +
> +const extern struct dev_pm_ops imx_blk_ctl_pm_ops;
> +
> +#endif
> --
> 2.30.0

RE: [PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Aisheng Dong]

Hi Lucas,

Would you share your comments on this patch? 
We'd like to reach an agreement with Pengutronix on the direction of this solution for MX8M
(e.g. MX8MM, MX8MP). And we respect your professional comments.

Regards
Aisheng

> From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> Sent: Saturday, June 12, 2021 9:32 PM
> 
> From: Peng Fan <peng.fan@nxp.com>
> 
> The i.MX8MM introduces an IP named BLK_CTL and usually is comprised of
> some GPRs.
> 
> The GPRs has some clock bits and reset bits, but here we take it as virtual PDs,
> because of the clock and power domain A/B lock issue when taking it as a
> clock controller.
> 
> For some bits, it might be good to also make it as a reset controller, but to
> i.MX8MM, we not add that support for now.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/soc/imx/Makefile  |   2 +-
>  drivers/soc/imx/blk-ctl.c | 325
> ++++++++++++++++++++++++++++++++++++++
>  drivers/soc/imx/blk-ctl.h |  85 ++++++++++
>  3 files changed, 411 insertions(+), 1 deletion(-)  create mode 100644
> drivers/soc/imx/blk-ctl.c  create mode 100644 drivers/soc/imx/blk-ctl.h
> 
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index
> 078dc918f4f3..d3d2b49a386c 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o  endif
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> diff --git a/drivers/soc/imx/blk-ctl.c b/drivers/soc/imx/blk-ctl.c new file mode
> 100644 index 000000000000..3464e4cf7fe6
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.c
> @@ -0,0 +1,325 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2021 NXP.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/pm_domain.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +
> +#include "blk-ctl.h"
> +
> +static inline struct imx_blk_ctl_domain *to_imx_blk_ctl_pd(struct
> +generic_pm_domain *genpd) {
> +	return container_of(genpd, struct imx_blk_ctl_domain, genpd); }
> +
> +static int imx_blk_ctl_enable_hsk(struct device *dev) {
> +	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +	const struct imx_blk_ctl_hw *hw = blk_ctl->dev_data->hw_hsk;
> +	struct regmap *regmap = blk_ctl->regmap;
> +	int ret;
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask,
> hw->rst_mask);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +	/* Wait for handshake */
> +	udelay(5);
> +
> +	return ret;
> +}
> +
> +static int imx_blk_ctl_power_on(struct generic_pm_domain *domain) {
> +	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +	struct regmap *regmap = blk_ctl->regmap;
> +	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +	int ret;
> +
> +	mutex_lock(&blk_ctl->lock);
> +
> +	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +	if (ret) {
> +		mutex_unlock(&blk_ctl->lock);
> +		return ret;
> +	}
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +		if (ret) {
> +			dev_err(blk_ctl->dev, "Hankshake failed when power on\n");
> +			goto disable_clk;
> +		}
> +	}
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +		ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +		if (ret)
> +			goto disable_clk;
> +
> +		/* Wait for reset propagate */
> +		udelay(5);
> +
> +		ret = regmap_update_bits(regmap, hw->rst_offset, hw->rst_mask,
> hw->rst_mask);
> +		if (ret)
> +			goto disable_clk;
> +	}
> +
> +	ret = regmap_update_bits(regmap, hw->offset, hw->mask, hw->mask);
> +
> +disable_clk:
> +	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +	mutex_unlock(&blk_ctl->lock);
> +
> +	return ret;
> +}
> +
> +static int imx_blk_ctl_power_off(struct generic_pm_domain *domain) {
> +	struct imx_blk_ctl_domain *pd = to_imx_blk_ctl_pd(domain);
> +	struct imx_blk_ctl *blk_ctl = pd->blk_ctl;
> +	struct regmap *regmap = blk_ctl->regmap;
> +	const struct imx_blk_ctl_hw *hw = &blk_ctl->dev_data->pds[pd->id];
> +	int ret;
> +
> +	mutex_lock(&blk_ctl->lock);
> +
> +	ret = clk_bulk_prepare_enable(blk_ctl->num_clks, blk_ctl->clks);
> +	if (ret) {
> +		mutex_unlock(&blk_ctl->lock);
> +		return ret;
> +	}
> +
> +	if (!(hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)) {
> +		ret = regmap_clear_bits(regmap, hw->offset, hw->mask);
> +		if (ret)
> +			goto disable_clk;
> +
> +		if (hw->flags & IMX_BLK_CTL_PD_RESET) {
> +			ret = regmap_clear_bits(regmap, hw->rst_offset, hw->rst_mask);
> +			if (ret)
> +				goto disable_clk;
> +		}
> +	}
> +
> +	if (hw->flags & IMX_BLK_CTL_PD_HANDSHAKE) {
> +		ret = imx_blk_ctl_enable_hsk(blk_ctl->dev);
> +		if (ret)
> +			dev_err(blk_ctl->dev, "Hankshake failed when power off\n");
> +	}
> +
> +disable_clk:
> +	clk_bulk_disable_unprepare(blk_ctl->num_clks, blk_ctl->clks);
> +
> +	mutex_unlock(&blk_ctl->lock);
> +
> +	return ret;
> +}
> +
> +static int imx_blk_ctl_probe(struct platform_device *pdev) {
> +	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +	struct generic_pm_domain *parent_genpd;
> +	struct device *dev = &pdev->dev;
> +	struct device *active_pd;
> +	int ret;
> +
> +	pdev->dev.of_node = blk_ctl->dev->of_node;
> +
> +	if (domain->hw->active_pd_name) {
> +		active_pd = dev_pm_domain_attach_by_name(dev,
> domain->hw->active_pd_name);
> +		if (IS_ERR_OR_NULL(active_pd)) {
> +			ret = PTR_ERR(active_pd) ? : -ENODATA;
> +			pdev->dev.of_node = NULL;
> +			return ret;
> +		}
> +
> +		domain->active_pd = active_pd;
> +	} else {
> +		if (!blk_ctl->bus_domain) {
> +			pdev->dev.of_node = NULL;
> +			return -EPROBE_DEFER;
> +		}
> +	}
> +
> +	if (domain->hw->active_pd_name)
> +		parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +	else
> +		parent_genpd = blk_ctl->bus_domain;
> +
> +	if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
> +		dev_warn(dev, "failed to add subdomain: %s\n",
> domain->genpd.name);
> +	} else {
> +		mutex_lock(&blk_ctl->lock);
> +		domain->hooked = true;
> +		mutex_unlock(&blk_ctl->lock);
> +	}
> +
> +	return 0;
> +}
> +
> +static int imx_blk_ctl_remove(struct platform_device *pdev) {
> +	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
> +	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
> +	struct generic_pm_domain *parent_genpd;
> +	struct device *active_pd;
> +
> +	if (domain->hw->active_pd_name)
> +		parent_genpd = pd_to_genpd(active_pd->pm_domain);
> +	else
> +		parent_genpd = blk_ctl->bus_domain;
> +
> +	pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
> +
> +	mutex_lock(&blk_ctl->lock);
> +	domain->hooked = false;
> +	mutex_unlock(&blk_ctl->lock);
> +
> +	if (domain->hw->active_pd_name)
> +		dev_pm_domain_detach(domain->active_pd, false);
> +
> +	return 0;
> +}
> +
> +static const struct platform_device_id imx_blk_ctl_id[] = {
> +	{ "imx-vpumix-blk-ctl", },
> +	{ "imx-dispmix-blk-ctl", },
> +	{ },
> +};
> +
> +static struct platform_driver imx_blk_ctl_driver = {
> +	.driver = {
> +		.name = "imx-blk-ctl",
> +	},
> +	.probe    = imx_blk_ctl_probe,
> +	.remove   = imx_blk_ctl_remove,
> +	.id_table = imx_blk_ctl_id,
> +};
> +builtin_platform_driver(imx_blk_ctl_driver)
> +
> +static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct
> of_phandle_args *genpdspec,
> +							 void *data)
> +{
> +	struct genpd_onecell_data *genpd_data = data;
> +	unsigned int idx = genpdspec->args[0];
> +	struct imx_blk_ctl_domain *domain;
> +	struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
> +
> +	if (genpdspec->args_count != 1)
> +		return ERR_PTR(-EINVAL);
> +
> +	if (idx >= genpd_data->num_domains)
> +		return ERR_PTR(-EINVAL);
> +
> +	if (!genpd_data->domains[idx])
> +		return ERR_PTR(-ENOENT);
> +
> +	domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
> +
> +	mutex_lock(&domain->blk_ctl->lock);
> +	if (domain->hooked)
> +		genpd = genpd_data->domains[idx];
> +	mutex_unlock(&domain->blk_ctl->lock);
> +
> +	return genpd;
> +}
> +
> +int imx_blk_ctl_register(struct device *dev) {
> +	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
> +	const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
> +	int num = dev_data->pds_num;
> +	struct imx_blk_ctl_domain *domain;
> +	struct generic_pm_domain *genpd;
> +	struct platform_device *pd_pdev;
> +	int domain_index;
> +	int i, ret;
> +
> +	blk_ctl->onecell_data.num_domains = num;
> +	blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
> +	blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct
> generic_pm_domain *),
> +						     GFP_KERNEL);
> +	if (!blk_ctl->onecell_data.domains)
> +		return -ENOMEM;
> +
> +	for (i = 0; i < num; i++) {
> +		domain_index = dev_data->pds[i].id;
> +		if (domain_index >= num) {
> +			dev_warn(dev, "Domain index %d is out of bounds\n",
> domain_index);
> +			continue;
> +		}
> +
> +		domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain),
> GFP_KERNEL);
> +		if (!domain)
> +			goto error;
> +
> +		pd_pdev = platform_device_alloc(dev_data->name, domain_index);
> +		if (!pd_pdev) {
> +			dev_err(dev, "Failed to allocate platform device\n");
> +			goto error;
> +		}
> +
> +		pd_pdev->dev.platform_data = domain;
> +
> +		domain->blk_ctl = blk_ctl;
> +		domain->hw = &dev_data->pds[i];
> +		domain->id = domain_index;
> +		domain->genpd.name = dev_data->pds[i].name;
> +		domain->genpd.power_off = imx_blk_ctl_power_off;
> +		domain->genpd.power_on = imx_blk_ctl_power_on;
> +		domain->dev = &pd_pdev->dev;
> +		domain->hooked = false;
> +
> +		ret = pm_genpd_init(&domain->genpd, NULL, true);
> +		pd_pdev->dev.parent = dev;
> +
> +		if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
> +			blk_ctl->bus_domain = &domain->genpd;
> +
> +		ret = platform_device_add(pd_pdev);
> +		if (ret) {
> +			platform_device_put(pd_pdev);
> +			goto error;
> +		}
> +		blk_ctl->onecell_data.domains[i] = &domain->genpd;
> +	}
> +
> +	return of_genpd_add_provider_onecell(dev->of_node,
> +&blk_ctl->onecell_data);
> +
> +error:
> +	for (; i >= 0; i--) {
> +		genpd = blk_ctl->onecell_data.domains[i];
> +		if (!genpd)
> +			continue;
> +		domain = to_imx_blk_ctl_pd(genpd);
> +		if (domain->dev)
> +			platform_device_put(to_platform_device(domain->dev));
> +	}
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
> +
> +const struct dev_pm_ops imx_blk_ctl_pm_ops = {
> +	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
> +pm_runtime_force_resume) }; EXPORT_SYMBOL_GPL(imx_blk_ctl_pm_ops);
> diff --git a/drivers/soc/imx/blk-ctl.h b/drivers/soc/imx/blk-ctl.h new file mode
> 100644 index 000000000000..6780d00ec8c5
> --- /dev/null
> +++ b/drivers/soc/imx/blk-ctl.h
> @@ -0,0 +1,85 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __SOC_IMX_BLK_CTL_H
> +#define __SOC_IMX_BLK_CTL_H
> +
> +enum imx_blk_ctl_pd_type {
> +	BLK_CTL_PD,
> +};
> +
> +struct imx_blk_ctl_hw {
> +	int type;
> +	char *name;
> +	char *active_pd_name;
> +	u32 offset;
> +	u32 mask;
> +	u32 flags;
> +	u32 id;
> +	u32 rst_offset;
> +	u32 rst_mask;
> +	u32 errata;
> +};
> +
> +struct imx_blk_ctl_domain {
> +	struct generic_pm_domain genpd;
> +	struct device *active_pd;
> +	struct imx_blk_ctl *blk_ctl;
> +	struct imx_blk_ctl_hw *hw;
> +	struct device *dev;
> +	bool hooked;
> +	u32 id;
> +};
> +
> +struct imx_blk_ctl_dev_data {
> +	struct regmap_config config;
> +	struct imx_blk_ctl_hw *pds;
> +	struct imx_blk_ctl_hw *hw_hsk;
> +	u32 pds_num;
> +	u32 max_num;
> +	char *name;
> +};
> +
> +struct imx_blk_ctl {
> +	struct device *dev;
> +	struct regmap *regmap;
> +	struct genpd_onecell_data onecell_data;
> +	const struct imx_blk_ctl_dev_data *dev_data;
> +	struct clk_bulk_data *clks;
> +	u32 num_clks;
> +	struct generic_pm_domain *bus_domain;
> +
> +	struct mutex lock;
> +};
> +
> +#define IMX_BLK_CTL(_type, _name, _active_pd, _id, _offset, _mask,
> _rst_offset, _rst_mask,	\
> +		    _flags, _errata)								\
> +	{											\
> +		.type = _type,									\
> +		.name = _name,									\
> +		.active_pd_name = _active_pd,							\
> +		.id = _id,									\
> +		.offset = _offset,								\
> +		.mask = _mask,									\
> +		.flags = _flags,								\
> +		.rst_offset = _rst_offset,							\
> +		.rst_mask = _rst_mask,								\
> +		.errata = _errata,								\
> +	}
> +
> +#define IMX_BLK_CTL_PD(_name, _active_pd, _id, _offset, _mask, _rst_offset,
> _rst_mask, _flags)	\
> +	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask,
> _rst_offset,		\
> +		    _rst_mask, _flags, 0)
> +
> +#define IMX_BLK_CTL_PD_ERRATA(_name, _active_pd, _id, _offset, _mask,
> _rst_offset, _rst_mask,	\
> +			      _flags, _errata)							\
> +	IMX_BLK_CTL(BLK_CTL_PD, _name, _active_pd, _id, _offset, _mask,
> _rst_offset,		\
> +		    _rst_mask, _flags, _errata)
> +
> +int imx_blk_ctl_register(struct device *dev);
> +
> +#define IMX_BLK_CTL_PD_HANDSHAKE	BIT(0)
> +#define IMX_BLK_CTL_PD_RESET		BIT(1)
> +#define IMX_BLK_CTL_PD_BUS		BIT(2)
> +
> +const extern struct dev_pm_ops imx_blk_ctl_pm_ops;
> +
> +#endif
> --
> 2.30.0

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Wed, Jun 16, 2021 at 10:14 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> > Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> >
> > On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> > wrote:
> > >
> > >
> > > On 2021/6/15 3:29, Adam Ford wrote:
> > > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com>
> > wrote:
> > > >>
> > > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> > wrote:
> > > >>>
> > > >>> From: Peng Fan <peng.fan@nxp.com>
> > > >>>
> > > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we
> > add
> > > >>> that support in this driver.
> > > >>>
> > > >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > > >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > >>
> > > >> Maybe my TF-A is too old, but I am not able to wake the device from
> > > >> suspend-to-ram with this series.  I used the device tree from [1]
> > > >> to enable both the GPCv2 and the blk-ctl stuff.
> > > >>
> > > >> [1] -
> > > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > > >>
> > atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604
> > > >>
> > 111005.6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.
> > fan
> > > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> > 2b4c6fa92
> > > >>
> > cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF
> > pbGZsb3d8
> > > >>
> > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> > D%
> > > >>
> > 7C1000&amp;sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj
> > jQ8%3D
> > > >> &amp;reserved=0
> > > >>
> > > >> I based both off Shawn's for-next branch.
> > > >
> > > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > > > for-next branch, and my board hangs when USB is loaded, but USB
> > > > doesn't use blk-ctl, it just uses GPCv2.
> > > >
> > > > I looked at some of the changes with GPCv2, and I noticed a comment
> > > > in the GPCv2 function called imx_pgc_power_up.  The comment reads:
> > > >
> > > > /*
> > > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
> > reg_val,
> > > > *   (reg_val & domain->bits.hskack), 0,
> > > > *   USEC_PER_MSEC);
> > > > * Technically we need the commented code to wait handshake. But that
> > > > needs
> > > > * the BLK-CTL module BUS clk-en bit being set.
> > > > *
> > > > * There is a separate BLK-CTL module and we will have such a driver
> > > > for it,
> > > > * that driver will set the BUS clk-en bit and handshake will be
> > > > triggered
> > > > * automatically there. Just add a delay and suppose the handshake
> > > > finish
> > > > * after that.
> > > > */
> > > >
> > > > I didn't see a delay here despite the comment saying we should add one.
> > > >
> > > > With the blk-ctl enabled, I attempted to uncomment the above line of
> > > > code without much success in preventing the board from hanging.
> > > >
> > > > If BUS clk-en bit needs to be set in order for the handshake to
> > > > work, should all these power domains reference it to bring it up?
> > > > If we decide against using the BUS clk-en bit, what should this delay be?
> > >
> > > It is only for power domain has mix and need delay for the handshake.
> > > USB no need that handshake.
> >
> > Don't the OTG domains depend on hsiomix?
>
>
> It works well with this change in dtsi.
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 0e01ff649956..e930ae3122ec 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -1087,6 +1087,7 @@ usbotg1: usb@32e40000 {
>                                 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
>                                 fsl,usbphy = <&usbphynop1>;
>                                 fsl,usbmisc = <&usbmisc1 0>;
> +                               power-domains = <&pgc_otg1>;
>                                 status = "disabled";
>                         };
>
> @@ -1106,6 +1107,7 @@ usbotg2: usb@32e50000 {
>                                 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
>                                 fsl,usbphy = <&usbphynop2>;
>                                 fsl,usbmisc = <&usbmisc2 0>;
> +                               power-domains = <&pgc_otg2>;
>                                 status = "disabled";
>                         };
>

Even with USB disabled, I was still having issues resuming from
suspend-to-ram.  I'll enable these and try again.

adam
>
> Regards,
> Peng.
>
> >
> > >
> > > Could you post a github branch, then I could give a look?
> >
> > No problem.
> >
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.
> > com%2Faford173%2Flinux%2Ftree%2Ffor-next&amp;data=04%7C01%7Cpen
> > g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> > 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow
> > n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> > WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6tiEiL7TMioVeb88WKHTYxVPxE
> > MT1pboN%2FSMxiKA1yM%3D&amp;reserved=0
> >
> > thanks
> >
> > adam
> >
> > >
> > > Thanks,
> > > Peng.
> > >
> > > >
> > > > adam
> > > >>
> > > >> adam
> > > >>
> > > >>> ---
> > > >>>   drivers/soc/imx/Makefile         |   2 +-
> > > >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139
> > +++++++++++++++++++++++++++++++
> > > >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> > > >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>>
> > > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > > >>> index d3d2b49a386c..c260b962f495 100644
> > > >>> --- a/drivers/soc/imx/Makefile
> > > >>> +++ b/drivers/soc/imx/Makefile
> > > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> > > >>>   endif
> > > >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> > > >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > blk-ctl-imx8mm.o
> > > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>> new file mode 100644
> > > >>> index 000000000000..59443588f892
> > > >>> --- /dev/null
> > > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>> @@ -0,0 +1,139 @@
> > > >>> +// SPDX-License-Identifier: GPL-2.0
> > > >>> +/*
> > > >>> + * Copyright 2021 NXP
> > > >>> + */
> > > >>> +
> > > >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> > > >>> +#include <dt-bindings/power/imx8mm-power.h>
> > > >>> +#include <linux/clk.h>
> > > >>> +#include <linux/err.h>
> > > >>> +#include <linux/io.h>
> > > >>> +#include <linux/module.h>
> > > >>> +#include <linux/mutex.h>
> > > >>> +#include <linux/of_address.h>
> > > >>> +#include <linux/of_device.h>
> > > >>> +#include <linux/platform_device.h> #include <linux/slab.h>
> > > >>> +#include <linux/types.h> #include <linux/pm_domain.h> #include
> > > >>> +<linux/regmap.h>
> > > >>> +
> > > >>> +#include "blk-ctl.h"
> > > >>> +
> > > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN
> > BIT(6)
> > > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN
> > BIT(5)
> > > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN
> > BIT(4)
> > > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> > BIT(3)
> > > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN
> > GENMASK(2, 0)
> > > >>> +
> > > >>> +#define MEDIA_BLK_BUS_PD_MASK
> > BIT(12)
> > > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK
> > GENMASK(11, 10)
> > > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK
> > GENMASK(9, 8)
> > > >>> +#define MEDIA_BLK_LCDIF_PD_MASK
> > GENMASK(7, 6)
> > > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK
> > GENMASK(5, 0)
> > > >>> +
> > > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > > >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL,
> > IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > > >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> > MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("LCDIF", NULL,
> > IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > > >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > > >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> > IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > > >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> > MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> > IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > > >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > > >>> +
> > MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> > MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix",
> > IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > > >>> +                      MEDIA_BLK_BUS_PD_MASK, 0,
> > MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_HANDSHAKE |
> > > >>> +IMX_BLK_CTL_PD_RESET) };
> > > >>> +
> > > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> > IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > > >>> +                      BIT(0), 0, BIT(0),
> > IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> > IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > > >>> +                      BIT(1), 0, BIT(1),
> > IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> > IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > > >>> +                      BIT(2), 0, BIT(2),
> > IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix",
> > IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > > >>> +                      BIT(2), 0, BIT(2),
> > IMX_BLK_CTL_PD_HANDSHAKE
> > > >>> +| IMX_BLK_CTL_PD_RESET) };
> > > >>> +
> > > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > > >>> +       .reg_bits               = 32,
> > > >>> +       .reg_stride             = 4,
> > > >>> +       .val_bits               = 32,
> > > >>> +       .max_register           = 0x30,
> > > >>> +       .fast_io                = true,
> > > >>> +};
> > > >>> +
> > > >>> +static const struct imx_blk_ctl_dev_data
> > imx8mm_vpumix_blk_ctl_dev_data = {
> > > >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > > >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > > >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > > >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > > >>> +       .name = "imx-vpumix-blk-ctl", };
> > > >>> +
> > > >>> +static const struct imx_blk_ctl_dev_data
> > imx8mm_dispmix_blk_ctl_dev_data = {
> > > >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > > >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > > >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > > >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > > >>> +       .name = "imx-dispmix-blk-ctl", };
> > > >>> +
> > > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > > >>> +       struct device *dev = &pdev->dev;
> > > >>> +       const struct imx_blk_ctl_dev_data *dev_data =
> > of_device_get_match_data(dev);
> > > >>> +       struct regmap *regmap;
> > > >>> +       struct imx_blk_ctl *ctl;
> > > >>> +       void __iomem *base;
> > > >>> +
> > > >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > > >>> +       if (!ctl)
> > > >>> +               return -ENOMEM;
> > > >>> +
> > > >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> > > >>> +       if (IS_ERR(base))
> > > >>> +               return PTR_ERR(base);
> > > >>> +
> > > >>> +       regmap = devm_regmap_init_mmio(dev, base,
> > &dev_data->config);
> > > >>> +       if (IS_ERR(regmap))
> > > >>> +               return PTR_ERR(regmap);
> > > >>> +
> > > >>> +       ctl->regmap = regmap;
> > > >>> +       ctl->dev = dev;
> > > >>> +       mutex_init(&ctl->lock);
> > > >>> +
> > > >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > > >>> +       if (ctl->num_clks < 0)
> > > >>> +               return ctl->num_clks;
> > > >>> +
> > > >>> +       dev_set_drvdata(dev, ctl);
> > > >>> +       ctl->dev_data = dev_data;
> > > >>> +
> > > >>> +       return imx_blk_ctl_register(dev); }
> > > >>> +
> > > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > > >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data =
> > &imx8mm_vpumix_blk_ctl_dev_data },
> > > >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data =
> > &imx8mm_dispmix_blk_ctl_dev_data },
> > > >>> +       { /* Sentinel */ }
> > > >>> +};
> > > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > > >>> +
> > > >>> +static struct platform_driver imx_blk_ctl_driver = {
> > > >>> +       .probe = imx8mm_blk_ctl_probe,
> > > >>> +       .driver = {
> > > >>> +               .name = "imx8mm-blk-ctl",
> > > >>> +               .of_match_table =
> > of_match_ptr(imx_blk_ctl_of_match),
> > > >>> +               .pm = &imx_blk_ctl_pm_ops,
> > > >>> +       },
> > > >>> +};
> > > >>> +module_platform_driver(imx_blk_ctl_driver);
> > > >>> --
> > > >>> 2.30.0
> > > >>>

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Adam Ford]

On Wed, Jun 16, 2021 at 10:14 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> > Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> >
> > On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> > wrote:
> > >
> > >
> > > On 2021/6/15 3:29, Adam Ford wrote:
> > > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford <aford173@gmail.com>
> > wrote:
> > > >>
> > > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> > wrote:
> > > >>>
> > > >>> From: Peng Fan <peng.fan@nxp.com>
> > > >>>
> > > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we
> > add
> > > >>> that support in this driver.
> > > >>>
> > > >>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > > >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > >>
> > > >> Maybe my TF-A is too old, but I am not able to wake the device from
> > > >> suspend-to-ram with this series.  I used the device tree from [1]
> > > >> to enable both the GPCv2 and the blk-ctl stuff.
> > > >>
> > > >> [1] -
> > > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > > >>
> > atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604
> > > >>
> > 111005.6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.
> > fan
> > > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> > 2b4c6fa92
> > > >>
> > cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF
> > pbGZsb3d8
> > > >>
> > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> > D%
> > > >>
> > 7C1000&amp;sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj
> > jQ8%3D
> > > >> &amp;reserved=0
> > > >>
> > > >> I based both off Shawn's for-next branch.
> > > >
> > > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's
> > > > for-next branch, and my board hangs when USB is loaded, but USB
> > > > doesn't use blk-ctl, it just uses GPCv2.
> > > >
> > > > I looked at some of the changes with GPCv2, and I noticed a comment
> > > > in the GPCv2 function called imx_pgc_power_up.  The comment reads:
> > > >
> > > > /*
> > > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
> > reg_val,
> > > > *   (reg_val & domain->bits.hskack), 0,
> > > > *   USEC_PER_MSEC);
> > > > * Technically we need the commented code to wait handshake. But that
> > > > needs
> > > > * the BLK-CTL module BUS clk-en bit being set.
> > > > *
> > > > * There is a separate BLK-CTL module and we will have such a driver
> > > > for it,
> > > > * that driver will set the BUS clk-en bit and handshake will be
> > > > triggered
> > > > * automatically there. Just add a delay and suppose the handshake
> > > > finish
> > > > * after that.
> > > > */
> > > >
> > > > I didn't see a delay here despite the comment saying we should add one.
> > > >
> > > > With the blk-ctl enabled, I attempted to uncomment the above line of
> > > > code without much success in preventing the board from hanging.
> > > >
> > > > If BUS clk-en bit needs to be set in order for the handshake to
> > > > work, should all these power domains reference it to bring it up?
> > > > If we decide against using the BUS clk-en bit, what should this delay be?
> > >
> > > It is only for power domain has mix and need delay for the handshake.
> > > USB no need that handshake.
> >
> > Don't the OTG domains depend on hsiomix?
>
>
> It works well with this change in dtsi.
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 0e01ff649956..e930ae3122ec 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -1087,6 +1087,7 @@ usbotg1: usb@32e40000 {
>                                 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
>                                 fsl,usbphy = <&usbphynop1>;
>                                 fsl,usbmisc = <&usbmisc1 0>;
> +                               power-domains = <&pgc_otg1>;
>                                 status = "disabled";
>                         };
>
> @@ -1106,6 +1107,7 @@ usbotg2: usb@32e50000 {
>                                 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
>                                 fsl,usbphy = <&usbphynop2>;
>                                 fsl,usbmisc = <&usbmisc2 0>;
> +                               power-domains = <&pgc_otg2>;
>                                 status = "disabled";
>                         };
>

Even with USB disabled, I was still having issues resuming from
suspend-to-ram.  I'll enable these and try again.

adam
>
> Regards,
> Peng.
>
> >
> > >
> > > Could you post a github branch, then I could give a look?
> >
> > No problem.
> >
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.
> > com%2Faford173%2Flinux%2Ftree%2Ffor-next&amp;data=04%7C01%7Cpen
> > g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc
> > 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow
> > n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> > WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6tiEiL7TMioVeb88WKHTYxVPxE
> > MT1pboN%2FSMxiKA1yM%3D&amp;reserved=0
> >
> > thanks
> >
> > adam
> >
> > >
> > > Thanks,
> > > Peng.
> > >
> > > >
> > > > adam
> > > >>
> > > >> adam
> > > >>
> > > >>> ---
> > > >>>   drivers/soc/imx/Makefile         |   2 +-
> > > >>>   drivers/soc/imx/blk-ctl-imx8mm.c | 139
> > +++++++++++++++++++++++++++++++
> > > >>>   2 files changed, 140 insertions(+), 1 deletion(-)
> > > >>>   create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>>
> > > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> > > >>> index d3d2b49a386c..c260b962f495 100644
> > > >>> --- a/drivers/soc/imx/Makefile
> > > >>> +++ b/drivers/soc/imx/Makefile
> > > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o
> > > >>>   endif
> > > >>>   obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> > > >>>   obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> > > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o
> > blk-ctl-imx8mm.o
> > > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>> new file mode 100644
> > > >>> index 000000000000..59443588f892
> > > >>> --- /dev/null
> > > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > > >>> @@ -0,0 +1,139 @@
> > > >>> +// SPDX-License-Identifier: GPL-2.0
> > > >>> +/*
> > > >>> + * Copyright 2021 NXP
> > > >>> + */
> > > >>> +
> > > >>> +#include <dt-bindings/clock/imx8mm-clock.h>
> > > >>> +#include <dt-bindings/power/imx8mm-power.h>
> > > >>> +#include <linux/clk.h>
> > > >>> +#include <linux/err.h>
> > > >>> +#include <linux/io.h>
> > > >>> +#include <linux/module.h>
> > > >>> +#include <linux/mutex.h>
> > > >>> +#include <linux/of_address.h>
> > > >>> +#include <linux/of_device.h>
> > > >>> +#include <linux/platform_device.h> #include <linux/slab.h>
> > > >>> +#include <linux/types.h> #include <linux/pm_domain.h> #include
> > > >>> +<linux/regmap.h>
> > > >>> +
> > > >>> +#include "blk-ctl.h"
> > > >>> +
> > > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN
> > BIT(6)
> > > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN
> > BIT(5)
> > > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN
> > BIT(4)
> > > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> > BIT(3)
> > > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN
> > GENMASK(2, 0)
> > > >>> +
> > > >>> +#define MEDIA_BLK_BUS_PD_MASK
> > BIT(12)
> > > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK
> > GENMASK(11, 10)
> > > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK
> > GENMASK(9, 8)
> > > >>> +#define MEDIA_BLK_LCDIF_PD_MASK
> > GENMASK(7, 6)
> > > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK
> > GENMASK(5, 0)
> > > >>> +
> > > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = {
> > > >>> +       IMX_BLK_CTL_PD("CSI_BRIDGE", NULL,
> > IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > > >>> +                      MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> > MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("LCDIF", NULL,
> > IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > > >>> +                      MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > > >>> +       IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> > IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > > >>> +                      MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> > MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> > IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > > >>> +                      MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > > >>> +
> > MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> > MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix",
> > IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4,
> > > >>> +                      MEDIA_BLK_BUS_PD_MASK, 0,
> > MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > > >>> +                      IMX_BLK_CTL_PD_HANDSHAKE |
> > > >>> +IMX_BLK_CTL_PD_RESET) };
> > > >>> +
> > > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = {
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> > IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > > >>> +                      BIT(0), 0, BIT(0),
> > IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> > IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > > >>> +                      BIT(1), 0, BIT(1),
> > IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> > IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > > >>> +                      BIT(2), 0, BIT(2),
> > IMX_BLK_CTL_PD_RESET),
> > > >>> +       IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix",
> > IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4,
> > > >>> +                      BIT(2), 0, BIT(2),
> > IMX_BLK_CTL_PD_HANDSHAKE
> > > >>> +| IMX_BLK_CTL_PD_RESET) };
> > > >>> +
> > > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = {
> > > >>> +       .reg_bits               = 32,
> > > >>> +       .reg_stride             = 4,
> > > >>> +       .val_bits               = 32,
> > > >>> +       .max_register           = 0x30,
> > > >>> +       .fast_io                = true,
> > > >>> +};
> > > >>> +
> > > >>> +static const struct imx_blk_ctl_dev_data
> > imx8mm_vpumix_blk_ctl_dev_data = {
> > > >>> +       .pds = imx8mm_vpumix_blk_ctl_pds,
> > > >>> +       .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > > >>> +       .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX,
> > > >>> +       .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3],
> > > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > > >>> +       .name = "imx-vpumix-blk-ctl", };
> > > >>> +
> > > >>> +static const struct imx_blk_ctl_dev_data
> > imx8mm_dispmix_blk_ctl_dev_data = {
> > > >>> +       .pds = imx8mm_dispmix_blk_ctl_pds,
> > > >>> +       .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > > >>> +       .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX,
> > > >>> +       .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4],
> > > >>> +       .config = imx8mm_blk_ctl_regmap_config,
> > > >>> +       .name = "imx-dispmix-blk-ctl", };
> > > >>> +
> > > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > > >>> +       struct device *dev = &pdev->dev;
> > > >>> +       const struct imx_blk_ctl_dev_data *dev_data =
> > of_device_get_match_data(dev);
> > > >>> +       struct regmap *regmap;
> > > >>> +       struct imx_blk_ctl *ctl;
> > > >>> +       void __iomem *base;
> > > >>> +
> > > >>> +       ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > > >>> +       if (!ctl)
> > > >>> +               return -ENOMEM;
> > > >>> +
> > > >>> +       base = devm_platform_ioremap_resource(pdev, 0);
> > > >>> +       if (IS_ERR(base))
> > > >>> +               return PTR_ERR(base);
> > > >>> +
> > > >>> +       regmap = devm_regmap_init_mmio(dev, base,
> > &dev_data->config);
> > > >>> +       if (IS_ERR(regmap))
> > > >>> +               return PTR_ERR(regmap);
> > > >>> +
> > > >>> +       ctl->regmap = regmap;
> > > >>> +       ctl->dev = dev;
> > > >>> +       mutex_init(&ctl->lock);
> > > >>> +
> > > >>> +       ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
> > > >>> +       if (ctl->num_clks < 0)
> > > >>> +               return ctl->num_clks;
> > > >>> +
> > > >>> +       dev_set_drvdata(dev, ctl);
> > > >>> +       ctl->dev_data = dev_data;
> > > >>> +
> > > >>> +       return imx_blk_ctl_register(dev); }
> > > >>> +
> > > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = {
> > > >>> +       { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data =
> > &imx8mm_vpumix_blk_ctl_dev_data },
> > > >>> +       { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data =
> > &imx8mm_dispmix_blk_ctl_dev_data },
> > > >>> +       { /* Sentinel */ }
> > > >>> +};
> > > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > > >>> +
> > > >>> +static struct platform_driver imx_blk_ctl_driver = {
> > > >>> +       .probe = imx8mm_blk_ctl_probe,
> > > >>> +       .driver = {
> > > >>> +               .name = "imx8mm-blk-ctl",
> > > >>> +               .of_match_table =
> > of_match_ptr(imx_blk_ctl_of_match),
> > > >>> +               .pm = &imx_blk_ctl_pm_ops,
> > > >>> +       },
> > > >>> +};
> > > >>> +module_platform_driver(imx_blk_ctl_driver);
> > > >>> --
> > > >>> 2.30.0
> > > >>>

_______________________________________________
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linux-arm-kernel@lists.infradead.org
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Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Fabio Estevam]

Hi Adam,

On Thu, Jun 17, 2021 at 9:25 AM Adam Ford <aford173@gmail.com> wrote:

> Even with USB disabled, I was still having issues resuming from
> suspend-to-ram.  I'll enable these and try again.

Could this be ATF version-related?

Peng, could you please share the ATF version you used in your tests?

Cheers

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Fabio Estevam]

Hi Adam,

On Thu, Jun 17, 2021 at 9:25 AM Adam Ford <aford173@gmail.com> wrote:

> Even with USB disabled, I was still having issues resuming from
> suspend-to-ram.  I'll enable these and try again.

Could this be ATF version-related?

Peng, could you please share the ATF version you used in your tests?

Cheers

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 14521 bytes --]

CC: kbuild-all(a)lists.01.org
In-Reply-To: <20210612133134.2738-4-peng.fan@oss.nxp.com>
References: <20210612133134.2738-4-peng.fan@oss.nxp.com>
TO: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
TO: robh+dt(a)kernel.org
TO: shawnguo(a)kernel.org
TO: s.hauer(a)pengutronix.de
CC: kernel(a)pengutronix.de
CC: festevam(a)gmail.com
CC: linux-imx(a)nxp.com
CC: p.zabel(a)pengutronix.de
CC: l.stach(a)pengutronix.de
CC: krzk(a)kernel.org
CC: agx(a)sigxcpu.org

Hi "Peng,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on shawnguo/for-next]
[also build test WARNING on next-20210625]
[cannot apply to robh/for-next pza/reset/next v5.13-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Peng-Fan-OSS/soc-imx-add-i-MX-BLK-CTL-support/20210617-013814
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
:::::: branch date: 10 days ago
:::::: commit date: 10 days ago
config: i386-randconfig-m031-20210625 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

smatch warnings:
drivers/soc/imx/blk-ctl.c:151 imx_blk_ctl_probe() warn: passing zero to 'PTR_ERR'
drivers/soc/imx/blk-ctl.c:188 imx_blk_ctl_remove() error: potentially dereferencing uninitialized 'active_pd'.
drivers/soc/imx/blk-ctl.c:318 imx_blk_ctl_register() error: uninitialized symbol 'ret'.

vim +/PTR_ERR +151 drivers/soc/imx/blk-ctl.c

4fd3f78814fbf8 Peng Fan 2021-06-12  136  
4fd3f78814fbf8 Peng Fan 2021-06-12  137  static int imx_blk_ctl_probe(struct platform_device *pdev)
4fd3f78814fbf8 Peng Fan 2021-06-12  138  {
4fd3f78814fbf8 Peng Fan 2021-06-12  139  	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
4fd3f78814fbf8 Peng Fan 2021-06-12  140  	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
4fd3f78814fbf8 Peng Fan 2021-06-12  141  	struct generic_pm_domain *parent_genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  142  	struct device *dev = &pdev->dev;
4fd3f78814fbf8 Peng Fan 2021-06-12  143  	struct device *active_pd;
4fd3f78814fbf8 Peng Fan 2021-06-12  144  	int ret;
4fd3f78814fbf8 Peng Fan 2021-06-12  145  
4fd3f78814fbf8 Peng Fan 2021-06-12  146  	pdev->dev.of_node = blk_ctl->dev->of_node;
4fd3f78814fbf8 Peng Fan 2021-06-12  147  
4fd3f78814fbf8 Peng Fan 2021-06-12  148  	if (domain->hw->active_pd_name) {
4fd3f78814fbf8 Peng Fan 2021-06-12  149  		active_pd = dev_pm_domain_attach_by_name(dev, domain->hw->active_pd_name);
4fd3f78814fbf8 Peng Fan 2021-06-12  150  		if (IS_ERR_OR_NULL(active_pd)) {
4fd3f78814fbf8 Peng Fan 2021-06-12 @151  			ret = PTR_ERR(active_pd) ? : -ENODATA;
4fd3f78814fbf8 Peng Fan 2021-06-12  152  			pdev->dev.of_node = NULL;
4fd3f78814fbf8 Peng Fan 2021-06-12  153  			return ret;
4fd3f78814fbf8 Peng Fan 2021-06-12  154  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  155  
4fd3f78814fbf8 Peng Fan 2021-06-12  156  		domain->active_pd = active_pd;
4fd3f78814fbf8 Peng Fan 2021-06-12  157  	} else {
4fd3f78814fbf8 Peng Fan 2021-06-12  158  		if (!blk_ctl->bus_domain) {
4fd3f78814fbf8 Peng Fan 2021-06-12  159  			pdev->dev.of_node = NULL;
4fd3f78814fbf8 Peng Fan 2021-06-12  160  			return -EPROBE_DEFER;
4fd3f78814fbf8 Peng Fan 2021-06-12  161  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  162  	}
4fd3f78814fbf8 Peng Fan 2021-06-12  163  
4fd3f78814fbf8 Peng Fan 2021-06-12  164  	if (domain->hw->active_pd_name)
4fd3f78814fbf8 Peng Fan 2021-06-12  165  		parent_genpd = pd_to_genpd(active_pd->pm_domain);
4fd3f78814fbf8 Peng Fan 2021-06-12  166  	else
4fd3f78814fbf8 Peng Fan 2021-06-12  167  		parent_genpd = blk_ctl->bus_domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  168  
4fd3f78814fbf8 Peng Fan 2021-06-12  169  	if (pm_genpd_add_subdomain(parent_genpd, &domain->genpd)) {
4fd3f78814fbf8 Peng Fan 2021-06-12  170  		dev_warn(dev, "failed to add subdomain: %s\n", domain->genpd.name);
4fd3f78814fbf8 Peng Fan 2021-06-12  171  	} else {
4fd3f78814fbf8 Peng Fan 2021-06-12  172  		mutex_lock(&blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  173  		domain->hooked = true;
4fd3f78814fbf8 Peng Fan 2021-06-12  174  		mutex_unlock(&blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  175  	}
4fd3f78814fbf8 Peng Fan 2021-06-12  176  
4fd3f78814fbf8 Peng Fan 2021-06-12  177  	return 0;
4fd3f78814fbf8 Peng Fan 2021-06-12  178  }
4fd3f78814fbf8 Peng Fan 2021-06-12  179  
4fd3f78814fbf8 Peng Fan 2021-06-12  180  static int imx_blk_ctl_remove(struct platform_device *pdev)
4fd3f78814fbf8 Peng Fan 2021-06-12  181  {
4fd3f78814fbf8 Peng Fan 2021-06-12  182  	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
4fd3f78814fbf8 Peng Fan 2021-06-12  183  	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
4fd3f78814fbf8 Peng Fan 2021-06-12  184  	struct generic_pm_domain *parent_genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  185  	struct device *active_pd;
4fd3f78814fbf8 Peng Fan 2021-06-12  186  
4fd3f78814fbf8 Peng Fan 2021-06-12  187  	if (domain->hw->active_pd_name)
4fd3f78814fbf8 Peng Fan 2021-06-12 @188  		parent_genpd = pd_to_genpd(active_pd->pm_domain);
4fd3f78814fbf8 Peng Fan 2021-06-12  189  	else
4fd3f78814fbf8 Peng Fan 2021-06-12  190  		parent_genpd = blk_ctl->bus_domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  191  
4fd3f78814fbf8 Peng Fan 2021-06-12  192  	pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
4fd3f78814fbf8 Peng Fan 2021-06-12  193  
4fd3f78814fbf8 Peng Fan 2021-06-12  194  	mutex_lock(&blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  195  	domain->hooked = false;
4fd3f78814fbf8 Peng Fan 2021-06-12  196  	mutex_unlock(&blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  197  
4fd3f78814fbf8 Peng Fan 2021-06-12  198  	if (domain->hw->active_pd_name)
4fd3f78814fbf8 Peng Fan 2021-06-12  199  		dev_pm_domain_detach(domain->active_pd, false);
4fd3f78814fbf8 Peng Fan 2021-06-12  200  
4fd3f78814fbf8 Peng Fan 2021-06-12  201  	return 0;
4fd3f78814fbf8 Peng Fan 2021-06-12  202  }
4fd3f78814fbf8 Peng Fan 2021-06-12  203  
4fd3f78814fbf8 Peng Fan 2021-06-12  204  static const struct platform_device_id imx_blk_ctl_id[] = {
4fd3f78814fbf8 Peng Fan 2021-06-12  205  	{ "imx-vpumix-blk-ctl", },
4fd3f78814fbf8 Peng Fan 2021-06-12  206  	{ "imx-dispmix-blk-ctl", },
4fd3f78814fbf8 Peng Fan 2021-06-12  207  	{ },
4fd3f78814fbf8 Peng Fan 2021-06-12  208  };
4fd3f78814fbf8 Peng Fan 2021-06-12  209  
4fd3f78814fbf8 Peng Fan 2021-06-12  210  static struct platform_driver imx_blk_ctl_driver = {
4fd3f78814fbf8 Peng Fan 2021-06-12  211  	.driver = {
4fd3f78814fbf8 Peng Fan 2021-06-12  212  		.name = "imx-blk-ctl",
4fd3f78814fbf8 Peng Fan 2021-06-12  213  	},
4fd3f78814fbf8 Peng Fan 2021-06-12  214  	.probe    = imx_blk_ctl_probe,
4fd3f78814fbf8 Peng Fan 2021-06-12  215  	.remove   = imx_blk_ctl_remove,
4fd3f78814fbf8 Peng Fan 2021-06-12  216  	.id_table = imx_blk_ctl_id,
4fd3f78814fbf8 Peng Fan 2021-06-12  217  };
4fd3f78814fbf8 Peng Fan 2021-06-12  218  builtin_platform_driver(imx_blk_ctl_driver)
4fd3f78814fbf8 Peng Fan 2021-06-12  219  
4fd3f78814fbf8 Peng Fan 2021-06-12  220  static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct of_phandle_args *genpdspec,
4fd3f78814fbf8 Peng Fan 2021-06-12  221  							 void *data)
4fd3f78814fbf8 Peng Fan 2021-06-12  222  {
4fd3f78814fbf8 Peng Fan 2021-06-12  223  	struct genpd_onecell_data *genpd_data = data;
4fd3f78814fbf8 Peng Fan 2021-06-12  224  	unsigned int idx = genpdspec->args[0];
4fd3f78814fbf8 Peng Fan 2021-06-12  225  	struct imx_blk_ctl_domain *domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  226  	struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
4fd3f78814fbf8 Peng Fan 2021-06-12  227  
4fd3f78814fbf8 Peng Fan 2021-06-12  228  	if (genpdspec->args_count != 1)
4fd3f78814fbf8 Peng Fan 2021-06-12  229  		return ERR_PTR(-EINVAL);
4fd3f78814fbf8 Peng Fan 2021-06-12  230  
4fd3f78814fbf8 Peng Fan 2021-06-12  231  	if (idx >= genpd_data->num_domains)
4fd3f78814fbf8 Peng Fan 2021-06-12  232  		return ERR_PTR(-EINVAL);
4fd3f78814fbf8 Peng Fan 2021-06-12  233  
4fd3f78814fbf8 Peng Fan 2021-06-12  234  	if (!genpd_data->domains[idx])
4fd3f78814fbf8 Peng Fan 2021-06-12  235  		return ERR_PTR(-ENOENT);
4fd3f78814fbf8 Peng Fan 2021-06-12  236  
4fd3f78814fbf8 Peng Fan 2021-06-12  237  	domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
4fd3f78814fbf8 Peng Fan 2021-06-12  238  
4fd3f78814fbf8 Peng Fan 2021-06-12  239  	mutex_lock(&domain->blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  240  	if (domain->hooked)
4fd3f78814fbf8 Peng Fan 2021-06-12  241  		genpd = genpd_data->domains[idx];
4fd3f78814fbf8 Peng Fan 2021-06-12  242  	mutex_unlock(&domain->blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  243  
4fd3f78814fbf8 Peng Fan 2021-06-12  244  	return genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  245  }
4fd3f78814fbf8 Peng Fan 2021-06-12  246  
4fd3f78814fbf8 Peng Fan 2021-06-12  247  int imx_blk_ctl_register(struct device *dev)
4fd3f78814fbf8 Peng Fan 2021-06-12  248  {
4fd3f78814fbf8 Peng Fan 2021-06-12  249  	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
4fd3f78814fbf8 Peng Fan 2021-06-12  250  	const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
4fd3f78814fbf8 Peng Fan 2021-06-12  251  	int num = dev_data->pds_num;
4fd3f78814fbf8 Peng Fan 2021-06-12  252  	struct imx_blk_ctl_domain *domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  253  	struct generic_pm_domain *genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  254  	struct platform_device *pd_pdev;
4fd3f78814fbf8 Peng Fan 2021-06-12  255  	int domain_index;
4fd3f78814fbf8 Peng Fan 2021-06-12  256  	int i, ret;
4fd3f78814fbf8 Peng Fan 2021-06-12  257  
4fd3f78814fbf8 Peng Fan 2021-06-12  258  	blk_ctl->onecell_data.num_domains = num;
4fd3f78814fbf8 Peng Fan 2021-06-12  259  	blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
4fd3f78814fbf8 Peng Fan 2021-06-12  260  	blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct generic_pm_domain *),
4fd3f78814fbf8 Peng Fan 2021-06-12  261  						     GFP_KERNEL);
4fd3f78814fbf8 Peng Fan 2021-06-12  262  	if (!blk_ctl->onecell_data.domains)
4fd3f78814fbf8 Peng Fan 2021-06-12  263  		return -ENOMEM;
4fd3f78814fbf8 Peng Fan 2021-06-12  264  
4fd3f78814fbf8 Peng Fan 2021-06-12  265  	for (i = 0; i < num; i++) {
4fd3f78814fbf8 Peng Fan 2021-06-12  266  		domain_index = dev_data->pds[i].id;
4fd3f78814fbf8 Peng Fan 2021-06-12  267  		if (domain_index >= num) {
4fd3f78814fbf8 Peng Fan 2021-06-12  268  			dev_warn(dev, "Domain index %d is out of bounds\n", domain_index);
4fd3f78814fbf8 Peng Fan 2021-06-12  269  			continue;
4fd3f78814fbf8 Peng Fan 2021-06-12  270  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  271  
4fd3f78814fbf8 Peng Fan 2021-06-12  272  		domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain), GFP_KERNEL);
4fd3f78814fbf8 Peng Fan 2021-06-12  273  		if (!domain)
4fd3f78814fbf8 Peng Fan 2021-06-12  274  			goto error;
4fd3f78814fbf8 Peng Fan 2021-06-12  275  
4fd3f78814fbf8 Peng Fan 2021-06-12  276  		pd_pdev = platform_device_alloc(dev_data->name, domain_index);
4fd3f78814fbf8 Peng Fan 2021-06-12  277  		if (!pd_pdev) {
4fd3f78814fbf8 Peng Fan 2021-06-12  278  			dev_err(dev, "Failed to allocate platform device\n");
4fd3f78814fbf8 Peng Fan 2021-06-12  279  			goto error;
4fd3f78814fbf8 Peng Fan 2021-06-12  280  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  281  
4fd3f78814fbf8 Peng Fan 2021-06-12  282  		pd_pdev->dev.platform_data = domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  283  
4fd3f78814fbf8 Peng Fan 2021-06-12  284  		domain->blk_ctl = blk_ctl;
4fd3f78814fbf8 Peng Fan 2021-06-12  285  		domain->hw = &dev_data->pds[i];
4fd3f78814fbf8 Peng Fan 2021-06-12  286  		domain->id = domain_index;
4fd3f78814fbf8 Peng Fan 2021-06-12  287  		domain->genpd.name = dev_data->pds[i].name;
4fd3f78814fbf8 Peng Fan 2021-06-12  288  		domain->genpd.power_off = imx_blk_ctl_power_off;
4fd3f78814fbf8 Peng Fan 2021-06-12  289  		domain->genpd.power_on = imx_blk_ctl_power_on;
4fd3f78814fbf8 Peng Fan 2021-06-12  290  		domain->dev = &pd_pdev->dev;
4fd3f78814fbf8 Peng Fan 2021-06-12  291  		domain->hooked = false;
4fd3f78814fbf8 Peng Fan 2021-06-12  292  
4fd3f78814fbf8 Peng Fan 2021-06-12  293  		ret = pm_genpd_init(&domain->genpd, NULL, true);
4fd3f78814fbf8 Peng Fan 2021-06-12  294  		pd_pdev->dev.parent = dev;
4fd3f78814fbf8 Peng Fan 2021-06-12  295  
4fd3f78814fbf8 Peng Fan 2021-06-12  296  		if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
4fd3f78814fbf8 Peng Fan 2021-06-12  297  			blk_ctl->bus_domain = &domain->genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  298  
4fd3f78814fbf8 Peng Fan 2021-06-12  299  		ret = platform_device_add(pd_pdev);
4fd3f78814fbf8 Peng Fan 2021-06-12  300  		if (ret) {
4fd3f78814fbf8 Peng Fan 2021-06-12  301  			platform_device_put(pd_pdev);
4fd3f78814fbf8 Peng Fan 2021-06-12  302  			goto error;
4fd3f78814fbf8 Peng Fan 2021-06-12  303  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  304  		blk_ctl->onecell_data.domains[i] = &domain->genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  305  	}
4fd3f78814fbf8 Peng Fan 2021-06-12  306  
4fd3f78814fbf8 Peng Fan 2021-06-12  307  	return of_genpd_add_provider_onecell(dev->of_node, &blk_ctl->onecell_data);
4fd3f78814fbf8 Peng Fan 2021-06-12  308  
4fd3f78814fbf8 Peng Fan 2021-06-12  309  error:
4fd3f78814fbf8 Peng Fan 2021-06-12  310  	for (; i >= 0; i--) {
4fd3f78814fbf8 Peng Fan 2021-06-12  311  		genpd = blk_ctl->onecell_data.domains[i];
4fd3f78814fbf8 Peng Fan 2021-06-12  312  		if (!genpd)
4fd3f78814fbf8 Peng Fan 2021-06-12  313  			continue;
4fd3f78814fbf8 Peng Fan 2021-06-12  314  		domain = to_imx_blk_ctl_pd(genpd);
4fd3f78814fbf8 Peng Fan 2021-06-12  315  		if (domain->dev)
4fd3f78814fbf8 Peng Fan 2021-06-12  316  			platform_device_put(to_platform_device(domain->dev));
4fd3f78814fbf8 Peng Fan 2021-06-12  317  	}
4fd3f78814fbf8 Peng Fan 2021-06-12 @318  	return ret;
4fd3f78814fbf8 Peng Fan 2021-06-12  319  }
4fd3f78814fbf8 Peng Fan 2021-06-12  320  EXPORT_SYMBOL_GPL(imx_blk_ctl_register);
4fd3f78814fbf8 Peng Fan 2021-06-12  321  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
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Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 2209 bytes --]

Hi "Peng,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on shawnguo/for-next]
[also build test WARNING on next-20210625]
[cannot apply to robh/for-next pza/reset/next v5.13-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Peng-Fan-OSS/soc-imx-add-i-MX-BLK-CTL-support/20210617-013814
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
config: i386-randconfig-m031-20210625 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

smatch warnings:
drivers/soc/imx/blk-ctl-imx8mm.c:115 imx8mm_blk_ctl_probe() warn: unsigned 'ctl->num_clks' is never less than zero.

vim +115 drivers/soc/imx/blk-ctl-imx8mm.c

    89	
    90	static int imx8mm_blk_ctl_probe(struct platform_device *pdev)
    91	{
    92		struct device *dev = &pdev->dev;
    93		const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev);
    94		struct regmap *regmap;
    95		struct imx_blk_ctl *ctl;
    96		void __iomem *base;
    97	
    98		ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
    99		if (!ctl)
   100			return -ENOMEM;
   101	
   102		base = devm_platform_ioremap_resource(pdev, 0);
   103		if (IS_ERR(base))
   104			return PTR_ERR(base);
   105	
   106		regmap = devm_regmap_init_mmio(dev, base, &dev_data->config);
   107		if (IS_ERR(regmap))
   108			return PTR_ERR(regmap);
   109	
   110		ctl->regmap = regmap;
   111		ctl->dev = dev;
   112		mutex_init(&ctl->lock);
   113	
   114		ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks);
 > 115		if (ctl->num_clks < 0)
   116			return ctl->num_clks;
   117	
   118		dev_set_drvdata(dev, ctl);
   119		ctl->dev_data = dev_data;
   120	
   121		return imx_blk_ctl_register(dev);
   122	}
   123	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 37606 bytes --]

Re: [PATCH V7 3/4] soc: imx: Add generic blk-ctl driver

[Dan Carpenter]

[-- Attachment #1: Type: text/plain, Size: 10779 bytes --]

Hi "Peng Fan (OSS)",

url:    https://github.com/0day-ci/linux/commits/Peng-Fan-OSS/soc-imx-add-i-MX-BLK-CTL-support/20210617-013814
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
config: i386-randconfig-m031-20210625 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

smatch warnings:
drivers/soc/imx/blk-ctl.c:188 imx_blk_ctl_remove() error: potentially dereferencing uninitialized 'active_pd'.
drivers/soc/imx/blk-ctl.c:318 imx_blk_ctl_register() error: uninitialized symbol 'ret'.

vim +/PTR_ERR +151 drivers/soc/imx/blk-ctl.c

4fd3f78814fbf8 Peng Fan 2021-06-12  180  static int imx_blk_ctl_remove(struct platform_device *pdev)
4fd3f78814fbf8 Peng Fan 2021-06-12  181  {
4fd3f78814fbf8 Peng Fan 2021-06-12  182  	struct imx_blk_ctl_domain *domain = pdev->dev.platform_data;
4fd3f78814fbf8 Peng Fan 2021-06-12  183  	struct imx_blk_ctl *blk_ctl = domain->blk_ctl;
4fd3f78814fbf8 Peng Fan 2021-06-12  184  	struct generic_pm_domain *parent_genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  185  	struct device *active_pd;
                                                               ^^^^^^^^^

4fd3f78814fbf8 Peng Fan 2021-06-12  186  
4fd3f78814fbf8 Peng Fan 2021-06-12  187  	if (domain->hw->active_pd_name)
4fd3f78814fbf8 Peng Fan 2021-06-12 @188  		parent_genpd = pd_to_genpd(active_pd->pm_domain);
                                                                                   ^^^^^^^^^^^
Uninitalized.

4fd3f78814fbf8 Peng Fan 2021-06-12  189  	else
4fd3f78814fbf8 Peng Fan 2021-06-12  190  		parent_genpd = blk_ctl->bus_domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  191  
4fd3f78814fbf8 Peng Fan 2021-06-12  192  	pm_genpd_remove_subdomain(parent_genpd, &domain->genpd);
4fd3f78814fbf8 Peng Fan 2021-06-12  193  
4fd3f78814fbf8 Peng Fan 2021-06-12  194  	mutex_lock(&blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  195  	domain->hooked = false;
4fd3f78814fbf8 Peng Fan 2021-06-12  196  	mutex_unlock(&blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  197  
4fd3f78814fbf8 Peng Fan 2021-06-12  198  	if (domain->hw->active_pd_name)
4fd3f78814fbf8 Peng Fan 2021-06-12  199  		dev_pm_domain_detach(domain->active_pd, false);
4fd3f78814fbf8 Peng Fan 2021-06-12  200  
4fd3f78814fbf8 Peng Fan 2021-06-12  201  	return 0;
4fd3f78814fbf8 Peng Fan 2021-06-12  202  }
4fd3f78814fbf8 Peng Fan 2021-06-12  203  
4fd3f78814fbf8 Peng Fan 2021-06-12  204  static const struct platform_device_id imx_blk_ctl_id[] = {
4fd3f78814fbf8 Peng Fan 2021-06-12  205  	{ "imx-vpumix-blk-ctl", },
4fd3f78814fbf8 Peng Fan 2021-06-12  206  	{ "imx-dispmix-blk-ctl", },
4fd3f78814fbf8 Peng Fan 2021-06-12  207  	{ },
4fd3f78814fbf8 Peng Fan 2021-06-12  208  };
4fd3f78814fbf8 Peng Fan 2021-06-12  209  
4fd3f78814fbf8 Peng Fan 2021-06-12  210  static struct platform_driver imx_blk_ctl_driver = {
4fd3f78814fbf8 Peng Fan 2021-06-12  211  	.driver = {
4fd3f78814fbf8 Peng Fan 2021-06-12  212  		.name = "imx-blk-ctl",
4fd3f78814fbf8 Peng Fan 2021-06-12  213  	},
4fd3f78814fbf8 Peng Fan 2021-06-12  214  	.probe    = imx_blk_ctl_probe,
4fd3f78814fbf8 Peng Fan 2021-06-12  215  	.remove   = imx_blk_ctl_remove,
4fd3f78814fbf8 Peng Fan 2021-06-12  216  	.id_table = imx_blk_ctl_id,
4fd3f78814fbf8 Peng Fan 2021-06-12  217  };
4fd3f78814fbf8 Peng Fan 2021-06-12  218  builtin_platform_driver(imx_blk_ctl_driver)
4fd3f78814fbf8 Peng Fan 2021-06-12  219  
4fd3f78814fbf8 Peng Fan 2021-06-12  220  static struct generic_pm_domain *imx_blk_ctl_genpd_xlate(struct of_phandle_args *genpdspec,
4fd3f78814fbf8 Peng Fan 2021-06-12  221  							 void *data)
4fd3f78814fbf8 Peng Fan 2021-06-12  222  {
4fd3f78814fbf8 Peng Fan 2021-06-12  223  	struct genpd_onecell_data *genpd_data = data;
4fd3f78814fbf8 Peng Fan 2021-06-12  224  	unsigned int idx = genpdspec->args[0];
4fd3f78814fbf8 Peng Fan 2021-06-12  225  	struct imx_blk_ctl_domain *domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  226  	struct generic_pm_domain *genpd = ERR_PTR(-EPROBE_DEFER);
4fd3f78814fbf8 Peng Fan 2021-06-12  227  
4fd3f78814fbf8 Peng Fan 2021-06-12  228  	if (genpdspec->args_count != 1)
4fd3f78814fbf8 Peng Fan 2021-06-12  229  		return ERR_PTR(-EINVAL);
4fd3f78814fbf8 Peng Fan 2021-06-12  230  
4fd3f78814fbf8 Peng Fan 2021-06-12  231  	if (idx >= genpd_data->num_domains)
4fd3f78814fbf8 Peng Fan 2021-06-12  232  		return ERR_PTR(-EINVAL);
4fd3f78814fbf8 Peng Fan 2021-06-12  233  
4fd3f78814fbf8 Peng Fan 2021-06-12  234  	if (!genpd_data->domains[idx])
4fd3f78814fbf8 Peng Fan 2021-06-12  235  		return ERR_PTR(-ENOENT);
4fd3f78814fbf8 Peng Fan 2021-06-12  236  
4fd3f78814fbf8 Peng Fan 2021-06-12  237  	domain = to_imx_blk_ctl_pd(genpd_data->domains[idx]);
4fd3f78814fbf8 Peng Fan 2021-06-12  238  
4fd3f78814fbf8 Peng Fan 2021-06-12  239  	mutex_lock(&domain->blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  240  	if (domain->hooked)
4fd3f78814fbf8 Peng Fan 2021-06-12  241  		genpd = genpd_data->domains[idx];
4fd3f78814fbf8 Peng Fan 2021-06-12  242  	mutex_unlock(&domain->blk_ctl->lock);
4fd3f78814fbf8 Peng Fan 2021-06-12  243  
4fd3f78814fbf8 Peng Fan 2021-06-12  244  	return genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  245  }
4fd3f78814fbf8 Peng Fan 2021-06-12  246  
4fd3f78814fbf8 Peng Fan 2021-06-12  247  int imx_blk_ctl_register(struct device *dev)
4fd3f78814fbf8 Peng Fan 2021-06-12  248  {
4fd3f78814fbf8 Peng Fan 2021-06-12  249  	struct imx_blk_ctl *blk_ctl = dev_get_drvdata(dev);
4fd3f78814fbf8 Peng Fan 2021-06-12  250  	const struct imx_blk_ctl_dev_data *dev_data = blk_ctl->dev_data;
4fd3f78814fbf8 Peng Fan 2021-06-12  251  	int num = dev_data->pds_num;
4fd3f78814fbf8 Peng Fan 2021-06-12  252  	struct imx_blk_ctl_domain *domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  253  	struct generic_pm_domain *genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  254  	struct platform_device *pd_pdev;
4fd3f78814fbf8 Peng Fan 2021-06-12  255  	int domain_index;
4fd3f78814fbf8 Peng Fan 2021-06-12  256  	int i, ret;
4fd3f78814fbf8 Peng Fan 2021-06-12  257  
4fd3f78814fbf8 Peng Fan 2021-06-12  258  	blk_ctl->onecell_data.num_domains = num;
4fd3f78814fbf8 Peng Fan 2021-06-12  259  	blk_ctl->onecell_data.xlate = imx_blk_ctl_genpd_xlate;
4fd3f78814fbf8 Peng Fan 2021-06-12  260  	blk_ctl->onecell_data.domains = devm_kcalloc(dev, num, sizeof(struct generic_pm_domain *),
4fd3f78814fbf8 Peng Fan 2021-06-12  261  						     GFP_KERNEL);
4fd3f78814fbf8 Peng Fan 2021-06-12  262  	if (!blk_ctl->onecell_data.domains)
4fd3f78814fbf8 Peng Fan 2021-06-12  263  		return -ENOMEM;
4fd3f78814fbf8 Peng Fan 2021-06-12  264  
4fd3f78814fbf8 Peng Fan 2021-06-12  265  	for (i = 0; i < num; i++) {
4fd3f78814fbf8 Peng Fan 2021-06-12  266  		domain_index = dev_data->pds[i].id;
4fd3f78814fbf8 Peng Fan 2021-06-12  267  		if (domain_index >= num) {
4fd3f78814fbf8 Peng Fan 2021-06-12  268  			dev_warn(dev, "Domain index %d is out of bounds\n", domain_index);
4fd3f78814fbf8 Peng Fan 2021-06-12  269  			continue;
4fd3f78814fbf8 Peng Fan 2021-06-12  270  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  271  
4fd3f78814fbf8 Peng Fan 2021-06-12  272  		domain = devm_kzalloc(dev, sizeof(struct imx_blk_ctl_domain), GFP_KERNEL);
4fd3f78814fbf8 Peng Fan 2021-06-12  273  		if (!domain)
4fd3f78814fbf8 Peng Fan 2021-06-12  274  			goto error;

ret = -ENOMEM;

4fd3f78814fbf8 Peng Fan 2021-06-12  275  
4fd3f78814fbf8 Peng Fan 2021-06-12  276  		pd_pdev = platform_device_alloc(dev_data->name, domain_index);
4fd3f78814fbf8 Peng Fan 2021-06-12  277  		if (!pd_pdev) {
4fd3f78814fbf8 Peng Fan 2021-06-12  278  			dev_err(dev, "Failed to allocate platform device\n");
4fd3f78814fbf8 Peng Fan 2021-06-12  279  			goto error;

ret = -ENOMEM;

4fd3f78814fbf8 Peng Fan 2021-06-12  280  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  281  
4fd3f78814fbf8 Peng Fan 2021-06-12  282  		pd_pdev->dev.platform_data = domain;
4fd3f78814fbf8 Peng Fan 2021-06-12  283  
4fd3f78814fbf8 Peng Fan 2021-06-12  284  		domain->blk_ctl = blk_ctl;
4fd3f78814fbf8 Peng Fan 2021-06-12  285  		domain->hw = &dev_data->pds[i];
4fd3f78814fbf8 Peng Fan 2021-06-12  286  		domain->id = domain_index;
4fd3f78814fbf8 Peng Fan 2021-06-12  287  		domain->genpd.name = dev_data->pds[i].name;
4fd3f78814fbf8 Peng Fan 2021-06-12  288  		domain->genpd.power_off = imx_blk_ctl_power_off;
4fd3f78814fbf8 Peng Fan 2021-06-12  289  		domain->genpd.power_on = imx_blk_ctl_power_on;
4fd3f78814fbf8 Peng Fan 2021-06-12  290  		domain->dev = &pd_pdev->dev;
4fd3f78814fbf8 Peng Fan 2021-06-12  291  		domain->hooked = false;
4fd3f78814fbf8 Peng Fan 2021-06-12  292  
4fd3f78814fbf8 Peng Fan 2021-06-12  293  		ret = pm_genpd_init(&domain->genpd, NULL, true);
4fd3f78814fbf8 Peng Fan 2021-06-12  294  		pd_pdev->dev.parent = dev;
4fd3f78814fbf8 Peng Fan 2021-06-12  295  
4fd3f78814fbf8 Peng Fan 2021-06-12  296  		if (domain->hw->flags & IMX_BLK_CTL_PD_HANDSHAKE)
4fd3f78814fbf8 Peng Fan 2021-06-12  297  			blk_ctl->bus_domain = &domain->genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  298  
4fd3f78814fbf8 Peng Fan 2021-06-12  299  		ret = platform_device_add(pd_pdev);
4fd3f78814fbf8 Peng Fan 2021-06-12  300  		if (ret) {
4fd3f78814fbf8 Peng Fan 2021-06-12  301  			platform_device_put(pd_pdev);
4fd3f78814fbf8 Peng Fan 2021-06-12  302  			goto error;
4fd3f78814fbf8 Peng Fan 2021-06-12  303  		}
4fd3f78814fbf8 Peng Fan 2021-06-12  304  		blk_ctl->onecell_data.domains[i] = &domain->genpd;
4fd3f78814fbf8 Peng Fan 2021-06-12  305  	}
4fd3f78814fbf8 Peng Fan 2021-06-12  306  
4fd3f78814fbf8 Peng Fan 2021-06-12  307  	return of_genpd_add_provider_onecell(dev->of_node, &blk_ctl->onecell_data);
4fd3f78814fbf8 Peng Fan 2021-06-12  308  
4fd3f78814fbf8 Peng Fan 2021-06-12  309  error:
4fd3f78814fbf8 Peng Fan 2021-06-12  310  	for (; i >= 0; i--) {
4fd3f78814fbf8 Peng Fan 2021-06-12  311  		genpd = blk_ctl->onecell_data.domains[i];
4fd3f78814fbf8 Peng Fan 2021-06-12  312  		if (!genpd)
4fd3f78814fbf8 Peng Fan 2021-06-12  313  			continue;
4fd3f78814fbf8 Peng Fan 2021-06-12  314  		domain = to_imx_blk_ctl_pd(genpd);
4fd3f78814fbf8 Peng Fan 2021-06-12  315  		if (domain->dev)
4fd3f78814fbf8 Peng Fan 2021-06-12  316  			platform_device_put(to_platform_device(domain->dev));
4fd3f78814fbf8 Peng Fan 2021-06-12  317  	}
4fd3f78814fbf8 Peng Fan 2021-06-12 @318  	return ret;
4fd3f78814fbf8 Peng Fan 2021-06-12  319  }
4fd3f78814fbf8 Peng Fan 2021-06-12  320  EXPORT_SYMBOL_GPL(imx_blk_ctl_register);

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Marek Vasut]

On 6/14/21 8:07 PM, Adam Ford wrote:
> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>>
>> From: Peng Fan <peng.fan@nxp.com>
>>
>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
>> that support in this driver.
>>
>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> Maybe my TF-A is too old, but I am not able to wake the device from
> suspend-to-ram with this series.  I used the device tree from [1] to
> enable both the GPCv2 and the blk-ctl stuff.
> 
> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
> 
> I based both off Shawn's for-next branch.

I also ran into issues with this, although it could also be related to 
GPCv2. On MX8MM , the system sometimes hangs when bringing up the GPCv2 
power domain 6 (VPUMIX). It seems that the GPCv2 driver sets 
GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and the 
bit never self-clears. After that, it seems the entire GPC locks up. 
Have you ever seen that kind of behavior ?

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Marek Vasut]

On 6/14/21 8:07 PM, Adam Ford wrote:
> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>>
>> From: Peng Fan <peng.fan@nxp.com>
>>
>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
>> that support in this driver.
>>
>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> Maybe my TF-A is too old, but I am not able to wake the device from
> suspend-to-ram with this series.  I used the device tree from [1] to
> enable both the GPCv2 and the blk-ctl stuff.
> 
> [1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210604111005.6804-1-peng.fan@oss.nxp.com/
> 
> I based both off Shawn's for-next branch.

I also ran into issues with this, although it could also be related to 
GPCv2. On MX8MM , the system sometimes hangs when bringing up the GPCv2 
power domain 6 (VPUMIX). It seems that the GPCv2 driver sets 
GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and the 
bit never self-clears. After that, it seems the entire GPC locks up. 
Have you ever seen that kind of behavior ?

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan]

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On 6/14/21 8:07 PM, Adam Ford wrote:
> > On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >>
> >> From: Peng Fan <peng.fan@nxp.com>
> >>
> >> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> >> that support in this driver.
> >>
> >> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> >> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >
> > Maybe my TF-A is too old, but I am not able to wake the device from
> > suspend-to-ram with this series.  I used the device tree from [1] to
> > enable both the GPCv2 and the blk-ctl stuff.
> >
> > [1] -
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604111
> 005
> > .6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.fan%4
> 0nxp.co
> >
> m%7Ca4c06cfdf6314633c7c708d93a23cff0%7C686ea1d3bc2b4c6fa92cd99c
> 5c30163
> >
> 5%7C0%7C0%7C637604747755701757%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4wLjA
> >
> wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;s
> data=0
> > pDwVtfizZ7mZh9pSfy0bSbffOxP90AnaQrZ8i8cNv0%3D&amp;reserved=0
> >
> > I based both off Shawn's for-next branch.
> 
> I also ran into issues with this, although it could also be related to GPCv2. On
> MX8MM , the system sometimes hangs when bringing up the GPCv2 power
> domain 6 (VPUMIX). It seems that the GPCv2 driver sets
> GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and
> the bit never self-clears. After that, it seems the entire GPC locks up.
> Have you ever seen that kind of behavior ?

Do you have clk enabled for vpumix? Is this issue happends every time? Or hard
to reproduce?

Thanks,
Peng.

RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Peng Fan]

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On 6/14/21 8:07 PM, Adam Ford wrote:
> > On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >>
> >> From: Peng Fan <peng.fan@nxp.com>
> >>
> >> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> >> that support in this driver.
> >>
> >> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> >> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >
> > Maybe my TF-A is too old, but I am not able to wake the device from
> > suspend-to-ram with this series.  I used the device tree from [1] to
> > enable both the GPCv2 and the blk-ctl stuff.
> >
> > [1] -
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604111
> 005
> > .6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.fan%4
> 0nxp.co
> >
> m%7Ca4c06cfdf6314633c7c708d93a23cff0%7C686ea1d3bc2b4c6fa92cd99c
> 5c30163
> >
> 5%7C0%7C0%7C637604747755701757%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4wLjA
> >
> wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;s
> data=0
> > pDwVtfizZ7mZh9pSfy0bSbffOxP90AnaQrZ8i8cNv0%3D&amp;reserved=0
> >
> > I based both off Shawn's for-next branch.
> 
> I also ran into issues with this, although it could also be related to GPCv2. On
> MX8MM , the system sometimes hangs when bringing up the GPCv2 power
> domain 6 (VPUMIX). It seems that the GPCv2 driver sets
> GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and
> the bit never self-clears. After that, it seems the entire GPC locks up.
> Have you ever seen that kind of behavior ?

Do you have clk enabled for vpumix? Is this issue happends every time? Or hard
to reproduce?

Thanks,
Peng.


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Marek Vasut]

On 6/28/21 1:14 PM, Peng Fan wrote:
>> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
>>
>> On 6/14/21 8:07 PM, Adam Ford wrote:
>>> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
>> wrote:
>>>>
>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>
>>>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
>>>> that support in this driver.
>>>>
>>>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
>>>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
>>>
>>> Maybe my TF-A is too old, but I am not able to wake the device from
>>> suspend-to-ram with this series.  I used the device tree from [1] to
>>> enable both the GPCv2 and the blk-ctl stuff.
>>>
>>> [1] -
>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
>>>
>> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604111
>> 005
>>> .6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.fan%4
>> 0nxp.co
>>>
>> m%7Ca4c06cfdf6314633c7c708d93a23cff0%7C686ea1d3bc2b4c6fa92cd99c
>> 5c30163
>>>
>> 5%7C0%7C0%7C637604747755701757%7CUnknown%7CTWFpbGZsb3d8eyJ
>> WIjoiMC4wLjA
>>>
>> wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;s
>> data=0
>>> pDwVtfizZ7mZh9pSfy0bSbffOxP90AnaQrZ8i8cNv0%3D&amp;reserved=0
>>>
>>> I based both off Shawn's for-next branch.
>>
>> I also ran into issues with this, although it could also be related to GPCv2. On
>> MX8MM , the system sometimes hangs when bringing up the GPCv2 power
>> domain 6 (VPUMIX). It seems that the GPCv2 driver sets
>> GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and
>> the bit never self-clears. After that, it seems the entire GPC locks up.
>> Have you ever seen that kind of behavior ?
> 
> Do you have clk enabled for vpumix? Is this issue happends every time? Or hard
> to reproduce?

Yes, DEC_ROOT is active, I also activated BUS.

It happens sporadically (every 5 or so reboots), I have to reboot the 
machine a few times to trigger it. It happens during the kernel boot 
process in every few boots.

Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

[Marek Vasut]

On 6/28/21 1:14 PM, Peng Fan wrote:
>> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
>>
>> On 6/14/21 8:07 PM, Adam Ford wrote:
>>> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
>> wrote:
>>>>
>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>
>>>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
>>>> that support in this driver.
>>>>
>>>> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
>>>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
>>>
>>> Maybe my TF-A is too old, but I am not able to wake the device from
>>> suspend-to-ram with this series.  I used the device tree from [1] to
>>> enable both the GPCv2 and the blk-ctl stuff.
>>>
>>> [1] -
>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
>>>
>> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604111
>> 005
>>> .6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.fan%4
>> 0nxp.co
>>>
>> m%7Ca4c06cfdf6314633c7c708d93a23cff0%7C686ea1d3bc2b4c6fa92cd99c
>> 5c30163
>>>
>> 5%7C0%7C0%7C637604747755701757%7CUnknown%7CTWFpbGZsb3d8eyJ
>> WIjoiMC4wLjA
>>>
>> wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;s
>> data=0
>>> pDwVtfizZ7mZh9pSfy0bSbffOxP90AnaQrZ8i8cNv0%3D&amp;reserved=0
>>>
>>> I based both off Shawn's for-next branch.
>>
>> I also ran into issues with this, although it could also be related to GPCv2. On
>> MX8MM , the system sometimes hangs when bringing up the GPCv2 power
>> domain 6 (VPUMIX). It seems that the GPCv2 driver sets
>> GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and
>> the bit never self-clears. After that, it seems the entire GPC locks up.
>> Have you ever seen that kind of behavior ?
> 
> Do you have clk enabled for vpumix? Is this issue happends every time? Or hard
> to reproduce?

Yes, DEC_ROOT is active, I also activated BUS.

It happens sporadically (every 5 or so reboots), I have to reboot the 
machine a few times to trigger it. It happens during the kernel boot 
process in every few boots.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel