* [PATCH] mmc: sdhci: Enable high speed conditional on the correspnding bit
@ 2020-07-23 4:12 Faiz Abbas
2020-07-29 15:07 ` Michal Simek
0 siblings, 1 reply; 4+ messages in thread
From: Faiz Abbas @ 2020-07-23 4:12 UTC (permalink / raw)
To: u-boot
The capabilities register has a field to indicate whether the host
supports high speed mode or not. Add high speed host_caps based on
this bit instead of enabling it by default.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
drivers/mmc/sdhci.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 16989dcf05..48d639fe93 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -866,7 +866,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
cfg->voltages |= host->voltages;
- cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
+ if (caps & SDHCI_CAN_DO_HISPD)
+ cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
+
+ cfg->host_caps |= MMC_MODE_4BIT;
/* Since Host Controller Version3.0 */
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] mmc: sdhci: Enable high speed conditional on the correspnding bit
2020-07-23 4:12 [PATCH] mmc: sdhci: Enable high speed conditional on the correspnding bit Faiz Abbas
@ 2020-07-29 15:07 ` Michal Simek
2020-08-13 10:48 ` Michal Simek
0 siblings, 1 reply; 4+ messages in thread
From: Michal Simek @ 2020-07-29 15:07 UTC (permalink / raw)
To: u-boot
Hi,
?t 23. 7. 2020 v 6:12 odes?latel Faiz Abbas <faiz_abbas@ti.com> napsal:
>
> The capabilities register has a field to indicate whether the host
> supports high speed mode or not. Add high speed host_caps based on
> this bit instead of enabling it by default.
>
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> ---
> drivers/mmc/sdhci.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 16989dcf05..48d639fe93 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -866,7 +866,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
> if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
> cfg->voltages |= host->voltages;
>
> - cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
> + if (caps & SDHCI_CAN_DO_HISPD)
> + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
> +
> + cfg->host_caps |= MMC_MODE_4BIT;
>
> /* Since Host Controller Version3.0 */
> if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
> --
> 2.17.1
>
Reviewed-by: Michal Simek <michal.simek@xilnx.com>
Tested-by: Michal Simek <michal.simek@xilnx.com> (zcu104 with
sdhci-caps-mask = <0 0x200000>;)
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] mmc: sdhci: Enable high speed conditional on the correspnding bit
2020-07-29 15:07 ` Michal Simek
@ 2020-08-13 10:48 ` Michal Simek
2020-08-20 8:03 ` Michal Simek
0 siblings, 1 reply; 4+ messages in thread
From: Michal Simek @ 2020-08-13 10:48 UTC (permalink / raw)
To: u-boot
Hi Peng,
st 29. 7. 2020 v 17:07 odes?latel Michal Simek <monstr@monstr.eu> napsal:
>
> Hi,
>
> ?t 23. 7. 2020 v 6:12 odes?latel Faiz Abbas <faiz_abbas@ti.com> napsal:
> >
> > The capabilities register has a field to indicate whether the host
> > supports high speed mode or not. Add high speed host_caps based on
> > this bit instead of enabling it by default.
> >
> > Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> > ---
> > drivers/mmc/sdhci.c | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> > index 16989dcf05..48d639fe93 100644
> > --- a/drivers/mmc/sdhci.c
> > +++ b/drivers/mmc/sdhci.c
> > @@ -866,7 +866,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
> > if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
> > cfg->voltages |= host->voltages;
> >
> > - cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
> > + if (caps & SDHCI_CAN_DO_HISPD)
> > + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
> > +
> > + cfg->host_caps |= MMC_MODE_4BIT;
> >
> > /* Since Host Controller Version3.0 */
> > if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
> > --
> > 2.17.1
> >
>
> Reviewed-by: Michal Simek <michal.simek@xilnx.com>
> Tested-by: Michal Simek <michal.simek@xilnx.com> (zcu104 with
> sdhci-caps-mask = <0 0x200000>;)
Peng: Can you please take this patch to your tree? Or I will take it.
Thanks,
Michal
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] mmc: sdhci: Enable high speed conditional on the correspnding bit
2020-08-13 10:48 ` Michal Simek
@ 2020-08-20 8:03 ` Michal Simek
0 siblings, 0 replies; 4+ messages in thread
From: Michal Simek @ 2020-08-20 8:03 UTC (permalink / raw)
To: u-boot
Hi,
?t 13. 8. 2020 v 12:48 odes?latel Michal Simek <monstr@monstr.eu> napsal:
>
> Hi Peng,
>
> st 29. 7. 2020 v 17:07 odes?latel Michal Simek <monstr@monstr.eu> napsal:
> >
> > Hi,
> >
> > ?t 23. 7. 2020 v 6:12 odes?latel Faiz Abbas <faiz_abbas@ti.com> napsal:
> > >
> > > The capabilities register has a field to indicate whether the host
> > > supports high speed mode or not. Add high speed host_caps based on
> > > this bit instead of enabling it by default.
> > >
> > > Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
> > > ---
> > > drivers/mmc/sdhci.c | 5 ++++-
> > > 1 file changed, 4 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> > > index 16989dcf05..48d639fe93 100644
> > > --- a/drivers/mmc/sdhci.c
> > > +++ b/drivers/mmc/sdhci.c
> > > @@ -866,7 +866,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
> > > if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
> > > cfg->voltages |= host->voltages;
> > >
> > > - cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
> > > + if (caps & SDHCI_CAN_DO_HISPD)
> > > + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
> > > +
> > > + cfg->host_caps |= MMC_MODE_4BIT;
> > >
> > > /* Since Host Controller Version3.0 */
> > > if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
> > > --
> > > 2.17.1
> > >
> >
> > Reviewed-by: Michal Simek <michal.simek@xilnx.com>
> > Tested-by: Michal Simek <michal.simek@xilnx.com> (zcu104 with
> > sdhci-caps-mask = <0 0x200000>;)
>
> Peng: Can you please take this patch to your tree? Or I will take it.
I applied this patch but I have fixed typo in subject.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-08-20 8:03 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-23 4:12 [PATCH] mmc: sdhci: Enable high speed conditional on the correspnding bit Faiz Abbas
2020-07-29 15:07 ` Michal Simek
2020-08-13 10:48 ` Michal Simek
2020-08-20 8:03 ` Michal Simek
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