* [PATCH v2] net: zynq: Add support for GEM reset
@ 2021-12-06 15:25 Michal Simek
2021-12-09 0:23 ` Ramon Fried
2022-01-05 9:34 ` Michal Simek
0 siblings, 2 replies; 3+ messages in thread
From: Michal Simek @ 2021-12-06 15:25 UTC (permalink / raw)
To: u-boot, git; +Cc: Joe Hershberger, Ramon Fried
Perform reset before core initialization.
Standard flow which close to 99% users are using getting all IPs out of
reset that there is no need to reset IP again. This is because of all low
level initialization is done in previous bootloader stage.
In SOM case these IPs are not touched by previous bootloader stage that's
why reset needs to be called before IP is accessed to make sure that it is
in correct state.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- Update commit message
drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 91957757727d..5cbe8d28304b 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -21,6 +21,7 @@
#include <asm/cache.h>
#include <asm/io.h>
#include <phy.h>
+#include <reset.h>
#include <miiphy.h>
#include <wait_bit.h>
#include <watchdog.h>
@@ -217,6 +218,7 @@ struct zynq_gem_priv {
bool int_pcs;
bool dma_64bit;
u32 clk_en_info;
+ struct reset_ctl_bulk resets;
};
static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
@@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad,
return phywrite(priv, addr, reg, value);
}
+static int zynq_gem_reset_init(struct udevice *dev)
+{
+ struct zynq_gem_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = reset_get_bulk(dev, &priv->resets);
+ if (ret == -ENOTSUPP || ret == -ENOENT)
+ return 0;
+ else if (ret)
+ return ret;
+
+ ret = reset_deassert_bulk(&priv->resets);
+ if (ret) {
+ reset_release_bulk(&priv->resets);
+ return ret;
+ }
+
+ return 0;
+}
+
static int zynq_gem_probe(struct udevice *dev)
{
void *bd_space;
struct zynq_gem_priv *priv = dev_get_priv(dev);
int ret;
+ ret = zynq_gem_reset_init(dev);
+ if (ret)
+ return ret;
+
/* Align rxbuffers to ARCH_DMA_MINALIGN */
priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN);
if (!priv->rxbuffers)
--
2.33.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] net: zynq: Add support for GEM reset
2021-12-06 15:25 [PATCH v2] net: zynq: Add support for GEM reset Michal Simek
@ 2021-12-09 0:23 ` Ramon Fried
2022-01-05 9:34 ` Michal Simek
1 sibling, 0 replies; 3+ messages in thread
From: Ramon Fried @ 2021-12-09 0:23 UTC (permalink / raw)
To: Michal Simek; +Cc: U-Boot Mailing List, git, Joe Hershberger
On Mon, Dec 6, 2021 at 5:25 PM Michal Simek <michal.simek@xilinx.com> wrote:
>
> Perform reset before core initialization.
> Standard flow which close to 99% users are using getting all IPs out of
> reset that there is no need to reset IP again. This is because of all low
> level initialization is done in previous bootloader stage.
> In SOM case these IPs are not touched by previous bootloader stage that's
> why reset needs to be called before IP is accessed to make sure that it is
> in correct state.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> Changes in v2:
> - Update commit message
>
> drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index 91957757727d..5cbe8d28304b 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -21,6 +21,7 @@
> #include <asm/cache.h>
> #include <asm/io.h>
> #include <phy.h>
> +#include <reset.h>
> #include <miiphy.h>
> #include <wait_bit.h>
> #include <watchdog.h>
> @@ -217,6 +218,7 @@ struct zynq_gem_priv {
> bool int_pcs;
> bool dma_64bit;
> u32 clk_en_info;
> + struct reset_ctl_bulk resets;
> };
>
> static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
> @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad,
> return phywrite(priv, addr, reg, value);
> }
>
> +static int zynq_gem_reset_init(struct udevice *dev)
> +{
> + struct zynq_gem_priv *priv = dev_get_priv(dev);
> + int ret;
> +
> + ret = reset_get_bulk(dev, &priv->resets);
> + if (ret == -ENOTSUPP || ret == -ENOENT)
> + return 0;
> + else if (ret)
> + return ret;
> +
> + ret = reset_deassert_bulk(&priv->resets);
> + if (ret) {
> + reset_release_bulk(&priv->resets);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int zynq_gem_probe(struct udevice *dev)
> {
> void *bd_space;
> struct zynq_gem_priv *priv = dev_get_priv(dev);
> int ret;
>
> + ret = zynq_gem_reset_init(dev);
> + if (ret)
> + return ret;
> +
> /* Align rxbuffers to ARCH_DMA_MINALIGN */
> priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN);
> if (!priv->rxbuffers)
> --
> 2.33.1
>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] net: zynq: Add support for GEM reset
2021-12-06 15:25 [PATCH v2] net: zynq: Add support for GEM reset Michal Simek
2021-12-09 0:23 ` Ramon Fried
@ 2022-01-05 9:34 ` Michal Simek
1 sibling, 0 replies; 3+ messages in thread
From: Michal Simek @ 2022-01-05 9:34 UTC (permalink / raw)
To: U-Boot, git; +Cc: Joe Hershberger, Ramon Fried
po 6. 12. 2021 v 16:25 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> Perform reset before core initialization.
> Standard flow which close to 99% users are using getting all IPs out of
> reset that there is no need to reset IP again. This is because of all low
> level initialization is done in previous bootloader stage.
> In SOM case these IPs are not touched by previous bootloader stage that's
> why reset needs to be called before IP is accessed to make sure that it is
> in correct state.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> Changes in v2:
> - Update commit message
>
> drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index 91957757727d..5cbe8d28304b 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -21,6 +21,7 @@
> #include <asm/cache.h>
> #include <asm/io.h>
> #include <phy.h>
> +#include <reset.h>
> #include <miiphy.h>
> #include <wait_bit.h>
> #include <watchdog.h>
> @@ -217,6 +218,7 @@ struct zynq_gem_priv {
> bool int_pcs;
> bool dma_64bit;
> u32 clk_en_info;
> + struct reset_ctl_bulk resets;
> };
>
> static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
> @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad,
> return phywrite(priv, addr, reg, value);
> }
>
> +static int zynq_gem_reset_init(struct udevice *dev)
> +{
> + struct zynq_gem_priv *priv = dev_get_priv(dev);
> + int ret;
> +
> + ret = reset_get_bulk(dev, &priv->resets);
> + if (ret == -ENOTSUPP || ret == -ENOENT)
> + return 0;
> + else if (ret)
> + return ret;
> +
> + ret = reset_deassert_bulk(&priv->resets);
> + if (ret) {
> + reset_release_bulk(&priv->resets);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int zynq_gem_probe(struct udevice *dev)
> {
> void *bd_space;
> struct zynq_gem_priv *priv = dev_get_priv(dev);
> int ret;
>
> + ret = zynq_gem_reset_init(dev);
> + if (ret)
> + return ret;
> +
> /* Align rxbuffers to ARCH_DMA_MINALIGN */
> priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN);
> if (!priv->rxbuffers)
> --
> 2.33.1
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-12-06 15:25 [PATCH v2] net: zynq: Add support for GEM reset Michal Simek
2021-12-09 0:23 ` Ramon Fried
2022-01-05 9:34 ` Michal Simek
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