* [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) @ 2021-08-02 5:16 Guchun Chen 2021-08-02 6:56 ` Christian König 2021-08-18 5:26 ` Andrey Grodzovsky 0 siblings, 2 replies; 17+ messages in thread From: Guchun Chen @ 2021-08-02 5:16 UTC (permalink / raw) To: amd-gfx, Likun.Gao, christian.koenig, Hawking.Zhang, alexander.deucher Cc: Guchun Chen In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop scheduler in s3 test, otherwise, fence related failure will arrive after resume. To fix this and for a better clean up, move drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and should never be called in hw_fini. v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, to keep sw_init and sw_fini paired. Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index b1d2dc39e8be..9e53ff851496 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev, fence_driver_init: /* Fence driver */ - r = amdgpu_fence_driver_init(adev); + r = amdgpu_fence_driver_sw_init(adev); if (r) { - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); goto failed; } @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) } amdgpu_fence_driver_hw_init(adev); - r = amdgpu_device_ip_late_init(adev); if (r) return r; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 49c5c7331c53..7495911516c2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, } /** - * amdgpu_fence_driver_init - init the fence driver + * amdgpu_fence_driver_sw_init - init the fence driver * for all possible rings. * * @adev: amdgpu device pointer @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, * amdgpu_fence_driver_start_ring(). * Returns 0 for success. */ -int amdgpu_fence_driver_init(struct amdgpu_device *adev) +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) { return 0; } /** - * amdgpu_fence_driver_fini - tear down the fence driver + * amdgpu_fence_driver_hw_fini - tear down the fence driver * for all possible rings. * * @adev: amdgpu device pointer @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev) if (!ring || !ring->fence_drv.initialized) continue; - if (!ring->no_scheduler) - drm_sched_fini(&ring->sched); + /* You can't wait for HW to signal if it's gone */ if (!drm_dev_is_unplugged(&adev->ddev)) r = amdgpu_fence_wait_empty(ring); @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) if (!ring || !ring->fence_drv.initialized) continue; + if (!ring->no_scheduler) + drm_sched_fini(&ring->sched); + for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) dma_fence_put(ring->fence_drv.fences[j]); kfree(ring->fence_drv.fences); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 27adffa7658d..9c11ced4312c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { struct dma_fence **fences; }; -int amdgpu_fence_driver_init(struct amdgpu_device *adev); void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, struct amdgpu_irq_src *irq_src, unsigned irq_type); +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, unsigned flags); int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, -- 2.17.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-02 5:16 [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) Guchun Chen @ 2021-08-02 6:56 ` Christian König 2021-08-02 8:23 ` Chen, Guchun 2021-08-18 5:26 ` Andrey Grodzovsky 1 sibling, 1 reply; 17+ messages in thread From: Christian König @ 2021-08-02 6:56 UTC (permalink / raw) To: Guchun Chen, amd-gfx, Likun.Gao, christian.koenig, Hawking.Zhang, alexander.deucher Am 02.08.21 um 07:16 schrieb Guchun Chen: > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop > scheduler in s3 test, otherwise, fence related failure will arrive > after resume. To fix this and for a better clean up, move drm_sched_fini > from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and > should never be called in hw_fini. > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > to keep sw_init and sw_fini paired. > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > Suggested-by: Christian König <christian.koenig@amd.com> > Signed-off-by: Guchun Chen <guchun.chen@amd.com> It's a bit ambiguous now what fence_drv.initialized means, but I think we can live with that for now. Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. Regards, Christian. > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > 3 files changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index b1d2dc39e8be..9e53ff851496 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev, > > fence_driver_init: > /* Fence driver */ > - r = amdgpu_fence_driver_init(adev); > + r = amdgpu_fence_driver_sw_init(adev); > if (r) { > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > goto failed; > } > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) > } > amdgpu_fence_driver_hw_init(adev); > > - > r = amdgpu_device_ip_late_init(adev); > if (r) > return r; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > index 49c5c7331c53..7495911516c2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > } > > /** > - * amdgpu_fence_driver_init - init the fence driver > + * amdgpu_fence_driver_sw_init - init the fence driver > * for all possible rings. > * > * @adev: amdgpu device pointer > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > * amdgpu_fence_driver_start_ring(). > * Returns 0 for success. > */ > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > { > return 0; > } > > /** > - * amdgpu_fence_driver_fini - tear down the fence driver > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > * for all possible rings. > * > * @adev: amdgpu device pointer > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > continue; > - if (!ring->no_scheduler) > - drm_sched_fini(&ring->sched); > + > /* You can't wait for HW to signal if it's gone */ > if (!drm_dev_is_unplugged(&adev->ddev)) > r = amdgpu_fence_wait_empty(ring); > @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > if (!ring || !ring->fence_drv.initialized) > continue; > > + if (!ring->no_scheduler) > + drm_sched_fini(&ring->sched); > + > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > dma_fence_put(ring->fence_drv.fences[j]); > kfree(ring->fence_drv.fences); > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 27adffa7658d..9c11ced4312c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > struct dma_fence **fences; > }; > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > @@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > struct amdgpu_irq_src *irq_src, > unsigned irq_type); > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, > unsigned flags); > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-02 6:56 ` Christian König @ 2021-08-02 8:23 ` Chen, Guchun 2021-08-02 13:35 ` Alex Deucher 0 siblings, 1 reply; 17+ messages in thread From: Chen, Guchun @ 2021-08-02 8:23 UTC (permalink / raw) To: Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [Public] Thank you, Christian. Regarding fence_drv.initialized, it looks to a bit redundant, anyway let me look into this more. Regards, Guchun -----Original Message----- From: Christian König <ckoenig.leichtzumerken@gmail.com> Sent: Monday, August 2, 2021 2:56 PM To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) Am 02.08.21 um 07:16 schrieb Guchun Chen: > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop > scheduler in s3 test, otherwise, fence related failure will arrive > after resume. To fix this and for a better clean up, move > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > driver shutdown, and should never be called in hw_fini. > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, to > keep sw_init and sw_fini paired. > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > Suggested-by: Christian König <christian.koenig@amd.com> > Signed-off-by: Guchun Chen <guchun.chen@amd.com> It's a bit ambiguous now what fence_drv.initialized means, but I think we can live with that for now. Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. Regards, Christian. > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > 3 files changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index b1d2dc39e8be..9e53ff851496 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > *adev, > > fence_driver_init: > /* Fence driver */ > - r = amdgpu_fence_driver_init(adev); > + r = amdgpu_fence_driver_sw_init(adev); > if (r) { > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > goto failed; > } > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) > } > amdgpu_fence_driver_hw_init(adev); > > - > r = amdgpu_device_ip_late_init(adev); > if (r) > return r; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > index 49c5c7331c53..7495911516c2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > } > > /** > - * amdgpu_fence_driver_init - init the fence driver > + * amdgpu_fence_driver_sw_init - init the fence driver > * for all possible rings. > * > * @adev: amdgpu device pointer > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > * amdgpu_fence_driver_start_ring(). > * Returns 0 for success. > */ > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > { > return 0; > } > > /** > - * amdgpu_fence_driver_fini - tear down the fence driver > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > * for all possible rings. > * > * @adev: amdgpu device pointer > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > continue; > - if (!ring->no_scheduler) > - drm_sched_fini(&ring->sched); > + > /* You can't wait for HW to signal if it's gone */ > if (!drm_dev_is_unplugged(&adev->ddev)) > r = amdgpu_fence_wait_empty(ring); @@ -560,6 +559,9 @@ void > amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > if (!ring || !ring->fence_drv.initialized) > continue; > > + if (!ring->no_scheduler) > + drm_sched_fini(&ring->sched); > + > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > dma_fence_put(ring->fence_drv.fences[j]); > kfree(ring->fence_drv.fences); > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 27adffa7658d..9c11ced4312c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > struct dma_fence **fences; > }; > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > struct amdgpu_irq_src *irq_src, > unsigned irq_type); > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); -void > amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, > unsigned flags); > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-02 8:23 ` Chen, Guchun @ 2021-08-02 13:35 ` Alex Deucher 2021-08-02 16:19 ` Mike Lothian 2021-08-03 1:56 ` Chen, Guchun 0 siblings, 2 replies; 17+ messages in thread From: Alex Deucher @ 2021-08-02 13:35 UTC (permalink / raw) To: Chen, Guchun Cc: Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com> wrote: > > [Public] > > Thank you, Christian. > > Regarding fence_drv.initialized, it looks to a bit redundant, anyway let me look into this more. Does this patch fix this bug? https://gitlab.freedesktop.org/drm/amd/-/issues/1668 If so, please add: Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1668 to the commit message. Alex > > Regards, > Guchun > > -----Original Message----- > From: Christian König <ckoenig.leichtzumerken@gmail.com> > Sent: Monday, August 2, 2021 2:56 PM > To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) > > Am 02.08.21 um 07:16 schrieb Guchun Chen: > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop > > scheduler in s3 test, otherwise, fence related failure will arrive > > after resume. To fix this and for a better clean up, move > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > > driver shutdown, and should never be called in hw_fini. > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, to > > keep sw_init and sw_fini paired. > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > Suggested-by: Christian König <christian.koenig@amd.com> > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > > It's a bit ambiguous now what fence_drv.initialized means, but I think we can live with that for now. > > Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. > > Regards, > Christian. > > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > index b1d2dc39e8be..9e53ff851496 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > > *adev, > > > > fence_driver_init: > > /* Fence driver */ > > - r = amdgpu_fence_driver_init(adev); > > + r = amdgpu_fence_driver_sw_init(adev); > > if (r) { > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); > > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > > goto failed; > > } > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) > > } > > amdgpu_fence_driver_hw_init(adev); > > > > - > > r = amdgpu_device_ip_late_init(adev); > > if (r) > > return r; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > index 49c5c7331c53..7495911516c2 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > } > > > > /** > > - * amdgpu_fence_driver_init - init the fence driver > > + * amdgpu_fence_driver_sw_init - init the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > * amdgpu_fence_driver_start_ring(). > > * Returns 0 for success. > > */ > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > { > > return 0; > > } > > > > /** > > - * amdgpu_fence_driver_fini - tear down the fence driver > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > > amdgpu_device *adev) > > > > if (!ring || !ring->fence_drv.initialized) > > continue; > > - if (!ring->no_scheduler) > > - drm_sched_fini(&ring->sched); > > + > > /* You can't wait for HW to signal if it's gone */ > > if (!drm_dev_is_unplugged(&adev->ddev)) > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 +559,9 @@ void > > amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > > continue; > > > > + if (!ring->no_scheduler) > > + drm_sched_fini(&ring->sched); > > + > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > dma_fence_put(ring->fence_drv.fences[j]); > > kfree(ring->fence_drv.fences); > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > index 27adffa7658d..9c11ced4312c 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > struct dma_fence **fences; > > }; > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > struct amdgpu_irq_src *irq_src, > > unsigned irq_type); > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); -void > > amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, > > unsigned flags); > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-02 13:35 ` Alex Deucher @ 2021-08-02 16:19 ` Mike Lothian 2021-08-03 1:56 ` Chen, Guchun 1 sibling, 0 replies; 17+ messages in thread From: Mike Lothian @ 2021-08-02 16:19 UTC (permalink / raw) To: Alex Deucher Cc: Chen, Guchun, Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [-- Attachment #1: Type: text/plain, Size: 7250 bytes --] I've just tested it and it seem to fix my issue Feel free to add my Tested-by: Mike Lothian <mike@fireburn.co.uk> On Mon, 2 Aug 2021 at 14:35, Alex Deucher <alexdeucher@gmail.com> wrote: > On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com> wrote: > > > > [Public] > > > > Thank you, Christian. > > > > Regarding fence_drv.initialized, it looks to a bit redundant, anyway let > me look into this more. > > Does this patch fix this bug? > https://gitlab.freedesktop.org/drm/amd/-/issues/1668 > > If so, please add: > Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1668 > to the commit message. > > Alex > > > > > Regards, > > Guchun > > > > -----Original Message----- > > From: Christian König <ckoenig.leichtzumerken@gmail.com> > > Sent: Monday, August 2, 2021 2:56 PM > > To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; > Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian < > Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; > Deucher, Alexander <Alexander.Deucher@amd.com> > > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini > in s3 test (v2) > > > > Am 02.08.21 um 07:16 schrieb Guchun Chen: > > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop > > > scheduler in s3 test, otherwise, fence related failure will arrive > > > after resume. To fix this and for a better clean up, move > > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > > > driver shutdown, and should never be called in hw_fini. > > > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, to > > > keep sw_init and sw_fini paired. > > > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > > Suggested-by: Christian König <christian.koenig@amd.com> > > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > > > > It's a bit ambiguous now what fence_drv.initialized means, but I think > we can live with that for now. > > > > Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. > > > > Regards, > > Christian. > > > > > --- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > index b1d2dc39e8be..9e53ff851496 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > > > *adev, > > > > > > fence_driver_init: > > > /* Fence driver */ > > > - r = amdgpu_fence_driver_init(adev); > > > + r = amdgpu_fence_driver_sw_init(adev); > > > if (r) { > > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init > failed\n"); > > > amdgpu_vf_error_put(adev, > AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > > > goto failed; > > > } > > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, > bool fbcon) > > > } > > > amdgpu_fence_driver_hw_init(adev); > > > > > > - > > > r = amdgpu_device_ip_late_init(adev); > > > if (r) > > > return r; > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > index 49c5c7331c53..7495911516c2 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > > } > > > > > > /** > > > - * amdgpu_fence_driver_init - init the fence driver > > > + * amdgpu_fence_driver_sw_init - init the fence driver > > > * for all possible rings. > > > * > > > * @adev: amdgpu device pointer > > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > > * amdgpu_fence_driver_start_ring(). > > > * Returns 0 for success. > > > */ > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > > { > > > return 0; > > > } > > > > > > /** > > > - * amdgpu_fence_driver_fini - tear down the fence driver > > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > > * for all possible rings. > > > * > > > * @adev: amdgpu device pointer > > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > > > amdgpu_device *adev) > > > > > > if (!ring || !ring->fence_drv.initialized) > > > continue; > > > - if (!ring->no_scheduler) > > > - drm_sched_fini(&ring->sched); > > > + > > > /* You can't wait for HW to signal if it's gone */ > > > if (!drm_dev_is_unplugged(&adev->ddev)) > > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 > +559,9 @@ void > > > amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > > > if (!ring || !ring->fence_drv.initialized) > > > continue; > > > > > > + if (!ring->no_scheduler) > > > + drm_sched_fini(&ring->sched); > > > + > > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > > dma_fence_put(ring->fence_drv.fences[j]); > > > kfree(ring->fence_drv.fences); > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > index 27adffa7658d..9c11ced4312c 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > > struct dma_fence **fences; > > > }; > > > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); > > > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring > *ring, > > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > > struct amdgpu_irq_src *irq_src, > > > unsigned irq_type); > > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); -void > > > amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence > **fence, > > > unsigned flags); > > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, > [-- Attachment #2: Type: text/html, Size: 10031 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-02 13:35 ` Alex Deucher 2021-08-02 16:19 ` Mike Lothian @ 2021-08-03 1:56 ` Chen, Guchun 2021-08-18 2:08 ` Mike Lothian 1 sibling, 1 reply; 17+ messages in thread From: Chen, Guchun @ 2021-08-03 1:56 UTC (permalink / raw) To: Alex Deucher Cc: Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [Public] Hi Alex, I submitted the patch before your message, I will take care of this next time. Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com> Sent: Monday, August 2, 2021 9:35 PM To: Chen, Guchun <Guchun.Chen@amd.com> Cc: Christian König <ckoenig.leichtzumerken@gmail.com>; amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com> wrote: > > [Public] > > Thank you, Christian. > > Regarding fence_drv.initialized, it looks to a bit redundant, anyway let me look into this more. Does this patch fix this bug? https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 If so, please add: Bug: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 to the commit message. Alex > > Regards, > Guchun > > -----Original Message----- > From: Christian König <ckoenig.leichtzumerken@gmail.com> > Sent: Monday, August 2, 2021 2:56 PM > To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; > Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian > <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; > Deucher, Alexander <Alexander.Deucher@amd.com> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver > fini in s3 test (v2) > > Am 02.08.21 um 07:16 schrieb Guchun Chen: > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to > > stop scheduler in s3 test, otherwise, fence related failure will > > arrive after resume. To fix this and for a better clean up, move > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > > driver shutdown, and should never be called in hw_fini. > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > > to keep sw_init and sw_fini paired. > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > Suggested-by: Christian König <christian.koenig@amd.com> > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > > It's a bit ambiguous now what fence_drv.initialized means, but I think we can live with that for now. > > Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. > > Regards, > Christian. > > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > index b1d2dc39e8be..9e53ff851496 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > > *adev, > > > > fence_driver_init: > > /* Fence driver */ > > - r = amdgpu_fence_driver_init(adev); > > + r = amdgpu_fence_driver_sw_init(adev); > > if (r) { > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init > > + failed\n"); > > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > > goto failed; > > } > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) > > } > > amdgpu_fence_driver_hw_init(adev); > > > > - > > r = amdgpu_device_ip_late_init(adev); > > if (r) > > return r; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > index 49c5c7331c53..7495911516c2 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > } > > > > /** > > - * amdgpu_fence_driver_init - init the fence driver > > + * amdgpu_fence_driver_sw_init - init the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > * amdgpu_fence_driver_start_ring(). > > * Returns 0 for success. > > */ > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > { > > return 0; > > } > > > > /** > > - * amdgpu_fence_driver_fini - tear down the fence driver > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > > amdgpu_device *adev) > > > > if (!ring || !ring->fence_drv.initialized) > > continue; > > - if (!ring->no_scheduler) > > - drm_sched_fini(&ring->sched); > > + > > /* You can't wait for HW to signal if it's gone */ > > if (!drm_dev_is_unplugged(&adev->ddev)) > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 > > +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > > continue; > > > > + if (!ring->no_scheduler) > > + drm_sched_fini(&ring->sched); > > + > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > dma_fence_put(ring->fence_drv.fences[j]); > > kfree(ring->fence_drv.fences); diff --git > > a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > index 27adffa7658d..9c11ced4312c 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > struct dma_fence **fences; > > }; > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring > > *ring); > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > struct amdgpu_irq_src *irq_src, > > unsigned irq_type); > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, > > unsigned flags); > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-03 1:56 ` Chen, Guchun @ 2021-08-18 2:08 ` Mike Lothian 2021-08-18 2:12 ` Mike Lothian 0 siblings, 1 reply; 17+ messages in thread From: Mike Lothian @ 2021-08-18 2:08 UTC (permalink / raw) To: Chen, Guchun Cc: Alex Deucher, Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [-- Attachment #1: Type: text/plain, Size: 8798 bytes --] Hi I've just noticed something similar when starting weston, I still see it with this patch, but not on linus's tree I'll confirm for sure tomorrow and send the stack trace if I can save it Cheers Mike On Tue, 3 Aug 2021 at 02:56, Chen, Guchun <Guchun.Chen@amd.com> wrote: > [Public] > > Hi Alex, > > I submitted the patch before your message, I will take care of this next > time. > > Regards, > Guchun > > -----Original Message----- > From: Alex Deucher <alexdeucher@gmail.com> > Sent: Monday, August 2, 2021 9:35 PM > To: Chen, Guchun <Guchun.Chen@amd.com> > Cc: Christian König <ckoenig.leichtzumerken@gmail.com>; > amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, > Christian <Christian.Koenig@amd.com>; Zhang, Hawking < > Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in > s3 test (v2) > > On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com> wrote: > > > > [Public] > > > > Thank you, Christian. > > > > Regarding fence_drv.initialized, it looks to a bit redundant, anyway let > me look into this more. > > Does this patch fix this bug? > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 > > If so, please add: > Bug: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 > to the commit message. > > Alex > > > > > Regards, > > Guchun > > > > -----Original Message----- > > From: Christian König <ckoenig.leichtzumerken@gmail.com> > > Sent: Monday, August 2, 2021 2:56 PM > > To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; > > Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian > > <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; > > Deucher, Alexander <Alexander.Deucher@amd.com> > > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver > > fini in s3 test (v2) > > > > Am 02.08.21 um 07:16 schrieb Guchun Chen: > > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to > > > stop scheduler in s3 test, otherwise, fence related failure will > > > arrive after resume. To fix this and for a better clean up, move > > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > > > driver shutdown, and should never be called in hw_fini. > > > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > > > to keep sw_init and sw_fini paired. > > > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > > Suggested-by: Christian König <christian.koenig@amd.com> > > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > > > > It's a bit ambiguous now what fence_drv.initialized means, but I think > we can live with that for now. > > > > Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. > > > > Regards, > > Christian. > > > > > --- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > index b1d2dc39e8be..9e53ff851496 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > > > *adev, > > > > > > fence_driver_init: > > > /* Fence driver */ > > > - r = amdgpu_fence_driver_init(adev); > > > + r = amdgpu_fence_driver_sw_init(adev); > > > if (r) { > > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init > > > + failed\n"); > > > amdgpu_vf_error_put(adev, > AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > > > goto failed; > > > } > > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, > bool fbcon) > > > } > > > amdgpu_fence_driver_hw_init(adev); > > > > > > - > > > r = amdgpu_device_ip_late_init(adev); > > > if (r) > > > return r; > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > index 49c5c7331c53..7495911516c2 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > > } > > > > > > /** > > > - * amdgpu_fence_driver_init - init the fence driver > > > + * amdgpu_fence_driver_sw_init - init the fence driver > > > * for all possible rings. > > > * > > > * @adev: amdgpu device pointer > > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > > * amdgpu_fence_driver_start_ring(). > > > * Returns 0 for success. > > > */ > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > > { > > > return 0; > > > } > > > > > > /** > > > - * amdgpu_fence_driver_fini - tear down the fence driver > > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > > * for all possible rings. > > > * > > > * @adev: amdgpu device pointer > > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > > > amdgpu_device *adev) > > > > > > if (!ring || !ring->fence_drv.initialized) > > > continue; > > > - if (!ring->no_scheduler) > > > - drm_sched_fini(&ring->sched); > > > + > > > /* You can't wait for HW to signal if it's gone */ > > > if (!drm_dev_is_unplugged(&adev->ddev)) > > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 > > > +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > > > if (!ring || !ring->fence_drv.initialized) > > > continue; > > > > > > + if (!ring->no_scheduler) > > > + drm_sched_fini(&ring->sched); > > > + > > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > > dma_fence_put(ring->fence_drv.fences[j]); > > > kfree(ring->fence_drv.fences); diff --git > > > a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > index 27adffa7658d..9c11ced4312c 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > > struct dma_fence **fences; > > > }; > > > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring > > > *ring); > > > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring > *ring, > > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > > struct amdgpu_irq_src *irq_src, > > > unsigned irq_type); > > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > > > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence > **fence, > > > unsigned flags); > > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, > [-- Attachment #2: Type: text/html, Size: 13015 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-18 2:08 ` Mike Lothian @ 2021-08-18 2:12 ` Mike Lothian 2021-08-18 2:23 ` Chen, Guchun 0 siblings, 1 reply; 17+ messages in thread From: Mike Lothian @ 2021-08-18 2:12 UTC (permalink / raw) To: Chen, Guchun Cc: Alex Deucher, Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [-- Attachment #1: Type: text/plain, Size: 69007 bytes --] Here's the dmesg Linux version 5.14.0-rc3-agd5f+ (root@axion.fireburn.co.uk) (clang version 12.0.1, LLD 12.0.1) #1279 SMP Tue Aug 17 02:23:10 BST 2021 Command line: KERNEL supported cpus: Intel GenuineIntel x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers' x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers' x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers' x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers' x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR' x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256 x86/fpu: xstate_offset[3]: 832, xstate_sizes[3]: 64 x86/fpu: xstate_offset[4]: 896, xstate_sizes[4]: 64 x86/fpu: Enabled xstate features 0x1f, context size is 960 bytes, using 'compacted' format. signal: max sigframe size: 2032 BIOS-provided physical RAM map: BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved BIOS-e820: [mem 0x0000000000100000-0x00000000312bafff] usable BIOS-e820: [mem 0x00000000312bb000-0x00000000312ccfff] reserved BIOS-e820: [mem 0x00000000312cd000-0x00000000312e5fff] usable BIOS-e820: [mem 0x00000000312e6000-0x00000000312e6fff] ACPI NVS BIOS-e820: [mem 0x00000000312e7000-0x0000000031330fff] reserved BIOS-e820: [mem 0x0000000031331000-0x000000003138bfff] usable BIOS-e820: [mem 0x000000003138c000-0x0000000031aaafff] reserved BIOS-e820: [mem 0x0000000031aab000-0x00000000362a0fff] usable BIOS-e820: [mem 0x00000000362a1000-0x00000000372bbfff] reserved BIOS-e820: [mem 0x00000000372bc000-0x00000000372fafff] ACPI data BIOS-e820: [mem 0x00000000372fb000-0x000000003789afff] ACPI NVS BIOS-e820: [mem 0x000000003789b000-0x0000000037ffefff] reserved BIOS-e820: [mem 0x0000000037fff000-0x0000000037ffffff] usable BIOS-e820: [mem 0x0000000038000000-0x00000000380fffff] reserved BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved BIOS-e820: [mem 0x00000000fe000000-0x00000000fe010fff] reserved BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved BIOS-e820: [mem 0x0000000100000000-0x00000008c1ffffff] usable NX (Execute Disable) protection: active e820: update [mem 0x310ad018-0x310bcc57] usable ==> usable e820: update [mem 0x310ad018-0x310bcc57] usable ==> usable e820: update [mem 0x3109c018-0x310ac057] usable ==> usable e820: update [mem 0x3109c018-0x310ac057] usable ==> usable extended physical RAM map: reserve setup_data: [mem 0x0000000000000000-0x0000000000057fff] usable reserve setup_data: [mem 0x0000000000058000-0x0000000000058fff] reserved reserve setup_data: [mem 0x0000000000059000-0x000000000009dfff] usable reserve setup_data: [mem 0x000000000009e000-0x000000000009ffff] reserved reserve setup_data: [mem 0x0000000000100000-0x000000003109c017] usable reserve setup_data: [mem 0x000000003109c018-0x00000000310ac057] usable reserve setup_data: [mem 0x00000000310ac058-0x00000000310ad017] usable reserve setup_data: [mem 0x00000000310ad018-0x00000000310bcc57] usable reserve setup_data: [mem 0x00000000310bcc58-0x00000000312bafff] usable reserve setup_data: [mem 0x00000000312bb000-0x00000000312ccfff] reserved reserve setup_data: [mem 0x00000000312cd000-0x00000000312e5fff] usable reserve setup_data: [mem 0x00000000312e6000-0x00000000312e6fff] ACPI NVS reserve setup_data: [mem 0x00000000312e7000-0x0000000031330fff] reserved reserve setup_data: [mem 0x0000000031331000-0x000000003138bfff] usable reserve setup_data: [mem 0x000000003138c000-0x0000000031aaafff] reserved reserve setup_data: [mem 0x0000000031aab000-0x00000000362a0fff] usable reserve setup_data: [mem 0x00000000362a1000-0x00000000372bbfff] reserved reserve setup_data: [mem 0x00000000372bc000-0x00000000372fafff] ACPI data reserve setup_data: [mem 0x00000000372fb000-0x000000003789afff] ACPI NVS reserve setup_data: [mem 0x000000003789b000-0x0000000037ffefff] reserved reserve setup_data: [mem 0x0000000037fff000-0x0000000037ffffff] usable reserve setup_data: [mem 0x0000000038000000-0x00000000380fffff] reserved reserve setup_data: [mem 0x00000000e0000000-0x00000000efffffff] reserved reserve setup_data: [mem 0x00000000fe000000-0x00000000fe010fff] reserved reserve setup_data: [mem 0x00000000fec00000-0x00000000fec00fff] reserved reserve setup_data: [mem 0x00000000fee00000-0x00000000fee00fff] reserved reserve setup_data: [mem 0x00000000ff000000-0x00000000ffffffff] reserved reserve setup_data: [mem 0x0000000100000000-0x00000008c1ffffff] usable efi: EFI v2.40 by American Megatrends efi: ESRT=0x37f83018 ACPI=0x372c8000 ACPI 2.0=0x372c8000 SMBIOS=0x37ecd000 SMBIOS 2.8 present. DMI: Alienware Alienware 15 R2/0H6J09, BIOS 1.13.1 06/10/2021 tsc: Detected 2700.000 MHz processor tsc: Detected 2699.909 MHz TSC e820: update [mem 0x00000000-0x00000fff] usable ==> reserved e820: remove [mem 0x000a0000-0x000fffff] usable last_pfn = 0x8c2000 max_arch_pfn = 0x400000000 x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT last_pfn = 0x38000 max_arch_pfn = 0x400000000 esrt: Reserving ESRT space from 0x0000000037f83018 to 0x0000000037f83050. Kernel/User page tables isolation: disabled on command line. Using GB pages for direct mapping Secure boot disabled ACPI: Early table checksum verification disabled ACPI: RSDP 0x00000000372C8000 000024 (v02 ALWARE) ACPI: XSDT 0x00000000372C80A8 0000CC (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: FACP 0x00000000372EBF70 00010C (v05 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: DSDT 0x00000000372C8200 023D6B (v02 ALWARE ALIENWRE 01072009 INTL 20120913) ACPI: FACS 0x0000000037899F80 000040 ACPI: APIC 0x00000000372EC080 0000BC (v03 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: FPDT 0x00000000372EC140 000044 (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: FIDT 0x00000000372EC188 00009C (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: MCFG 0x00000000372EC228 00003C (v01 ALWARE ALIENWRE 01072009 MSFT 00000097) ACPI: HPET 0x00000000372EC268 000038 (v01 ALWARE ALIENWRE 01072009 AMI. 0005000B) ACPI: SSDT 0x00000000372EC2A0 0004B9 (v01 SataRe SataTabl 00001000 INTL 20120913) ACPI: LPIT 0x00000000372EC760 000094 (v01 INTEL SKL 00000000 MSFT 0000005F) ACPI: SSDT 0x00000000372EC7F8 000248 (v02 INTEL sensrhub 00000000 INTL 20120913) ACPI: SSDT 0x00000000372ECA40 002BAE (v02 INTEL PtidDevc 00001000 INTL 20120913) ACPI: DBGP 0x00000000372EF5F0 000034 (v01 INTEL 00000000 MSFT 0000005F) ACPI: DBG2 0x00000000372EF628 000054 (v00 INTEL 00000000 MSFT 0000005F) ACPI: SSDT 0x00000000372EF680 00069D (v02 INTEL xh_rvp10 00000000 INTL 20120913) ACPI: SSDT 0x00000000372EFD20 002DB7 (v02 DptfTa DptfTabl 00001000 INTL 20120913) ACPI: SSDT 0x00000000372F2AD8 00559B (v02 SaSsdt SaSsdt 00003000 INTL 20120913) ACPI: UEFI 0x00000000372F8078 000042 (v01 00000000 00000000) ACPI: SSDT 0x00000000372F80C0 000E58 (v02 CpuRef CpuSsdt 00003000 INTL 20120913) ACPI: SSDT 0x00000000372F8F18 0000CE (v02 SgRef SgPeg 00001000 INTL 20120913) ACPI: DMAR 0x00000000372F8FE8 0000A8 (v01 INTEL SKL 00000001 INTL 00000001) ACPI: BGRT 0x00000000372F9090 000038 (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: SSDT 0x00000000372F90C8 001216 (v01 AmdRef AmdTabl 00001000 INTL 20120913) ACPI: Reserving FACP table memory at [mem 0x372ebf70-0x372ec07b] ACPI: Reserving DSDT table memory at [mem 0x372c8200-0x372ebf6a] ACPI: Reserving FACS table memory at [mem 0x37899f80-0x37899fbf] ACPI: Reserving APIC table memory at [mem 0x372ec080-0x372ec13b] ACPI: Reserving FPDT table memory at [mem 0x372ec140-0x372ec183] ACPI: Reserving FIDT table memory at [mem 0x372ec188-0x372ec223] ACPI: Reserving MCFG table memory at [mem 0x372ec228-0x372ec263] ACPI: Reserving HPET table memory at [mem 0x372ec268-0x372ec29f] ACPI: Reserving SSDT table memory at [mem 0x372ec2a0-0x372ec758] ACPI: Reserving LPIT table memory at [mem 0x372ec760-0x372ec7f3] ACPI: Reserving SSDT table memory at [mem 0x372ec7f8-0x372eca3f] ACPI: Reserving SSDT table memory at [mem 0x372eca40-0x372ef5ed] ACPI: Reserving DBGP table memory at [mem 0x372ef5f0-0x372ef623] ACPI: Reserving DBG2 table memory at [mem 0x372ef628-0x372ef67b] ACPI: Reserving SSDT table memory at [mem 0x372ef680-0x372efd1c] ACPI: Reserving SSDT table memory at [mem 0x372efd20-0x372f2ad6] ACPI: Reserving SSDT table memory at [mem 0x372f2ad8-0x372f8072] ACPI: Reserving UEFI table memory at [mem 0x372f8078-0x372f80b9] ACPI: Reserving SSDT table memory at [mem 0x372f80c0-0x372f8f17] ACPI: Reserving SSDT table memory at [mem 0x372f8f18-0x372f8fe5] ACPI: Reserving DMAR table memory at [mem 0x372f8fe8-0x372f908f] ACPI: Reserving BGRT table memory at [mem 0x372f9090-0x372f90c7] ACPI: Reserving SSDT table memory at [mem 0x372f90c8-0x372fa2dd] Zone ranges: DMA [mem 0x0000000000001000-0x0000000000ffffff] DMA32 [mem 0x0000000001000000-0x00000000ffffffff] Normal [mem 0x0000000100000000-0x00000008c1ffffff] Device empty Movable zone start for each node Early memory node ranges node 0: [mem 0x0000000000001000-0x0000000000057fff] node 0: [mem 0x0000000000059000-0x000000000009dfff] node 0: [mem 0x0000000000100000-0x00000000312bafff] node 0: [mem 0x00000000312cd000-0x00000000312e5fff] node 0: [mem 0x0000000031331000-0x000000003138bfff] node 0: [mem 0x0000000031aab000-0x00000000362a0fff] node 0: [mem 0x0000000037fff000-0x0000000037ffffff] node 0: [mem 0x0000000100000000-0x00000008c1ffffff] Initmem setup node 0 [mem 0x0000000000001000-0x00000008c1ffffff] On node 0, zone DMA: 1 pages in unavailable ranges On node 0, zone DMA: 1 pages in unavailable ranges On node 0, zone DMA: 98 pages in unavailable ranges On node 0, zone DMA32: 18 pages in unavailable ranges On node 0, zone DMA32: 75 pages in unavailable ranges On node 0, zone DMA32: 1823 pages in unavailable ranges On node 0, zone DMA32: 7518 pages in unavailable ranges On node 0, zone Normal: 24576 pages in unavailable ranges Reserving Intel graphics memory at [mem 0x39000000-0x3cffffff] ACPI: PM-Timer IO Port: 0x1808 ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x05] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x06] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x07] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x08] high edge lint[0x1]) IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-119 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) ACPI: Using ACPI (MADT) for SMP configuration information ACPI: HPET id: 0x8086a701 base: 0xfed00000 e820: update [mem 0x345ec000-0x34775fff] usable ==> reserved TSC deadline timer available smpboot: Allowing 8 CPUs, 0 hotplug CPUs [mem 0x3d000000-0xdfffffff] available for PCI devices clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns setup_percpu: NR_CPUS:16 nr_cpumask_bits:16 nr_cpu_ids:8 nr_node_ids:1 percpu: Embedded 54 pages/cpu s182104 r8192 d30888 u262144 pcpu-alloc: s182104 r8192 d30888 u262144 alloc=1*2097152 pcpu-alloc: [0] 0 1 2 3 4 5 6 7 Built 1 zonelists, mobility grouping on. Total pages: 8223801 Kernel command line: root=/dev/nvme0n1p2 rootfstype=ext4 libahci.ignore_sss=1 init=/usr/lib/systemd/systemd systemd.unified_cgroup_hierarchy=1 cgroup_no_v1=all psmouse.synaptics_intertouch=1 mitigations=off mds=off pti=off spectre_v2=off l1tf=off nospec_store_bypass_disable printk.devkmsg=on amdgpu.resize_bar=1 i915.enable_guc=3 dell_smm_hwmon.force=1 Setting dangerous option i915.enable_guc - tainting kernel Unknown command line parameters: nospec_store_bypass_disable pti=off spectre_v2=off printk: log_buf_len individual max cpu contribution: 131072 bytes printk: log_buf_len total cpu_extra contributions: 917504 bytes printk: log_buf_len min size: 262144 bytes printk: log_buf_len: 2097152 bytes printk: early log buf free: 248144(94%) Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes, linear) Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes, linear) mem auto-init: stack:all(zero), heap alloc:off, heap free:off Memory: 32648724K/33417992K available (22540K kernel code, 2395K rwdata, 10548K rodata, 1112K init, 2464K bss, 769012K reserved, 0K cma-reserved) random: get_random_u64 called from cache_random_seq_create+0x52/0x1b0 with crng_init=0 SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 rcu: Hierarchical RCU implementation. rcu: RCU event tracing is enabled. rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=8. Tracing variant of Tasks RCU enabled. rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies. rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 NR_IRQS: 4352, nr_irqs: 2048, preallocated irqs: 16 random: crng done (trusting CPU's manufacturer) spurious 8259A interrupt: IRQ7. Console: colour dummy device 80x25 printk: console [tty0] enabled ACPI: Core revision 20210604 clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635855245 ns APIC: Switch to symmetric I/O mode setup DMAR: Host address width 39 DMAR: DRHD base: 0x000000fed90000 flags: 0x0 DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 7e3ff0501e DMAR: DRHD base: 0x000000fed91000 flags: 0x1 DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap d2008c40660462 ecap f050da DMAR: RMRR base: 0x000000371e5000 end: 0x00000037204fff DMAR: RMRR base: 0x00000038800000 end: 0x0000003cffffff DMAR: [Firmware Bug]: No firmware reserved region can cover this RMRR [0x0000000038800000-0x000000003cffffff], contact BIOS vendor for fixes DMAR: [Firmware Bug]: Your BIOS is broken; bad RMRR [0x0000000038800000-0x000000003cffffff] BIOS vendor: Alienware; Ver: 1.13.1; Product Version: 1.13.1 DMAR-IR: IOAPIC id 2 under DRHD base 0xfed91000 IOMMU 1 DMAR-IR: HPET id 0 under DRHD base 0xfed91000 DMAR-IR: Enabled IRQ remapping in xapic mode ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x26eae8729ef, max_idle_ns: 440795235156 ns Calibrating delay loop (skipped), value calculated using timer frequency.. 5399.81 BogoMIPS (lpj=2699909) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) Mountpoint-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) Disabling cpuset control group subsystem in v1 mounts Disabling cpu control group subsystem in v1 mounts Disabling cpuacct control group subsystem in v1 mounts Disabling io control group subsystem in v1 mounts Disabling memory control group subsystem in v1 mounts Disabling devices control group subsystem in v1 mounts Disabling freezer control group subsystem in v1 mounts Disabling net_cls control group subsystem in v1 mounts Disabling net_prio control group subsystem in v1 mounts Disabling hugetlb control group subsystem in v1 mounts Disabling pids control group subsystem in v1 mounts Disabling rdma control group subsystem in v1 mounts Disabling misc control group subsystem in v1 mounts CPU0: Thermal monitoring enabled (TM1) process: using mwait in idle threads Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8 Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4 Speculative Store Bypass: Vulnerable TAA: Mitigation: TSX disabled SRBDS: Vulnerable Freeing SMP alternatives memory: 60K smpboot: Estimated ratio of average max frequency by base frequency (times 1024): 1213 smpboot: CPU0: Intel(R) Core(TM) i7-6820HK CPU @ 2.70GHz (family: 0x6, model: 0x5e, stepping: 0x3) Performance Events: PEBS fmt3+, Skylake events, 32-deep LBR, full-width counters, Intel PMU driver. ... version: 4 ... bit width: 48 ... generic registers: 4 ... value mask: 0000ffffffffffff ... max period: 00007fffffffffff ... fixed-purpose events: 3 ... event mask: 000000070000000f rcu: Hierarchical SRCU implementation. smp: Bringing up secondary CPUs ... x86: Booting SMP configuration: .... node #0, CPUs: #1 #2 #3 #4 #5 #6 #7 smp: Brought up 1 node, 8 CPUs smpboot: Max logical packages: 1 smpboot: Total of 8 processors activated (43198.54 BogoMIPS) devtmpfs: initialized x86/mm: Memory block size: 128MB ACPI: PM: Registering ACPI NVS region [mem 0x312e6000-0x312e6fff] (4096 bytes) ACPI: PM: Registering ACPI NVS region [mem 0x372fb000-0x3789afff] (5898240 bytes) clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns futex hash table entries: 2048 (order: 5, 131072 bytes, linear) NET: Registered PF_NETLINK/PF_ROUTE protocol family thermal_sys: Registered thermal governor 'step_wise' cpuidle: using governor ladder cpuidle: using governor menu HugeTLB: can free 4094 vmemmap pages for hugepages-1048576kB ACPI FADT declares the system doesn't support PCIe ASPM, so disable it ACPI: bus type PCI registered acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000) PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820 PCI: Using configuration type 1 for base access ENERGY_PERF_BIAS: Set to 'normal', was 'performance' HugeTLB: can free 6 vmemmap pages for hugepages-2048kB HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages cryptd: max_cpu_qlen set to 1000 fbcon: Taking over console ACPI: Added _OSI(Module Device) ACPI: Added _OSI(Processor Device) ACPI: Added _OSI(3.0 _SCP Extensions) ACPI: Added _OSI(Processor Aggregator Device) ACPI: Added _OSI(Linux-Dell-Video) ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio) ACPI: Added _OSI(Linux-HPI-Hybrid-Graphics) ACPI: 10 ACPI AML tables successfully acquired and loaded ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF8881010EF800 0005FD (v02 PmRef Cpu0Ist 00003000 INTL 20120913) ACPI: \_PR_.CPU0: _OSC native thermal LVT Acked ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF8881010E4400 00037F (v02 PmRef Cpu0Cst 00003001 INTL 20120913) ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF8881010E8000 0005AA (v02 PmRef ApIst 00003000 INTL 20120913) ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF888101108A00 000119 (v02 PmRef ApCst 00003000 INTL 20120913) ACPI: EC: EC started ACPI: EC: interrupt blocked ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62 ACPI: \_SB_.PCI0.LPCB.EC0_: Boot DSDT EC used to handle transactions ACPI: Interpreter enabled ACPI: PM: (supports S0 S3 S5) ACPI: Using IOAPIC for interrupt routing PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug ACPI: Enabled 9 GPEs in block 00 to 7F ACPI: PM: Power Resource [PG00] ACPI: PM: Power Resource [PG01] ACPI: PM: Power Resource [PG02] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-fe]) acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI HPX-Type3] acpi PNP0A08:00: _OSC: platform retains control of PCIe features (AE_ERROR) PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7 window] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff window] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff window] pci_bus 0000:00: root bus resource [mem 0x3d000000-0xdfffffff window] pci_bus 0000:00: root bus resource [mem 0xfd000000-0xfe7fffff window] pci_bus 0000:00: root bus resource [bus 00-fe] pci 0000:00:00.0: [8086:1910] type 00 class 0x060000 pci 0000:00:01.0: [8086:1901] type 01 class 0x060400 pci 0000:00:01.0: PME# supported from D0 D3hot D3cold pci 0000:00:02.0: [8086:191b] type 00 class 0x030000 pci 0000:00:02.0: reg 0x10: [mem 0xdb000000-0xdbffffff 64bit] pci 0000:00:02.0: reg 0x18: [mem 0x70000000-0x7fffffff 64bit pref] pci 0000:00:02.0: reg 0x20: [io 0xf000-0xf03f] pci 0000:00:02.0: BAR 2: assigned to efifb pci 0000:00:04.0: [8086:1903] type 00 class 0x118000 pci 0000:00:04.0: reg 0x10: [mem 0xdc620000-0xdc627fff 64bit] pci 0000:00:14.0: [8086:a12f] type 00 class 0x0c0330 pci 0000:00:14.0: reg 0x10: [mem 0xdc610000-0xdc61ffff 64bit] pci 0000:00:14.0: PME# supported from D3hot D3cold pci 0000:00:14.2: [8086:a131] type 00 class 0x118000 pci 0000:00:14.2: reg 0x10: [mem 0xdc636000-0xdc636fff 64bit] pci 0000:00:16.0: [8086:a13a] type 00 class 0x078000 pci 0000:00:16.0: reg 0x10: [mem 0xdc635000-0xdc635fff 64bit] pci 0000:00:16.0: PME# supported from D3hot pci 0000:00:17.0: [8086:a103] type 00 class 0x010601 pci 0000:00:17.0: reg 0x10: [mem 0xdc630000-0xdc631fff] pci 0000:00:17.0: reg 0x14: [mem 0xdc634000-0xdc6340ff] pci 0000:00:17.0: reg 0x18: [io 0xf090-0xf097] pci 0000:00:17.0: reg 0x1c: [io 0xf080-0xf083] pci 0000:00:17.0: reg 0x20: [io 0xf060-0xf07f] pci 0000:00:17.0: reg 0x24: [mem 0xdc633000-0xdc6337ff] pci 0000:00:17.0: PME# supported from D3hot pci 0000:00:1c.0: [8086:a110] type 01 class 0x060400 pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold pci 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1c.4: [8086:a114] type 01 class 0x060400 pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold pci 0000:00:1c.4: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1c.5: [8086:a115] type 01 class 0x060400 pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold pci 0000:00:1c.5: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1c.6: [8086:a116] type 01 class 0x060400 pci 0000:00:1c.6: PME# supported from D0 D3hot D3cold pci 0000:00:1c.6: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1d.0: [8086:a118] type 01 class 0x060400 pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold pci 0000:00:1d.0: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1f.0: [8086:a14e] type 00 class 0x060100 pci 0000:00:1f.2: [8086:a121] type 00 class 0x058000 pci 0000:00:1f.2: reg 0x10: [mem 0xdc62c000-0xdc62ffff] pci 0000:00:1f.3: [8086:a170] type 00 class 0x040300 pci 0000:00:1f.3: reg 0x10: [mem 0xdc628000-0xdc62bfff 64bit] pci 0000:00:1f.3: reg 0x20: [mem 0xdc600000-0xdc60ffff 64bit] pci 0000:00:1f.3: PME# supported from D3hot D3cold pci 0000:00:1f.4: [8086:a123] type 00 class 0x0c0500 pci 0000:00:1f.4: reg 0x10: [mem 0xdc632000-0xdc6320ff 64bit] pci 0000:00:1f.4: reg 0x20: [io 0xf040-0xf05f] pci 0000:01:00.0: [1002:6921] type 00 class 0x038000 pci 0000:01:00.0: reg 0x10: [mem 0xb0000000-0xbfffffff 64bit pref] pci 0000:01:00.0: reg 0x18: [mem 0xc0000000-0xc01fffff 64bit pref] pci 0000:01:00.0: reg 0x20: [io 0xe000-0xe0ff] pci 0000:01:00.0: reg 0x24: [mem 0xdc500000-0xdc53ffff] pci 0000:01:00.0: reg 0x30: [mem 0xdc540000-0xdc55ffff pref] pci 0000:01:00.0: supports D1 D2 pci 0000:01:00.0: PME# supported from D1 D2 D3hot D3cold pci 0000:01:00.0: 63.008 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x8 link at 0000:00:01.0 (capable of 126.016 Gb/s with 8.0 GT/s PCIe x16 link) pci 0000:00:01.0: PCI bridge to [bus 01] pci 0000:00:01.0: bridge window [io 0xe000-0xefff] pci 0000:00:01.0: bridge window [mem 0xdc500000-0xdc5fffff] pci 0000:00:01.0: bridge window [mem 0xb0000000-0xc01fffff 64bit pref] acpiphp: Slot [1] registered pci 0000:00:1c.0: PCI bridge to [bus 02-3a] pci 0000:00:1c.0: bridge window [mem 0xc4000000-0xda0fffff] pci 0000:00:1c.0: bridge window [mem 0x80000000-0xa1ffffff 64bit pref] pci 0000:3b:00.0: [1969:e0a1] type 00 class 0x020000 pci 0000:3b:00.0: reg 0x10: [mem 0xdc400000-0xdc43ffff 64bit] pci 0000:3b:00.0: reg 0x18: [io 0xd000-0xd07f] pci 0000:3b:00.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:1c.4: PCI bridge to [bus 3b] pci 0000:00:1c.4: bridge window [io 0xd000-0xdfff] pci 0000:00:1c.4: bridge window [mem 0xdc400000-0xdc4fffff] pci 0000:3c:00.0: [168c:003e] type 00 class 0x028000 pci 0000:3c:00.0: reg 0x10: [mem 0xdc000000-0xdc1fffff 64bit] pci 0000:3c:00.0: PME# supported from D0 D3hot D3cold pci 0000:00:1c.5: PCI bridge to [bus 3c] pci 0000:00:1c.5: bridge window [mem 0xdc000000-0xdc1fffff] pci 0000:3d:00.0: [10ec:5227] type 00 class 0xff0000 pci 0000:3d:00.0: reg 0x10: [mem 0xdc300000-0xdc300fff] pci 0000:3d:00.0: supports D1 D2 pci 0000:3d:00.0: PME# supported from D1 D2 D3hot D3cold pci 0000:00:1c.6: PCI bridge to [bus 3d] pci 0000:00:1c.6: bridge window [mem 0xdc300000-0xdc3fffff] pci 0000:3e:00.0: [144d:a802] type 00 class 0x010802 pci 0000:3e:00.0: reg 0x10: [mem 0xdc200000-0xdc203fff 64bit] pci 0000:3e:00.0: reg 0x18: [io 0xc000-0xc0ff] pci 0000:00:1d.0: PCI bridge to [bus 3e] pci 0000:00:1d.0: bridge window [io 0xc000-0xcfff] pci 0000:00:1d.0: bridge window [mem 0xdc200000-0xdc2fffff] pci_bus 0000:00: on NUMA node 0 pci 0000:00:01.0: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:01:00.0: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 256 pci 0000:00:1c.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 128 pci 0000:00:1c.4: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:3b:00.0: Max Payload Size set to 256/4096 (was 256), Max Read Rq 256 pci 0000:00:1c.5: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:3c:00.0: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 256 pci 0000:00:1c.6: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 128 pci 0000:3d:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128 pci 0000:00:1d.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 128 pci 0000:3e:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128 ACPI: PCI: Interrupt link LNKA configured for IRQ 11 ACPI: PCI: Interrupt link LNKB configured for IRQ 10 ACPI: PCI: Interrupt link LNKC configured for IRQ 11 ACPI: PCI: Interrupt link LNKD configured for IRQ 11 ACPI: PCI: Interrupt link LNKE configured for IRQ 11 ACPI: PCI: Interrupt link LNKF configured for IRQ 11 ACPI: PCI: Interrupt link LNKG configured for IRQ 11 ACPI: PCI: Interrupt link LNKH configured for IRQ 11 ACPI: EC: interrupt unblocked ACPI: EC: event unblocked ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62 ACPI: EC: GPE=0x14 ACPI: \_SB_.PCI0.LPCB.EC0_: Boot DSDT EC initialization complete ACPI: \_SB_.PCI0.LPCB.EC0_: EC: Used to handle transactions and events iommu: Default domain type: Passthrough pci 0000:00:02.0: vgaarb: setting as boot VGA device pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none pci 0000:00:02.0: vgaarb: bridge control possible vgaarb: loaded SCSI subsystem initialized libata version 3.00 loaded. ACPI: bus type USB registered usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb videodev: Linux video capture interface: v2.00 Registered efivars operations Advanced Linux Sound Architecture Driver Initialized. Bluetooth: Core ver 2.22 NET: Registered PF_BLUETOOTH protocol family Bluetooth: HCI device and connection manager initialized Bluetooth: HCI socket layer initialized Bluetooth: L2CAP socket layer initialized Bluetooth: SCO socket layer initialized PCI: Using ACPI for IRQ routing PCI: pci_cache_line_size set to 64 bytes e820: reserve RAM buffer [mem 0x00058000-0x0005ffff] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff] e820: reserve RAM buffer [mem 0x3109c018-0x33ffffff] e820: reserve RAM buffer [mem 0x310ad018-0x33ffffff] e820: reserve RAM buffer [mem 0x312bb000-0x33ffffff] e820: reserve RAM buffer [mem 0x312e6000-0x33ffffff] e820: reserve RAM buffer [mem 0x3138c000-0x33ffffff] e820: reserve RAM buffer [mem 0x345ec000-0x37ffffff] e820: reserve RAM buffer [mem 0x362a1000-0x37ffffff] e820: reserve RAM buffer [mem 0x8c2000000-0x8c3ffffff] wmi_bus wmi_bus-PNP0C14:01: WQBC data block query control method not found dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.4) hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0 hpet0: 8 comparators, 64-bit 24.000000 MHz counter clocksource: Switched to clocksource tsc-early FS-Cache: Loaded CacheFiles: Loaded pnp: PnP ACPI init system 00:02: [io 0x0680-0x069f] has been reserved system 00:02: [io 0xffff] has been reserved system 00:02: [io 0xffff] has been reserved system 00:02: [io 0xffff] has been reserved system 00:02: [io 0x1800-0x18fe] has been reserved system 00:02: [io 0x164e-0x164f] has been reserved system 00:03: [io 0x0800-0x087f] has been reserved system 00:05: [io 0x1854-0x1857] has been reserved system 00:06: [mem 0xfed10000-0xfed17fff] has been reserved system 00:06: [mem 0xfed18000-0xfed18fff] has been reserved system 00:06: [mem 0xfed19000-0xfed19fff] has been reserved system 00:06: [mem 0xe0000000-0xefffffff] has been reserved system 00:06: [mem 0xfed20000-0xfed3ffff] has been reserved system 00:06: [mem 0xfed90000-0xfed93fff] could not be reserved system 00:06: [mem 0xfed45000-0xfed8ffff] has been reserved system 00:06: [mem 0xff000000-0xffffffff] has been reserved system 00:06: [mem 0xfee00000-0xfeefffff] could not be reserved system 00:06: [mem 0xdffe0000-0xdfffffff] has been reserved system 00:07: [mem 0xfd000000-0xfdabffff] has been reserved system 00:07: [mem 0xfdad0000-0xfdadffff] has been reserved system 00:07: [mem 0xfdb00000-0xfdffffff] has been reserved system 00:07: [mem 0xfe000000-0xfe01ffff] could not be reserved system 00:07: [mem 0xfe036000-0xfe03bfff] has been reserved system 00:07: [mem 0xfe03d000-0xfe3fffff] has been reserved system 00:07: [mem 0xfe410000-0xfe7fffff] has been reserved system 00:08: [mem 0xfdaf0000-0xfdafffff] has been reserved system 00:08: [mem 0xfdae0000-0xfdaeffff] has been reserved system 00:08: [mem 0xfdac0000-0xfdacffff] has been reserved pnp: PnP ACPI: found 9 devices clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns NET: Registered PF_INET protocol family IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear) tcp_listen_portaddr_hash hash table entries: 16384 (order: 6, 262144 bytes, linear) TCP established hash table entries: 262144 (order: 9, 2097152 bytes, linear) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear) TCP: Hash tables configured (established 262144 bind 65536) UDP hash table entries: 16384 (order: 7, 524288 bytes, linear) UDP-Lite hash table entries: 16384 (order: 7, 524288 bytes, linear) NET: Registered PF_UNIX/PF_LOCAL protocol family pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02-3a] add_size 1000 pci 0000:00:1c.0: BAR 13: assigned [io 0x2000-0x2fff] pci 0000:00:01.0: PCI bridge to [bus 01] pci 0000:00:01.0: bridge window [io 0xe000-0xefff] pci 0000:00:01.0: bridge window [mem 0xdc500000-0xdc5fffff] pci 0000:00:01.0: bridge window [mem 0xb0000000-0xc01fffff 64bit pref] pci 0000:00:1c.0: PCI bridge to [bus 02-3a] pci 0000:00:1c.0: bridge window [io 0x2000-0x2fff] pci 0000:00:1c.0: bridge window [mem 0xc4000000-0xda0fffff] pci 0000:00:1c.0: bridge window [mem 0x80000000-0xa1ffffff 64bit pref] pci 0000:00:1c.4: PCI bridge to [bus 3b] pci 0000:00:1c.4: bridge window [io 0xd000-0xdfff] pci 0000:00:1c.4: bridge window [mem 0xdc400000-0xdc4fffff] pci 0000:00:1c.5: PCI bridge to [bus 3c] pci 0000:00:1c.5: bridge window [mem 0xdc000000-0xdc1fffff] pci 0000:00:1c.6: PCI bridge to [bus 3d] pci 0000:00:1c.6: bridge window [mem 0xdc300000-0xdc3fffff] pci 0000:00:1d.0: PCI bridge to [bus 3e] pci 0000:00:1d.0: bridge window [io 0xc000-0xcfff] pci 0000:00:1d.0: bridge window [mem 0xdc200000-0xdc2fffff] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7 window] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff window] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff window] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff window] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff window] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff window] pci_bus 0000:00: resource 19 [mem 0x3d000000-0xdfffffff window] pci_bus 0000:00: resource 20 [mem 0xfd000000-0xfe7fffff window] pci_bus 0000:01: resource 0 [io 0xe000-0xefff] pci_bus 0000:01: resource 1 [mem 0xdc500000-0xdc5fffff] pci_bus 0000:01: resource 2 [mem 0xb0000000-0xc01fffff 64bit pref] pci_bus 0000:02: resource 0 [io 0x2000-0x2fff] pci_bus 0000:02: resource 1 [mem 0xc4000000-0xda0fffff] pci_bus 0000:02: resource 2 [mem 0x80000000-0xa1ffffff 64bit pref] pci_bus 0000:3b: resource 0 [io 0xd000-0xdfff] pci_bus 0000:3b: resource 1 [mem 0xdc400000-0xdc4fffff] pci_bus 0000:3c: resource 1 [mem 0xdc000000-0xdc1fffff] pci_bus 0000:3d: resource 1 [mem 0xdc300000-0xdc3fffff] pci_bus 0000:3e: resource 0 [io 0xc000-0xcfff] pci_bus 0000:3e: resource 1 [mem 0xdc200000-0xdc2fffff] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff] PCI: CLS 0 bytes, default 64 DMAR: No ATSR found DMAR: No SATC found DMAR: IOMMU feature fl1gp_support inconsistent DMAR: IOMMU feature pgsel_inv inconsistent DMAR: IOMMU feature nwfs inconsistent DMAR: IOMMU feature eafs inconsistent DMAR: IOMMU feature prs inconsistent DMAR: IOMMU feature nest inconsistent DMAR: IOMMU feature mts inconsistent DMAR: IOMMU feature sc_support inconsistent DMAR: IOMMU feature pass_through inconsistent DMAR: IOMMU feature dev_iotlb_support inconsistent DMAR: dmar0: Using Queued invalidation DMAR: dmar1: Using Queued invalidation pci 0000:00:00.0: Adding to iommu group 0 pci 0000:00:01.0: Adding to iommu group 1 pci 0000:00:02.0: Adding to iommu group 2 pci 0000:00:04.0: Adding to iommu group 3 pci 0000:00:14.0: Adding to iommu group 4 pci 0000:00:14.2: Adding to iommu group 4 pci 0000:00:16.0: Adding to iommu group 5 pci 0000:00:17.0: Adding to iommu group 6 pci 0000:00:1c.0: Adding to iommu group 7 pci 0000:00:1c.4: Adding to iommu group 8 pci 0000:00:1c.5: Adding to iommu group 9 pci 0000:00:1c.6: Adding to iommu group 10 pci 0000:00:1d.0: Adding to iommu group 11 pci 0000:00:1f.0: Adding to iommu group 12 pci 0000:00:1f.2: Adding to iommu group 12 pci 0000:00:1f.3: Adding to iommu group 12 pci 0000:00:1f.4: Adding to iommu group 12 pci 0000:01:00.0: Adding to iommu group 1 pci 0000:3b:00.0: Adding to iommu group 13 pci 0000:3c:00.0: Adding to iommu group 14 pci 0000:3d:00.0: Adding to iommu group 15 pci 0000:3e:00.0: Adding to iommu group 16 DMAR: Intel(R) Virtualization Technology for Directed I/O PCI-DMA: Using software bounce buffering for IO (SWIOTLB) software IO TLB: mapped [mem 0x000000002d09c000-0x000000003109c000] (64MB) RAPL PMU: API unit is 2^-32 Joules, 5 fixed counters, 655360 ms ovfl timer RAPL PMU: hw unit of domain pp0-core 2^-14 Joules RAPL PMU: hw unit of domain package 2^-14 Joules RAPL PMU: hw unit of domain dram 2^-14 Joules RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules RAPL PMU: hw unit of domain psys 2^-14 Joules DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr 0x3a800000 [fault reason 0x06] PTE Read access is not set DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr 0x3a818000 [fault reason 0x06] PTE Read access is not set DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr 0x3a852000 [fault reason 0x06] PTE Read access is not set DMAR: DRHD: handling fault status reg 3 Initialise system trusted keyrings workingset: timestamp_bits=46 max_order=23 bucket_order=0 zbud: loaded FS-Cache: Netfs 'cifs' registered for caching Key type cifs.idmap registered fuse: init (API version 7.34) NET: Registered PF_ALG protocol family Key type asymmetric registered Asymmetric key parser 'x509' registered Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) ACPI: AC: AC Adapter [ACAD] (on-line) input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:40/PNP0C0D:00/input/input0 ACPI: button: Lid Switch [LID0] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 ACPI: button: Power Button [PWRB] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 ACPI: button: Power Button [PWRF] Non-volatile memory driver v1.3 Linux agpgart interface v0.103 [drm] amdgpu kernel modesetting enabled. vga_switcheroo: detected switching method \_SB_.PCI0.GFX0.ATPX handle ATPX version 1, functions 0x00000033 ATPX Hybrid Graphics amdgpu: CRAT table disabled by module option amdgpu: Virtual CRAT table created for CPU amdgpu: Topology: Add CPU node amdgpu 0000:01:00.0: enabling device (0000 -> 0003) [drm] initializing kernel modesetting (TONGA 0x1002:0x6921 0x1028:0x0708 0x00). amdgpu 0000:01:00.0: amdgpu: Trusted Memory Zone (TMZ) feature not supported [drm] register mmio base: 0xDC500000 [drm] register mmio size: 262144 [drm] add ip block number 0 <vi_common> [drm] add ip block number 1 <gmc_v8_0> [drm] add ip block number 2 <tonga_ih> [drm] add ip block number 3 <gfx_v8_0> [drm] add ip block number 4 <sdma_v3_0> [drm] add ip block number 5 <powerplay> [drm] add ip block number 6 <dm> [drm] add ip block number 7 <uvd_v5_0> [drm] add ip block number 8 <vce_v3_0> ACPI: battery: Slot [BAT1] (battery present) amdgpu 0000:01:00.0: amdgpu: Fetched VBIOS from ATRM amdgpu: ATOM BIOS: BR46576.001 [drm] VCE enabled in physical mode [drm] GPU posting now... [drm] vm size is 128 GB, 2 levels, block size is 10-bit, fragment size is 9-bit amdgpu 0000:01:00.0: amdgpu: VRAM: 4096M 0x000000F400000000 - 0x000000F4FFFFFFFF (4096M used) amdgpu 0000:01:00.0: amdgpu: GART: 1024M 0x000000FF00000000 - 0x000000FF3FFFFFFF [drm] Detected VRAM RAM=4096M, BAR=256M [drm] RAM width 256bits GDDR5 [drm] amdgpu: 4096M of VRAM memory ready [drm] amdgpu: 4096M of GTT memory ready. [drm] GART: num cpu pages 262144, num gpu pages 262144 [drm] PCIE GART of 1024M enabled (table at 0x000000F400000000). [drm] Chained IB support enabled! amdgpu: hwmgr_sw_init smu backed is tonga_smu [drm] Found UVD firmware Version: 1.68 Family ID: 10 [drm] Found VCE firmware Version: 52.8 Binary ID: 3 [drm] Display Core initialized with v3.2.149! [drm] UVD initialized successfully. [drm] VCE initialized successfully. kfd kfd: amdgpu: Allocated 3969056 bytes on gart amdgpu: SW scheduler is used amdgpu: Virtual CRAT table created for GPU amdgpu: Topology: Add dGPU node [0x6921:0x1002] kfd kfd: amdgpu: added device 1002:6921 amdgpu 0000:01:00.0: amdgpu: SE 4, SH per SE 1, CU per SH 8, active_cu_number 32 amdgpu 0000:01:00.0: amdgpu: Using BOCO for runtime pm [drm] Initialized amdgpu 3.42.0 20150101 for 0000:01:00.0 on minor 0 i915 0000:00:02.0: [drm] Incompatible option enable_guc=3 - GuC submission is N/A i915 0000:00:02.0: [drm] VT-d active for gfx access i915 0000:00:02.0: vgaarb: deactivate vga console i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem i915 0000:00:02.0: [drm] Finished loading DMC firmware i915/skl_dmc_ver1_27.bin (v1.27) i915 0000:00:02.0: [drm] Disabling framebuffer compression (FBC) to prevent screen flicker with VT-d enabled i915 0000:00:02.0: [drm] [ENCODER:102:DDI B/PHY B] is disabled/in DSI mode with an ungated DDI clock, gate it i915 0000:00:02.0: [drm] [ENCODER:117:DDI C/PHY C] is disabled/in DSI mode with an ungated DDI clock, gate it i915 0000:00:02.0: [drm] [ENCODER:127:DDI D/PHY D] is disabled/in DSI mode with an ungated DDI clock, gate it i915 0000:00:02.0: Direct firmware load for i915/skl_guc_49.0.1.bin failed with error -2 i915 0000:00:02.0: [drm] GuC firmware i915/skl_guc_49.0.1.bin: fetch failed with error -2 i915 0000:00:02.0: [drm] GuC firmware(s) can be downloaded from https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/i915 i915 0000:00:02.0: [drm] GuC is uninitialized [drm] Initialized i915 1.6.0 20201103 for 0000:00:02.0 on minor 1 ACPI: video: Video Device [GFX0] (multi-head: yes rom: no post: no) input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input3 loop: module loaded mei_me 0000:00:16.0: enabling device (0000 -> 0002) rtsx_pci 0000:3d:00.0: enabling device (0000 -> 0002) nvme nvme0: pci function 0000:3e:00.0 ahci 0000:00:17.0: version 3.0 ahci 0000:00:17.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x2 impl SATA mode ahci 0000:00:17.0: flags: 64bit ncq sntf pm led clo only pio slum part ems deso sadm sds apst scsi host0: ahci scsi host1: ahci ata1: DUMMY ata2: SATA max UDMA/133 abar m2048@0xdc633000 port 0xdc633180 irq 133 alx 0000:3b:00.0 eth0: Qualcomm Atheros AR816x/AR817x Ethernet [f8:ca:b8:03:29:43] ath10k_pci 0000:3c:00.0: enabling device (0000 -> 0002) ath10k_pci 0000:3c:00.0: pci irq msi oper_irq_mode 2 irq_mode 0 reset_mode 0 fbcon: i915 (fb0) is primary device Console: switching to colour frame buffer device 240x67 nvme nvme0: 8/0/0 default/read/poll queues nvme0n1: p1 p2 p3 i915 0000:00:02.0: [drm] fb0: i915 frame buffer device xhci_hcd 0000:00:14.0: xHCI Host Controller xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1 xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x0000000001109810 usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.14 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: xHCI Host Controller usb usb1: Manufacturer: Linux 5.14.0-rc3-agd5f+ xhci-hcd usb usb1: SerialNumber: 0000:00:14.0 hub 1-0:1.0: USB hub found hub 1-0:1.0: 16 ports detected xhci_hcd 0000:00:14.0: xHCI Host Controller xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2 xhci_hcd 0000:00:14.0: Host supports USB 3.0 SuperSpeed usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.14 usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb2: Product: xHCI Host Controller usb usb2: Manufacturer: Linux 5.14.0-rc3-agd5f+ xhci-hcd usb usb2: SerialNumber: 0000:00:14.0 hub 2-0:1.0: USB hub found hub 2-0:1.0: 8 ports detected usb: port power management may be unreliable usbcore: registered new interface driver cdc_acm cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters usbcore: registered new interface driver uas usbcore: registered new interface driver usb-storage i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mousedev: PS/2 mouse device common for all mice rtc_cmos 00:04: RTC can wake from S4 rtc_cmos 00:04: registered as rtc0 rtc_cmos 00:04: setting system clock to 2021-08-18T01:47:48 UTC (1629251268) rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs i2c /dev entries driver i801_smbus 0000:00:1f.4: SPD Write Disable is set i801_smbus 0000:00:1f.4: SMBus using PCI interrupt i2c i2c-6: 2/2 memory slots populated (from DMI) ee1004 6-0050: 512 byte EE1004-compliant SPD EEPROM, read-only i2c i2c-6: Successfully instantiated SPD at 0x50 usbcore: registered new interface driver uvcvideo dell_smm_hwmon: not running on a supported Dell system. input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input4 dell_smm_hwmon: vendor=Alienware, model=Alienware 15 R2, version=1.13.1 usbcore: registered new interface driver btusb intel_pstate: Intel P-state driver initializing intel_pstate: HWP enabled [drm] Initialized simpledrm 1.0.0 20200625 for simple-framebuffer.0 on minor 2 simple-framebuffer simple-framebuffer.0: [drm] fb1: simpledrm frame buffer device EFI Variables Facility v0.08 2004-May-17 pstore: Registered efi as persistent store backend usbcore: registered new interface driver usbhid usbhid: USB HID core driver ath10k_pci 0000:3c:00.0: qca6174 hw3.2 target 0x05030000 chip_id 0x00340aff sub 1a56:1535 alienware_wmi: alienware-wmi: No known WMI GUID found ath10k_pci 0000:3c:00.0: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 dell_wmi_aio: No known WMI GUID found ath10k_pci 0000:3c:00.0: firmware ver WLAN.RM.4.4.1-00157-QCARMSWPZ-1 api 6 features wowlan,ignore-otp,mfp crc32 90eebefb snd_hda_intel 0000:00:1f.3: enabling device (0000 -> 0002) snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops) xt_time: kernel timezone is -0000 ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully Initializing XFRM netlink socket NET: Registered PF_INET6 protocol family Segment Routing with IPv6 sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver NET: Registered PF_PACKET protocol family snd_hda_codec_ca0132 hdaudioC0D0: autoconfig for CA0132: line_outs=1 (0xb/0x0/0x0/0x0/0x0) type:speaker NET: Registered PF_KEY protocol family snd_hda_codec_ca0132 hdaudioC0D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) snd_hda_codec_ca0132 hdaudioC0D0: hp_outs=1 (0xf/0x0/0x0/0x0/0x0) snd_hda_codec_ca0132 hdaudioC0D0: mono: mono_out=0x0 snd_hda_codec_ca0132 hdaudioC0D0: inputs: snd_hda_codec_ca0132 hdaudioC0D0: Mic=0x11 snd_hda_codec_ca0132 hdaudioC0D0: Internal Mic=0x12 ath10k_pci 0000:3c:00.0: board_file api 2 bmi_id N/A crc32 318825bf Bluetooth: RFCOMM TTY layer initialized ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Bluetooth: RFCOMM socket layer initialized ata2.00: ATA-9: M4-CT512M4SSD2, 070H, max UDMA/100 Bluetooth: RFCOMM ver 1.11 ata2.00: 1000215216 sectors, multi 16: LBA48 NCQ (depth 32), AA ata2.00: configured for UDMA/100 Bluetooth: BNEP (Ethernet Emulation) ver 1.3 Bluetooth: BNEP filters: protocol multicast scsi 1:0:0:0: Direct-Access ATA M4-CT512M4SSD2 070H PQ: 0 ANSI: 5 Bluetooth: BNEP socket layer initialized sd 1:0:0:0: [sda] 1000215216 512-byte logical blocks: (512 GB/477 GiB) Bluetooth: HIDP (Human Interface Emulation) ver 1.2 Bluetooth: HIDP socket layer initialized sd 1:0:0:0: [sda] Write Protect is off usb 1-4: new full-speed USB device number 2 using xhci_hcd Key type dns_resolver registered sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00 microcode: sig=0x506e3, pf=0x20, revision=0xea sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA microcode: Microcode Update Driver: v2.2. IPI shorthand broadcast: enabled sda: sda1 sda2 sda3 sda4 sda5 AVX2 version of gcm_enc/dec engaged. ath10k_pci 0000:3c:00.0: htt-ver 3.60 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1 sd 1:0:0:0: [sda] Attached SCSI disk AES CTR mode by8 optimization enabled sched_clock: Marking stable (1160678423, 3697821)->(1168177289, -3801045) registered taskstats version 1 Loading compiled-in X.509 certificates Key type ._fscrypt registered Key type .fscrypt registered Key type fscrypt-provisioning registered dell-smbios A80593CE-A997-11DA-B012-B622A1EF5492: WMI SMBIOS userspace interface not supported(0), try upgrading to a newer BIOS input: Dell WMI hotkeys as /devices/platform/PNP0C14:01/wmi_bus/wmi_bus-PNP0C14:01/9DBB5994-A997-11DA-B012-B622A1EF5492/input/input7 cfg80211: Loading compiled-in X.509 certificates for regulatory database cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' ALSA device list: No soundcards found. ath: EEPROM regdomain: 0x6c ath: EEPROM indicates we should expect a direct regpair map ath: Country alpha2 being used: 00 ath: Regpair used: 0x6c usb 1-4: config 1 interface 0 altsetting 0 has 2 endpoint descriptors, different from the interface descriptor's value: 1 usb 1-4: New USB device found, idVendor=187c, idProduct=0528, bcdDevice= 0.00 usb 1-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3 usb 1-4: Product: AW1517 usb 1-4: Manufacturer: Alienware usb 1-4: SerialNumber: 16.0 hid-generic 0003:187C:0528.0001: device has no listeners, quitting psmouse serio1: synaptics: queried max coordinates: x [..5668], y [..4756] tsc: Refined TSC clocksource calibration: 2711.973 MHz clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x27176cd0728, max_idle_ns: 440795290119 ns clocksource: Switched to clocksource tsc usb 1-5: new full-speed USB device number 3 using xhci_hcd psmouse serio1: synaptics: queried min coordinates: x [1274..], y [1098..] psmouse serio1: synaptics: Trying to set up SMBus access rmi4_smbus 6-002c: registering SMbus-connected sensor rmi4_f01 rmi4-00.fn01: found RMI device, manufacturer: Synaptics, product: TM2417-001, fw id: 0 input: Synaptics TM2417-001 as /devices/rmi4-00/input/input8 usb 1-5: New USB device found, idVendor=0cf3, idProduct=e300, bcdDevice= 0.01 usb 1-5: New USB device strings: Mfr=0, Product=0, SerialNumber=0 Bluetooth: hci0: using rampatch file: qca/rampatch_usb_00000302.bin Bluetooth: hci0: QCA: patch rome 0x302 build 0x3e8, firmware rome 0x302 build 0x111 snd_hda_codec_ca0132 hdaudioC0D0: ca0132 DSP downloaded and running EXT4-fs (nvme0n1p2): INFO: recovery required on readonly filesystem input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input9 EXT4-fs (nvme0n1p2): write access will be enabled during recovery input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input10 input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input11 input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input12 input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input13 input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input14 input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input15 usb 1-7: new high-speed USB device number 4 using xhci_hcd EXT4-fs (nvme0n1p2): recovery complete EXT4-fs (nvme0n1p2): mounted filesystem with ordered data mode. Opts: (null). Quota mode: disabled. VFS: Mounted root (ext4 filesystem) readonly on device 259:2. devtmpfs: mounted Freeing unused kernel image (initmem) memory: 1112K Write protecting the kernel read-only data: 36864k Freeing unused kernel image (text/rodata gap) memory: 2032K Freeing unused kernel image (rodata/data gap) memory: 1740K Run /usr/lib/systemd/systemd as init process with arguments: /usr/lib/systemd/systemd nospec_store_bypass_disable with environment: HOME=/ TERM=linux pti=off spectre_v2=off usb 1-7: New USB device found, idVendor=1bcf, idProduct=2b8c, bcdDevice=47.14 usb 1-7: New USB device strings: Mfr=1, Product=2, SerialNumber=0 usb 1-7: Product: Integrated_Webcam_HD usb 1-7: Manufacturer: SunplusIT Inc usb 1-7: Found UVC 1.00 device Integrated_Webcam_HD (1bcf:2b8c) input: Integrated_Webcam_HD: Integrate as /devices/pci0000:00/0000:00:14.0/usb1/1-7/1-7:1.0/input/input16 systemd 249 running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA +SMACK +SECCOMP -GCRYPT +GNUTLS +OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 +IDN2 -IDN +IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY -P11KIT -QRENCODE -BZIP2 +LZ4 +XZ -ZLIB +ZSTD +XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified) Detected architecture x86-64. Bluetooth: hci0: using NVM file: qca/nvm_usb_00000302.bin /lib/systemd/system/gpm.service:7: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether. Queued start job for default target Graphical Interface. Created slice Slice /system/getty. Created slice Slice /system/modprobe. Created slice Slice /system/systemd-fsck. Created slice User and Session Slice. Started Dispatch Password Requests to Console Directory Watch. Started Forward Password Requests to Wall Directory Watch. Set up automount Arbitrary Executable File Formats File System Automount Point. Reached target Remote File Systems. Reached target Slice Units. Reached target Swaps. Listening on Process Core Dump Socket. Listening on initctl Compatibility Named Pipe. Condition check resulted in Journal Audit Socket being skipped. Listening on Journal Socket (/dev/log). Listening on Journal Socket. Listening on Network Service Netlink Socket. Listening on udev Control Socket. Listening on udev Kernel Socket. Mounting Huge Pages File System... Mounting POSIX Message Queue File System... Mounting Kernel Debug File System... Mounting Kernel Trace File System... tmp.mount: Directory /tmp to mount over is not empty, mounting anyway. Mounting Temporary Directory /tmp... Condition check resulted in Create List of Static Device Nodes being skipped. Starting Load Kernel Module configfs... Starting Load Kernel Module drm... Starting Load Kernel Module fuse... Condition check resulted in Set Up Additional Binary Formats being skipped. Starting File System Check on Root Device... Starting Journal Service... Condition check resulted in Load Kernel Modules being skipped. Starting Apply Kernel Variables... Starting Coldplug All udev Devices... Started Journal Service. EXT4-fs (nvme0n1p2): re-mounted. Opts: (null). Quota mode: disabled. EXT4-fs (nvme0n1p3): mounted filesystem with ordered data mode. Opts: (null). Quota mode: disabled. [drm] PCIE GART of 1024M enabled (table at 0x000000F400000000). BUG: kernel NULL pointer dereference, address: 0000000000000020 #PF: supervisor write access in kernel mode #PF: error_code(0x0002) - not-present page PGD 0 P4D 0 Oops: 0002 [#1] SMP NOPTI CPU: 1 PID: 472 Comm: X Tainted: G U I 5.14.0-rc3-agd5f+ #1279 Hardware name: Alienware Alienware 15 R2/0H6J09, BIOS 1.13.1 06/10/2021 RIP: 0010:mutex_lock+0x14/0x30 Code: c3 0f 1f 44 00 00 ba 02 01 00 00 e9 c6 fc ff ff cc cc cc cc cc cc 53 48 89 fb e8 e7 f3 ff ff 65 48 8b 0c 25 80 7c 01 00 31 c0 <f0> 48 0f b1 0b 74 06 48 89 df 5b eb 0f 5b c3 66 2e 0f 1f 84 00 00 RSP: 0018:ffff8881123c7410 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffff8881130eab80 RDX: ffffffff837a3b20 RSI: ffffffff82f21500 RDI: 0000000000000020 RBP: ffff8881123c7810 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000001 R12: ffff88811b5e0000 R13: 0000000000000020 R14: ffff8881123c7440 R15: ffff888110ef3400 FS: 00007ff8f25a5e40(0000) GS:ffff8888a1c40000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000020 CR3: 000000010febe003 CR4: 00000000001706a0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Call Trace: ? flush_workqueue+0x8e/0x560 ? amdgpu_dm_atomic_commit_tail+0x481/0x2630 ? atom_put_dst+0x251/0x460 ? kfree+0x179/0x2d0 ? amdgpu_atom_execute_table_locked+0x299/0x350 ? kfree+0x179/0x2d0 ? atom_op_and+0xc7/0x1a0 ? __cond_resched+0x11/0x40 ? __ww_mutex_lock+0x41/0x840 ? kmem_cache_alloc_trace+0x152/0x260 ? dm_plane_helper_prepare_fb+0x1ba/0x240 ? commit_tail+0x8f/0x170 ? drm_atomic_helper_commit+0x1f2/0x210 ? drm_atomic_helper_commit_duplicated_state+0xf5/0x100 ? drm_atomic_helper_resume+0xbc/0x150 ? dm_resume.llvm.5009353506756501165+0x5b9/0x630 ? amdgpu_device_resume+0x1a4/0x3f0 ? amdgpu_pmops_runtime_resume+0xa2/0xd0 ? pci_pm_runtime_resume+0xa2/0xe0 ? pci_pm_runtime_suspend+0x180/0x180 ? __rpm_callback+0x95/0x320 ? ep_poll_callback+0x88/0x210 ? __mod_memcg_lruvec_state+0x35/0xe0 ? pci_pm_runtime_suspend+0x180/0x180 ? rpm_resume+0x4a7/0x780 ? __flush_work.llvm.17749977397669205720+0x7d/0x280 ? __pm_runtime_resume+0x53/0x70 ? amdgpu_driver_open_kms+0x57/0x210 ? drm_file_alloc+0x19a/0x260 ? drm_open+0xd8/0x210 ? drm_stub_open+0xa2/0x120 ? chrdev_open.llvm.10459766552443321194+0xe2/0x1e0 ? cd_forget+0x60/0x60 ? do_dentry_open+0x135/0x340 ? path_openat+0x8df/0xbb0 ? kmem_cache_free+0x151/0x230 ? do_filp_open+0xa8/0x130 ? do_sys_openat2+0x80/0x170 ? __x64_sys_openat+0x6a/0x70 ? do_syscall_64+0x70/0xa0 ? entry_SYSCALL_64_after_hwframe+0x44/0xae Modules linked in: CR2: 0000000000000020 ---[ end trace 6afaf9921664f04e ]--- RIP: 0010:mutex_lock+0x14/0x30 Code: c3 0f 1f 44 00 00 ba 02 01 00 00 e9 c6 fc ff ff cc cc cc cc cc cc 53 48 89 fb e8 e7 f3 ff ff 65 48 8b 0c 25 80 7c 01 00 31 c0 <f0> 48 0f b1 0b 74 06 48 89 df 5b eb 0f 5b c3 66 2e 0f 1f 84 00 00 RSP: 0018:ffff8881123c7410 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffff8881130eab80 RDX: ffffffff837a3b20 RSI: ffffffff82f21500 RDI: 0000000000000020 RBP: ffff8881123c7810 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000001 R12: ffff88811b5e0000 R13: 0000000000000020 R14: ffff8881123c7440 R15: ffff888110ef3400 FS: 00007ff8f25a5e40(0000) GS:ffff8888a1c40000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000020 CR3: 000000010febe003 CR4: 00000000001706a0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Syncing filesystems and block devices. Sending SIGTERM to remaining processes... On Wed, 18 Aug 2021 at 03:08, Mike Lothian <mike@fireburn.co.uk> wrote: > Hi > > I've just noticed something similar when starting weston, I still see it > with this patch, but not on linus's tree > > I'll confirm for sure tomorrow and send the stack trace if I can save it > > Cheers > > Mike > > On Tue, 3 Aug 2021 at 02:56, Chen, Guchun <Guchun.Chen@amd.com> wrote: > >> [Public] >> >> Hi Alex, >> >> I submitted the patch before your message, I will take care of this next >> time. >> >> Regards, >> Guchun >> >> -----Original Message----- >> From: Alex Deucher <alexdeucher@gmail.com> >> Sent: Monday, August 2, 2021 9:35 PM >> To: Chen, Guchun <Guchun.Chen@amd.com> >> Cc: Christian König <ckoenig.leichtzumerken@gmail.com>; >> amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, >> Christian <Christian.Koenig@amd.com>; Zhang, Hawking < >> Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> >> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini >> in s3 test (v2) >> >> On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com> wrote: >> > >> > [Public] >> > >> > Thank you, Christian. >> > >> > Regarding fence_drv.initialized, it looks to a bit redundant, anyway >> let me look into this more. >> >> Does this patch fix this bug? >> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 >> >> If so, please add: >> Bug: >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 >> to the commit message. >> >> Alex >> >> > >> > Regards, >> > Guchun >> > >> > -----Original Message----- >> > From: Christian König <ckoenig.leichtzumerken@gmail.com> >> > Sent: Monday, August 2, 2021 2:56 PM >> > To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; >> > Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian >> > <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; >> > Deucher, Alexander <Alexander.Deucher@amd.com> >> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver >> > fini in s3 test (v2) >> > >> > Am 02.08.21 um 07:16 schrieb Guchun Chen: >> > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to >> > > stop scheduler in s3 test, otherwise, fence related failure will >> > > arrive after resume. To fix this and for a better clean up, move >> > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of >> > > driver shutdown, and should never be called in hw_fini. >> > > >> > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, >> > > to keep sw_init and sw_fini paired. >> > > >> > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence >> > > Suggested-by: Christian König <christian.koenig@amd.com> >> > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> >> > >> > It's a bit ambiguous now what fence_drv.initialized means, but I think >> we can live with that for now. >> > >> > Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. >> > >> > Regards, >> > Christian. >> > >> > > --- >> > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- >> > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- >> > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >> > > 3 files changed, 11 insertions(+), 10 deletions(-) >> > > >> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > > index b1d2dc39e8be..9e53ff851496 100644 >> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device >> > > *adev, >> > > >> > > fence_driver_init: >> > > /* Fence driver */ >> > > - r = amdgpu_fence_driver_init(adev); >> > > + r = amdgpu_fence_driver_sw_init(adev); >> > > if (r) { >> > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); >> > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init >> > > + failed\n"); >> > > amdgpu_vf_error_put(adev, >> AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); >> > > goto failed; >> > > } >> > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device >> *dev, bool fbcon) >> > > } >> > > amdgpu_fence_driver_hw_init(adev); >> > > >> > > - >> > > r = amdgpu_device_ip_late_init(adev); >> > > if (r) >> > > return r; >> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > > index 49c5c7331c53..7495911516c2 100644 >> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct >> amdgpu_ring *ring, >> > > } >> > > >> > > /** >> > > - * amdgpu_fence_driver_init - init the fence driver >> > > + * amdgpu_fence_driver_sw_init - init the fence driver >> > > * for all possible rings. >> > > * >> > > * @adev: amdgpu device pointer >> > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct >> amdgpu_ring *ring, >> > > * amdgpu_fence_driver_start_ring(). >> > > * Returns 0 for success. >> > > */ >> > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) >> > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) >> > > { >> > > return 0; >> > > } >> > > >> > > /** >> > > - * amdgpu_fence_driver_fini - tear down the fence driver >> > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver >> > > * for all possible rings. >> > > * >> > > * @adev: amdgpu device pointer >> > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct >> > > amdgpu_device *adev) >> > > >> > > if (!ring || !ring->fence_drv.initialized) >> > > continue; >> > > - if (!ring->no_scheduler) >> > > - drm_sched_fini(&ring->sched); >> > > + >> > > /* You can't wait for HW to signal if it's gone */ >> > > if (!drm_dev_is_unplugged(&adev->ddev)) >> > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 >> > > +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) >> > > if (!ring || !ring->fence_drv.initialized) >> > > continue; >> > > >> > > + if (!ring->no_scheduler) >> > > + drm_sched_fini(&ring->sched); >> > > + >> > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) >> > > dma_fence_put(ring->fence_drv.fences[j]); >> > > kfree(ring->fence_drv.fences); diff --git >> > > a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > > index 27adffa7658d..9c11ced4312c 100644 >> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { >> > > struct dma_fence **fences; >> > > }; >> > > >> > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); >> > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring >> > > *ring); >> > > >> > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ >> > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct >> amdgpu_ring *ring, >> > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, >> > > struct amdgpu_irq_src *irq_src, >> > > unsigned irq_type); >> > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >> > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); >> > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); >> > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); >> > > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >> > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence >> **fence, >> > > unsigned flags); >> > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, >> > [-- Attachment #2: Type: text/html, Size: 76023 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-18 2:12 ` Mike Lothian @ 2021-08-18 2:23 ` Chen, Guchun 2021-08-18 8:13 ` Mike Lothian 0 siblings, 1 reply; 17+ messages in thread From: Chen, Guchun @ 2021-08-18 2:23 UTC (permalink / raw) To: Mike Lothian Cc: Alex Deucher, Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [-- Attachment #1: Type: text/plain, Size: 70911 bytes --] [Public] Hi Mike, Thanks for your info. So with Weston, the issue can be observed, while with X, no such issue? Regards, Guchun From: Mike Lothian <mike@fireburn.co.uk> Sent: Wednesday, August 18, 2021 10:12 AM To: Chen, Guchun <Guchun.Chen@amd.com> Cc: Alex Deucher <alexdeucher@gmail.com>; Christian König <ckoenig.leichtzumerken@gmail.com>; amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) Here's the dmesg Linux version 5.14.0-rc3-agd5f+ (root@axion.fireburn.co.uk<mailto:root@axion.fireburn.co.uk>) (clang version 12.0.1, LLD 12.0.1) #1279 SMP Tue Aug 17 02:23:10 BST 2021 Command line: KERNEL supported cpus: Intel GenuineIntel x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers' x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers' x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers' x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers' x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR' x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256 x86/fpu: xstate_offset[3]: 832, xstate_sizes[3]: 64 x86/fpu: xstate_offset[4]: 896, xstate_sizes[4]: 64 x86/fpu: Enabled xstate features 0x1f, context size is 960 bytes, using 'compacted' format. signal: max sigframe size: 2032 BIOS-provided physical RAM map: BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved BIOS-e820: [mem 0x0000000000100000-0x00000000312bafff] usable BIOS-e820: [mem 0x00000000312bb000-0x00000000312ccfff] reserved BIOS-e820: [mem 0x00000000312cd000-0x00000000312e5fff] usable BIOS-e820: [mem 0x00000000312e6000-0x00000000312e6fff] ACPI NVS BIOS-e820: [mem 0x00000000312e7000-0x0000000031330fff] reserved BIOS-e820: [mem 0x0000000031331000-0x000000003138bfff] usable BIOS-e820: [mem 0x000000003138c000-0x0000000031aaafff] reserved BIOS-e820: [mem 0x0000000031aab000-0x00000000362a0fff] usable BIOS-e820: [mem 0x00000000362a1000-0x00000000372bbfff] reserved BIOS-e820: [mem 0x00000000372bc000-0x00000000372fafff] ACPI data BIOS-e820: [mem 0x00000000372fb000-0x000000003789afff] ACPI NVS BIOS-e820: [mem 0x000000003789b000-0x0000000037ffefff] reserved BIOS-e820: [mem 0x0000000037fff000-0x0000000037ffffff] usable BIOS-e820: [mem 0x0000000038000000-0x00000000380fffff] reserved BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved BIOS-e820: [mem 0x00000000fe000000-0x00000000fe010fff] reserved BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved BIOS-e820: [mem 0x0000000100000000-0x00000008c1ffffff] usable NX (Execute Disable) protection: active e820: update [mem 0x310ad018-0x310bcc57] usable ==> usable e820: update [mem 0x310ad018-0x310bcc57] usable ==> usable e820: update [mem 0x3109c018-0x310ac057] usable ==> usable e820: update [mem 0x3109c018-0x310ac057] usable ==> usable extended physical RAM map: reserve setup_data: [mem 0x0000000000000000-0x0000000000057fff] usable reserve setup_data: [mem 0x0000000000058000-0x0000000000058fff] reserved reserve setup_data: [mem 0x0000000000059000-0x000000000009dfff] usable reserve setup_data: [mem 0x000000000009e000-0x000000000009ffff] reserved reserve setup_data: [mem 0x0000000000100000-0x000000003109c017] usable reserve setup_data: [mem 0x000000003109c018-0x00000000310ac057] usable reserve setup_data: [mem 0x00000000310ac058-0x00000000310ad017] usable reserve setup_data: [mem 0x00000000310ad018-0x00000000310bcc57] usable reserve setup_data: [mem 0x00000000310bcc58-0x00000000312bafff] usable reserve setup_data: [mem 0x00000000312bb000-0x00000000312ccfff] reserved reserve setup_data: [mem 0x00000000312cd000-0x00000000312e5fff] usable reserve setup_data: [mem 0x00000000312e6000-0x00000000312e6fff] ACPI NVS reserve setup_data: [mem 0x00000000312e7000-0x0000000031330fff] reserved reserve setup_data: [mem 0x0000000031331000-0x000000003138bfff] usable reserve setup_data: [mem 0x000000003138c000-0x0000000031aaafff] reserved reserve setup_data: [mem 0x0000000031aab000-0x00000000362a0fff] usable reserve setup_data: [mem 0x00000000362a1000-0x00000000372bbfff] reserved reserve setup_data: [mem 0x00000000372bc000-0x00000000372fafff] ACPI data reserve setup_data: [mem 0x00000000372fb000-0x000000003789afff] ACPI NVS reserve setup_data: [mem 0x000000003789b000-0x0000000037ffefff] reserved reserve setup_data: [mem 0x0000000037fff000-0x0000000037ffffff] usable reserve setup_data: [mem 0x0000000038000000-0x00000000380fffff] reserved reserve setup_data: [mem 0x00000000e0000000-0x00000000efffffff] reserved reserve setup_data: [mem 0x00000000fe000000-0x00000000fe010fff] reserved reserve setup_data: [mem 0x00000000fec00000-0x00000000fec00fff] reserved reserve setup_data: [mem 0x00000000fee00000-0x00000000fee00fff] reserved reserve setup_data: [mem 0x00000000ff000000-0x00000000ffffffff] reserved reserve setup_data: [mem 0x0000000100000000-0x00000008c1ffffff] usable efi: EFI v2.40 by American Megatrends efi: ESRT=0x37f83018 ACPI=0x372c8000 ACPI 2.0=0x372c8000 SMBIOS=0x37ecd000 SMBIOS 2.8 present. DMI: Alienware Alienware 15 R2/0H6J09, BIOS 1.13.1 06/10/2021 tsc: Detected 2700.000 MHz processor tsc: Detected 2699.909 MHz TSC e820: update [mem 0x00000000-0x00000fff] usable ==> reserved e820: remove [mem 0x000a0000-0x000fffff] usable last_pfn = 0x8c2000 max_arch_pfn = 0x400000000 x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT last_pfn = 0x38000 max_arch_pfn = 0x400000000 esrt: Reserving ESRT space from 0x0000000037f83018 to 0x0000000037f83050. Kernel/User page tables isolation: disabled on command line. Using GB pages for direct mapping Secure boot disabled ACPI: Early table checksum verification disabled ACPI: RSDP 0x00000000372C8000 000024 (v02 ALWARE) ACPI: XSDT 0x00000000372C80A8 0000CC (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: FACP 0x00000000372EBF70 00010C (v05 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: DSDT 0x00000000372C8200 023D6B (v02 ALWARE ALIENWRE 01072009 INTL 20120913) ACPI: FACS 0x0000000037899F80 000040 ACPI: APIC 0x00000000372EC080 0000BC (v03 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: FPDT 0x00000000372EC140 000044 (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: FIDT 0x00000000372EC188 00009C (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: MCFG 0x00000000372EC228 00003C (v01 ALWARE ALIENWRE 01072009 MSFT 00000097) ACPI: HPET 0x00000000372EC268 000038 (v01 ALWARE ALIENWRE 01072009 AMI. 0005000B) ACPI: SSDT 0x00000000372EC2A0 0004B9 (v01 SataRe SataTabl 00001000 INTL 20120913) ACPI: LPIT 0x00000000372EC760 000094 (v01 INTEL SKL 00000000 MSFT 0000005F) ACPI: SSDT 0x00000000372EC7F8 000248 (v02 INTEL sensrhub 00000000 INTL 20120913) ACPI: SSDT 0x00000000372ECA40 002BAE (v02 INTEL PtidDevc 00001000 INTL 20120913) ACPI: DBGP 0x00000000372EF5F0 000034 (v01 INTEL 00000000 MSFT 0000005F) ACPI: DBG2 0x00000000372EF628 000054 (v00 INTEL 00000000 MSFT 0000005F) ACPI: SSDT 0x00000000372EF680 00069D (v02 INTEL xh_rvp10 00000000 INTL 20120913) ACPI: SSDT 0x00000000372EFD20 002DB7 (v02 DptfTa DptfTabl 00001000 INTL 20120913) ACPI: SSDT 0x00000000372F2AD8 00559B (v02 SaSsdt SaSsdt 00003000 INTL 20120913) ACPI: UEFI 0x00000000372F8078 000042 (v01 00000000 00000000) ACPI: SSDT 0x00000000372F80C0 000E58 (v02 CpuRef CpuSsdt 00003000 INTL 20120913) ACPI: SSDT 0x00000000372F8F18 0000CE (v02 SgRef SgPeg 00001000 INTL 20120913) ACPI: DMAR 0x00000000372F8FE8 0000A8 (v01 INTEL SKL 00000001 INTL 00000001) ACPI: BGRT 0x00000000372F9090 000038 (v01 ALWARE ALIENWRE 01072009 AMI 00010013) ACPI: SSDT 0x00000000372F90C8 001216 (v01 AmdRef AmdTabl 00001000 INTL 20120913) ACPI: Reserving FACP table memory at [mem 0x372ebf70-0x372ec07b] ACPI: Reserving DSDT table memory at [mem 0x372c8200-0x372ebf6a] ACPI: Reserving FACS table memory at [mem 0x37899f80-0x37899fbf] ACPI: Reserving APIC table memory at [mem 0x372ec080-0x372ec13b] ACPI: Reserving FPDT table memory at [mem 0x372ec140-0x372ec183] ACPI: Reserving FIDT table memory at [mem 0x372ec188-0x372ec223] ACPI: Reserving MCFG table memory at [mem 0x372ec228-0x372ec263] ACPI: Reserving HPET table memory at [mem 0x372ec268-0x372ec29f] ACPI: Reserving SSDT table memory at [mem 0x372ec2a0-0x372ec758] ACPI: Reserving LPIT table memory at [mem 0x372ec760-0x372ec7f3] ACPI: Reserving SSDT table memory at [mem 0x372ec7f8-0x372eca3f] ACPI: Reserving SSDT table memory at [mem 0x372eca40-0x372ef5ed] ACPI: Reserving DBGP table memory at [mem 0x372ef5f0-0x372ef623] ACPI: Reserving DBG2 table memory at [mem 0x372ef628-0x372ef67b] ACPI: Reserving SSDT table memory at [mem 0x372ef680-0x372efd1c] ACPI: Reserving SSDT table memory at [mem 0x372efd20-0x372f2ad6] ACPI: Reserving SSDT table memory at [mem 0x372f2ad8-0x372f8072] ACPI: Reserving UEFI table memory at [mem 0x372f8078-0x372f80b9] ACPI: Reserving SSDT table memory at [mem 0x372f80c0-0x372f8f17] ACPI: Reserving SSDT table memory at [mem 0x372f8f18-0x372f8fe5] ACPI: Reserving DMAR table memory at [mem 0x372f8fe8-0x372f908f] ACPI: Reserving BGRT table memory at [mem 0x372f9090-0x372f90c7] ACPI: Reserving SSDT table memory at [mem 0x372f90c8-0x372fa2dd] Zone ranges: DMA [mem 0x0000000000001000-0x0000000000ffffff] DMA32 [mem 0x0000000001000000-0x00000000ffffffff] Normal [mem 0x0000000100000000-0x00000008c1ffffff] Device empty Movable zone start for each node Early memory node ranges node 0: [mem 0x0000000000001000-0x0000000000057fff] node 0: [mem 0x0000000000059000-0x000000000009dfff] node 0: [mem 0x0000000000100000-0x00000000312bafff] node 0: [mem 0x00000000312cd000-0x00000000312e5fff] node 0: [mem 0x0000000031331000-0x000000003138bfff] node 0: [mem 0x0000000031aab000-0x00000000362a0fff] node 0: [mem 0x0000000037fff000-0x0000000037ffffff] node 0: [mem 0x0000000100000000-0x00000008c1ffffff] Initmem setup node 0 [mem 0x0000000000001000-0x00000008c1ffffff] On node 0, zone DMA: 1 pages in unavailable ranges On node 0, zone DMA: 1 pages in unavailable ranges On node 0, zone DMA: 98 pages in unavailable ranges On node 0, zone DMA32: 18 pages in unavailable ranges On node 0, zone DMA32: 75 pages in unavailable ranges On node 0, zone DMA32: 1823 pages in unavailable ranges On node 0, zone DMA32: 7518 pages in unavailable ranges On node 0, zone Normal: 24576 pages in unavailable ranges Reserving Intel graphics memory at [mem 0x39000000-0x3cffffff] ACPI: PM-Timer IO Port: 0x1808 ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x05] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x06] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x07] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x08] high edge lint[0x1]) IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-119 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) ACPI: Using ACPI (MADT) for SMP configuration information ACPI: HPET id: 0x8086a701 base: 0xfed00000 e820: update [mem 0x345ec000-0x34775fff] usable ==> reserved TSC deadline timer available smpboot: Allowing 8 CPUs, 0 hotplug CPUs [mem 0x3d000000-0xdfffffff] available for PCI devices clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns setup_percpu: NR_CPUS:16 nr_cpumask_bits:16 nr_cpu_ids:8 nr_node_ids:1 percpu: Embedded 54 pages/cpu s182104 r8192 d30888 u262144 pcpu-alloc: s182104 r8192 d30888 u262144 alloc=1*2097152 pcpu-alloc: [0] 0 1 2 3 4 5 6 7 Built 1 zonelists, mobility grouping on. Total pages: 8223801 Kernel command line: root=/dev/nvme0n1p2 rootfstype=ext4 libahci.ignore_sss=1 init=/usr/lib/systemd/systemd systemd.unified_cgroup_hierarchy=1 cgroup_no_v1=all psmouse.synaptics_intertouch=1 mitigations=off mds=off pti=off spectre_v2=off l1tf=off nospec_store_bypass_disable printk.devkmsg=on amdgpu.resize_bar=1 i915.enable_guc=3 dell_smm_hwmon.force=1 Setting dangerous option i915.enable_guc - tainting kernel Unknown command line parameters: nospec_store_bypass_disable pti=off spectre_v2=off printk: log_buf_len individual max cpu contribution: 131072 bytes printk: log_buf_len total cpu_extra contributions: 917504 bytes printk: log_buf_len min size: 262144 bytes printk: log_buf_len: 2097152 bytes printk: early log buf free: 248144(94%) Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes, linear) Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes, linear) mem auto-init: stack:all(zero), heap alloc:off, heap free:off Memory: 32648724K/33417992K available (22540K kernel code, 2395K rwdata, 10548K rodata, 1112K init, 2464K bss, 769012K reserved, 0K cma-reserved) random: get_random_u64 called from cache_random_seq_create+0x52/0x1b0 with crng_init=0 SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 rcu: Hierarchical RCU implementation. rcu: RCU event tracing is enabled. rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=8. Tracing variant of Tasks RCU enabled. rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies. rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 NR_IRQS: 4352, nr_irqs: 2048, preallocated irqs: 16 random: crng done (trusting CPU's manufacturer) spurious 8259A interrupt: IRQ7. Console: colour dummy device 80x25 printk: console [tty0] enabled ACPI: Core revision 20210604 clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635855245 ns APIC: Switch to symmetric I/O mode setup DMAR: Host address width 39 DMAR: DRHD base: 0x000000fed90000 flags: 0x0 DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 7e3ff0501e DMAR: DRHD base: 0x000000fed91000 flags: 0x1 DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap d2008c40660462 ecap f050da DMAR: RMRR base: 0x000000371e5000 end: 0x00000037204fff DMAR: RMRR base: 0x00000038800000 end: 0x0000003cffffff DMAR: [Firmware Bug]: No firmware reserved region can cover this RMRR [0x0000000038800000-0x000000003cffffff], contact BIOS vendor for fixes DMAR: [Firmware Bug]: Your BIOS is broken; bad RMRR [0x0000000038800000-0x000000003cffffff] BIOS vendor: Alienware; Ver: 1.13.1; Product Version: 1.13.1 DMAR-IR: IOAPIC id 2 under DRHD base 0xfed91000 IOMMU 1 DMAR-IR: HPET id 0 under DRHD base 0xfed91000 DMAR-IR: Enabled IRQ remapping in xapic mode ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x26eae8729ef, max_idle_ns: 440795235156 ns Calibrating delay loop (skipped), value calculated using timer frequency.. 5399.81 BogoMIPS (lpj=2699909) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) Mountpoint-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) Disabling cpuset control group subsystem in v1 mounts Disabling cpu control group subsystem in v1 mounts Disabling cpuacct control group subsystem in v1 mounts Disabling io control group subsystem in v1 mounts Disabling memory control group subsystem in v1 mounts Disabling devices control group subsystem in v1 mounts Disabling freezer control group subsystem in v1 mounts Disabling net_cls control group subsystem in v1 mounts Disabling net_prio control group subsystem in v1 mounts Disabling hugetlb control group subsystem in v1 mounts Disabling pids control group subsystem in v1 mounts Disabling rdma control group subsystem in v1 mounts Disabling misc control group subsystem in v1 mounts CPU0: Thermal monitoring enabled (TM1) process: using mwait in idle threads Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8 Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4 Speculative Store Bypass: Vulnerable TAA: Mitigation: TSX disabled SRBDS: Vulnerable Freeing SMP alternatives memory: 60K smpboot: Estimated ratio of average max frequency by base frequency (times 1024): 1213 smpboot: CPU0: Intel(R) Core(TM) i7-6820HK CPU @ 2.70GHz (family: 0x6, model: 0x5e, stepping: 0x3) Performance Events: PEBS fmt3+, Skylake events, 32-deep LBR, full-width counters, Intel PMU driver. ... version: 4 ... bit width: 48 ... generic registers: 4 ... value mask: 0000ffffffffffff ... max period: 00007fffffffffff ... fixed-purpose events: 3 ... event mask: 000000070000000f rcu: Hierarchical SRCU implementation. smp: Bringing up secondary CPUs ... x86: Booting SMP configuration: .... node #0, CPUs: #1 #2 #3 #4 #5 #6 #7 smp: Brought up 1 node, 8 CPUs smpboot: Max logical packages: 1 smpboot: Total of 8 processors activated (43198.54 BogoMIPS) devtmpfs: initialized x86/mm: Memory block size: 128MB ACPI: PM: Registering ACPI NVS region [mem 0x312e6000-0x312e6fff] (4096 bytes) ACPI: PM: Registering ACPI NVS region [mem 0x372fb000-0x3789afff] (5898240 bytes) clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns futex hash table entries: 2048 (order: 5, 131072 bytes, linear) NET: Registered PF_NETLINK/PF_ROUTE protocol family thermal_sys: Registered thermal governor 'step_wise' cpuidle: using governor ladder cpuidle: using governor menu HugeTLB: can free 4094 vmemmap pages for hugepages-1048576kB ACPI FADT declares the system doesn't support PCIe ASPM, so disable it ACPI: bus type PCI registered acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000) PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820 PCI: Using configuration type 1 for base access ENERGY_PERF_BIAS: Set to 'normal', was 'performance' HugeTLB: can free 6 vmemmap pages for hugepages-2048kB HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages cryptd: max_cpu_qlen set to 1000 fbcon: Taking over console ACPI: Added _OSI(Module Device) ACPI: Added _OSI(Processor Device) ACPI: Added _OSI(3.0 _SCP Extensions) ACPI: Added _OSI(Processor Aggregator Device) ACPI: Added _OSI(Linux-Dell-Video) ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio) ACPI: Added _OSI(Linux-HPI-Hybrid-Graphics) ACPI: 10 ACPI AML tables successfully acquired and loaded ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF8881010EF800 0005FD (v02 PmRef Cpu0Ist 00003000 INTL 20120913) ACPI: \_PR_.CPU0: _OSC native thermal LVT Acked ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF8881010E4400 00037F (v02 PmRef Cpu0Cst 00003001 INTL 20120913) ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF8881010E8000 0005AA (v02 PmRef ApIst 00003000 INTL 20120913) ACPI: Dynamic OEM Table Load: ACPI: SSDT 0xFFFF888101108A00 000119 (v02 PmRef ApCst 00003000 INTL 20120913) ACPI: EC: EC started ACPI: EC: interrupt blocked ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62 ACPI: \_SB_.PCI0.LPCB.EC0_: Boot DSDT EC used to handle transactions ACPI: Interpreter enabled ACPI: PM: (supports S0 S3 S5) ACPI: Using IOAPIC for interrupt routing PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug ACPI: Enabled 9 GPEs in block 00 to 7F ACPI: PM: Power Resource [PG00] ACPI: PM: Power Resource [PG01] ACPI: PM: Power Resource [PG02] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PM: Power Resource [WRST] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-fe]) acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI HPX-Type3] acpi PNP0A08:00: _OSC: platform retains control of PCIe features (AE_ERROR) PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7 window] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff window] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff window] pci_bus 0000:00: root bus resource [mem 0x3d000000-0xdfffffff window] pci_bus 0000:00: root bus resource [mem 0xfd000000-0xfe7fffff window] pci_bus 0000:00: root bus resource [bus 00-fe] pci 0000:00:00.0: [8086:1910] type 00 class 0x060000 pci 0000:00:01.0: [8086:1901] type 01 class 0x060400 pci 0000:00:01.0: PME# supported from D0 D3hot D3cold pci 0000:00:02.0: [8086:191b] type 00 class 0x030000 pci 0000:00:02.0: reg 0x10: [mem 0xdb000000-0xdbffffff 64bit] pci 0000:00:02.0: reg 0x18: [mem 0x70000000-0x7fffffff 64bit pref] pci 0000:00:02.0: reg 0x20: [io 0xf000-0xf03f] pci 0000:00:02.0: BAR 2: assigned to efifb pci 0000:00:04.0: [8086:1903] type 00 class 0x118000 pci 0000:00:04.0: reg 0x10: [mem 0xdc620000-0xdc627fff 64bit] pci 0000:00:14.0: [8086:a12f] type 00 class 0x0c0330 pci 0000:00:14.0: reg 0x10: [mem 0xdc610000-0xdc61ffff 64bit] pci 0000:00:14.0: PME# supported from D3hot D3cold pci 0000:00:14.2: [8086:a131] type 00 class 0x118000 pci 0000:00:14.2: reg 0x10: [mem 0xdc636000-0xdc636fff 64bit] pci 0000:00:16.0: [8086:a13a] type 00 class 0x078000 pci 0000:00:16.0: reg 0x10: [mem 0xdc635000-0xdc635fff 64bit] pci 0000:00:16.0: PME# supported from D3hot pci 0000:00:17.0: [8086:a103] type 00 class 0x010601 pci 0000:00:17.0: reg 0x10: [mem 0xdc630000-0xdc631fff] pci 0000:00:17.0: reg 0x14: [mem 0xdc634000-0xdc6340ff] pci 0000:00:17.0: reg 0x18: [io 0xf090-0xf097] pci 0000:00:17.0: reg 0x1c: [io 0xf080-0xf083] pci 0000:00:17.0: reg 0x20: [io 0xf060-0xf07f] pci 0000:00:17.0: reg 0x24: [mem 0xdc633000-0xdc6337ff] pci 0000:00:17.0: PME# supported from D3hot pci 0000:00:1c.0: [8086:a110] type 01 class 0x060400 pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold pci 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1c.4: [8086:a114] type 01 class 0x060400 pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold pci 0000:00:1c.4: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1c.5: [8086:a115] type 01 class 0x060400 pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold pci 0000:00:1c.5: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1c.6: [8086:a116] type 01 class 0x060400 pci 0000:00:1c.6: PME# supported from D0 D3hot D3cold pci 0000:00:1c.6: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1d.0: [8086:a118] type 01 class 0x060400 pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold pci 0000:00:1d.0: Intel SPT PCH root port ACS workaround enabled pci 0000:00:1f.0: [8086:a14e] type 00 class 0x060100 pci 0000:00:1f.2: [8086:a121] type 00 class 0x058000 pci 0000:00:1f.2: reg 0x10: [mem 0xdc62c000-0xdc62ffff] pci 0000:00:1f.3: [8086:a170] type 00 class 0x040300 pci 0000:00:1f.3: reg 0x10: [mem 0xdc628000-0xdc62bfff 64bit] pci 0000:00:1f.3: reg 0x20: [mem 0xdc600000-0xdc60ffff 64bit] pci 0000:00:1f.3: PME# supported from D3hot D3cold pci 0000:00:1f.4: [8086:a123] type 00 class 0x0c0500 pci 0000:00:1f.4: reg 0x10: [mem 0xdc632000-0xdc6320ff 64bit] pci 0000:00:1f.4: reg 0x20: [io 0xf040-0xf05f] pci 0000:01:00.0: [1002:6921] type 00 class 0x038000 pci 0000:01:00.0: reg 0x10: [mem 0xb0000000-0xbfffffff 64bit pref] pci 0000:01:00.0: reg 0x18: [mem 0xc0000000-0xc01fffff 64bit pref] pci 0000:01:00.0: reg 0x20: [io 0xe000-0xe0ff] pci 0000:01:00.0: reg 0x24: [mem 0xdc500000-0xdc53ffff] pci 0000:01:00.0: reg 0x30: [mem 0xdc540000-0xdc55ffff pref] pci 0000:01:00.0: supports D1 D2 pci 0000:01:00.0: PME# supported from D1 D2 D3hot D3cold pci 0000:01:00.0: 63.008 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x8 link at 0000:00:01.0 (capable of 126.016 Gb/s with 8.0 GT/s PCIe x16 link) pci 0000:00:01.0: PCI bridge to [bus 01] pci 0000:00:01.0: bridge window [io 0xe000-0xefff] pci 0000:00:01.0: bridge window [mem 0xdc500000-0xdc5fffff] pci 0000:00:01.0: bridge window [mem 0xb0000000-0xc01fffff 64bit pref] acpiphp: Slot [1] registered pci 0000:00:1c.0: PCI bridge to [bus 02-3a] pci 0000:00:1c.0: bridge window [mem 0xc4000000-0xda0fffff] pci 0000:00:1c.0: bridge window [mem 0x80000000-0xa1ffffff 64bit pref] pci 0000:3b:00.0: [1969:e0a1] type 00 class 0x020000 pci 0000:3b:00.0: reg 0x10: [mem 0xdc400000-0xdc43ffff 64bit] pci 0000:3b:00.0: reg 0x18: [io 0xd000-0xd07f] pci 0000:3b:00.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:1c.4: PCI bridge to [bus 3b] pci 0000:00:1c.4: bridge window [io 0xd000-0xdfff] pci 0000:00:1c.4: bridge window [mem 0xdc400000-0xdc4fffff] pci 0000:3c:00.0: [168c:003e] type 00 class 0x028000 pci 0000:3c:00.0: reg 0x10: [mem 0xdc000000-0xdc1fffff 64bit] pci 0000:3c:00.0: PME# supported from D0 D3hot D3cold pci 0000:00:1c.5: PCI bridge to [bus 3c] pci 0000:00:1c.5: bridge window [mem 0xdc000000-0xdc1fffff] pci 0000:3d:00.0: [10ec:5227] type 00 class 0xff0000 pci 0000:3d:00.0: reg 0x10: [mem 0xdc300000-0xdc300fff] pci 0000:3d:00.0: supports D1 D2 pci 0000:3d:00.0: PME# supported from D1 D2 D3hot D3cold pci 0000:00:1c.6: PCI bridge to [bus 3d] pci 0000:00:1c.6: bridge window [mem 0xdc300000-0xdc3fffff] pci 0000:3e:00.0: [144d:a802] type 00 class 0x010802 pci 0000:3e:00.0: reg 0x10: [mem 0xdc200000-0xdc203fff 64bit] pci 0000:3e:00.0: reg 0x18: [io 0xc000-0xc0ff] pci 0000:00:1d.0: PCI bridge to [bus 3e] pci 0000:00:1d.0: bridge window [io 0xc000-0xcfff] pci 0000:00:1d.0: bridge window [mem 0xdc200000-0xdc2fffff] pci_bus 0000:00: on NUMA node 0 pci 0000:00:01.0: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:01:00.0: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 256 pci 0000:00:1c.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 128 pci 0000:00:1c.4: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:3b:00.0: Max Payload Size set to 256/4096 (was 256), Max Read Rq 256 pci 0000:00:1c.5: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:3c:00.0: Max Payload Size set to 256/ 256 (was 256), Max Read Rq 256 pci 0000:00:1c.6: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 128 pci 0000:3d:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128 pci 0000:00:1d.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 128 pci 0000:3e:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read Rq 128 ACPI: PCI: Interrupt link LNKA configured for IRQ 11 ACPI: PCI: Interrupt link LNKB configured for IRQ 10 ACPI: PCI: Interrupt link LNKC configured for IRQ 11 ACPI: PCI: Interrupt link LNKD configured for IRQ 11 ACPI: PCI: Interrupt link LNKE configured for IRQ 11 ACPI: PCI: Interrupt link LNKF configured for IRQ 11 ACPI: PCI: Interrupt link LNKG configured for IRQ 11 ACPI: PCI: Interrupt link LNKH configured for IRQ 11 ACPI: EC: interrupt unblocked ACPI: EC: event unblocked ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62 ACPI: EC: GPE=0x14 ACPI: \_SB_.PCI0.LPCB.EC0_: Boot DSDT EC initialization complete ACPI: \_SB_.PCI0.LPCB.EC0_: EC: Used to handle transactions and events iommu: Default domain type: Passthrough pci 0000:00:02.0: vgaarb: setting as boot VGA device pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none pci 0000:00:02.0: vgaarb: bridge control possible vgaarb: loaded SCSI subsystem initialized libata version 3.00 loaded. ACPI: bus type USB registered usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb videodev: Linux video capture interface: v2.00 Registered efivars operations Advanced Linux Sound Architecture Driver Initialized. Bluetooth: Core ver 2.22 NET: Registered PF_BLUETOOTH protocol family Bluetooth: HCI device and connection manager initialized Bluetooth: HCI socket layer initialized Bluetooth: L2CAP socket layer initialized Bluetooth: SCO socket layer initialized PCI: Using ACPI for IRQ routing PCI: pci_cache_line_size set to 64 bytes e820: reserve RAM buffer [mem 0x00058000-0x0005ffff] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff] e820: reserve RAM buffer [mem 0x3109c018-0x33ffffff] e820: reserve RAM buffer [mem 0x310ad018-0x33ffffff] e820: reserve RAM buffer [mem 0x312bb000-0x33ffffff] e820: reserve RAM buffer [mem 0x312e6000-0x33ffffff] e820: reserve RAM buffer [mem 0x3138c000-0x33ffffff] e820: reserve RAM buffer [mem 0x345ec000-0x37ffffff] e820: reserve RAM buffer [mem 0x362a1000-0x37ffffff] e820: reserve RAM buffer [mem 0x8c2000000-0x8c3ffffff] wmi_bus wmi_bus-PNP0C14:01: WQBC data block query control method not found dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.4) hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0 hpet0: 8 comparators, 64-bit 24.000000 MHz counter clocksource: Switched to clocksource tsc-early FS-Cache: Loaded CacheFiles: Loaded pnp: PnP ACPI init system 00:02: [io 0x0680-0x069f] has been reserved system 00:02: [io 0xffff] has been reserved system 00:02: [io 0xffff] has been reserved system 00:02: [io 0xffff] has been reserved system 00:02: [io 0x1800-0x18fe] has been reserved system 00:02: [io 0x164e-0x164f] has been reserved system 00:03: [io 0x0800-0x087f] has been reserved system 00:05: [io 0x1854-0x1857] has been reserved system 00:06: [mem 0xfed10000-0xfed17fff] has been reserved system 00:06: [mem 0xfed18000-0xfed18fff] has been reserved system 00:06: [mem 0xfed19000-0xfed19fff] has been reserved system 00:06: [mem 0xe0000000-0xefffffff] has been reserved system 00:06: [mem 0xfed20000-0xfed3ffff] has been reserved system 00:06: [mem 0xfed90000-0xfed93fff] could not be reserved system 00:06: [mem 0xfed45000-0xfed8ffff] has been reserved system 00:06: [mem 0xff000000-0xffffffff] has been reserved system 00:06: [mem 0xfee00000-0xfeefffff] could not be reserved system 00:06: [mem 0xdffe0000-0xdfffffff] has been reserved system 00:07: [mem 0xfd000000-0xfdabffff] has been reserved system 00:07: [mem 0xfdad0000-0xfdadffff] has been reserved system 00:07: [mem 0xfdb00000-0xfdffffff] has been reserved system 00:07: [mem 0xfe000000-0xfe01ffff] could not be reserved system 00:07: [mem 0xfe036000-0xfe03bfff] has been reserved system 00:07: [mem 0xfe03d000-0xfe3fffff] has been reserved system 00:07: [mem 0xfe410000-0xfe7fffff] has been reserved system 00:08: [mem 0xfdaf0000-0xfdafffff] has been reserved system 00:08: [mem 0xfdae0000-0xfdaeffff] has been reserved system 00:08: [mem 0xfdac0000-0xfdacffff] has been reserved pnp: PnP ACPI: found 9 devices clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns NET: Registered PF_INET protocol family IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear) tcp_listen_portaddr_hash hash table entries: 16384 (order: 6, 262144 bytes, linear) TCP established hash table entries: 262144 (order: 9, 2097152 bytes, linear) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear) TCP: Hash tables configured (established 262144 bind 65536) UDP hash table entries: 16384 (order: 7, 524288 bytes, linear) UDP-Lite hash table entries: 16384 (order: 7, 524288 bytes, linear) NET: Registered PF_UNIX/PF_LOCAL protocol family pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02-3a] add_size 1000 pci 0000:00:1c.0: BAR 13: assigned [io 0x2000-0x2fff] pci 0000:00:01.0: PCI bridge to [bus 01] pci 0000:00:01.0: bridge window [io 0xe000-0xefff] pci 0000:00:01.0: bridge window [mem 0xdc500000-0xdc5fffff] pci 0000:00:01.0: bridge window [mem 0xb0000000-0xc01fffff 64bit pref] pci 0000:00:1c.0: PCI bridge to [bus 02-3a] pci 0000:00:1c.0: bridge window [io 0x2000-0x2fff] pci 0000:00:1c.0: bridge window [mem 0xc4000000-0xda0fffff] pci 0000:00:1c.0: bridge window [mem 0x80000000-0xa1ffffff 64bit pref] pci 0000:00:1c.4: PCI bridge to [bus 3b] pci 0000:00:1c.4: bridge window [io 0xd000-0xdfff] pci 0000:00:1c.4: bridge window [mem 0xdc400000-0xdc4fffff] pci 0000:00:1c.5: PCI bridge to [bus 3c] pci 0000:00:1c.5: bridge window [mem 0xdc000000-0xdc1fffff] pci 0000:00:1c.6: PCI bridge to [bus 3d] pci 0000:00:1c.6: bridge window [mem 0xdc300000-0xdc3fffff] pci 0000:00:1d.0: PCI bridge to [bus 3e] pci 0000:00:1d.0: bridge window [io 0xc000-0xcfff] pci 0000:00:1d.0: bridge window [mem 0xdc200000-0xdc2fffff] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7 window] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff window] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff window] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff window] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff window] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff window] pci_bus 0000:00: resource 19 [mem 0x3d000000-0xdfffffff window] pci_bus 0000:00: resource 20 [mem 0xfd000000-0xfe7fffff window] pci_bus 0000:01: resource 0 [io 0xe000-0xefff] pci_bus 0000:01: resource 1 [mem 0xdc500000-0xdc5fffff] pci_bus 0000:01: resource 2 [mem 0xb0000000-0xc01fffff 64bit pref] pci_bus 0000:02: resource 0 [io 0x2000-0x2fff] pci_bus 0000:02: resource 1 [mem 0xc4000000-0xda0fffff] pci_bus 0000:02: resource 2 [mem 0x80000000-0xa1ffffff 64bit pref] pci_bus 0000:3b: resource 0 [io 0xd000-0xdfff] pci_bus 0000:3b: resource 1 [mem 0xdc400000-0xdc4fffff] pci_bus 0000:3c: resource 1 [mem 0xdc000000-0xdc1fffff] pci_bus 0000:3d: resource 1 [mem 0xdc300000-0xdc3fffff] pci_bus 0000:3e: resource 0 [io 0xc000-0xcfff] pci_bus 0000:3e: resource 1 [mem 0xdc200000-0xdc2fffff] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff] PCI: CLS 0 bytes, default 64 DMAR: No ATSR found DMAR: No SATC found DMAR: IOMMU feature fl1gp_support inconsistent DMAR: IOMMU feature pgsel_inv inconsistent DMAR: IOMMU feature nwfs inconsistent DMAR: IOMMU feature eafs inconsistent DMAR: IOMMU feature prs inconsistent DMAR: IOMMU feature nest inconsistent DMAR: IOMMU feature mts inconsistent DMAR: IOMMU feature sc_support inconsistent DMAR: IOMMU feature pass_through inconsistent DMAR: IOMMU feature dev_iotlb_support inconsistent DMAR: dmar0: Using Queued invalidation DMAR: dmar1: Using Queued invalidation pci 0000:00:00.0: Adding to iommu group 0 pci 0000:00:01.0: Adding to iommu group 1 pci 0000:00:02.0: Adding to iommu group 2 pci 0000:00:04.0: Adding to iommu group 3 pci 0000:00:14.0: Adding to iommu group 4 pci 0000:00:14.2: Adding to iommu group 4 pci 0000:00:16.0: Adding to iommu group 5 pci 0000:00:17.0: Adding to iommu group 6 pci 0000:00:1c.0: Adding to iommu group 7 pci 0000:00:1c.4: Adding to iommu group 8 pci 0000:00:1c.5: Adding to iommu group 9 pci 0000:00:1c.6: Adding to iommu group 10 pci 0000:00:1d.0: Adding to iommu group 11 pci 0000:00:1f.0: Adding to iommu group 12 pci 0000:00:1f.2: Adding to iommu group 12 pci 0000:00:1f.3: Adding to iommu group 12 pci 0000:00:1f.4: Adding to iommu group 12 pci 0000:01:00.0: Adding to iommu group 1 pci 0000:3b:00.0: Adding to iommu group 13 pci 0000:3c:00.0: Adding to iommu group 14 pci 0000:3d:00.0: Adding to iommu group 15 pci 0000:3e:00.0: Adding to iommu group 16 DMAR: Intel(R) Virtualization Technology for Directed I/O PCI-DMA: Using software bounce buffering for IO (SWIOTLB) software IO TLB: mapped [mem 0x000000002d09c000-0x000000003109c000] (64MB) RAPL PMU: API unit is 2^-32 Joules, 5 fixed counters, 655360 ms ovfl timer RAPL PMU: hw unit of domain pp0-core 2^-14 Joules RAPL PMU: hw unit of domain package 2^-14 Joules RAPL PMU: hw unit of domain dram 2^-14 Joules RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules RAPL PMU: hw unit of domain psys 2^-14 Joules DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr 0x3a800000 [fault reason 0x06] PTE Read access is not set DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr 0x3a818000 [fault reason 0x06] PTE Read access is not set DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr 0x3a852000 [fault reason 0x06] PTE Read access is not set DMAR: DRHD: handling fault status reg 3 Initialise system trusted keyrings workingset: timestamp_bits=46 max_order=23 bucket_order=0 zbud: loaded FS-Cache: Netfs 'cifs' registered for caching Key type cifs.idmap registered fuse: init (API version 7.34) NET: Registered PF_ALG protocol family Key type asymmetric registered Asymmetric key parser 'x509' registered Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) ACPI: AC: AC Adapter [ACAD] (on-line) input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:40/PNP0C0D:00/input/input0 ACPI: button: Lid Switch [LID0] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 ACPI: button: Power Button [PWRB] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 ACPI: button: Power Button [PWRF] Non-volatile memory driver v1.3 Linux agpgart interface v0.103 [drm] amdgpu kernel modesetting enabled. vga_switcheroo: detected switching method \_SB_.PCI0.GFX0.ATPX handle ATPX version 1, functions 0x00000033 ATPX Hybrid Graphics amdgpu: CRAT table disabled by module option amdgpu: Virtual CRAT table created for CPU amdgpu: Topology: Add CPU node amdgpu 0000:01:00.0: enabling device (0000 -> 0003) [drm] initializing kernel modesetting (TONGA 0x1002:0x6921 0x1028:0x0708 0x00). amdgpu 0000:01:00.0: amdgpu: Trusted Memory Zone (TMZ) feature not supported [drm] register mmio base: 0xDC500000 [drm] register mmio size: 262144 [drm] add ip block number 0 <vi_common> [drm] add ip block number 1 <gmc_v8_0> [drm] add ip block number 2 <tonga_ih> [drm] add ip block number 3 <gfx_v8_0> [drm] add ip block number 4 <sdma_v3_0> [drm] add ip block number 5 <powerplay> [drm] add ip block number 6 <dm> [drm] add ip block number 7 <uvd_v5_0> [drm] add ip block number 8 <vce_v3_0> ACPI: battery: Slot [BAT1] (battery present) amdgpu 0000:01:00.0: amdgpu: Fetched VBIOS from ATRM amdgpu: ATOM BIOS: BR46576.001 [drm] VCE enabled in physical mode [drm] GPU posting now... [drm] vm size is 128 GB, 2 levels, block size is 10-bit, fragment size is 9-bit amdgpu 0000:01:00.0: amdgpu: VRAM: 4096M 0x000000F400000000 - 0x000000F4FFFFFFFF (4096M used) amdgpu 0000:01:00.0: amdgpu: GART: 1024M 0x000000FF00000000 - 0x000000FF3FFFFFFF [drm] Detected VRAM RAM=4096M, BAR=256M [drm] RAM width 256bits GDDR5 [drm] amdgpu: 4096M of VRAM memory ready [drm] amdgpu: 4096M of GTT memory ready. [drm] GART: num cpu pages 262144, num gpu pages 262144 [drm] PCIE GART of 1024M enabled (table at 0x000000F400000000). [drm] Chained IB support enabled! amdgpu: hwmgr_sw_init smu backed is tonga_smu [drm] Found UVD firmware Version: 1.68 Family ID: 10 [drm] Found VCE firmware Version: 52.8 Binary ID: 3 [drm] Display Core initialized with v3.2.149! [drm] UVD initialized successfully. [drm] VCE initialized successfully. kfd kfd: amdgpu: Allocated 3969056 bytes on gart amdgpu: SW scheduler is used amdgpu: Virtual CRAT table created for GPU amdgpu: Topology: Add dGPU node [0x6921:0x1002] kfd kfd: amdgpu: added device 1002:6921 amdgpu 0000:01:00.0: amdgpu: SE 4, SH per SE 1, CU per SH 8, active_cu_number 32 amdgpu 0000:01:00.0: amdgpu: Using BOCO for runtime pm [drm] Initialized amdgpu 3.42.0 20150101 for 0000:01:00.0 on minor 0 i915 0000:00:02.0: [drm] Incompatible option enable_guc=3 - GuC submission is N/A i915 0000:00:02.0: [drm] VT-d active for gfx access i915 0000:00:02.0: vgaarb: deactivate vga console i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem i915 0000:00:02.0: [drm] Finished loading DMC firmware i915/skl_dmc_ver1_27.bin (v1.27) i915 0000:00:02.0: [drm] Disabling framebuffer compression (FBC) to prevent screen flicker with VT-d enabled i915 0000:00:02.0: [drm] [ENCODER:102:DDI B/PHY B] is disabled/in DSI mode with an ungated DDI clock, gate it i915 0000:00:02.0: [drm] [ENCODER:117:DDI C/PHY C] is disabled/in DSI mode with an ungated DDI clock, gate it i915 0000:00:02.0: [drm] [ENCODER:127:DDI D/PHY D] is disabled/in DSI mode with an ungated DDI clock, gate it i915 0000:00:02.0: Direct firmware load for i915/skl_guc_49.0.1.bin failed with error -2 i915 0000:00:02.0: [drm] GuC firmware i915/skl_guc_49.0.1.bin: fetch failed with error -2 i915 0000:00:02.0: [drm] GuC firmware(s) can be downloaded from https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/i915<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-firmware.git%2Ftree%2Fi915&data=04%7C01%7CGuchun.Chen%40amd.com%7C82f9e022b7d54387f0dd08d961eda83b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637648495656963126%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=KzZr5%2FwcJPXYIhIvzkTapqIlLcTZklsEQ6odo%2Bnu8fc%3D&reserved=0> i915 0000:00:02.0: [drm] GuC is uninitialized [drm] Initialized i915 1.6.0 20201103 for 0000:00:02.0 on minor 1 ACPI: video: Video Device [GFX0] (multi-head: yes rom: no post: no) input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input3 loop: module loaded mei_me 0000:00:16.0: enabling device (0000 -> 0002) rtsx_pci 0000:3d:00.0: enabling device (0000 -> 0002) nvme nvme0: pci function 0000:3e:00.0 ahci 0000:00:17.0: version 3.0 ahci 0000:00:17.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x2 impl SATA mode ahci 0000:00:17.0: flags: 64bit ncq sntf pm led clo only pio slum part ems deso sadm sds apst scsi host0: ahci scsi host1: ahci ata1: DUMMY ata2: SATA max UDMA/133 abar m2048@0xdc633000 port 0xdc633180 irq 133 alx 0000:3b:00.0 eth0: Qualcomm Atheros AR816x/AR817x Ethernet [f8:ca:b8:03:29:43] ath10k_pci 0000:3c:00.0: enabling device (0000 -> 0002) ath10k_pci 0000:3c:00.0: pci irq msi oper_irq_mode 2 irq_mode 0 reset_mode 0 fbcon: i915 (fb0) is primary device Console: switching to colour frame buffer device 240x67 nvme nvme0: 8/0/0 default/read/poll queues nvme0n1: p1 p2 p3 i915 0000:00:02.0: [drm] fb0: i915 frame buffer device xhci_hcd 0000:00:14.0: xHCI Host Controller xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1 xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x0000000001109810 usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.14 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: xHCI Host Controller usb usb1: Manufacturer: Linux 5.14.0-rc3-agd5f+ xhci-hcd usb usb1: SerialNumber: 0000:00:14.0 hub 1-0:1.0: USB hub found hub 1-0:1.0: 16 ports detected xhci_hcd 0000:00:14.0: xHCI Host Controller xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2 xhci_hcd 0000:00:14.0: Host supports USB 3.0 SuperSpeed usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.14 usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb2: Product: xHCI Host Controller usb usb2: Manufacturer: Linux 5.14.0-rc3-agd5f+ xhci-hcd usb usb2: SerialNumber: 0000:00:14.0 hub 2-0:1.0: USB hub found hub 2-0:1.0: 8 ports detected usb: port power management may be unreliable usbcore: registered new interface driver cdc_acm cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters usbcore: registered new interface driver uas usbcore: registered new interface driver usb-storage i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mousedev: PS/2 mouse device common for all mice rtc_cmos 00:04: RTC can wake from S4 rtc_cmos 00:04: registered as rtc0 rtc_cmos 00:04: setting system clock to 2021-08-18T01:47:48 UTC (1629251268) rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs i2c /dev entries driver i801_smbus 0000:00:1f.4: SPD Write Disable is set i801_smbus 0000:00:1f.4: SMBus using PCI interrupt i2c i2c-6: 2/2 memory slots populated (from DMI) ee1004 6-0050: 512 byte EE1004-compliant SPD EEPROM, read-only i2c i2c-6: Successfully instantiated SPD at 0x50 usbcore: registered new interface driver uvcvideo dell_smm_hwmon: not running on a supported Dell system. input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input4 dell_smm_hwmon: vendor=Alienware, model=Alienware 15 R2, version=1.13.1 usbcore: registered new interface driver btusb intel_pstate: Intel P-state driver initializing intel_pstate: HWP enabled [drm] Initialized simpledrm 1.0.0 20200625 for simple-framebuffer.0 on minor 2 simple-framebuffer simple-framebuffer.0: [drm] fb1: simpledrm frame buffer device EFI Variables Facility v0.08 2004-May-17 pstore: Registered efi as persistent store backend usbcore: registered new interface driver usbhid usbhid: USB HID core driver ath10k_pci 0000:3c:00.0: qca6174 hw3.2 target 0x05030000 chip_id 0x00340aff sub 1a56:1535 alienware_wmi: alienware-wmi: No known WMI GUID found ath10k_pci 0000:3c:00.0: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 dell_wmi_aio: No known WMI GUID found ath10k_pci 0000:3c:00.0: firmware ver WLAN.RM.4.4.1-00157-QCARMSWPZ-1 api 6 features wowlan,ignore-otp,mfp crc32 90eebefb snd_hda_intel 0000:00:1f.3: enabling device (0000 -> 0002) snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops) xt_time: kernel timezone is -0000 ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully Initializing XFRM netlink socket NET: Registered PF_INET6 protocol family Segment Routing with IPv6 sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver NET: Registered PF_PACKET protocol family snd_hda_codec_ca0132 hdaudioC0D0: autoconfig for CA0132: line_outs=1 (0xb/0x0/0x0/0x0/0x0) type:speaker NET: Registered PF_KEY protocol family snd_hda_codec_ca0132 hdaudioC0D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) snd_hda_codec_ca0132 hdaudioC0D0: hp_outs=1 (0xf/0x0/0x0/0x0/0x0) snd_hda_codec_ca0132 hdaudioC0D0: mono: mono_out=0x0 snd_hda_codec_ca0132 hdaudioC0D0: inputs: snd_hda_codec_ca0132 hdaudioC0D0: Mic=0x11 snd_hda_codec_ca0132 hdaudioC0D0: Internal Mic=0x12 ath10k_pci 0000:3c:00.0: board_file api 2 bmi_id N/A crc32 318825bf Bluetooth: RFCOMM TTY layer initialized ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Bluetooth: RFCOMM socket layer initialized ata2.00: ATA-9: M4-CT512M4SSD2, 070H, max UDMA/100 Bluetooth: RFCOMM ver 1.11 ata2.00: 1000215216 sectors, multi 16: LBA48 NCQ (depth 32), AA ata2.00: configured for UDMA/100 Bluetooth: BNEP (Ethernet Emulation) ver 1.3 Bluetooth: BNEP filters: protocol multicast scsi 1:0:0:0: Direct-Access ATA M4-CT512M4SSD2 070H PQ: 0 ANSI: 5 Bluetooth: BNEP socket layer initialized sd 1:0:0:0: [sda] 1000215216 512-byte logical blocks: (512 GB/477 GiB) Bluetooth: HIDP (Human Interface Emulation) ver 1.2 Bluetooth: HIDP socket layer initialized sd 1:0:0:0: [sda] Write Protect is off usb 1-4: new full-speed USB device number 2 using xhci_hcd Key type dns_resolver registered sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00 microcode: sig=0x506e3, pf=0x20, revision=0xea sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA microcode: Microcode Update Driver: v2.2. IPI shorthand broadcast: enabled sda: sda1 sda2 sda3 sda4 sda5 AVX2 version of gcm_enc/dec engaged. ath10k_pci 0000:3c:00.0: htt-ver 3.60 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1 sd 1:0:0:0: [sda] Attached SCSI disk AES CTR mode by8 optimization enabled sched_clock: Marking stable (1160678423, 3697821)->(1168177289, -3801045) registered taskstats version 1 Loading compiled-in X.509 certificates Key type ._fscrypt registered Key type .fscrypt registered Key type fscrypt-provisioning registered dell-smbios A80593CE-A997-11DA-B012-B622A1EF5492: WMI SMBIOS userspace interface not supported(0), try upgrading to a newer BIOS input: Dell WMI hotkeys as /devices/platform/PNP0C14:01/wmi_bus/wmi_bus-PNP0C14:01/9DBB5994-A997-11DA-B012-B622A1EF5492/input/input7 cfg80211: Loading compiled-in X.509 certificates for regulatory database cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' ALSA device list: No soundcards found. ath: EEPROM regdomain: 0x6c ath: EEPROM indicates we should expect a direct regpair map ath: Country alpha2 being used: 00 ath: Regpair used: 0x6c usb 1-4: config 1 interface 0 altsetting 0 has 2 endpoint descriptors, different from the interface descriptor's value: 1 usb 1-4: New USB device found, idVendor=187c, idProduct=0528, bcdDevice= 0.00 usb 1-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3 usb 1-4: Product: AW1517 usb 1-4: Manufacturer: Alienware usb 1-4: SerialNumber: 16.0 hid-generic 0003:187C:0528.0001: device has no listeners, quitting psmouse serio1: synaptics: queried max coordinates: x [..5668], y [..4756] tsc: Refined TSC clocksource calibration: 2711.973 MHz clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x27176cd0728, max_idle_ns: 440795290119 ns clocksource: Switched to clocksource tsc usb 1-5: new full-speed USB device number 3 using xhci_hcd psmouse serio1: synaptics: queried min coordinates: x [1274..], y [1098..] psmouse serio1: synaptics: Trying to set up SMBus access rmi4_smbus 6-002c: registering SMbus-connected sensor rmi4_f01 rmi4-00.fn01: found RMI device, manufacturer: Synaptics, product: TM2417-001, fw id: 0 input: Synaptics TM2417-001 as /devices/rmi4-00/input/input8 usb 1-5: New USB device found, idVendor=0cf3, idProduct=e300, bcdDevice= 0.01 usb 1-5: New USB device strings: Mfr=0, Product=0, SerialNumber=0 Bluetooth: hci0: using rampatch file: qca/rampatch_usb_00000302.bin Bluetooth: hci0: QCA: patch rome 0x302 build 0x3e8, firmware rome 0x302 build 0x111 snd_hda_codec_ca0132 hdaudioC0D0: ca0132 DSP downloaded and running EXT4-fs (nvme0n1p2): INFO: recovery required on readonly filesystem input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input9 EXT4-fs (nvme0n1p2): write access will be enabled during recovery input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input10 input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input11 input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input12 input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input13 input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input14 input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input15 usb 1-7: new high-speed USB device number 4 using xhci_hcd EXT4-fs (nvme0n1p2): recovery complete EXT4-fs (nvme0n1p2): mounted filesystem with ordered data mode. Opts: (null). Quota mode: disabled. VFS: Mounted root (ext4 filesystem) readonly on device 259:2. devtmpfs: mounted Freeing unused kernel image (initmem) memory: 1112K Write protecting the kernel read-only data: 36864k Freeing unused kernel image (text/rodata gap) memory: 2032K Freeing unused kernel image (rodata/data gap) memory: 1740K Run /usr/lib/systemd/systemd as init process with arguments: /usr/lib/systemd/systemd nospec_store_bypass_disable with environment: HOME=/ TERM=linux pti=off spectre_v2=off usb 1-7: New USB device found, idVendor=1bcf, idProduct=2b8c, bcdDevice=47.14 usb 1-7: New USB device strings: Mfr=1, Product=2, SerialNumber=0 usb 1-7: Product: Integrated_Webcam_HD usb 1-7: Manufacturer: SunplusIT Inc usb 1-7: Found UVC 1.00 device Integrated_Webcam_HD (1bcf:2b8c) input: Integrated_Webcam_HD: Integrate as /devices/pci0000:00/0000:00:14.0/usb1/1-7/1-7:1.0/input/input16 systemd 249 running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA +SMACK +SECCOMP -GCRYPT +GNUTLS +OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 +IDN2 -IDN +IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY -P11KIT -QRENCODE -BZIP2 +LZ4 +XZ -ZLIB +ZSTD +XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified) Detected architecture x86-64. Bluetooth: hci0: using NVM file: qca/nvm_usb_00000302.bin /lib/systemd/system/gpm.service:7: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether. Queued start job for default target Graphical Interface. Created slice Slice /system/getty. Created slice Slice /system/modprobe. Created slice Slice /system/systemd-fsck. Created slice User and Session Slice. Started Dispatch Password Requests to Console Directory Watch. Started Forward Password Requests to Wall Directory Watch. Set up automount Arbitrary Executable File Formats File System Automount Point. Reached target Remote File Systems. Reached target Slice Units. Reached target Swaps. Listening on Process Core Dump Socket. Listening on initctl Compatibility Named Pipe. Condition check resulted in Journal Audit Socket being skipped. Listening on Journal Socket (/dev/log). Listening on Journal Socket. Listening on Network Service Netlink Socket. Listening on udev Control Socket. Listening on udev Kernel Socket. Mounting Huge Pages File System... Mounting POSIX Message Queue File System... Mounting Kernel Debug File System... Mounting Kernel Trace File System... tmp.mount: Directory /tmp to mount over is not empty, mounting anyway. Mounting Temporary Directory /tmp... Condition check resulted in Create List of Static Device Nodes being skipped. Starting Load Kernel Module configfs... Starting Load Kernel Module drm... Starting Load Kernel Module fuse... Condition check resulted in Set Up Additional Binary Formats being skipped. Starting File System Check on Root Device... Starting Journal Service... Condition check resulted in Load Kernel Modules being skipped. Starting Apply Kernel Variables... Starting Coldplug All udev Devices... Started Journal Service. EXT4-fs (nvme0n1p2): re-mounted. Opts: (null). Quota mode: disabled. EXT4-fs (nvme0n1p3): mounted filesystem with ordered data mode. Opts: (null). Quota mode: disabled. [drm] PCIE GART of 1024M enabled (table at 0x000000F400000000). BUG: kernel NULL pointer dereference, address: 0000000000000020 #PF: supervisor write access in kernel mode #PF: error_code(0x0002) - not-present page PGD 0 P4D 0 Oops: 0002 [#1] SMP NOPTI CPU: 1 PID: 472 Comm: X Tainted: G U I 5.14.0-rc3-agd5f+ #1279 Hardware name: Alienware Alienware 15 R2/0H6J09, BIOS 1.13.1 06/10/2021 RIP: 0010:mutex_lock+0x14/0x30 Code: c3 0f 1f 44 00 00 ba 02 01 00 00 e9 c6 fc ff ff cc cc cc cc cc cc 53 48 89 fb e8 e7 f3 ff ff 65 48 8b 0c 25 80 7c 01 00 31 c0 <f0> 48 0f b1 0b 74 06 48 89 df 5b eb 0f 5b c3 66 2e 0f 1f 84 00 00 RSP: 0018:ffff8881123c7410 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffff8881130eab80 RDX: ffffffff837a3b20 RSI: ffffffff82f21500 RDI: 0000000000000020 RBP: ffff8881123c7810 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000001 R12: ffff88811b5e0000 R13: 0000000000000020 R14: ffff8881123c7440 R15: ffff888110ef3400 FS: 00007ff8f25a5e40(0000) GS:ffff8888a1c40000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000020 CR3: 000000010febe003 CR4: 00000000001706a0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Call Trace: ? flush_workqueue+0x8e/0x560 ? amdgpu_dm_atomic_commit_tail+0x481/0x2630 ? atom_put_dst+0x251/0x460 ? kfree+0x179/0x2d0 ? amdgpu_atom_execute_table_locked+0x299/0x350 ? kfree+0x179/0x2d0 ? atom_op_and+0xc7/0x1a0 ? __cond_resched+0x11/0x40 ? __ww_mutex_lock+0x41/0x840 ? kmem_cache_alloc_trace+0x152/0x260 ? dm_plane_helper_prepare_fb+0x1ba/0x240 ? commit_tail+0x8f/0x170 ? drm_atomic_helper_commit+0x1f2/0x210 ? drm_atomic_helper_commit_duplicated_state+0xf5/0x100 ? drm_atomic_helper_resume+0xbc/0x150 ? dm_resume.llvm.5009353506756501165+0x5b9/0x630 ? amdgpu_device_resume+0x1a4/0x3f0 ? amdgpu_pmops_runtime_resume+0xa2/0xd0 ? pci_pm_runtime_resume+0xa2/0xe0 ? pci_pm_runtime_suspend+0x180/0x180 ? __rpm_callback+0x95/0x320 ? ep_poll_callback+0x88/0x210 ? __mod_memcg_lruvec_state+0x35/0xe0 ? pci_pm_runtime_suspend+0x180/0x180 ? rpm_resume+0x4a7/0x780 ? __flush_work.llvm.17749977397669205720+0x7d/0x280 ? __pm_runtime_resume+0x53/0x70 ? amdgpu_driver_open_kms+0x57/0x210 ? drm_file_alloc+0x19a/0x260 ? drm_open+0xd8/0x210 ? drm_stub_open+0xa2/0x120 ? chrdev_open.llvm.10459766552443321194+0xe2/0x1e0 ? cd_forget+0x60/0x60 ? do_dentry_open+0x135/0x340 ? path_openat+0x8df/0xbb0 ? kmem_cache_free+0x151/0x230 ? do_filp_open+0xa8/0x130 ? do_sys_openat2+0x80/0x170 ? __x64_sys_openat+0x6a/0x70 ? do_syscall_64+0x70/0xa0 ? entry_SYSCALL_64_after_hwframe+0x44/0xae Modules linked in: CR2: 0000000000000020 ---[ end trace 6afaf9921664f04e ]--- RIP: 0010:mutex_lock+0x14/0x30 Code: c3 0f 1f 44 00 00 ba 02 01 00 00 e9 c6 fc ff ff cc cc cc cc cc cc 53 48 89 fb e8 e7 f3 ff ff 65 48 8b 0c 25 80 7c 01 00 31 c0 <f0> 48 0f b1 0b 74 06 48 89 df 5b eb 0f 5b c3 66 2e 0f 1f 84 00 00 RSP: 0018:ffff8881123c7410 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffff8881130eab80 RDX: ffffffff837a3b20 RSI: ffffffff82f21500 RDI: 0000000000000020 RBP: ffff8881123c7810 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000001 R12: ffff88811b5e0000 R13: 0000000000000020 R14: ffff8881123c7440 R15: ffff888110ef3400 FS: 00007ff8f25a5e40(0000) GS:ffff8888a1c40000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000020 CR3: 000000010febe003 CR4: 00000000001706a0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Syncing filesystems and block devices. Sending SIGTERM to remaining processes... On Wed, 18 Aug 2021 at 03:08, Mike Lothian <mike@fireburn.co.uk<mailto:mike@fireburn.co.uk>> wrote: Hi I've just noticed something similar when starting weston, I still see it with this patch, but not on linus's tree I'll confirm for sure tomorrow and send the stack trace if I can save it Cheers Mike On Tue, 3 Aug 2021 at 02:56, Chen, Guchun <Guchun.Chen@amd.com<mailto:Guchun.Chen@amd.com>> wrote: [Public] Hi Alex, I submitted the patch before your message, I will take care of this next time. Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com<mailto:alexdeucher@gmail.com>> Sent: Monday, August 2, 2021 9:35 PM To: Chen, Guchun <Guchun.Chen@amd.com<mailto:Guchun.Chen@amd.com>> Cc: Christian König <ckoenig.leichtzumerken@gmail.com<mailto:ckoenig.leichtzumerken@gmail.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>; Gao, Likun <Likun.Gao@amd.com<mailto:Likun.Gao@amd.com>>; Koenig, Christian <Christian.Koenig@amd.com<mailto:Christian.Koenig@amd.com>>; Zhang, Hawking <Hawking.Zhang@amd.com<mailto:Hawking.Zhang@amd.com>>; Deucher, Alexander <Alexander.Deucher@amd.com<mailto:Alexander.Deucher@amd.com>> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com<mailto:Guchun.Chen@amd.com>> wrote: > > [Public] > > Thank you, Christian. > > Regarding fence_drv.initialized, it looks to a bit redundant, anyway let me look into this more. Does this patch fix this bug? https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C82f9e022b7d54387f0dd08d961eda83b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637648495656963126%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=LEUfvxvXNo5BSxy9ZWMG2sCmhS0%2FJN3boUh6c1kOTXo%3D&reserved=0> If so, please add: Bug: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C82f9e022b7d54387f0dd08d961eda83b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637648495656973118%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=w0cgvYWrUdxKUmIavnhArY2DkS2IYxuWLb%2FYHNB0%2BmM%3D&reserved=0> to the commit message. Alex > > Regards, > Guchun > > -----Original Message----- > From: Christian König <ckoenig.leichtzumerken@gmail.com<mailto:ckoenig.leichtzumerken@gmail.com>> > Sent: Monday, August 2, 2021 2:56 PM > To: Chen, Guchun <Guchun.Chen@amd.com<mailto:Guchun.Chen@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>; > Gao, Likun <Likun.Gao@amd.com<mailto:Likun.Gao@amd.com>>; Koenig, Christian > <Christian.Koenig@amd.com<mailto:Christian.Koenig@amd.com>>; Zhang, Hawking <Hawking.Zhang@amd.com<mailto:Hawking.Zhang@amd.com>>; > Deucher, Alexander <Alexander.Deucher@amd.com<mailto:Alexander.Deucher@amd.com>> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver > fini in s3 test (v2) > > Am 02.08.21 um 07:16 schrieb Guchun Chen: > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to > > stop scheduler in s3 test, otherwise, fence related failure will > > arrive after resume. To fix this and for a better clean up, move > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > > driver shutdown, and should never be called in hw_fini. > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > > to keep sw_init and sw_fini paired. > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > Suggested-by: Christian König <christian.koenig@amd.com<mailto:christian.koenig@amd.com>> > > Signed-off-by: Guchun Chen <guchun.chen@amd.com<mailto:guchun.chen@amd.com>> > > It's a bit ambiguous now what fence_drv.initialized means, but I think we can live with that for now. > > Patch is Reviewed-by: Christian König <christian.koenig@amd.com<mailto:christian.koenig@amd.com>>. > > Regards, > Christian. > > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > index b1d2dc39e8be..9e53ff851496 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > > *adev, > > > > fence_driver_init: > > /* Fence driver */ > > - r = amdgpu_fence_driver_init(adev); > > + r = amdgpu_fence_driver_sw_init(adev); > > if (r) { > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init > > + failed\n"); > > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > > goto failed; > > } > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) > > } > > amdgpu_fence_driver_hw_init(adev); > > > > - > > r = amdgpu_device_ip_late_init(adev); > > if (r) > > return r; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > index 49c5c7331c53..7495911516c2 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > } > > > > /** > > - * amdgpu_fence_driver_init - init the fence driver > > + * amdgpu_fence_driver_sw_init - init the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > * amdgpu_fence_driver_start_ring(). > > * Returns 0 for success. > > */ > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > { > > return 0; > > } > > > > /** > > - * amdgpu_fence_driver_fini - tear down the fence driver > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > > amdgpu_device *adev) > > > > if (!ring || !ring->fence_drv.initialized) > > continue; > > - if (!ring->no_scheduler) > > - drm_sched_fini(&ring->sched); > > + > > /* You can't wait for HW to signal if it's gone */ > > if (!drm_dev_is_unplugged(&adev->ddev)) > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 > > +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > > continue; > > > > + if (!ring->no_scheduler) > > + drm_sched_fini(&ring->sched); > > + > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > dma_fence_put(ring->fence_drv.fences[j]); > > kfree(ring->fence_drv.fences); diff --git > > a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > index 27adffa7658d..9c11ced4312c 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > struct dma_fence **fences; > > }; > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring > > *ring); > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > struct amdgpu_irq_src *irq_src, > > unsigned irq_type); > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, > > unsigned flags); > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, [-- Attachment #2: Type: text/html, Size: 84858 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-18 2:23 ` Chen, Guchun @ 2021-08-18 8:13 ` Mike Lothian 0 siblings, 0 replies; 17+ messages in thread From: Mike Lothian @ 2021-08-18 8:13 UTC (permalink / raw) To: Chen, Guchun Cc: Alex Deucher, Christian König, amd-gfx, Gao, Likun, Koenig, Christian, Zhang, Hawking, Deucher, Alexander [-- Attachment #1: Type: text/plain, Size: 73792 bytes --] Hi That's correct, I don't use wayland often, it seems trying to get hidpi, video acceleration and games to work all at once on a PRIME system isn't yet possible, so I test it out every now and then I noticed the above stack trace trying out a wayland enabled sddm which uses weston fullscreen, but I reproduced it with gdm too Cheers Mike On Wed, 18 Aug 2021 at 03:23, Chen, Guchun <Guchun.Chen@amd.com> wrote: > [Public] > > > > Hi Mike, > > > > Thanks for your info. So with Weston, the issue can be observed, while > with X, no such issue? > > > > Regards, > > Guchun > > > > *From:* Mike Lothian <mike@fireburn.co.uk> > *Sent:* Wednesday, August 18, 2021 10:12 AM > *To:* Chen, Guchun <Guchun.Chen@amd.com> > *Cc:* Alex Deucher <alexdeucher@gmail.com>; Christian König < > ckoenig.leichtzumerken@gmail.com>; amd-gfx@lists.freedesktop.org; Gao, > Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; > Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander < > Alexander.Deucher@amd.com> > *Subject:* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini > in s3 test (v2) > > > > Here's the dmesg > > > > Linux version 5.14.0-rc3-agd5f+ (root@axion.fireburn.co.uk) (clang > version 12.0.1, LLD 12.0.1) #1279 SMP Tue Aug 17 02:23:10 BST 2021 > Command line: > KERNEL supported cpus: > Intel GenuineIntel > x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers' > x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers' > x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers' > x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers' > x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR' > x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256 > x86/fpu: xstate_offset[3]: 832, xstate_sizes[3]: 64 > x86/fpu: xstate_offset[4]: 896, xstate_sizes[4]: 64 > x86/fpu: Enabled xstate features 0x1f, context size is 960 bytes, using > 'compacted' format. > signal: max sigframe size: 2032 > BIOS-provided physical RAM map: > BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable > BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved > BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable > BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved > BIOS-e820: [mem 0x0000000000100000-0x00000000312bafff] usable > BIOS-e820: [mem 0x00000000312bb000-0x00000000312ccfff] reserved > BIOS-e820: [mem 0x00000000312cd000-0x00000000312e5fff] usable > BIOS-e820: [mem 0x00000000312e6000-0x00000000312e6fff] ACPI NVS > BIOS-e820: [mem 0x00000000312e7000-0x0000000031330fff] reserved > BIOS-e820: [mem 0x0000000031331000-0x000000003138bfff] usable > BIOS-e820: [mem 0x000000003138c000-0x0000000031aaafff] reserved > BIOS-e820: [mem 0x0000000031aab000-0x00000000362a0fff] usable > BIOS-e820: [mem 0x00000000362a1000-0x00000000372bbfff] reserved > BIOS-e820: [mem 0x00000000372bc000-0x00000000372fafff] ACPI data > BIOS-e820: [mem 0x00000000372fb000-0x000000003789afff] ACPI NVS > BIOS-e820: [mem 0x000000003789b000-0x0000000037ffefff] reserved > BIOS-e820: [mem 0x0000000037fff000-0x0000000037ffffff] usable > BIOS-e820: [mem 0x0000000038000000-0x00000000380fffff] reserved > BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved > BIOS-e820: [mem 0x00000000fe000000-0x00000000fe010fff] reserved > BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved > BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved > BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved > BIOS-e820: [mem 0x0000000100000000-0x00000008c1ffffff] usable > NX (Execute Disable) protection: active > e820: update [mem 0x310ad018-0x310bcc57] usable ==> usable > e820: update [mem 0x310ad018-0x310bcc57] usable ==> usable > e820: update [mem 0x3109c018-0x310ac057] usable ==> usable > e820: update [mem 0x3109c018-0x310ac057] usable ==> usable > extended physical RAM map: > reserve setup_data: [mem 0x0000000000000000-0x0000000000057fff] usable > reserve setup_data: [mem 0x0000000000058000-0x0000000000058fff] reserved > reserve setup_data: [mem 0x0000000000059000-0x000000000009dfff] usable > reserve setup_data: [mem 0x000000000009e000-0x000000000009ffff] reserved > reserve setup_data: [mem 0x0000000000100000-0x000000003109c017] usable > reserve setup_data: [mem 0x000000003109c018-0x00000000310ac057] usable > reserve setup_data: [mem 0x00000000310ac058-0x00000000310ad017] usable > reserve setup_data: [mem 0x00000000310ad018-0x00000000310bcc57] usable > reserve setup_data: [mem 0x00000000310bcc58-0x00000000312bafff] usable > reserve setup_data: [mem 0x00000000312bb000-0x00000000312ccfff] reserved > reserve setup_data: [mem 0x00000000312cd000-0x00000000312e5fff] usable > reserve setup_data: [mem 0x00000000312e6000-0x00000000312e6fff] ACPI NVS > reserve setup_data: [mem 0x00000000312e7000-0x0000000031330fff] reserved > reserve setup_data: [mem 0x0000000031331000-0x000000003138bfff] usable > reserve setup_data: [mem 0x000000003138c000-0x0000000031aaafff] reserved > reserve setup_data: [mem 0x0000000031aab000-0x00000000362a0fff] usable > reserve setup_data: [mem 0x00000000362a1000-0x00000000372bbfff] reserved > reserve setup_data: [mem 0x00000000372bc000-0x00000000372fafff] ACPI data > reserve setup_data: [mem 0x00000000372fb000-0x000000003789afff] ACPI NVS > reserve setup_data: [mem 0x000000003789b000-0x0000000037ffefff] reserved > reserve setup_data: [mem 0x0000000037fff000-0x0000000037ffffff] usable > reserve setup_data: [mem 0x0000000038000000-0x00000000380fffff] reserved > reserve setup_data: [mem 0x00000000e0000000-0x00000000efffffff] reserved > reserve setup_data: [mem 0x00000000fe000000-0x00000000fe010fff] reserved > reserve setup_data: [mem 0x00000000fec00000-0x00000000fec00fff] reserved > reserve setup_data: [mem 0x00000000fee00000-0x00000000fee00fff] reserved > reserve setup_data: [mem 0x00000000ff000000-0x00000000ffffffff] reserved > reserve setup_data: [mem 0x0000000100000000-0x00000008c1ffffff] usable > efi: EFI v2.40 by American Megatrends > efi: ESRT=0x37f83018 ACPI=0x372c8000 ACPI 2.0=0x372c8000 SMBIOS=0x37ecd000 > SMBIOS 2.8 present. > DMI: Alienware Alienware 15 R2/0H6J09, BIOS 1.13.1 06/10/2021 > tsc: Detected 2700.000 MHz processor > tsc: Detected 2699.909 MHz TSC > e820: update [mem 0x00000000-0x00000fff] usable ==> reserved > e820: remove [mem 0x000a0000-0x000fffff] usable > last_pfn = 0x8c2000 max_arch_pfn = 0x400000000 > x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT > last_pfn = 0x38000 max_arch_pfn = 0x400000000 > esrt: Reserving ESRT space from 0x0000000037f83018 to 0x0000000037f83050. > Kernel/User page tables isolation: disabled on command line. > Using GB pages for direct mapping > Secure boot disabled > ACPI: Early table checksum verification disabled > ACPI: RSDP 0x00000000372C8000 000024 (v02 ALWARE) > ACPI: XSDT 0x00000000372C80A8 0000CC (v01 ALWARE ALIENWRE 01072009 AMI > 00010013) > ACPI: FACP 0x00000000372EBF70 00010C (v05 ALWARE ALIENWRE 01072009 AMI > 00010013) > ACPI: DSDT 0x00000000372C8200 023D6B (v02 ALWARE ALIENWRE 01072009 INTL > 20120913) > ACPI: FACS 0x0000000037899F80 000040 > ACPI: APIC 0x00000000372EC080 0000BC (v03 ALWARE ALIENWRE 01072009 AMI > 00010013) > ACPI: FPDT 0x00000000372EC140 000044 (v01 ALWARE ALIENWRE 01072009 AMI > 00010013) > ACPI: FIDT 0x00000000372EC188 00009C (v01 ALWARE ALIENWRE 01072009 AMI > 00010013) > ACPI: MCFG 0x00000000372EC228 00003C (v01 ALWARE ALIENWRE 01072009 MSFT > 00000097) > ACPI: HPET 0x00000000372EC268 000038 (v01 ALWARE ALIENWRE 01072009 AMI. > 0005000B) > ACPI: SSDT 0x00000000372EC2A0 0004B9 (v01 SataRe SataTabl 00001000 INTL > 20120913) > ACPI: LPIT 0x00000000372EC760 000094 (v01 INTEL SKL 00000000 MSFT > 0000005F) > ACPI: SSDT 0x00000000372EC7F8 000248 (v02 INTEL sensrhub 00000000 INTL > 20120913) > ACPI: SSDT 0x00000000372ECA40 002BAE (v02 INTEL PtidDevc 00001000 INTL > 20120913) > ACPI: DBGP 0x00000000372EF5F0 000034 (v01 INTEL 00000000 MSFT > 0000005F) > ACPI: DBG2 0x00000000372EF628 000054 (v00 INTEL 00000000 MSFT > 0000005F) > ACPI: SSDT 0x00000000372EF680 00069D (v02 INTEL xh_rvp10 00000000 INTL > 20120913) > ACPI: SSDT 0x00000000372EFD20 002DB7 (v02 DptfTa DptfTabl 00001000 INTL > 20120913) > ACPI: SSDT 0x00000000372F2AD8 00559B (v02 SaSsdt SaSsdt 00003000 INTL > 20120913) > ACPI: UEFI 0x00000000372F8078 000042 (v01 00000000 > 00000000) > ACPI: SSDT 0x00000000372F80C0 000E58 (v02 CpuRef CpuSsdt 00003000 INTL > 20120913) > ACPI: SSDT 0x00000000372F8F18 0000CE (v02 SgRef SgPeg 00001000 INTL > 20120913) > ACPI: DMAR 0x00000000372F8FE8 0000A8 (v01 INTEL SKL 00000001 INTL > 00000001) > ACPI: BGRT 0x00000000372F9090 000038 (v01 ALWARE ALIENWRE 01072009 AMI > 00010013) > ACPI: SSDT 0x00000000372F90C8 001216 (v01 AmdRef AmdTabl 00001000 INTL > 20120913) > ACPI: Reserving FACP table memory at [mem 0x372ebf70-0x372ec07b] > ACPI: Reserving DSDT table memory at [mem 0x372c8200-0x372ebf6a] > ACPI: Reserving FACS table memory at [mem 0x37899f80-0x37899fbf] > ACPI: Reserving APIC table memory at [mem 0x372ec080-0x372ec13b] > ACPI: Reserving FPDT table memory at [mem 0x372ec140-0x372ec183] > ACPI: Reserving FIDT table memory at [mem 0x372ec188-0x372ec223] > ACPI: Reserving MCFG table memory at [mem 0x372ec228-0x372ec263] > ACPI: Reserving HPET table memory at [mem 0x372ec268-0x372ec29f] > ACPI: Reserving SSDT table memory at [mem 0x372ec2a0-0x372ec758] > ACPI: Reserving LPIT table memory at [mem 0x372ec760-0x372ec7f3] > ACPI: Reserving SSDT table memory at [mem 0x372ec7f8-0x372eca3f] > ACPI: Reserving SSDT table memory at [mem 0x372eca40-0x372ef5ed] > ACPI: Reserving DBGP table memory at [mem 0x372ef5f0-0x372ef623] > ACPI: Reserving DBG2 table memory at [mem 0x372ef628-0x372ef67b] > ACPI: Reserving SSDT table memory at [mem 0x372ef680-0x372efd1c] > ACPI: Reserving SSDT table memory at [mem 0x372efd20-0x372f2ad6] > ACPI: Reserving SSDT table memory at [mem 0x372f2ad8-0x372f8072] > ACPI: Reserving UEFI table memory at [mem 0x372f8078-0x372f80b9] > ACPI: Reserving SSDT table memory at [mem 0x372f80c0-0x372f8f17] > ACPI: Reserving SSDT table memory at [mem 0x372f8f18-0x372f8fe5] > ACPI: Reserving DMAR table memory at [mem 0x372f8fe8-0x372f908f] > ACPI: Reserving BGRT table memory at [mem 0x372f9090-0x372f90c7] > ACPI: Reserving SSDT table memory at [mem 0x372f90c8-0x372fa2dd] > Zone ranges: > DMA [mem 0x0000000000001000-0x0000000000ffffff] > DMA32 [mem 0x0000000001000000-0x00000000ffffffff] > Normal [mem 0x0000000100000000-0x00000008c1ffffff] > Device empty > Movable zone start for each node > Early memory node ranges > node 0: [mem 0x0000000000001000-0x0000000000057fff] > node 0: [mem 0x0000000000059000-0x000000000009dfff] > node 0: [mem 0x0000000000100000-0x00000000312bafff] > node 0: [mem 0x00000000312cd000-0x00000000312e5fff] > node 0: [mem 0x0000000031331000-0x000000003138bfff] > node 0: [mem 0x0000000031aab000-0x00000000362a0fff] > node 0: [mem 0x0000000037fff000-0x0000000037ffffff] > node 0: [mem 0x0000000100000000-0x00000008c1ffffff] > Initmem setup node 0 [mem 0x0000000000001000-0x00000008c1ffffff] > On node 0, zone DMA: 1 pages in unavailable ranges > On node 0, zone DMA: 1 pages in unavailable ranges > On node 0, zone DMA: 98 pages in unavailable ranges > On node 0, zone DMA32: 18 pages in unavailable ranges > On node 0, zone DMA32: 75 pages in unavailable ranges > On node 0, zone DMA32: 1823 pages in unavailable ranges > On node 0, zone DMA32: 7518 pages in unavailable ranges > On node 0, zone Normal: 24576 pages in unavailable ranges > Reserving Intel graphics memory at [mem 0x39000000-0x3cffffff] > ACPI: PM-Timer IO Port: 0x1808 > ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x05] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x06] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x07] high edge lint[0x1]) > ACPI: LAPIC_NMI (acpi_id[0x08] high edge lint[0x1]) > IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-119 > ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) > ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) > ACPI: Using ACPI (MADT) for SMP configuration information > ACPI: HPET id: 0x8086a701 base: 0xfed00000 > e820: update [mem 0x345ec000-0x34775fff] usable ==> reserved > TSC deadline timer available > smpboot: Allowing 8 CPUs, 0 hotplug CPUs > [mem 0x3d000000-0xdfffffff] available for PCI devices > clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, > max_idle_ns: 1910969940391419 ns > setup_percpu: NR_CPUS:16 nr_cpumask_bits:16 nr_cpu_ids:8 nr_node_ids:1 > percpu: Embedded 54 pages/cpu s182104 r8192 d30888 u262144 > pcpu-alloc: s182104 r8192 d30888 u262144 alloc=1*2097152 > pcpu-alloc: [0] 0 1 2 3 4 5 6 7 > Built 1 zonelists, mobility grouping on. Total pages: 8223801 > Kernel command line: root=/dev/nvme0n1p2 rootfstype=ext4 > libahci.ignore_sss=1 init=/usr/lib/systemd/systemd > systemd.unified_cgroup_hierarchy=1 cgroup_no_v1=all > psmouse.synaptics_intertouch=1 mitigations=off mds=off pti=off > spectre_v2=off l1tf=off nospec_store_bypass_disable printk.devkmsg=on > amdgpu.resize_bar=1 i915.enable_guc=3 dell_smm_hwmon.force=1 > Setting dangerous option i915.enable_guc - tainting kernel > Unknown command line parameters: nospec_store_bypass_disable pti=off > spectre_v2=off > printk: log_buf_len individual max cpu contribution: 131072 bytes > printk: log_buf_len total cpu_extra contributions: 917504 bytes > printk: log_buf_len min size: 262144 bytes > printk: log_buf_len: 2097152 bytes > printk: early log buf free: 248144(94%) > Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes, > linear) > Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes, linear) > mem auto-init: stack:all(zero), heap alloc:off, heap free:off > Memory: 32648724K/33417992K available (22540K kernel code, 2395K rwdata, > 10548K rodata, 1112K init, 2464K bss, 769012K reserved, 0K cma-reserved) > random: get_random_u64 called from cache_random_seq_create+0x52/0x1b0 with > crng_init=0 > SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 > rcu: Hierarchical RCU implementation. > rcu: RCU event tracing is enabled. > rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=8. > Tracing variant of Tasks RCU enabled. > rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies. > rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 > NR_IRQS: 4352, nr_irqs: 2048, preallocated irqs: 16 > random: crng done (trusting CPU's manufacturer) > spurious 8259A interrupt: IRQ7. > Console: colour dummy device 80x25 > printk: console [tty0] enabled > ACPI: Core revision 20210604 > clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: > 79635855245 ns > APIC: Switch to symmetric I/O mode setup > DMAR: Host address width 39 > DMAR: DRHD base: 0x000000fed90000 flags: 0x0 > DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap > 7e3ff0501e > DMAR: DRHD base: 0x000000fed91000 flags: 0x1 > DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap d2008c40660462 ecap f050da > DMAR: RMRR base: 0x000000371e5000 end: 0x00000037204fff > DMAR: RMRR base: 0x00000038800000 end: 0x0000003cffffff > DMAR: [Firmware Bug]: No firmware reserved region can cover this RMRR > [0x0000000038800000-0x000000003cffffff], contact BIOS vendor for fixes > DMAR: [Firmware Bug]: Your BIOS is broken; bad RMRR > [0x0000000038800000-0x000000003cffffff] > BIOS vendor: Alienware; Ver: 1.13.1; Product Version: 1.13.1 > DMAR-IR: IOAPIC id 2 under DRHD base 0xfed91000 IOMMU 1 > DMAR-IR: HPET id 0 under DRHD base 0xfed91000 > DMAR-IR: Enabled IRQ remapping in xapic mode > ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 > clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: > 0x26eae8729ef, max_idle_ns: 440795235156 ns > Calibrating delay loop (skipped), value calculated using timer frequency.. > 5399.81 BogoMIPS (lpj=2699909) > pid_max: default: 32768 minimum: 301 > Mount-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) > Mountpoint-cache hash table entries: 65536 (order: 7, 524288 bytes, linear) > Disabling cpuset control group subsystem in v1 mounts > Disabling cpu control group subsystem in v1 mounts > Disabling cpuacct control group subsystem in v1 mounts > Disabling io control group subsystem in v1 mounts > Disabling memory control group subsystem in v1 mounts > Disabling devices control group subsystem in v1 mounts > Disabling freezer control group subsystem in v1 mounts > Disabling net_cls control group subsystem in v1 mounts > Disabling net_prio control group subsystem in v1 mounts > Disabling hugetlb control group subsystem in v1 mounts > Disabling pids control group subsystem in v1 mounts > Disabling rdma control group subsystem in v1 mounts > Disabling misc control group subsystem in v1 mounts > CPU0: Thermal monitoring enabled (TM1) > process: using mwait in idle threads > Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8 > Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4 > Speculative Store Bypass: Vulnerable > TAA: Mitigation: TSX disabled > SRBDS: Vulnerable > Freeing SMP alternatives memory: 60K > smpboot: Estimated ratio of average max frequency by base frequency (times > 1024): 1213 > smpboot: CPU0: Intel(R) Core(TM) i7-6820HK CPU @ 2.70GHz (family: 0x6, > model: 0x5e, stepping: 0x3) > Performance Events: PEBS fmt3+, Skylake events, 32-deep LBR, full-width > counters, Intel PMU driver. > ... version: 4 > ... bit width: 48 > ... generic registers: 4 > ... value mask: 0000ffffffffffff > ... max period: 00007fffffffffff > ... fixed-purpose events: 3 > ... event mask: 000000070000000f > rcu: Hierarchical SRCU implementation. > smp: Bringing up secondary CPUs ... > x86: Booting SMP configuration: > .... node #0, CPUs: #1 #2 #3 #4 #5 #6 #7 > smp: Brought up 1 node, 8 CPUs > smpboot: Max logical packages: 1 > smpboot: Total of 8 processors activated (43198.54 BogoMIPS) > devtmpfs: initialized > x86/mm: Memory block size: 128MB > ACPI: PM: Registering ACPI NVS region [mem 0x312e6000-0x312e6fff] (4096 > bytes) > ACPI: PM: Registering ACPI NVS region [mem 0x372fb000-0x3789afff] (5898240 > bytes) > clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, > max_idle_ns: 1911260446275000 ns > futex hash table entries: 2048 (order: 5, 131072 bytes, linear) > NET: Registered PF_NETLINK/PF_ROUTE protocol family > thermal_sys: Registered thermal governor 'step_wise' > cpuidle: using governor ladder > cpuidle: using governor menu > HugeTLB: can free 4094 vmemmap pages for hugepages-1048576kB > ACPI FADT declares the system doesn't support PCIe ASPM, so disable it > ACPI: bus type PCI registered > acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 > PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] > (base 0xe0000000) > PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820 > PCI: Using configuration type 1 for base access > ENERGY_PERF_BIAS: Set to 'normal', was 'performance' > HugeTLB: can free 6 vmemmap pages for hugepages-2048kB > HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages > HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages > cryptd: max_cpu_qlen set to 1000 > fbcon: Taking over console > ACPI: Added _OSI(Module Device) > ACPI: Added _OSI(Processor Device) > ACPI: Added _OSI(3.0 _SCP Extensions) > ACPI: Added _OSI(Processor Aggregator Device) > ACPI: Added _OSI(Linux-Dell-Video) > ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio) > ACPI: Added _OSI(Linux-HPI-Hybrid-Graphics) > ACPI: 10 ACPI AML tables successfully acquired and loaded > ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored > ACPI: Dynamic OEM Table Load: > ACPI: SSDT 0xFFFF8881010EF800 0005FD (v02 PmRef Cpu0Ist 00003000 INTL > 20120913) > ACPI: \_PR_.CPU0: _OSC native thermal LVT Acked > ACPI: Dynamic OEM Table Load: > ACPI: SSDT 0xFFFF8881010E4400 00037F (v02 PmRef Cpu0Cst 00003001 INTL > 20120913) > ACPI: Dynamic OEM Table Load: > ACPI: SSDT 0xFFFF8881010E8000 0005AA (v02 PmRef ApIst 00003000 INTL > 20120913) > ACPI: Dynamic OEM Table Load: > ACPI: SSDT 0xFFFF888101108A00 000119 (v02 PmRef ApCst 00003000 INTL > 20120913) > ACPI: EC: EC started > ACPI: EC: interrupt blocked > ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62 > ACPI: \_SB_.PCI0.LPCB.EC0_: Boot DSDT EC used to handle transactions > ACPI: Interpreter enabled > ACPI: PM: (supports S0 S3 S5) > ACPI: Using IOAPIC for interrupt routing > PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" > and report a bug > ACPI: Enabled 9 GPEs in block 00 to 7F > ACPI: PM: Power Resource [PG00] > ACPI: PM: Power Resource [PG01] > ACPI: PM: Power Resource [PG02] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PM: Power Resource [WRST] > ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-fe]) > acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments > MSI HPX-Type3] > acpi PNP0A08:00: _OSC: platform retains control of PCIe features (AE_ERROR) > PCI host bridge to bus 0000:00 > pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7 window] > pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window] > pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window] > pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window] > pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window] > pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window] > pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window] > pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window] > pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window] > pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window] > pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window] > pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window] > pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window] > pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff window] > pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff window] > pci_bus 0000:00: root bus resource [mem 0x3d000000-0xdfffffff window] > pci_bus 0000:00: root bus resource [mem 0xfd000000-0xfe7fffff window] > pci_bus 0000:00: root bus resource [bus 00-fe] > pci 0000:00:00.0: [8086:1910] type 00 class 0x060000 > pci 0000:00:01.0: [8086:1901] type 01 class 0x060400 > pci 0000:00:01.0: PME# supported from D0 D3hot D3cold > pci 0000:00:02.0: [8086:191b] type 00 class 0x030000 > pci 0000:00:02.0: reg 0x10: [mem 0xdb000000-0xdbffffff 64bit] > pci 0000:00:02.0: reg 0x18: [mem 0x70000000-0x7fffffff 64bit pref] > pci 0000:00:02.0: reg 0x20: [io 0xf000-0xf03f] > pci 0000:00:02.0: BAR 2: assigned to efifb > pci 0000:00:04.0: [8086:1903] type 00 class 0x118000 > pci 0000:00:04.0: reg 0x10: [mem 0xdc620000-0xdc627fff 64bit] > pci 0000:00:14.0: [8086:a12f] type 00 class 0x0c0330 > pci 0000:00:14.0: reg 0x10: [mem 0xdc610000-0xdc61ffff 64bit] > pci 0000:00:14.0: PME# supported from D3hot D3cold > pci 0000:00:14.2: [8086:a131] type 00 class 0x118000 > pci 0000:00:14.2: reg 0x10: [mem 0xdc636000-0xdc636fff 64bit] > pci 0000:00:16.0: [8086:a13a] type 00 class 0x078000 > pci 0000:00:16.0: reg 0x10: [mem 0xdc635000-0xdc635fff 64bit] > pci 0000:00:16.0: PME# supported from D3hot > pci 0000:00:17.0: [8086:a103] type 00 class 0x010601 > pci 0000:00:17.0: reg 0x10: [mem 0xdc630000-0xdc631fff] > pci 0000:00:17.0: reg 0x14: [mem 0xdc634000-0xdc6340ff] > pci 0000:00:17.0: reg 0x18: [io 0xf090-0xf097] > pci 0000:00:17.0: reg 0x1c: [io 0xf080-0xf083] > pci 0000:00:17.0: reg 0x20: [io 0xf060-0xf07f] > pci 0000:00:17.0: reg 0x24: [mem 0xdc633000-0xdc6337ff] > pci 0000:00:17.0: PME# supported from D3hot > pci 0000:00:1c.0: [8086:a110] type 01 class 0x060400 > pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold > pci 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled > pci 0000:00:1c.4: [8086:a114] type 01 class 0x060400 > pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold > pci 0000:00:1c.4: Intel SPT PCH root port ACS workaround enabled > pci 0000:00:1c.5: [8086:a115] type 01 class 0x060400 > pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold > pci 0000:00:1c.5: Intel SPT PCH root port ACS workaround enabled > pci 0000:00:1c.6: [8086:a116] type 01 class 0x060400 > pci 0000:00:1c.6: PME# supported from D0 D3hot D3cold > pci 0000:00:1c.6: Intel SPT PCH root port ACS workaround enabled > pci 0000:00:1d.0: [8086:a118] type 01 class 0x060400 > pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold > pci 0000:00:1d.0: Intel SPT PCH root port ACS workaround enabled > pci 0000:00:1f.0: [8086:a14e] type 00 class 0x060100 > pci 0000:00:1f.2: [8086:a121] type 00 class 0x058000 > pci 0000:00:1f.2: reg 0x10: [mem 0xdc62c000-0xdc62ffff] > pci 0000:00:1f.3: [8086:a170] type 00 class 0x040300 > pci 0000:00:1f.3: reg 0x10: [mem 0xdc628000-0xdc62bfff 64bit] > pci 0000:00:1f.3: reg 0x20: [mem 0xdc600000-0xdc60ffff 64bit] > pci 0000:00:1f.3: PME# supported from D3hot D3cold > pci 0000:00:1f.4: [8086:a123] type 00 class 0x0c0500 > pci 0000:00:1f.4: reg 0x10: [mem 0xdc632000-0xdc6320ff 64bit] > pci 0000:00:1f.4: reg 0x20: [io 0xf040-0xf05f] > pci 0000:01:00.0: [1002:6921] type 00 class 0x038000 > pci 0000:01:00.0: reg 0x10: [mem 0xb0000000-0xbfffffff 64bit pref] > pci 0000:01:00.0: reg 0x18: [mem 0xc0000000-0xc01fffff 64bit pref] > pci 0000:01:00.0: reg 0x20: [io 0xe000-0xe0ff] > pci 0000:01:00.0: reg 0x24: [mem 0xdc500000-0xdc53ffff] > pci 0000:01:00.0: reg 0x30: [mem 0xdc540000-0xdc55ffff pref] > pci 0000:01:00.0: supports D1 D2 > pci 0000:01:00.0: PME# supported from D1 D2 D3hot D3cold > pci 0000:01:00.0: 63.008 Gb/s available PCIe bandwidth, limited by 8.0 > GT/s PCIe x8 link at 0000:00:01.0 (capable of 126.016 Gb/s with 8.0 GT/s > PCIe x16 link) > pci 0000:00:01.0: PCI bridge to [bus 01] > pci 0000:00:01.0: bridge window [io 0xe000-0xefff] > pci 0000:00:01.0: bridge window [mem 0xdc500000-0xdc5fffff] > pci 0000:00:01.0: bridge window [mem 0xb0000000-0xc01fffff 64bit pref] > acpiphp: Slot [1] registered > pci 0000:00:1c.0: PCI bridge to [bus 02-3a] > pci 0000:00:1c.0: bridge window [mem 0xc4000000-0xda0fffff] > pci 0000:00:1c.0: bridge window [mem 0x80000000-0xa1ffffff 64bit pref] > pci 0000:3b:00.0: [1969:e0a1] type 00 class 0x020000 > pci 0000:3b:00.0: reg 0x10: [mem 0xdc400000-0xdc43ffff 64bit] > pci 0000:3b:00.0: reg 0x18: [io 0xd000-0xd07f] > pci 0000:3b:00.0: PME# supported from D0 D1 D2 D3hot D3cold > pci 0000:00:1c.4: PCI bridge to [bus 3b] > pci 0000:00:1c.4: bridge window [io 0xd000-0xdfff] > pci 0000:00:1c.4: bridge window [mem 0xdc400000-0xdc4fffff] > pci 0000:3c:00.0: [168c:003e] type 00 class 0x028000 > pci 0000:3c:00.0: reg 0x10: [mem 0xdc000000-0xdc1fffff 64bit] > pci 0000:3c:00.0: PME# supported from D0 D3hot D3cold > pci 0000:00:1c.5: PCI bridge to [bus 3c] > pci 0000:00:1c.5: bridge window [mem 0xdc000000-0xdc1fffff] > pci 0000:3d:00.0: [10ec:5227] type 00 class 0xff0000 > pci 0000:3d:00.0: reg 0x10: [mem 0xdc300000-0xdc300fff] > pci 0000:3d:00.0: supports D1 D2 > pci 0000:3d:00.0: PME# supported from D1 D2 D3hot D3cold > pci 0000:00:1c.6: PCI bridge to [bus 3d] > pci 0000:00:1c.6: bridge window [mem 0xdc300000-0xdc3fffff] > pci 0000:3e:00.0: [144d:a802] type 00 class 0x010802 > pci 0000:3e:00.0: reg 0x10: [mem 0xdc200000-0xdc203fff 64bit] > pci 0000:3e:00.0: reg 0x18: [io 0xc000-0xc0ff] > pci 0000:00:1d.0: PCI bridge to [bus 3e] > pci 0000:00:1d.0: bridge window [io 0xc000-0xcfff] > pci 0000:00:1d.0: bridge window [mem 0xdc200000-0xdc2fffff] > pci_bus 0000:00: on NUMA node 0 > pci 0000:00:01.0: Max Payload Size set to 256/ 256 (was 256), Max Read > Rq 128 > pci 0000:01:00.0: Max Payload Size set to 256/ 256 (was 256), Max Read > Rq 256 > pci 0000:00:1c.0: Max Payload Size set to 256/ 256 (was 128), Max Read > Rq 128 > pci 0000:00:1c.4: Max Payload Size set to 256/ 256 (was 256), Max Read > Rq 128 > pci 0000:3b:00.0: Max Payload Size set to 256/4096 (was 256), Max Read > Rq 256 > pci 0000:00:1c.5: Max Payload Size set to 256/ 256 (was 256), Max Read > Rq 128 > pci 0000:3c:00.0: Max Payload Size set to 256/ 256 (was 256), Max Read > Rq 256 > pci 0000:00:1c.6: Max Payload Size set to 256/ 256 (was 128), Max Read > Rq 128 > pci 0000:3d:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read > Rq 128 > pci 0000:00:1d.0: Max Payload Size set to 256/ 256 (was 128), Max Read > Rq 128 > pci 0000:3e:00.0: Max Payload Size set to 128/ 128 (was 128), Max Read > Rq 128 > ACPI: PCI: Interrupt link LNKA configured for IRQ 11 > ACPI: PCI: Interrupt link LNKB configured for IRQ 10 > ACPI: PCI: Interrupt link LNKC configured for IRQ 11 > ACPI: PCI: Interrupt link LNKD configured for IRQ 11 > ACPI: PCI: Interrupt link LNKE configured for IRQ 11 > ACPI: PCI: Interrupt link LNKF configured for IRQ 11 > ACPI: PCI: Interrupt link LNKG configured for IRQ 11 > ACPI: PCI: Interrupt link LNKH configured for IRQ 11 > ACPI: EC: interrupt unblocked > ACPI: EC: event unblocked > ACPI: EC: EC_CMD/EC_SC=0x66, EC_DATA=0x62 > ACPI: EC: GPE=0x14 > ACPI: \_SB_.PCI0.LPCB.EC0_: Boot DSDT EC initialization complete > ACPI: \_SB_.PCI0.LPCB.EC0_: EC: Used to handle transactions and events > iommu: Default domain type: Passthrough > pci 0000:00:02.0: vgaarb: setting as boot VGA device > pci 0000:00:02.0: vgaarb: VGA device added: > decodes=io+mem,owns=io+mem,locks=none > pci 0000:00:02.0: vgaarb: bridge control possible > vgaarb: loaded > SCSI subsystem initialized > libata version 3.00 loaded. > ACPI: bus type USB registered > usbcore: registered new interface driver usbfs > usbcore: registered new interface driver hub > usbcore: registered new device driver usb > videodev: Linux video capture interface: v2.00 > Registered efivars operations > Advanced Linux Sound Architecture Driver Initialized. > Bluetooth: Core ver 2.22 > NET: Registered PF_BLUETOOTH protocol family > Bluetooth: HCI device and connection manager initialized > Bluetooth: HCI socket layer initialized > Bluetooth: L2CAP socket layer initialized > Bluetooth: SCO socket layer initialized > PCI: Using ACPI for IRQ routing > PCI: pci_cache_line_size set to 64 bytes > e820: reserve RAM buffer [mem 0x00058000-0x0005ffff] > e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff] > e820: reserve RAM buffer [mem 0x3109c018-0x33ffffff] > e820: reserve RAM buffer [mem 0x310ad018-0x33ffffff] > e820: reserve RAM buffer [mem 0x312bb000-0x33ffffff] > e820: reserve RAM buffer [mem 0x312e6000-0x33ffffff] > e820: reserve RAM buffer [mem 0x3138c000-0x33ffffff] > e820: reserve RAM buffer [mem 0x345ec000-0x37ffffff] > e820: reserve RAM buffer [mem 0x362a1000-0x37ffffff] > e820: reserve RAM buffer [mem 0x8c2000000-0x8c3ffffff] > wmi_bus wmi_bus-PNP0C14:01: WQBC data block query control method not found > dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.4) > hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0 > hpet0: 8 comparators, 64-bit 24.000000 MHz counter > clocksource: Switched to clocksource tsc-early > FS-Cache: Loaded > CacheFiles: Loaded > pnp: PnP ACPI init > system 00:02: [io 0x0680-0x069f] has been reserved > system 00:02: [io 0xffff] has been reserved > system 00:02: [io 0xffff] has been reserved > system 00:02: [io 0xffff] has been reserved > system 00:02: [io 0x1800-0x18fe] has been reserved > system 00:02: [io 0x164e-0x164f] has been reserved > system 00:03: [io 0x0800-0x087f] has been reserved > system 00:05: [io 0x1854-0x1857] has been reserved > system 00:06: [mem 0xfed10000-0xfed17fff] has been reserved > system 00:06: [mem 0xfed18000-0xfed18fff] has been reserved > system 00:06: [mem 0xfed19000-0xfed19fff] has been reserved > system 00:06: [mem 0xe0000000-0xefffffff] has been reserved > system 00:06: [mem 0xfed20000-0xfed3ffff] has been reserved > system 00:06: [mem 0xfed90000-0xfed93fff] could not be reserved > system 00:06: [mem 0xfed45000-0xfed8ffff] has been reserved > system 00:06: [mem 0xff000000-0xffffffff] has been reserved > system 00:06: [mem 0xfee00000-0xfeefffff] could not be reserved > system 00:06: [mem 0xdffe0000-0xdfffffff] has been reserved > system 00:07: [mem 0xfd000000-0xfdabffff] has been reserved > system 00:07: [mem 0xfdad0000-0xfdadffff] has been reserved > system 00:07: [mem 0xfdb00000-0xfdffffff] has been reserved > system 00:07: [mem 0xfe000000-0xfe01ffff] could not be reserved > system 00:07: [mem 0xfe036000-0xfe03bfff] has been reserved > system 00:07: [mem 0xfe03d000-0xfe3fffff] has been reserved > system 00:07: [mem 0xfe410000-0xfe7fffff] has been reserved > system 00:08: [mem 0xfdaf0000-0xfdafffff] has been reserved > system 00:08: [mem 0xfdae0000-0xfdaeffff] has been reserved > system 00:08: [mem 0xfdac0000-0xfdacffff] has been reserved > pnp: PnP ACPI: found 9 devices > clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: > 2085701024 ns > NET: Registered PF_INET protocol family > IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear) > tcp_listen_portaddr_hash hash table entries: 16384 (order: 6, 262144 > bytes, linear) > TCP established hash table entries: 262144 (order: 9, 2097152 bytes, > linear) > TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear) > TCP: Hash tables configured (established 262144 bind 65536) > UDP hash table entries: 16384 (order: 7, 524288 bytes, linear) > UDP-Lite hash table entries: 16384 (order: 7, 524288 bytes, linear) > NET: Registered PF_UNIX/PF_LOCAL protocol family > pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02-3a] > add_size 1000 > pci 0000:00:1c.0: BAR 13: assigned [io 0x2000-0x2fff] > pci 0000:00:01.0: PCI bridge to [bus 01] > pci 0000:00:01.0: bridge window [io 0xe000-0xefff] > pci 0000:00:01.0: bridge window [mem 0xdc500000-0xdc5fffff] > pci 0000:00:01.0: bridge window [mem 0xb0000000-0xc01fffff 64bit pref] > pci 0000:00:1c.0: PCI bridge to [bus 02-3a] > pci 0000:00:1c.0: bridge window [io 0x2000-0x2fff] > pci 0000:00:1c.0: bridge window [mem 0xc4000000-0xda0fffff] > pci 0000:00:1c.0: bridge window [mem 0x80000000-0xa1ffffff 64bit pref] > pci 0000:00:1c.4: PCI bridge to [bus 3b] > pci 0000:00:1c.4: bridge window [io 0xd000-0xdfff] > pci 0000:00:1c.4: bridge window [mem 0xdc400000-0xdc4fffff] > pci 0000:00:1c.5: PCI bridge to [bus 3c] > pci 0000:00:1c.5: bridge window [mem 0xdc000000-0xdc1fffff] > pci 0000:00:1c.6: PCI bridge to [bus 3d] > pci 0000:00:1c.6: bridge window [mem 0xdc300000-0xdc3fffff] > pci 0000:00:1d.0: PCI bridge to [bus 3e] > pci 0000:00:1d.0: bridge window [io 0xc000-0xcfff] > pci 0000:00:1d.0: bridge window [mem 0xdc200000-0xdc2fffff] > pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7 window] > pci_bus 0000:00: resource 5 [io 0x0d00-0xffff window] > pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window] > pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window] > pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window] > pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window] > pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window] > pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window] > pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window] > pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window] > pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window] > pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff window] > pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff window] > pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff window] > pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff window] > pci_bus 0000:00: resource 19 [mem 0x3d000000-0xdfffffff window] > pci_bus 0000:00: resource 20 [mem 0xfd000000-0xfe7fffff window] > pci_bus 0000:01: resource 0 [io 0xe000-0xefff] > pci_bus 0000:01: resource 1 [mem 0xdc500000-0xdc5fffff] > pci_bus 0000:01: resource 2 [mem 0xb0000000-0xc01fffff 64bit pref] > pci_bus 0000:02: resource 0 [io 0x2000-0x2fff] > pci_bus 0000:02: resource 1 [mem 0xc4000000-0xda0fffff] > pci_bus 0000:02: resource 2 [mem 0x80000000-0xa1ffffff 64bit pref] > pci_bus 0000:3b: resource 0 [io 0xd000-0xdfff] > pci_bus 0000:3b: resource 1 [mem 0xdc400000-0xdc4fffff] > pci_bus 0000:3c: resource 1 [mem 0xdc000000-0xdc1fffff] > pci_bus 0000:3d: resource 1 [mem 0xdc300000-0xdc3fffff] > pci_bus 0000:3e: resource 0 [io 0xc000-0xcfff] > pci_bus 0000:3e: resource 1 [mem 0xdc200000-0xdc2fffff] > pci 0000:00:02.0: Video device with shadowed ROM at [mem > 0x000c0000-0x000dffff] > PCI: CLS 0 bytes, default 64 > DMAR: No ATSR found > DMAR: No SATC found > DMAR: IOMMU feature fl1gp_support inconsistent > DMAR: IOMMU feature pgsel_inv inconsistent > DMAR: IOMMU feature nwfs inconsistent > DMAR: IOMMU feature eafs inconsistent > DMAR: IOMMU feature prs inconsistent > DMAR: IOMMU feature nest inconsistent > DMAR: IOMMU feature mts inconsistent > DMAR: IOMMU feature sc_support inconsistent > DMAR: IOMMU feature pass_through inconsistent > DMAR: IOMMU feature dev_iotlb_support inconsistent > DMAR: dmar0: Using Queued invalidation > DMAR: dmar1: Using Queued invalidation > pci 0000:00:00.0: Adding to iommu group 0 > pci 0000:00:01.0: Adding to iommu group 1 > pci 0000:00:02.0: Adding to iommu group 2 > pci 0000:00:04.0: Adding to iommu group 3 > pci 0000:00:14.0: Adding to iommu group 4 > pci 0000:00:14.2: Adding to iommu group 4 > pci 0000:00:16.0: Adding to iommu group 5 > pci 0000:00:17.0: Adding to iommu group 6 > pci 0000:00:1c.0: Adding to iommu group 7 > pci 0000:00:1c.4: Adding to iommu group 8 > pci 0000:00:1c.5: Adding to iommu group 9 > pci 0000:00:1c.6: Adding to iommu group 10 > pci 0000:00:1d.0: Adding to iommu group 11 > pci 0000:00:1f.0: Adding to iommu group 12 > pci 0000:00:1f.2: Adding to iommu group 12 > pci 0000:00:1f.3: Adding to iommu group 12 > pci 0000:00:1f.4: Adding to iommu group 12 > pci 0000:01:00.0: Adding to iommu group 1 > pci 0000:3b:00.0: Adding to iommu group 13 > pci 0000:3c:00.0: Adding to iommu group 14 > pci 0000:3d:00.0: Adding to iommu group 15 > pci 0000:3e:00.0: Adding to iommu group 16 > DMAR: Intel(R) Virtualization Technology for Directed I/O > PCI-DMA: Using software bounce buffering for IO (SWIOTLB) > software IO TLB: mapped [mem 0x000000002d09c000-0x000000003109c000] (64MB) > RAPL PMU: API unit is 2^-32 Joules, 5 fixed counters, 655360 ms ovfl timer > RAPL PMU: hw unit of domain pp0-core 2^-14 Joules > RAPL PMU: hw unit of domain package 2^-14 Joules > RAPL PMU: hw unit of domain dram 2^-14 Joules > RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules > RAPL PMU: hw unit of domain psys 2^-14 Joules > DMAR: DRHD: handling fault status reg 3 > DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr > 0x3a800000 [fault reason 0x06] PTE Read access is not set > DMAR: DRHD: handling fault status reg 3 > DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr > 0x3a818000 [fault reason 0x06] PTE Read access is not set > DMAR: DRHD: handling fault status reg 3 > DMAR: [DMA Read NO_PASID] Request device [0x00:0x02.0] fault addr > 0x3a852000 [fault reason 0x06] PTE Read access is not set > DMAR: DRHD: handling fault status reg 3 > Initialise system trusted keyrings > workingset: timestamp_bits=46 max_order=23 bucket_order=0 > zbud: loaded > FS-Cache: Netfs 'cifs' registered for caching > Key type cifs.idmap registered > fuse: init (API version 7.34) > NET: Registered PF_ALG protocol family > Key type asymmetric registered > Asymmetric key parser 'x509' registered > Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) > ACPI: AC: AC Adapter [ACAD] (on-line) > input: Lid Switch as > /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:40/PNP0C0D:00/input/input0 > ACPI: button: Lid Switch [LID0] > input: Power Button as > /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 > ACPI: button: Power Button [PWRB] > input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 > ACPI: button: Power Button [PWRF] > Non-volatile memory driver v1.3 > Linux agpgart interface v0.103 > [drm] amdgpu kernel modesetting enabled. > vga_switcheroo: detected switching method \_SB_.PCI0.GFX0.ATPX handle > ATPX version 1, functions 0x00000033 > ATPX Hybrid Graphics > amdgpu: CRAT table disabled by module option > amdgpu: Virtual CRAT table created for CPU > amdgpu: Topology: Add CPU node > amdgpu 0000:01:00.0: enabling device (0000 -> 0003) > [drm] initializing kernel modesetting (TONGA 0x1002:0x6921 0x1028:0x0708 > 0x00). > amdgpu 0000:01:00.0: amdgpu: Trusted Memory Zone (TMZ) feature not > supported > [drm] register mmio base: 0xDC500000 > [drm] register mmio size: 262144 > [drm] add ip block number 0 <vi_common> > [drm] add ip block number 1 <gmc_v8_0> > [drm] add ip block number 2 <tonga_ih> > [drm] add ip block number 3 <gfx_v8_0> > [drm] add ip block number 4 <sdma_v3_0> > [drm] add ip block number 5 <powerplay> > [drm] add ip block number 6 <dm> > [drm] add ip block number 7 <uvd_v5_0> > [drm] add ip block number 8 <vce_v3_0> > ACPI: battery: Slot [BAT1] (battery present) > amdgpu 0000:01:00.0: amdgpu: Fetched VBIOS from ATRM > amdgpu: ATOM BIOS: BR46576.001 > [drm] VCE enabled in physical mode > [drm] GPU posting now... > [drm] vm size is 128 GB, 2 levels, block size is 10-bit, fragment size is > 9-bit > amdgpu 0000:01:00.0: amdgpu: VRAM: 4096M 0x000000F400000000 - > 0x000000F4FFFFFFFF (4096M used) > amdgpu 0000:01:00.0: amdgpu: GART: 1024M 0x000000FF00000000 - > 0x000000FF3FFFFFFF > [drm] Detected VRAM RAM=4096M, BAR=256M > [drm] RAM width 256bits GDDR5 > [drm] amdgpu: 4096M of VRAM memory ready > [drm] amdgpu: 4096M of GTT memory ready. > [drm] GART: num cpu pages 262144, num gpu pages 262144 > [drm] PCIE GART of 1024M enabled (table at 0x000000F400000000). > [drm] Chained IB support enabled! > amdgpu: hwmgr_sw_init smu backed is tonga_smu > [drm] Found UVD firmware Version: 1.68 Family ID: 10 > [drm] Found VCE firmware Version: 52.8 Binary ID: 3 > [drm] Display Core initialized with v3.2.149! > [drm] UVD initialized successfully. > [drm] VCE initialized successfully. > kfd kfd: amdgpu: Allocated 3969056 bytes on gart > amdgpu: SW scheduler is used > amdgpu: Virtual CRAT table created for GPU > amdgpu: Topology: Add dGPU node [0x6921:0x1002] > kfd kfd: amdgpu: added device 1002:6921 > amdgpu 0000:01:00.0: amdgpu: SE 4, SH per SE 1, CU per SH 8, > active_cu_number 32 > amdgpu 0000:01:00.0: amdgpu: Using BOCO for runtime pm > [drm] Initialized amdgpu 3.42.0 20150101 for 0000:01:00.0 on minor 0 > i915 0000:00:02.0: [drm] Incompatible option enable_guc=3 - GuC submission > is N/A > i915 0000:00:02.0: [drm] VT-d active for gfx access > i915 0000:00:02.0: vgaarb: deactivate vga console > i915 0000:00:02.0: vgaarb: changed VGA decodes: > olddecodes=io+mem,decodes=io+mem:owns=io+mem > i915 0000:00:02.0: [drm] Finished loading DMC firmware > i915/skl_dmc_ver1_27.bin (v1.27) > i915 0000:00:02.0: [drm] Disabling framebuffer compression (FBC) to > prevent screen flicker with VT-d enabled > i915 0000:00:02.0: [drm] [ENCODER:102:DDI B/PHY B] is disabled/in DSI mode > with an ungated DDI clock, gate it > i915 0000:00:02.0: [drm] [ENCODER:117:DDI C/PHY C] is disabled/in DSI mode > with an ungated DDI clock, gate it > i915 0000:00:02.0: [drm] [ENCODER:127:DDI D/PHY D] is disabled/in DSI mode > with an ungated DDI clock, gate it > i915 0000:00:02.0: Direct firmware load for i915/skl_guc_49.0.1.bin failed > with error -2 > i915 0000:00:02.0: [drm] GuC firmware i915/skl_guc_49.0.1.bin: fetch > failed with error -2 > i915 0000:00:02.0: [drm] GuC firmware(s) can be downloaded from > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/i915 > <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-firmware.git%2Ftree%2Fi915&data=04%7C01%7CGuchun.Chen%40amd.com%7C82f9e022b7d54387f0dd08d961eda83b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637648495656963126%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=KzZr5%2FwcJPXYIhIvzkTapqIlLcTZklsEQ6odo%2Bnu8fc%3D&reserved=0> > i915 0000:00:02.0: [drm] GuC is uninitialized > [drm] Initialized i915 1.6.0 20201103 for 0000:00:02.0 on minor 1 > ACPI: video: Video Device [GFX0] (multi-head: yes rom: no post: no) > input: Video Bus as > /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input3 > loop: module loaded > mei_me 0000:00:16.0: enabling device (0000 -> 0002) > rtsx_pci 0000:3d:00.0: enabling device (0000 -> 0002) > nvme nvme0: pci function 0000:3e:00.0 > ahci 0000:00:17.0: version 3.0 > ahci 0000:00:17.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x2 impl SATA > mode > ahci 0000:00:17.0: flags: 64bit ncq sntf pm led clo only pio slum part ems > deso sadm sds apst > scsi host0: ahci > scsi host1: ahci > ata1: DUMMY > ata2: SATA max UDMA/133 abar m2048@0xdc633000 port 0xdc633180 irq 133 > alx 0000:3b:00.0 eth0: Qualcomm Atheros AR816x/AR817x Ethernet > [f8:ca:b8:03:29:43] > ath10k_pci 0000:3c:00.0: enabling device (0000 -> 0002) > ath10k_pci 0000:3c:00.0: pci irq msi oper_irq_mode 2 irq_mode 0 reset_mode > 0 > fbcon: i915 (fb0) is primary device > Console: switching to colour frame buffer device 240x67 > nvme nvme0: 8/0/0 default/read/poll queues > nvme0n1: p1 p2 p3 > i915 0000:00:02.0: [drm] fb0: i915 frame buffer device > xhci_hcd 0000:00:14.0: xHCI Host Controller > xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1 > xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks > 0x0000000001109810 > usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= > 5.14 > usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 > usb usb1: Product: xHCI Host Controller > usb usb1: Manufacturer: Linux 5.14.0-rc3-agd5f+ xhci-hcd > usb usb1: SerialNumber: 0000:00:14.0 > hub 1-0:1.0: USB hub found > hub 1-0:1.0: 16 ports detected > xhci_hcd 0000:00:14.0: xHCI Host Controller > xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2 > xhci_hcd 0000:00:14.0: Host supports USB 3.0 SuperSpeed > usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= > 5.14 > usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 > usb usb2: Product: xHCI Host Controller > usb usb2: Manufacturer: Linux 5.14.0-rc3-agd5f+ xhci-hcd > usb usb2: SerialNumber: 0000:00:14.0 > hub 2-0:1.0: USB hub found > hub 2-0:1.0: 8 ports detected > usb: port power management may be unreliable > usbcore: registered new interface driver cdc_acm > cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters > usbcore: registered new interface driver uas > usbcore: registered new interface driver usb-storage > i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq > 1,12 > serio: i8042 KBD port at 0x60,0x64 irq 1 > serio: i8042 AUX port at 0x60,0x64 irq 12 > mousedev: PS/2 mouse device common for all mice > rtc_cmos 00:04: RTC can wake from S4 > rtc_cmos 00:04: registered as rtc0 > rtc_cmos 00:04: setting system clock to 2021-08-18T01:47:48 UTC > (1629251268) > rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs > i2c /dev entries driver > i801_smbus 0000:00:1f.4: SPD Write Disable is set > i801_smbus 0000:00:1f.4: SMBus using PCI interrupt > i2c i2c-6: 2/2 memory slots populated (from DMI) > ee1004 6-0050: 512 byte EE1004-compliant SPD EEPROM, read-only > i2c i2c-6: Successfully instantiated SPD at 0x50 > usbcore: registered new interface driver uvcvideo > dell_smm_hwmon: not running on a supported Dell system. > input: AT Translated Set 2 keyboard as > /devices/platform/i8042/serio0/input/input4 > dell_smm_hwmon: vendor=Alienware, model=Alienware 15 R2, version=1.13.1 > usbcore: registered new interface driver btusb > intel_pstate: Intel P-state driver initializing > intel_pstate: HWP enabled > [drm] Initialized simpledrm 1.0.0 20200625 for simple-framebuffer.0 on > minor 2 > simple-framebuffer simple-framebuffer.0: [drm] fb1: simpledrm frame buffer > device > EFI Variables Facility v0.08 2004-May-17 > pstore: Registered efi as persistent store backend > usbcore: registered new interface driver usbhid > usbhid: USB HID core driver > ath10k_pci 0000:3c:00.0: qca6174 hw3.2 target 0x05030000 chip_id > 0x00340aff sub 1a56:1535 > alienware_wmi: alienware-wmi: No known WMI GUID found > ath10k_pci 0000:3c:00.0: kconfig debug 0 debugfs 0 tracing 0 dfs 0 > testmode 0 > dell_wmi_aio: No known WMI GUID found > ath10k_pci 0000:3c:00.0: firmware ver WLAN.RM.4.4.1-00157-QCARMSWPZ-1 api > 6 features wowlan,ignore-otp,mfp crc32 90eebefb > snd_hda_intel 0000:00:1f.3: enabling device (0000 -> 0002) > snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops > i915_audio_component_bind_ops) > xt_time: kernel timezone is -0000 > ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully > Initializing XFRM netlink socket > NET: Registered PF_INET6 protocol family > Segment Routing with IPv6 > sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver > NET: Registered PF_PACKET protocol family > snd_hda_codec_ca0132 hdaudioC0D0: autoconfig for CA0132: line_outs=1 > (0xb/0x0/0x0/0x0/0x0) type:speaker > NET: Registered PF_KEY protocol family > snd_hda_codec_ca0132 hdaudioC0D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) > snd_hda_codec_ca0132 hdaudioC0D0: hp_outs=1 (0xf/0x0/0x0/0x0/0x0) > snd_hda_codec_ca0132 hdaudioC0D0: mono: mono_out=0x0 > snd_hda_codec_ca0132 hdaudioC0D0: inputs: > snd_hda_codec_ca0132 hdaudioC0D0: Mic=0x11 > snd_hda_codec_ca0132 hdaudioC0D0: Internal Mic=0x12 > ath10k_pci 0000:3c:00.0: board_file api 2 bmi_id N/A crc32 318825bf > Bluetooth: RFCOMM TTY layer initialized > ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) > Bluetooth: RFCOMM socket layer initialized > ata2.00: ATA-9: M4-CT512M4SSD2, 070H, max UDMA/100 > Bluetooth: RFCOMM ver 1.11 > ata2.00: 1000215216 sectors, multi 16: LBA48 NCQ (depth 32), AA > ata2.00: configured for UDMA/100 > Bluetooth: BNEP (Ethernet Emulation) ver 1.3 > Bluetooth: BNEP filters: protocol multicast > scsi 1:0:0:0: Direct-Access ATA M4-CT512M4SSD2 070H PQ: 0 ANSI: > 5 > Bluetooth: BNEP socket layer initialized > sd 1:0:0:0: [sda] 1000215216 512-byte logical blocks: (512 GB/477 GiB) > Bluetooth: HIDP (Human Interface Emulation) ver 1.2 > Bluetooth: HIDP socket layer initialized > sd 1:0:0:0: [sda] Write Protect is off > usb 1-4: new full-speed USB device number 2 using xhci_hcd > Key type dns_resolver registered > sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00 > microcode: sig=0x506e3, pf=0x20, revision=0xea > sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't > support DPO or FUA > microcode: Microcode Update Driver: v2.2. > IPI shorthand broadcast: enabled > sda: sda1 sda2 sda3 sda4 sda5 > AVX2 version of gcm_enc/dec engaged. > ath10k_pci 0000:3c:00.0: htt-ver 3.60 wmi-op 4 htt-op 3 cal otp max-sta 32 > raw 0 hwcrypto 1 > sd 1:0:0:0: [sda] Attached SCSI disk > AES CTR mode by8 optimization enabled > sched_clock: Marking stable (1160678423, 3697821)->(1168177289, -3801045) > registered taskstats version 1 > Loading compiled-in X.509 certificates > Key type ._fscrypt registered > Key type .fscrypt registered > Key type fscrypt-provisioning registered > dell-smbios A80593CE-A997-11DA-B012-B622A1EF5492: WMI SMBIOS userspace > interface not supported(0), try upgrading to a newer BIOS > input: Dell WMI hotkeys as > /devices/platform/PNP0C14:01/wmi_bus/wmi_bus-PNP0C14:01/9DBB5994-A997-11DA-B012-B622A1EF5492/input/input7 > cfg80211: Loading compiled-in X.509 certificates for regulatory database > cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' > ALSA device list: > No soundcards found. > ath: EEPROM regdomain: 0x6c > ath: EEPROM indicates we should expect a direct regpair map > ath: Country alpha2 being used: 00 > ath: Regpair used: 0x6c > usb 1-4: config 1 interface 0 altsetting 0 has 2 endpoint descriptors, > different from the interface descriptor's value: 1 > usb 1-4: New USB device found, idVendor=187c, idProduct=0528, bcdDevice= > 0.00 > usb 1-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3 > usb 1-4: Product: AW1517 > usb 1-4: Manufacturer: Alienware > usb 1-4: SerialNumber: 16.0 > hid-generic 0003:187C:0528.0001: device has no listeners, quitting > psmouse serio1: synaptics: queried max coordinates: x [..5668], y [..4756] > tsc: Refined TSC clocksource calibration: 2711.973 MHz > clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x27176cd0728, > max_idle_ns: 440795290119 ns > clocksource: Switched to clocksource tsc > usb 1-5: new full-speed USB device number 3 using xhci_hcd > psmouse serio1: synaptics: queried min coordinates: x [1274..], y [1098..] > psmouse serio1: synaptics: Trying to set up SMBus access > rmi4_smbus 6-002c: registering SMbus-connected sensor > rmi4_f01 rmi4-00.fn01: found RMI device, manufacturer: Synaptics, product: > TM2417-001, fw id: 0 > input: Synaptics TM2417-001 as /devices/rmi4-00/input/input8 > usb 1-5: New USB device found, idVendor=0cf3, idProduct=e300, bcdDevice= > 0.01 > usb 1-5: New USB device strings: Mfr=0, Product=0, SerialNumber=0 > Bluetooth: hci0: using rampatch file: qca/rampatch_usb_00000302.bin > Bluetooth: hci0: QCA: patch rome 0x302 build 0x3e8, firmware rome 0x302 > build 0x111 > snd_hda_codec_ca0132 hdaudioC0D0: ca0132 DSP downloaded and running > EXT4-fs (nvme0n1p2): INFO: recovery required on readonly filesystem > input: HDA Intel PCH Mic as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input9 > EXT4-fs (nvme0n1p2): write access will be enabled during recovery > input: HDA Intel PCH Headphone as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input10 > input: HDA Intel PCH HDMI/DP,pcm=3 as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input11 > input: HDA Intel PCH HDMI/DP,pcm=7 as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input12 > input: HDA Intel PCH HDMI/DP,pcm=8 as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input13 > input: HDA Intel PCH HDMI/DP,pcm=9 as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input14 > input: HDA Intel PCH HDMI/DP,pcm=10 as > /devices/pci0000:00/0000:00:1f.3/sound/card0/input15 > usb 1-7: new high-speed USB device number 4 using xhci_hcd > EXT4-fs (nvme0n1p2): recovery complete > EXT4-fs (nvme0n1p2): mounted filesystem with ordered data mode. Opts: > (null). Quota mode: disabled. > VFS: Mounted root (ext4 filesystem) readonly on device 259:2. > devtmpfs: mounted > Freeing unused kernel image (initmem) memory: 1112K > Write protecting the kernel read-only data: 36864k > Freeing unused kernel image (text/rodata gap) memory: 2032K > Freeing unused kernel image (rodata/data gap) memory: 1740K > Run /usr/lib/systemd/systemd as init process > with arguments: > /usr/lib/systemd/systemd > nospec_store_bypass_disable > with environment: > HOME=/ > TERM=linux > pti=off > spectre_v2=off > usb 1-7: New USB device found, idVendor=1bcf, idProduct=2b8c, > bcdDevice=47.14 > usb 1-7: New USB device strings: Mfr=1, Product=2, SerialNumber=0 > usb 1-7: Product: Integrated_Webcam_HD > usb 1-7: Manufacturer: SunplusIT Inc > usb 1-7: Found UVC 1.00 device Integrated_Webcam_HD (1bcf:2b8c) > input: Integrated_Webcam_HD: Integrate as > /devices/pci0000:00/0000:00:14.0/usb1/1-7/1-7:1.0/input/input16 > systemd 249 running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA > +SMACK +SECCOMP -GCRYPT +GNUTLS +OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 > +IDN2 -IDN +IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY -P11KIT > -QRENCODE -BZIP2 +LZ4 +XZ -ZLIB +ZSTD +XKBCOMMON +UTMP +SYSVINIT > default-hierarchy=unified) > Detected architecture x86-64. > Bluetooth: hci0: using NVM file: qca/nvm_usb_00000302.bin > /lib/systemd/system/gpm.service:7: Standard output type syslog is > obsolete, automatically updating to journal. Please update your unit file, > and consider removing the setting altogether. > Queued start job for default target Graphical Interface. > Created slice Slice /system/getty. > Created slice Slice /system/modprobe. > Created slice Slice /system/systemd-fsck. > Created slice User and Session Slice. > Started Dispatch Password Requests to Console Directory Watch. > Started Forward Password Requests to Wall Directory Watch. > Set up automount Arbitrary Executable File Formats File System Automount > Point. > Reached target Remote File Systems. > Reached target Slice Units. > Reached target Swaps. > Listening on Process Core Dump Socket. > Listening on initctl Compatibility Named Pipe. > Condition check resulted in Journal Audit Socket being skipped. > Listening on Journal Socket (/dev/log). > Listening on Journal Socket. > Listening on Network Service Netlink Socket. > Listening on udev Control Socket. > Listening on udev Kernel Socket. > Mounting Huge Pages File System... > Mounting POSIX Message Queue File System... > Mounting Kernel Debug File System... > Mounting Kernel Trace File System... > tmp.mount: Directory /tmp to mount over is not empty, mounting anyway. > Mounting Temporary Directory /tmp... > Condition check resulted in Create List of Static Device Nodes being > skipped. > Starting Load Kernel Module configfs... > Starting Load Kernel Module drm... > Starting Load Kernel Module fuse... > Condition check resulted in Set Up Additional Binary Formats being skipped. > Starting File System Check on Root Device... > Starting Journal Service... > Condition check resulted in Load Kernel Modules being skipped. > Starting Apply Kernel Variables... > Starting Coldplug All udev Devices... > Started Journal Service. > EXT4-fs (nvme0n1p2): re-mounted. Opts: (null). Quota mode: disabled. > EXT4-fs (nvme0n1p3): mounted filesystem with ordered data mode. Opts: > (null). Quota mode: disabled. > [drm] PCIE GART of 1024M enabled (table at 0x000000F400000000). > BUG: kernel NULL pointer dereference, address: 0000000000000020 > #PF: supervisor write access in kernel mode > #PF: error_code(0x0002) - not-present page > PGD 0 P4D 0 > Oops: 0002 [#1] SMP NOPTI > CPU: 1 PID: 472 Comm: X Tainted: G U I 5.14.0-rc3-agd5f+ #1279 > Hardware name: Alienware Alienware 15 R2/0H6J09, BIOS 1.13.1 06/10/2021 > RIP: 0010:mutex_lock+0x14/0x30 > Code: c3 0f 1f 44 00 00 ba 02 01 00 00 e9 c6 fc ff ff cc cc cc cc cc cc 53 > 48 89 fb e8 e7 f3 ff ff 65 48 8b 0c 25 80 7c 01 00 31 c0 <f0> 48 0f b1 0b > 74 06 48 89 df 5b eb 0f 5b c3 66 2e 0f 1f 84 00 00 > RSP: 0018:ffff8881123c7410 EFLAGS: 00010246 > RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffff8881130eab80 > RDX: ffffffff837a3b20 RSI: ffffffff82f21500 RDI: 0000000000000020 > RBP: ffff8881123c7810 R08: 0000000000000000 R09: 0000000000000000 > R10: 0000000000000000 R11: 0000000000000001 R12: ffff88811b5e0000 > R13: 0000000000000020 R14: ffff8881123c7440 R15: ffff888110ef3400 > FS: 00007ff8f25a5e40(0000) GS:ffff8888a1c40000(0000) > knlGS:0000000000000000 > CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 > CR2: 0000000000000020 CR3: 000000010febe003 CR4: 00000000001706a0 > DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 > DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 > Call Trace: > ? flush_workqueue+0x8e/0x560 > ? amdgpu_dm_atomic_commit_tail+0x481/0x2630 > ? atom_put_dst+0x251/0x460 > ? kfree+0x179/0x2d0 > ? amdgpu_atom_execute_table_locked+0x299/0x350 > ? kfree+0x179/0x2d0 > ? atom_op_and+0xc7/0x1a0 > ? __cond_resched+0x11/0x40 > ? __ww_mutex_lock+0x41/0x840 > ? kmem_cache_alloc_trace+0x152/0x260 > ? dm_plane_helper_prepare_fb+0x1ba/0x240 > ? commit_tail+0x8f/0x170 > ? drm_atomic_helper_commit+0x1f2/0x210 > ? drm_atomic_helper_commit_duplicated_state+0xf5/0x100 > ? drm_atomic_helper_resume+0xbc/0x150 > ? dm_resume.llvm.5009353506756501165+0x5b9/0x630 > ? amdgpu_device_resume+0x1a4/0x3f0 > ? amdgpu_pmops_runtime_resume+0xa2/0xd0 > ? pci_pm_runtime_resume+0xa2/0xe0 > ? pci_pm_runtime_suspend+0x180/0x180 > ? __rpm_callback+0x95/0x320 > ? ep_poll_callback+0x88/0x210 > ? __mod_memcg_lruvec_state+0x35/0xe0 > ? pci_pm_runtime_suspend+0x180/0x180 > ? rpm_resume+0x4a7/0x780 > ? __flush_work.llvm.17749977397669205720+0x7d/0x280 > ? __pm_runtime_resume+0x53/0x70 > ? amdgpu_driver_open_kms+0x57/0x210 > ? drm_file_alloc+0x19a/0x260 > ? drm_open+0xd8/0x210 > ? drm_stub_open+0xa2/0x120 > ? chrdev_open.llvm.10459766552443321194+0xe2/0x1e0 > ? cd_forget+0x60/0x60 > ? do_dentry_open+0x135/0x340 > ? path_openat+0x8df/0xbb0 > ? kmem_cache_free+0x151/0x230 > ? do_filp_open+0xa8/0x130 > ? do_sys_openat2+0x80/0x170 > ? __x64_sys_openat+0x6a/0x70 > ? do_syscall_64+0x70/0xa0 > ? entry_SYSCALL_64_after_hwframe+0x44/0xae > Modules linked in: > CR2: 0000000000000020 > ---[ end trace 6afaf9921664f04e ]--- > RIP: 0010:mutex_lock+0x14/0x30 > Code: c3 0f 1f 44 00 00 ba 02 01 00 00 e9 c6 fc ff ff cc cc cc cc cc cc 53 > 48 89 fb e8 e7 f3 ff ff 65 48 8b 0c 25 80 7c 01 00 31 c0 <f0> 48 0f b1 0b > 74 06 48 89 df 5b eb 0f 5b c3 66 2e 0f 1f 84 00 00 > RSP: 0018:ffff8881123c7410 EFLAGS: 00010246 > RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffff8881130eab80 > RDX: ffffffff837a3b20 RSI: ffffffff82f21500 RDI: 0000000000000020 > RBP: ffff8881123c7810 R08: 0000000000000000 R09: 0000000000000000 > R10: 0000000000000000 R11: 0000000000000001 R12: ffff88811b5e0000 > R13: 0000000000000020 R14: ffff8881123c7440 R15: ffff888110ef3400 > FS: 00007ff8f25a5e40(0000) GS:ffff8888a1c40000(0000) > knlGS:0000000000000000 > CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 > CR2: 0000000000000020 CR3: 000000010febe003 CR4: 00000000001706a0 > DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 > DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 > Syncing filesystems and block devices. > Sending SIGTERM to remaining processes... > > > > On Wed, 18 Aug 2021 at 03:08, Mike Lothian <mike@fireburn.co.uk> wrote: > > Hi > > > > I've just noticed something similar when starting weston, I still see it > with this patch, but not on linus's tree > > > > I'll confirm for sure tomorrow and send the stack trace if I can save it > > > > Cheers > > > > Mike > > > > On Tue, 3 Aug 2021 at 02:56, Chen, Guchun <Guchun.Chen@amd.com> wrote: > > [Public] > > Hi Alex, > > I submitted the patch before your message, I will take care of this next > time. > > Regards, > Guchun > > -----Original Message----- > From: Alex Deucher <alexdeucher@gmail.com> > Sent: Monday, August 2, 2021 9:35 PM > To: Chen, Guchun <Guchun.Chen@amd.com> > Cc: Christian König <ckoenig.leichtzumerken@gmail.com>; > amd-gfx@lists.freedesktop.org; Gao, Likun <Likun.Gao@amd.com>; Koenig, > Christian <Christian.Koenig@amd.com>; Zhang, Hawking < > Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in > s3 test (v2) > > On Mon, Aug 2, 2021 at 4:23 AM Chen, Guchun <Guchun.Chen@amd.com> wrote: > > > > [Public] > > > > Thank you, Christian. > > > > Regarding fence_drv.initialized, it looks to a bit redundant, anyway let > me look into this more. > > Does this patch fix this bug? > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 > <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C82f9e022b7d54387f0dd08d961eda83b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637648495656963126%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=LEUfvxvXNo5BSxy9ZWMG2sCmhS0%2FJN3boUh6c1kOTXo%3D&reserved=0> > > If so, please add: > Bug: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C2bf8bebf5b424751572408d955ba66e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637635081353279181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=FuAo44Ws5SnuCxt45A%2Fqmu%2B3OfEkat1G%2BixO8G9uDVc%3D&reserved=0 > <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7CGuchun.Chen%40amd.com%7C82f9e022b7d54387f0dd08d961eda83b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637648495656973118%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=w0cgvYWrUdxKUmIavnhArY2DkS2IYxuWLb%2FYHNB0%2BmM%3D&reserved=0> > to the commit message. > > Alex > > > > > Regards, > > Guchun > > > > -----Original Message----- > > From: Christian König <ckoenig.leichtzumerken@gmail.com> > > Sent: Monday, August 2, 2021 2:56 PM > > To: Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; > > Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian > > <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; > > Deucher, Alexander <Alexander.Deucher@amd.com> > > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver > > fini in s3 test (v2) > > > > Am 02.08.21 um 07:16 schrieb Guchun Chen: > > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to > > > stop scheduler in s3 test, otherwise, fence related failure will > > > arrive after resume. To fix this and for a better clean up, move > > > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of > > > driver shutdown, and should never be called in hw_fini. > > > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > > > to keep sw_init and sw_fini paired. > > > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > > Suggested-by: Christian König <christian.koenig@amd.com> > > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > > > > It's a bit ambiguous now what fence_drv.initialized means, but I think > we can live with that for now. > > > > Patch is Reviewed-by: Christian König <christian.koenig@amd.com>. > > > > Regards, > > Christian. > > > > > --- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > index b1d2dc39e8be..9e53ff851496 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device > > > *adev, > > > > > > fence_driver_init: > > > /* Fence driver */ > > > - r = amdgpu_fence_driver_init(adev); > > > + r = amdgpu_fence_driver_sw_init(adev); > > > if (r) { > > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init > > > + failed\n"); > > > amdgpu_vf_error_put(adev, > AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > > > goto failed; > > > } > > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, > bool fbcon) > > > } > > > amdgpu_fence_driver_hw_init(adev); > > > > > > - > > > r = amdgpu_device_ip_late_init(adev); > > > if (r) > > > return r; > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > index 49c5c7331c53..7495911516c2 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > > } > > > > > > /** > > > - * amdgpu_fence_driver_init - init the fence driver > > > + * amdgpu_fence_driver_sw_init - init the fence driver > > > * for all possible rings. > > > * > > > * @adev: amdgpu device pointer > > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > > * amdgpu_fence_driver_start_ring(). > > > * Returns 0 for success. > > > */ > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > > { > > > return 0; > > > } > > > > > > /** > > > - * amdgpu_fence_driver_fini - tear down the fence driver > > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > > * for all possible rings. > > > * > > > * @adev: amdgpu device pointer > > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > > > amdgpu_device *adev) > > > > > > if (!ring || !ring->fence_drv.initialized) > > > continue; > > > - if (!ring->no_scheduler) > > > - drm_sched_fini(&ring->sched); > > > + > > > /* You can't wait for HW to signal if it's gone */ > > > if (!drm_dev_is_unplugged(&adev->ddev)) > > > r = amdgpu_fence_wait_empty(ring); @@ -560,6 > > > +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > > > if (!ring || !ring->fence_drv.initialized) > > > continue; > > > > > > + if (!ring->no_scheduler) > > > + drm_sched_fini(&ring->sched); > > > + > > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > > dma_fence_put(ring->fence_drv.fences[j]); > > > kfree(ring->fence_drv.fences); diff --git > > > a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > index 27adffa7658d..9c11ced4312c 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > > struct dma_fence **fences; > > > }; > > > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring > > > *ring); > > > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ > > > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring > *ring, > > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > > struct amdgpu_irq_src *irq_src, > > > unsigned irq_type); > > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > > > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence > **fence, > > > unsigned flags); > > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, > > [-- Attachment #2: Type: text/html, Size: 82189 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-02 5:16 [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) Guchun Chen 2021-08-02 6:56 ` Christian König @ 2021-08-18 5:26 ` Andrey Grodzovsky 2021-08-19 12:04 ` Mike Lothian 1 sibling, 1 reply; 17+ messages in thread From: Andrey Grodzovsky @ 2021-08-18 5:26 UTC (permalink / raw) To: Guchun Chen, amd-gfx, Likun.Gao, christian.koenig, Hawking.Zhang, alexander.deucher On 2021-08-02 1:16 a.m., Guchun Chen wrote: > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop > scheduler in s3 test, otherwise, fence related failure will arrive > after resume. To fix this and for a better clean up, move drm_sched_fini > from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and > should never be called in hw_fini. > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > to keep sw_init and sw_fini paired. > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > Suggested-by: Christian König <christian.koenig@amd.com> > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > 3 files changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index b1d2dc39e8be..9e53ff851496 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev, > > fence_driver_init: > /* Fence driver */ > - r = amdgpu_fence_driver_init(adev); > + r = amdgpu_fence_driver_sw_init(adev); > if (r) { > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); > goto failed; > } > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) > } > amdgpu_fence_driver_hw_init(adev); > > - > r = amdgpu_device_ip_late_init(adev); > if (r) > return r; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > index 49c5c7331c53..7495911516c2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > } > > /** > - * amdgpu_fence_driver_init - init the fence driver > + * amdgpu_fence_driver_sw_init - init the fence driver > * for all possible rings. > * > * @adev: amdgpu device pointer > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > * amdgpu_fence_driver_start_ring(). > * Returns 0 for success. > */ > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > { > return 0; > } > > /** > - * amdgpu_fence_driver_fini - tear down the fence driver > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > * for all possible rings. > * > * @adev: amdgpu device pointer > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > continue; > - if (!ring->no_scheduler) > - drm_sched_fini(&ring->sched); > + > /* You can't wait for HW to signal if it's gone */ > if (!drm_dev_is_unplugged(&adev->ddev)) > r = amdgpu_fence_wait_empty(ring); Sorry for late notice, missed this patch. By moving drm_sched_fini past amdgpu_fence_wait_empty a race is created as even after you waited for all fences on the ring to signal the sw scheduler will keep submitting new jobs on the ring and so the ring won't stay empty. For hot device removal also we want to prevent any access to HW past PCI removal in order to not do any MMIO accesses inside the physical MMIO range that no longer belongs to this device after it's removal by the PCI core. Stopping all the schedulers prevents any MMIO accesses done during job submissions and that why drm_sched_fini was done as part of amdgpu_fence_driver_hw_fini and not amdgpu_fence_driver_sw_fini Andrey > @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) > if (!ring || !ring->fence_drv.initialized) > continue; > > + if (!ring->no_scheduler) > + drm_sched_fini(&ring->sched); > + > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > dma_fence_put(ring->fence_drv.fences[j]); > kfree(ring->fence_drv.fences); > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 27adffa7658d..9c11ced4312c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > struct dma_fence **fences; > }; > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > @@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > struct amdgpu_irq_src *irq_src, > unsigned irq_type); > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, > unsigned flags); > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-18 5:26 ` Andrey Grodzovsky @ 2021-08-19 12:04 ` Mike Lothian 2021-08-19 18:13 ` Alex Deucher 0 siblings, 1 reply; 17+ messages in thread From: Mike Lothian @ 2021-08-19 12:04 UTC (permalink / raw) To: Andrey Grodzovsky Cc: Guchun Chen, amd-gfx list, Likun Gao, Christian König, Hawking Zhang, Alex Deucher [-- Attachment #1: Type: text/plain, Size: 6496 bytes --] Hi Do I need to open a new bug report for this? Cheers Mike On Wed, 18 Aug 2021 at 06:26, Andrey Grodzovsky <andrey.grodzovsky@amd.com> wrote: > > On 2021-08-02 1:16 a.m., Guchun Chen wrote: > > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop > > scheduler in s3 test, otherwise, fence related failure will arrive > > after resume. To fix this and for a better clean up, move drm_sched_fini > > from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and > > should never be called in hw_fini. > > > > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, > > to keep sw_init and sw_fini paired. > > > > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence > > Suggested-by: Christian König <christian.koenig@amd.com> > > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- > > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > index b1d2dc39e8be..9e53ff851496 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev, > > > > fence_driver_init: > > /* Fence driver */ > > - r = amdgpu_fence_driver_init(adev); > > + r = amdgpu_fence_driver_sw_init(adev); > > if (r) { > > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); > > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); > > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, > 0, 0); > > goto failed; > > } > > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, > bool fbcon) > > } > > amdgpu_fence_driver_hw_init(adev); > > > > - > > r = amdgpu_device_ip_late_init(adev); > > if (r) > > return r; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > index 49c5c7331c53..7495911516c2 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c > > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring > *ring, > > } > > > > /** > > - * amdgpu_fence_driver_init - init the fence driver > > + * amdgpu_fence_driver_sw_init - init the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > * amdgpu_fence_driver_start_ring(). > > * Returns 0 for success. > > */ > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) > > { > > return 0; > > } > > > > /** > > - * amdgpu_fence_driver_fini - tear down the fence driver > > + * amdgpu_fence_driver_hw_fini - tear down the fence driver > > * for all possible rings. > > * > > * @adev: amdgpu device pointer > > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct > amdgpu_device *adev) > > > > if (!ring || !ring->fence_drv.initialized) > > continue; > > - if (!ring->no_scheduler) > > - drm_sched_fini(&ring->sched); > > + > > /* You can't wait for HW to signal if it's gone */ > > if (!drm_dev_is_unplugged(&adev->ddev)) > > r = amdgpu_fence_wait_empty(ring); > > > Sorry for late notice, missed this patch. By moving drm_sched_fini > past amdgpu_fence_wait_empty a race is created as even after you waited > for all fences on the ring to signal the sw scheduler will keep submitting > new jobs on the ring and so the ring won't stay empty. > > For hot device removal also we want to prevent any access to HW past PCI > removal > in order to not do any MMIO accesses inside the physical MMIO range that > no longer > belongs to this device after it's removal by the PCI core. Stopping all > the schedulers prevents any MMIO > accesses done during job submissions and that why drm_sched_fini was > done as part of amdgpu_fence_driver_hw_fini > and not amdgpu_fence_driver_sw_fini > > Andrey > > > @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct > amdgpu_device *adev) > > if (!ring || !ring->fence_drv.initialized) > > continue; > > > > + if (!ring->no_scheduler) > > + drm_sched_fini(&ring->sched); > > + > > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) > > dma_fence_put(ring->fence_drv.fences[j]); > > kfree(ring->fence_drv.fences); > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > index 27adffa7658d..9c11ced4312c 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { > > struct dma_fence **fences; > > }; > > > > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); > > > > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, > > @@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct > amdgpu_ring *ring, > > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, > > struct amdgpu_irq_src *irq_src, > > unsigned irq_type); > > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); > > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); > > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); > > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); > > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence > **fence, > > unsigned flags); > > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, > [-- Attachment #2: Type: text/html, Size: 8019 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-19 12:04 ` Mike Lothian @ 2021-08-19 18:13 ` Alex Deucher 2021-08-23 6:36 ` Chen, Guchun 0 siblings, 1 reply; 17+ messages in thread From: Alex Deucher @ 2021-08-19 18:13 UTC (permalink / raw) To: Mike Lothian Cc: Andrey Grodzovsky, Guchun Chen, amd-gfx list, Likun Gao, Christian König, Hawking Zhang, Alex Deucher Please go ahead. Thanks! Alex On Thu, Aug 19, 2021 at 8:05 AM Mike Lothian <mike@fireburn.co.uk> wrote: > > Hi > > Do I need to open a new bug report for this? > > Cheers > > Mike > > On Wed, 18 Aug 2021 at 06:26, Andrey Grodzovsky <andrey.grodzovsky@amd.com> wrote: >> >> >> On 2021-08-02 1:16 a.m., Guchun Chen wrote: >> > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to stop >> > scheduler in s3 test, otherwise, fence related failure will arrive >> > after resume. To fix this and for a better clean up, move drm_sched_fini >> > from fence_hw_fini to fence_sw_fini, as it's part of driver shutdown, and >> > should never be called in hw_fini. >> > >> > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, >> > to keep sw_init and sw_fini paired. >> > >> > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence >> > Suggested-by: Christian König <christian.koenig@amd.com> >> > Signed-off-by: Guchun Chen <guchun.chen@amd.com> >> > --- >> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- >> > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- >> > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >> > 3 files changed, 11 insertions(+), 10 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > index b1d2dc39e8be..9e53ff851496 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device *adev, >> > >> > fence_driver_init: >> > /* Fence driver */ >> > - r = amdgpu_fence_driver_init(adev); >> > + r = amdgpu_fence_driver_sw_init(adev); >> > if (r) { >> > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); >> > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init failed\n"); >> > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); >> > goto failed; >> > } >> > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) >> > } >> > amdgpu_fence_driver_hw_init(adev); >> > >> > - >> > r = amdgpu_device_ip_late_init(adev); >> > if (r) >> > return r; >> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > index 49c5c7331c53..7495911516c2 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > } >> > >> > /** >> > - * amdgpu_fence_driver_init - init the fence driver >> > + * amdgpu_fence_driver_sw_init - init the fence driver >> > * for all possible rings. >> > * >> > * @adev: amdgpu device pointer >> > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > * amdgpu_fence_driver_start_ring(). >> > * Returns 0 for success. >> > */ >> > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) >> > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) >> > { >> > return 0; >> > } >> > >> > /** >> > - * amdgpu_fence_driver_fini - tear down the fence driver >> > + * amdgpu_fence_driver_hw_fini - tear down the fence driver >> > * for all possible rings. >> > * >> > * @adev: amdgpu device pointer >> > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev) >> > >> > if (!ring || !ring->fence_drv.initialized) >> > continue; >> > - if (!ring->no_scheduler) >> > - drm_sched_fini(&ring->sched); >> > + >> > /* You can't wait for HW to signal if it's gone */ >> > if (!drm_dev_is_unplugged(&adev->ddev)) >> > r = amdgpu_fence_wait_empty(ring); >> >> >> Sorry for late notice, missed this patch. By moving drm_sched_fini >> past amdgpu_fence_wait_empty a race is created as even after you waited >> for all fences on the ring to signal the sw scheduler will keep submitting >> new jobs on the ring and so the ring won't stay empty. >> >> For hot device removal also we want to prevent any access to HW past PCI >> removal >> in order to not do any MMIO accesses inside the physical MMIO range that >> no longer >> belongs to this device after it's removal by the PCI core. Stopping all >> the schedulers prevents any MMIO >> accesses done during job submissions and that why drm_sched_fini was >> done as part of amdgpu_fence_driver_hw_fini >> and not amdgpu_fence_driver_sw_fini >> >> Andrey >> >> > @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) >> > if (!ring || !ring->fence_drv.initialized) >> > continue; >> > >> > + if (!ring->no_scheduler) >> > + drm_sched_fini(&ring->sched); >> > + >> > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) >> > dma_fence_put(ring->fence_drv.fences[j]); >> > kfree(ring->fence_drv.fences); >> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > index 27adffa7658d..9c11ced4312c 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { >> > struct dma_fence **fences; >> > }; >> > >> > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); >> > void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); >> > >> > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > @@ -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, >> > struct amdgpu_irq_src *irq_src, >> > unsigned irq_type); >> > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >> > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); >> > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); >> > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); >> > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >> > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, >> > unsigned flags); >> > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-19 18:13 ` Alex Deucher @ 2021-08-23 6:36 ` Chen, Guchun 2021-08-23 6:50 ` Christian König 0 siblings, 1 reply; 17+ messages in thread From: Chen, Guchun @ 2021-08-23 6:36 UTC (permalink / raw) To: Alex Deucher, Mike Lothian, Koenig, Christian Cc: Grodzovsky, Andrey, amd-gfx list, Gao, Likun, Zhang, Hawking, Deucher, Alexander [Public] Hi Andrey, Thanks for your notice. The cause why moving drm_sched_fini to sw_fini is it's a SW behavior and part of SW shutdown, so hw_fini should not touch it. But if the race, that scheduler on the ring possibly keeps submitting jobs which causes un-empty ring is there, possibly we still need to call drm_sched_fini first in hw_fini to stop job submission first. @Koenig, Christian what's your opinion? Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com> Sent: Friday, August 20, 2021 2:13 AM To: Mike Lothian <mike@fireburn.co.uk> Cc: Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com>; Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) Please go ahead. Thanks! Alex On Thu, Aug 19, 2021 at 8:05 AM Mike Lothian <mike@fireburn.co.uk> wrote: > > Hi > > Do I need to open a new bug report for this? > > Cheers > > Mike > > On Wed, 18 Aug 2021 at 06:26, Andrey Grodzovsky <andrey.grodzovsky@amd.com> wrote: >> >> >> On 2021-08-02 1:16 a.m., Guchun Chen wrote: >> > In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to >> > stop scheduler in s3 test, otherwise, fence related failure will >> > arrive after resume. To fix this and for a better clean up, move >> > drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of >> > driver shutdown, and should never be called in hw_fini. >> > >> > v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, >> > to keep sw_init and sw_fini paired. >> > >> > Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence >> > Suggested-by: Christian König <christian.koenig@amd.com> >> > Signed-off-by: Guchun Chen <guchun.chen@amd.com> >> > --- >> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- >> > drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- >> > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >> > 3 files changed, 11 insertions(+), 10 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > index b1d2dc39e8be..9e53ff851496 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >> > @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device >> > *adev, >> > >> > fence_driver_init: >> > /* Fence driver */ >> > - r = amdgpu_fence_driver_init(adev); >> > + r = amdgpu_fence_driver_sw_init(adev); >> > if (r) { >> > - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); >> > + dev_err(adev->dev, "amdgpu_fence_driver_sw_init >> > + failed\n"); >> > amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); >> > goto failed; >> > } >> > @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) >> > } >> > amdgpu_fence_driver_hw_init(adev); >> > >> > - >> > r = amdgpu_device_ip_late_init(adev); >> > if (r) >> > return r; >> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > index 49c5c7331c53..7495911516c2 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >> > @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > } >> > >> > /** >> > - * amdgpu_fence_driver_init - init the fence driver >> > + * amdgpu_fence_driver_sw_init - init the fence driver >> > * for all possible rings. >> > * >> > * @adev: amdgpu device pointer >> > @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > * amdgpu_fence_driver_start_ring(). >> > * Returns 0 for success. >> > */ >> > -int amdgpu_fence_driver_init(struct amdgpu_device *adev) >> > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) >> > { >> > return 0; >> > } >> > >> > /** >> > - * amdgpu_fence_driver_fini - tear down the fence driver >> > + * amdgpu_fence_driver_hw_fini - tear down the fence driver >> > * for all possible rings. >> > * >> > * @adev: amdgpu device pointer >> > @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct >> > amdgpu_device *adev) >> > >> > if (!ring || !ring->fence_drv.initialized) >> > continue; >> > - if (!ring->no_scheduler) >> > - drm_sched_fini(&ring->sched); >> > + >> > /* You can't wait for HW to signal if it's gone */ >> > if (!drm_dev_is_unplugged(&adev->ddev)) >> > r = amdgpu_fence_wait_empty(ring); >> >> >> Sorry for late notice, missed this patch. By moving drm_sched_fini >> past amdgpu_fence_wait_empty a race is created as even after you >> waited for all fences on the ring to signal the sw scheduler will >> keep submitting new jobs on the ring and so the ring won't stay empty. >> >> For hot device removal also we want to prevent any access to HW past >> PCI removal in order to not do any MMIO accesses inside the physical >> MMIO range that no longer belongs to this device after it's removal >> by the PCI core. Stopping all the schedulers prevents any MMIO >> accesses done during job submissions and that why drm_sched_fini was >> done as part of amdgpu_fence_driver_hw_fini and not >> amdgpu_fence_driver_sw_fini >> >> Andrey >> >> > @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) >> > if (!ring || !ring->fence_drv.initialized) >> > continue; >> > >> > + if (!ring->no_scheduler) >> > + drm_sched_fini(&ring->sched); >> > + >> > for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) >> > dma_fence_put(ring->fence_drv.fences[j]); >> > kfree(ring->fence_drv.fences); diff --git >> > a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > index 27adffa7658d..9c11ced4312c 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> > @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { >> > struct dma_fence **fences; >> > }; >> > >> > -int amdgpu_fence_driver_init(struct amdgpu_device *adev); >> > void amdgpu_fence_driver_force_completion(struct amdgpu_ring >> > *ring); >> > >> > int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ >> > -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >> > int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, >> > struct amdgpu_irq_src *irq_src, >> > unsigned irq_type); >> > +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >> > void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); >> > +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); >> > void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); >> > -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >> > int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, >> > unsigned flags); >> > int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-23 6:36 ` Chen, Guchun @ 2021-08-23 6:50 ` Christian König 2021-08-23 14:41 ` Andrey Grodzovsky 0 siblings, 1 reply; 17+ messages in thread From: Christian König @ 2021-08-23 6:50 UTC (permalink / raw) To: Chen, Guchun, Alex Deucher, Mike Lothian, Koenig, Christian Cc: Grodzovsky, Andrey, amd-gfx list, Gao, Likun, Zhang, Hawking, Deucher, Alexander Good mornings guys, Andrey has a rather valid concern here, but I think we need to approach this from a more high level view. When hw_fini is called we should make sure that the scheduler can't submit any more work to the hardware, because the hw is finalized and not expected to response any more. As far as I can see the cleanest approach would be to stop the scheduler in hw_fini and fully clean it up in sw_fini. That would also fit quite nicely with how GPU reset is supposed to work I think. Problem is that this is currently done outside of the fence code for the at least the reset case, so before we restructure that we need to stick with what we have. Andrey do you think it would be any problem if we stop the scheduler manually in the hot plug case as well? Thanks, Christian. Am 23.08.21 um 08:36 schrieb Chen, Guchun: > [Public] > > Hi Andrey, > > Thanks for your notice. The cause why moving drm_sched_fini to sw_fini is it's a SW behavior and part of SW shutdown, so hw_fini should not touch it. But if the race, that scheduler on the ring possibly keeps submitting jobs which causes un-empty ring is there, possibly we still need to call drm_sched_fini first in hw_fini to stop job submission first. > > @Koenig, Christian what's your opinion? > > Regards, > Guchun > > -----Original Message----- > From: Alex Deucher <alexdeucher@gmail.com> > Sent: Friday, August 20, 2021 2:13 AM > To: Mike Lothian <mike@fireburn.co.uk> > Cc: Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com>; Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> > Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) > > Please go ahead. Thanks! > > Alex > > On Thu, Aug 19, 2021 at 8:05 AM Mike Lothian <mike@fireburn.co.uk> wrote: >> Hi >> >> Do I need to open a new bug report for this? >> >> Cheers >> >> Mike >> >> On Wed, 18 Aug 2021 at 06:26, Andrey Grodzovsky <andrey.grodzovsky@amd.com> wrote: >>> >>> On 2021-08-02 1:16 a.m., Guchun Chen wrote: >>>> In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to >>>> stop scheduler in s3 test, otherwise, fence related failure will >>>> arrive after resume. To fix this and for a better clean up, move >>>> drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of >>>> driver shutdown, and should never be called in hw_fini. >>>> >>>> v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, >>>> to keep sw_init and sw_fini paired. >>>> >>>> Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence >>>> Suggested-by: Christian König <christian.koenig@amd.com> >>>> Signed-off-by: Guchun Chen <guchun.chen@amd.com> >>>> --- >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >>>> 3 files changed, 11 insertions(+), 10 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>> index b1d2dc39e8be..9e53ff851496 100644 >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>> @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device >>>> *adev, >>>> >>>> fence_driver_init: >>>> /* Fence driver */ >>>> - r = amdgpu_fence_driver_init(adev); >>>> + r = amdgpu_fence_driver_sw_init(adev); >>>> if (r) { >>>> - dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); >>>> + dev_err(adev->dev, "amdgpu_fence_driver_sw_init >>>> + failed\n"); >>>> amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); >>>> goto failed; >>>> } >>>> @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) >>>> } >>>> amdgpu_fence_driver_hw_init(adev); >>>> >>>> - >>>> r = amdgpu_device_ip_late_init(adev); >>>> if (r) >>>> return r; >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>> index 49c5c7331c53..7495911516c2 100644 >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>> @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >>>> } >>>> >>>> /** >>>> - * amdgpu_fence_driver_init - init the fence driver >>>> + * amdgpu_fence_driver_sw_init - init the fence driver >>>> * for all possible rings. >>>> * >>>> * @adev: amdgpu device pointer >>>> @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >>>> * amdgpu_fence_driver_start_ring(). >>>> * Returns 0 for success. >>>> */ >>>> -int amdgpu_fence_driver_init(struct amdgpu_device *adev) >>>> +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) >>>> { >>>> return 0; >>>> } >>>> >>>> /** >>>> - * amdgpu_fence_driver_fini - tear down the fence driver >>>> + * amdgpu_fence_driver_hw_fini - tear down the fence driver >>>> * for all possible rings. >>>> * >>>> * @adev: amdgpu device pointer >>>> @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct >>>> amdgpu_device *adev) >>>> >>>> if (!ring || !ring->fence_drv.initialized) >>>> continue; >>>> - if (!ring->no_scheduler) >>>> - drm_sched_fini(&ring->sched); >>>> + >>>> /* You can't wait for HW to signal if it's gone */ >>>> if (!drm_dev_is_unplugged(&adev->ddev)) >>>> r = amdgpu_fence_wait_empty(ring); >>> >>> Sorry for late notice, missed this patch. By moving drm_sched_fini >>> past amdgpu_fence_wait_empty a race is created as even after you >>> waited for all fences on the ring to signal the sw scheduler will >>> keep submitting new jobs on the ring and so the ring won't stay empty. >>> >>> For hot device removal also we want to prevent any access to HW past >>> PCI removal in order to not do any MMIO accesses inside the physical >>> MMIO range that no longer belongs to this device after it's removal >>> by the PCI core. Stopping all the schedulers prevents any MMIO >>> accesses done during job submissions and that why drm_sched_fini was >>> done as part of amdgpu_fence_driver_hw_fini and not >>> amdgpu_fence_driver_sw_fini >>> >>> Andrey >>> >>>> @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) >>>> if (!ring || !ring->fence_drv.initialized) >>>> continue; >>>> >>>> + if (!ring->no_scheduler) >>>> + drm_sched_fini(&ring->sched); >>>> + >>>> for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) >>>> dma_fence_put(ring->fence_drv.fences[j]); >>>> kfree(ring->fence_drv.fences); diff --git >>>> a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>> index 27adffa7658d..9c11ced4312c 100644 >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>> @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { >>>> struct dma_fence **fences; >>>> }; >>>> >>>> -int amdgpu_fence_driver_init(struct amdgpu_device *adev); >>>> void amdgpu_fence_driver_force_completion(struct amdgpu_ring >>>> *ring); >>>> >>>> int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ >>>> -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, >>>> int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, >>>> struct amdgpu_irq_src *irq_src, >>>> unsigned irq_type); >>>> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >>>> void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); >>>> +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); >>>> void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); >>>> -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >>>> int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, >>>> unsigned flags); >>>> int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-23 6:50 ` Christian König @ 2021-08-23 14:41 ` Andrey Grodzovsky 2021-08-27 10:42 ` Chen, Guchun 0 siblings, 1 reply; 17+ messages in thread From: Andrey Grodzovsky @ 2021-08-23 14:41 UTC (permalink / raw) To: Christian König, Chen, Guchun, Alex Deucher, Mike Lothian, Koenig, Christian Cc: amd-gfx list, Gao, Likun, Zhang, Hawking, Deucher, Alexander On 2021-08-23 2:50 a.m., Christian König wrote: > Good mornings guys, > > Andrey has a rather valid concern here, but I think we need to > approach this from a more high level view. > > When hw_fini is called we should make sure that the scheduler can't > submit any more work to the hardware, because the hw is finalized and > not expected to response any more. > > As far as I can see the cleanest approach would be to stop the > scheduler in hw_fini and fully clean it up in sw_fini. That would also > fit quite nicely with how GPU reset is supposed to work I think. > > Problem is that this is currently done outside of the fence code for > the at least the reset case, so before we restructure that we need to > stick with what we have. > > Andrey do you think it would be any problem if we stop the scheduler > manually in the hot plug case as well? As long as it's 'parked' inside HW fini - meaning the thread submitting to HW is done I think it should cover hot unplug as well. Andrey > > Thanks, > Christian. > > Am 23.08.21 um 08:36 schrieb Chen, Guchun: >> [Public] >> >> Hi Andrey, >> >> Thanks for your notice. The cause why moving drm_sched_fini to >> sw_fini is it's a SW behavior and part of SW shutdown, so hw_fini >> should not touch it. But if the race, that scheduler on the ring >> possibly keeps submitting jobs which causes un-empty ring is there, >> possibly we still need to call drm_sched_fini first in hw_fini to >> stop job submission first. >> >> @Koenig, Christian what's your opinion? >> >> Regards, >> Guchun >> >> -----Original Message----- >> From: Alex Deucher <alexdeucher@gmail.com> >> Sent: Friday, August 20, 2021 2:13 AM >> To: Mike Lothian <mike@fireburn.co.uk> >> Cc: Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com>; Chen, Guchun >> <Guchun.Chen@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; >> Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian >> <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; >> Deucher, Alexander <Alexander.Deucher@amd.com> >> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver >> fini in s3 test (v2) >> >> Please go ahead. Thanks! >> >> Alex >> >> On Thu, Aug 19, 2021 at 8:05 AM Mike Lothian <mike@fireburn.co.uk> >> wrote: >>> Hi >>> >>> Do I need to open a new bug report for this? >>> >>> Cheers >>> >>> Mike >>> >>> On Wed, 18 Aug 2021 at 06:26, Andrey Grodzovsky >>> <andrey.grodzovsky@amd.com> wrote: >>>> >>>> On 2021-08-02 1:16 a.m., Guchun Chen wrote: >>>>> In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to >>>>> stop scheduler in s3 test, otherwise, fence related failure will >>>>> arrive after resume. To fix this and for a better clean up, move >>>>> drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part of >>>>> driver shutdown, and should never be called in hw_fini. >>>>> >>>>> v2: rename amdgpu_fence_driver_init to amdgpu_fence_driver_sw_init, >>>>> to keep sw_init and sw_fini paired. >>>>> >>>>> Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable sequence >>>>> Suggested-by: Christian König <christian.koenig@amd.com> >>>>> Signed-off-by: Guchun Chen <guchun.chen@amd.com> >>>>> --- >>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- >>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- >>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >>>>> 3 files changed, 11 insertions(+), 10 deletions(-) >>>>> >>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> index b1d2dc39e8be..9e53ff851496 100644 >>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device >>>>> *adev, >>>>> >>>>> fence_driver_init: >>>>> /* Fence driver */ >>>>> - r = amdgpu_fence_driver_init(adev); >>>>> + r = amdgpu_fence_driver_sw_init(adev); >>>>> if (r) { >>>>> - dev_err(adev->dev, "amdgpu_fence_driver_init >>>>> failed\n"); >>>>> + dev_err(adev->dev, "amdgpu_fence_driver_sw_init >>>>> + failed\n"); >>>>> amdgpu_vf_error_put(adev, >>>>> AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); >>>>> goto failed; >>>>> } >>>>> @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device >>>>> *dev, bool fbcon) >>>>> } >>>>> amdgpu_fence_driver_hw_init(adev); >>>>> >>>>> - >>>>> r = amdgpu_device_ip_late_init(adev); >>>>> if (r) >>>>> return r; >>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> index 49c5c7331c53..7495911516c2 100644 >>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct >>>>> amdgpu_ring *ring, >>>>> } >>>>> >>>>> /** >>>>> - * amdgpu_fence_driver_init - init the fence driver >>>>> + * amdgpu_fence_driver_sw_init - init the fence driver >>>>> * for all possible rings. >>>>> * >>>>> * @adev: amdgpu device pointer >>>>> @@ -509,13 +509,13 @@ int amdgpu_fence_driver_init_ring(struct >>>>> amdgpu_ring *ring, >>>>> * amdgpu_fence_driver_start_ring(). >>>>> * Returns 0 for success. >>>>> */ >>>>> -int amdgpu_fence_driver_init(struct amdgpu_device *adev) >>>>> +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) >>>>> { >>>>> return 0; >>>>> } >>>>> >>>>> /** >>>>> - * amdgpu_fence_driver_fini - tear down the fence driver >>>>> + * amdgpu_fence_driver_hw_fini - tear down the fence driver >>>>> * for all possible rings. >>>>> * >>>>> * @adev: amdgpu device pointer >>>>> @@ -531,8 +531,7 @@ void amdgpu_fence_driver_hw_fini(struct >>>>> amdgpu_device *adev) >>>>> >>>>> if (!ring || !ring->fence_drv.initialized) >>>>> continue; >>>>> - if (!ring->no_scheduler) >>>>> - drm_sched_fini(&ring->sched); >>>>> + >>>>> /* You can't wait for HW to signal if it's gone */ >>>>> if (!drm_dev_is_unplugged(&adev->ddev)) >>>>> r = amdgpu_fence_wait_empty(ring); >>>> >>>> Sorry for late notice, missed this patch. By moving drm_sched_fini >>>> past amdgpu_fence_wait_empty a race is created as even after you >>>> waited for all fences on the ring to signal the sw scheduler will >>>> keep submitting new jobs on the ring and so the ring won't stay empty. >>>> >>>> For hot device removal also we want to prevent any access to HW past >>>> PCI removal in order to not do any MMIO accesses inside the physical >>>> MMIO range that no longer belongs to this device after it's removal >>>> by the PCI core. Stopping all the schedulers prevents any MMIO >>>> accesses done during job submissions and that why drm_sched_fini was >>>> done as part of amdgpu_fence_driver_hw_fini and not >>>> amdgpu_fence_driver_sw_fini >>>> >>>> Andrey >>>> >>>>> @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct >>>>> amdgpu_device *adev) >>>>> if (!ring || !ring->fence_drv.initialized) >>>>> continue; >>>>> >>>>> + if (!ring->no_scheduler) >>>>> + drm_sched_fini(&ring->sched); >>>>> + >>>>> for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) >>>>> dma_fence_put(ring->fence_drv.fences[j]); >>>>> kfree(ring->fence_drv.fences); diff --git >>>>> a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> index 27adffa7658d..9c11ced4312c 100644 >>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { >>>>> struct dma_fence **fences; >>>>> }; >>>>> >>>>> -int amdgpu_fence_driver_init(struct amdgpu_device *adev); >>>>> void amdgpu_fence_driver_force_completion(struct amdgpu_ring >>>>> *ring); >>>>> >>>>> int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ >>>>> -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct >>>>> amdgpu_ring *ring, >>>>> int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, >>>>> struct amdgpu_irq_src *irq_src, >>>>> unsigned irq_type); >>>>> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >>>>> void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); >>>>> +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); >>>>> void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); >>>>> -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >>>>> int amdgpu_fence_emit(struct amdgpu_ring *ring, struct >>>>> dma_fence **fence, >>>>> unsigned flags); >>>>> int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, >>>>> uint32_t *s, > ^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) 2021-08-23 14:41 ` Andrey Grodzovsky @ 2021-08-27 10:42 ` Chen, Guchun 0 siblings, 0 replies; 17+ messages in thread From: Chen, Guchun @ 2021-08-27 10:42 UTC (permalink / raw) To: Grodzovsky, Andrey, Christian König, Alex Deucher, Mike Lothian, Koenig, Christian Cc: amd-gfx list, Gao, Likun, Zhang, Hawking, Deucher, Alexander [Public] Hi Andrey and Christian, I just send out a new patch to address this, I am not sure if I understand your point correctly. Please review. The patch is to stop scheduler in fence_hw_fini and start the scheduler in fence_hw_init. Regards, Guchun -----Original Message----- From: Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com> Sent: Monday, August 23, 2021 10:42 PM To: Christian König <ckoenig.leichtzumerken@gmail.com>; Chen, Guchun <Guchun.Chen@amd.com>; Alex Deucher <alexdeucher@gmail.com>; Mike Lothian <mike@fireburn.co.uk>; Koenig, Christian <Christian.Koenig@amd.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Gao, Likun <Likun.Gao@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) On 2021-08-23 2:50 a.m., Christian König wrote: > Good mornings guys, > > Andrey has a rather valid concern here, but I think we need to > approach this from a more high level view. > > When hw_fini is called we should make sure that the scheduler can't > submit any more work to the hardware, because the hw is finalized and > not expected to response any more. > > As far as I can see the cleanest approach would be to stop the > scheduler in hw_fini and fully clean it up in sw_fini. That would also > fit quite nicely with how GPU reset is supposed to work I think. > > Problem is that this is currently done outside of the fence code for > the at least the reset case, so before we restructure that we need to > stick with what we have. > > Andrey do you think it would be any problem if we stop the scheduler > manually in the hot plug case as well? As long as it's 'parked' inside HW fini - meaning the thread submitting to HW is done I think it should cover hot unplug as well. Andrey > > Thanks, > Christian. > > Am 23.08.21 um 08:36 schrieb Chen, Guchun: >> [Public] >> >> Hi Andrey, >> >> Thanks for your notice. The cause why moving drm_sched_fini to >> sw_fini is it's a SW behavior and part of SW shutdown, so hw_fini >> should not touch it. But if the race, that scheduler on the ring >> possibly keeps submitting jobs which causes un-empty ring is there, >> possibly we still need to call drm_sched_fini first in hw_fini to >> stop job submission first. >> >> @Koenig, Christian what's your opinion? >> >> Regards, >> Guchun >> >> -----Original Message----- >> From: Alex Deucher <alexdeucher@gmail.com> >> Sent: Friday, August 20, 2021 2:13 AM >> To: Mike Lothian <mike@fireburn.co.uk> >> Cc: Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com>; Chen, Guchun >> <Guchun.Chen@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; >> Gao, Likun <Likun.Gao@amd.com>; Koenig, Christian >> <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; >> Deucher, Alexander <Alexander.Deucher@amd.com> >> Subject: Re: [PATCH] drm/amdgpu: avoid over-handle of fence driver >> fini in s3 test (v2) >> >> Please go ahead. Thanks! >> >> Alex >> >> On Thu, Aug 19, 2021 at 8:05 AM Mike Lothian <mike@fireburn.co.uk> >> wrote: >>> Hi >>> >>> Do I need to open a new bug report for this? >>> >>> Cheers >>> >>> Mike >>> >>> On Wed, 18 Aug 2021 at 06:26, Andrey Grodzovsky >>> <andrey.grodzovsky@amd.com> wrote: >>>> >>>> On 2021-08-02 1:16 a.m., Guchun Chen wrote: >>>>> In amdgpu_fence_driver_hw_fini, no need to call drm_sched_fini to >>>>> stop scheduler in s3 test, otherwise, fence related failure will >>>>> arrive after resume. To fix this and for a better clean up, move >>>>> drm_sched_fini from fence_hw_fini to fence_sw_fini, as it's part >>>>> of driver shutdown, and should never be called in hw_fini. >>>>> >>>>> v2: rename amdgpu_fence_driver_init to >>>>> amdgpu_fence_driver_sw_init, to keep sw_init and sw_fini paired. >>>>> >>>>> Fixes: cd87a6dcf6af drm/amdgpu: adjust fence driver enable >>>>> sequence >>>>> Suggested-by: Christian König <christian.koenig@amd.com> >>>>> Signed-off-by: Guchun Chen <guchun.chen@amd.com> >>>>> --- >>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++--- >>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 12 +++++++----- >>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >>>>> 3 files changed, 11 insertions(+), 10 deletions(-) >>>>> >>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> index b1d2dc39e8be..9e53ff851496 100644 >>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c >>>>> @@ -3646,9 +3646,9 @@ int amdgpu_device_init(struct amdgpu_device >>>>> *adev, >>>>> >>>>> fence_driver_init: >>>>> /* Fence driver */ >>>>> - r = amdgpu_fence_driver_init(adev); >>>>> + r = amdgpu_fence_driver_sw_init(adev); >>>>> if (r) { >>>>> - dev_err(adev->dev, "amdgpu_fence_driver_init >>>>> failed\n"); >>>>> + dev_err(adev->dev, "amdgpu_fence_driver_sw_init >>>>> +failed\n"); >>>>> amdgpu_vf_error_put(adev, >>>>> AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); >>>>> goto failed; >>>>> } >>>>> @@ -3988,7 +3988,6 @@ int amdgpu_device_resume(struct drm_device >>>>> *dev, bool fbcon) >>>>> } >>>>> amdgpu_fence_driver_hw_init(adev); >>>>> >>>>> - >>>>> r = amdgpu_device_ip_late_init(adev); >>>>> if (r) >>>>> return r; >>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> index 49c5c7331c53..7495911516c2 100644 >>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c >>>>> @@ -498,7 +498,7 @@ int amdgpu_fence_driver_init_ring(struct >>>>> amdgpu_ring *ring, >>>>> } >>>>> >>>>> /** >>>>> - * amdgpu_fence_driver_init - init the fence driver >>>>> + * amdgpu_fence_driver_sw_init - init the fence driver >>>>> * for all possible rings. >>>>> * >>>>> * @adev: amdgpu device pointer @@ -509,13 +509,13 @@ int >>>>> amdgpu_fence_driver_init_ring(struct >>>>> amdgpu_ring *ring, >>>>> * amdgpu_fence_driver_start_ring(). >>>>> * Returns 0 for success. >>>>> */ >>>>> -int amdgpu_fence_driver_init(struct amdgpu_device *adev) >>>>> +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev) >>>>> { >>>>> return 0; >>>>> } >>>>> >>>>> /** >>>>> - * amdgpu_fence_driver_fini - tear down the fence driver >>>>> + * amdgpu_fence_driver_hw_fini - tear down the fence driver >>>>> * for all possible rings. >>>>> * >>>>> * @adev: amdgpu device pointer @@ -531,8 +531,7 @@ void >>>>> amdgpu_fence_driver_hw_fini(struct >>>>> amdgpu_device *adev) >>>>> >>>>> if (!ring || !ring->fence_drv.initialized) >>>>> continue; >>>>> - if (!ring->no_scheduler) >>>>> - drm_sched_fini(&ring->sched); >>>>> + >>>>> /* You can't wait for HW to signal if it's gone */ >>>>> if (!drm_dev_is_unplugged(&adev->ddev)) >>>>> r = amdgpu_fence_wait_empty(ring); >>>> >>>> Sorry for late notice, missed this patch. By moving drm_sched_fini >>>> past amdgpu_fence_wait_empty a race is created as even after you >>>> waited for all fences on the ring to signal the sw scheduler will >>>> keep submitting new jobs on the ring and so the ring won't stay empty. >>>> >>>> For hot device removal also we want to prevent any access to HW >>>> past PCI removal in order to not do any MMIO accesses inside the >>>> physical MMIO range that no longer belongs to this device after >>>> it's removal by the PCI core. Stopping all the schedulers prevents >>>> any MMIO accesses done during job submissions and that why >>>> drm_sched_fini was done as part of amdgpu_fence_driver_hw_fini and >>>> not amdgpu_fence_driver_sw_fini >>>> >>>> Andrey >>>> >>>>> @@ -560,6 +559,9 @@ void amdgpu_fence_driver_sw_fini(struct >>>>> amdgpu_device *adev) >>>>> if (!ring || !ring->fence_drv.initialized) >>>>> continue; >>>>> >>>>> + if (!ring->no_scheduler) >>>>> + drm_sched_fini(&ring->sched); >>>>> + >>>>> for (j = 0; j <= ring->fence_drv.num_fences_mask; >>>>> ++j) dma_fence_put(ring->fence_drv.fences[j]); >>>>> kfree(ring->fence_drv.fences); diff --git >>>>> a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> index 27adffa7658d..9c11ced4312c 100644 >>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >>>>> @@ -106,7 +106,6 @@ struct amdgpu_fence_driver { >>>>> struct dma_fence **fences; >>>>> }; >>>>> >>>>> -int amdgpu_fence_driver_init(struct amdgpu_device *adev); >>>>> void amdgpu_fence_driver_force_completion(struct amdgpu_ring >>>>> *ring); >>>>> >>>>> int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, @@ >>>>> -115,9 +114,10 @@ int amdgpu_fence_driver_init_ring(struct >>>>> amdgpu_ring *ring, >>>>> int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, >>>>> struct amdgpu_irq_src *irq_src, >>>>> unsigned irq_type); >>>>> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >>>>> void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); >>>>> +int amdgpu_fence_driver_sw_init(struct amdgpu_device *adev); >>>>> void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev); >>>>> -void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev); >>>>> int amdgpu_fence_emit(struct amdgpu_ring *ring, struct >>>>> dma_fence **fence, >>>>> unsigned flags); >>>>> int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, >>>>> uint32_t *s, > ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2021-08-27 10:42 UTC | newest] Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-08-02 5:16 [PATCH] drm/amdgpu: avoid over-handle of fence driver fini in s3 test (v2) Guchun Chen 2021-08-02 6:56 ` Christian König 2021-08-02 8:23 ` Chen, Guchun 2021-08-02 13:35 ` Alex Deucher 2021-08-02 16:19 ` Mike Lothian 2021-08-03 1:56 ` Chen, Guchun 2021-08-18 2:08 ` Mike Lothian 2021-08-18 2:12 ` Mike Lothian 2021-08-18 2:23 ` Chen, Guchun 2021-08-18 8:13 ` Mike Lothian 2021-08-18 5:26 ` Andrey Grodzovsky 2021-08-19 12:04 ` Mike Lothian 2021-08-19 18:13 ` Alex Deucher 2021-08-23 6:36 ` Chen, Guchun 2021-08-23 6:50 ` Christian König 2021-08-23 14:41 ` Andrey Grodzovsky 2021-08-27 10:42 ` Chen, Guchun
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