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From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh+dt@kernel.org>,
	linux-mips@vger.kernel.org,
	devicetree <devicetree@vger.kernel.org>,
	dmaengine <dmaengine@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 09/10] dmaengine: dw: Introduce max burst length hw config
Date: Thu, 28 May 2020 23:38:28 +0300	[thread overview]
Message-ID: <CAHp75VcPVO6yOmyrSBfjVk5eSYhC4J0QXAfOhjRXGd4=FemezA@mail.gmail.com> (raw)
In-Reply-To: <20200528154022.3reghhjcd4dnsr3g@mobilestation>

On Thu, May 28, 2020 at 6:43 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:52:24PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:20AM +0300, Serge Semin wrote:

...

> > Perhaps,
> >
> >       /* DesignWare DMA supports burst value from 0 */
> >       caps->min_burst = 0;
>
> Regarding min_burst being zero. I don't fully understand what it means.
> It means no burst or burst with minimum length or what?
> In fact DW DMA burst length starts from 1. Remember the burst-length run-time
> parameter we were arguing about? Anyway the driver makes sure that both
> 0 and 1 requested burst length are setup as burst length of 1 in the
> CTLx.SRC_MSIZE, CTLx.DST_MSIZE fields.

Yeah, I also thought about it after I sent a message. 1 sounds better.

-- 
With Best Regards,
Andy Shevchenko

  parent reply	other threads:[~2020-05-28 20:38 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-26 22:50 [PATCH v3 00/10] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Serge Semin
2020-05-26 22:50 ` [PATCH v3 01/10] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-26 22:50 ` [PATCH v3 02/10] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-26 22:50 ` [PATCH v3 03/10] dmaengine: Introduce min burst length capability Serge Semin
2020-05-28 14:21   ` Andy Shevchenko
2020-05-26 22:50 ` [PATCH v3 04/10] dmaengine: Introduce max SG list entries capability Serge Semin
2020-05-28 14:22   ` Andy Shevchenko
2020-05-26 22:50 ` [PATCH v3 05/10] dmaengine: Introduce DMA-device device_caps callback Serge Semin
2020-05-28 14:42   ` Andy Shevchenko
2020-05-28 15:19     ` Serge Semin
2020-05-28 20:34       ` Andy Shevchenko
2020-05-26 22:50 ` [PATCH v3 06/10] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-26 22:50 ` [PATCH v3 07/10] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-26 22:50 ` [PATCH v3 08/10] dmaengine: dw: Add dummy device_caps callback Serge Semin
2020-05-28 14:53   ` Andy Shevchenko
2020-05-28 15:27     ` Serge Semin
2020-05-28 20:29       ` Andy Shevchenko
2020-05-28 20:34         ` Serge Semin
2020-05-26 22:50 ` [PATCH v3 09/10] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-28 14:52   ` Andy Shevchenko
2020-05-28 15:40     ` Serge Semin
2020-05-28 19:53       ` Serge Semin
2020-05-28 20:38       ` Andy Shevchenko [this message]
2020-05-26 22:50 ` [PATCH v3 10/10] dmaengine: dw: Initialize max_sg_nents with nollp flag Serge Semin
2020-05-28 14:56   ` Andy Shevchenko
2020-05-28 15:50     ` Serge Semin
2020-05-28 20:31       ` Andy Shevchenko

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