From: Zhi Li <lznuaa@gmail.com> To: Tiberiu Breana <andrei-tiberiu.breana@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org>, Frank Li <frank.li@nxp.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, kernel list <linux-kernel@vger.kernel.org>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, acme@kernel.org, alexander.shishkin@linux.intel.com, Mark Rutland <mark.rutland@arm.com> Subject: Re: [PATCH v2 2/2] ARM: imx: Add AXI address filter support for MMDC profiling Date: Wed, 15 Feb 2017 08:29:05 -0600 [thread overview] Message-ID: <CAHrpEqQNsg1hJ74kN0+GvXBEwce6D6z2gbD8ioGB64EmY8LbeQ@mail.gmail.com> (raw) In-Reply-To: <1487160026-9376-3-git-send-email-andrei-tiberiu.breana@nxp.com> On Wed, Feb 15, 2017 at 6:00 AM, <andrei-tiberiu.breana@nxp.com> wrote: > From: Tiberiu Breana <andrei-tiberiu.breana@nxp.com> > > Add support for an extra config parameter for perf commands: > axi_id, which will be written in the MMDC's MADPCR1 register, > to filter memory usage profiling (see i.MX6 reference manual, > chapter 44.7 MMDC Profiling for AXI id usage). > > Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com> Acked-by: Frank Li <Frank.li@nxp.com> > --- > arch/arm/mach-imx/mmdc.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c > index 89a926f..7826289 100644 > --- a/arch/arm/mach-imx/mmdc.c > +++ b/arch/arm/mach-imx/mmdc.c > @@ -1,4 +1,5 @@ > /* > + * Copyright 2017 NXP > * Copyright 2011,2016 Freescale Semiconductor, Inc. > * Copyright 2011 Linaro Ltd. > * > @@ -47,6 +48,7 @@ > #define PROFILE_SEL 0x10 > > #define MMDC_MADPCR0 0x410 > +#define MMDC_MADPCR1 0x414 > #define MMDC_MADPSR0 0x418 > #define MMDC_MADPSR1 0x41C > #define MMDC_MADPSR2 0x420 > @@ -57,6 +59,7 @@ > #define MMDC_NUM_COUNTERS 6 > > #define MMDC_FLAG_PROFILE_SEL 0x1 > +#define MMDC_PRF_AXI_ID_CLEAR 0x0 > > #define to_mmdc_pmu(p) container_of(p, struct mmdc_pmu, pmu) > > @@ -161,8 +164,11 @@ static struct attribute_group mmdc_pmu_events_attr_group = { > }; > > PMU_FORMAT_ATTR(event, "config:0-63"); > +PMU_FORMAT_ATTR(axi_id, "config1:0-63"); > + > static struct attribute *mmdc_pmu_format_attrs[] = { > &format_attr_event.attr, > + &format_attr_axi_id.attr, > NULL, > }; > > @@ -345,6 +351,14 @@ static void mmdc_pmu_event_start(struct perf_event *event, int flags) > > writel(DBG_RST, reg); > > + /* > + * Write the AXI id parameter to MADPCR1. > + */ > + val = event->attr.config1; > + reg = mmdc_base + MMDC_MADPCR1; > + writel(val, reg); > + > + reg = mmdc_base + MMDC_MADPCR0; > val = DBG_EN; > if (pmu_mmdc->devtype_data->flags & MMDC_FLAG_PROFILE_SEL) > val |= PROFILE_SEL; > @@ -382,6 +396,10 @@ static void mmdc_pmu_event_stop(struct perf_event *event, int flags) > reg = mmdc_base + MMDC_MADPCR0; > > writel(PRF_FRZ, reg); > + > + reg = mmdc_base + MMDC_MADPCR1; > + writel(MMDC_PRF_AXI_ID_CLEAR, reg); > + > mmdc_pmu_event_update(event); > } > > -- > 2.7.4 >
WARNING: multiple messages have this Message-ID (diff)
From: lznuaa@gmail.com (Zhi Li) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] ARM: imx: Add AXI address filter support for MMDC profiling Date: Wed, 15 Feb 2017 08:29:05 -0600 [thread overview] Message-ID: <CAHrpEqQNsg1hJ74kN0+GvXBEwce6D6z2gbD8ioGB64EmY8LbeQ@mail.gmail.com> (raw) In-Reply-To: <1487160026-9376-3-git-send-email-andrei-tiberiu.breana@nxp.com> On Wed, Feb 15, 2017 at 6:00 AM, <andrei-tiberiu.breana@nxp.com> wrote: > From: Tiberiu Breana <andrei-tiberiu.breana@nxp.com> > > Add support for an extra config parameter for perf commands: > axi_id, which will be written in the MMDC's MADPCR1 register, > to filter memory usage profiling (see i.MX6 reference manual, > chapter 44.7 MMDC Profiling for AXI id usage). > > Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com> Acked-by: Frank Li <Frank.li@nxp.com> > --- > arch/arm/mach-imx/mmdc.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c > index 89a926f..7826289 100644 > --- a/arch/arm/mach-imx/mmdc.c > +++ b/arch/arm/mach-imx/mmdc.c > @@ -1,4 +1,5 @@ > /* > + * Copyright 2017 NXP > * Copyright 2011,2016 Freescale Semiconductor, Inc. > * Copyright 2011 Linaro Ltd. > * > @@ -47,6 +48,7 @@ > #define PROFILE_SEL 0x10 > > #define MMDC_MADPCR0 0x410 > +#define MMDC_MADPCR1 0x414 > #define MMDC_MADPSR0 0x418 > #define MMDC_MADPSR1 0x41C > #define MMDC_MADPSR2 0x420 > @@ -57,6 +59,7 @@ > #define MMDC_NUM_COUNTERS 6 > > #define MMDC_FLAG_PROFILE_SEL 0x1 > +#define MMDC_PRF_AXI_ID_CLEAR 0x0 > > #define to_mmdc_pmu(p) container_of(p, struct mmdc_pmu, pmu) > > @@ -161,8 +164,11 @@ static struct attribute_group mmdc_pmu_events_attr_group = { > }; > > PMU_FORMAT_ATTR(event, "config:0-63"); > +PMU_FORMAT_ATTR(axi_id, "config1:0-63"); > + > static struct attribute *mmdc_pmu_format_attrs[] = { > &format_attr_event.attr, > + &format_attr_axi_id.attr, > NULL, > }; > > @@ -345,6 +351,14 @@ static void mmdc_pmu_event_start(struct perf_event *event, int flags) > > writel(DBG_RST, reg); > > + /* > + * Write the AXI id parameter to MADPCR1. > + */ > + val = event->attr.config1; > + reg = mmdc_base + MMDC_MADPCR1; > + writel(val, reg); > + > + reg = mmdc_base + MMDC_MADPCR0; > val = DBG_EN; > if (pmu_mmdc->devtype_data->flags & MMDC_FLAG_PROFILE_SEL) > val |= PROFILE_SEL; > @@ -382,6 +396,10 @@ static void mmdc_pmu_event_stop(struct perf_event *event, int flags) > reg = mmdc_base + MMDC_MADPCR0; > > writel(PRF_FRZ, reg); > + > + reg = mmdc_base + MMDC_MADPCR1; > + writel(MMDC_PRF_AXI_ID_CLEAR, reg); > + > mmdc_pmu_event_update(event); > } > > -- > 2.7.4 >
next prev parent reply other threads:[~2017-02-15 14:29 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-02-15 12:00 [PATCH v2 0/2] Add AXI address filter support for MMDC profiling andrei-tiberiu.breana 2017-02-15 12:00 ` andrei-tiberiu.breana at nxp.com 2017-02-15 12:00 ` [PATCH v2 1/2] ARM: imx: Fix mmdc_pmu_write_accesses event definition andrei-tiberiu.breana 2017-02-15 12:00 ` andrei-tiberiu.breana at nxp.com 2017-02-15 14:28 ` Zhi Li 2017-02-15 14:28 ` Zhi Li 2017-02-24 15:47 ` Zhi Li 2017-02-24 15:47 ` Zhi Li 2017-03-07 17:24 ` Zhi Li 2017-03-07 17:24 ` Zhi Li 2017-02-15 12:00 ` [PATCH v2 2/2] ARM: imx: Add AXI address filter support for MMDC profiling andrei-tiberiu.breana 2017-02-15 12:00 ` andrei-tiberiu.breana at nxp.com 2017-02-15 14:29 ` Zhi Li [this message] 2017-02-15 14:29 ` Zhi Li 2017-03-09 17:21 ` [PATCH v2 0/2] " Shawn Guo 2017-03-09 17:21 ` Shawn Guo
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=CAHrpEqQNsg1hJ74kN0+GvXBEwce6D6z2gbD8ioGB64EmY8LbeQ@mail.gmail.com \ --to=lznuaa@gmail.com \ --cc=acme@kernel.org \ --cc=alexander.shishkin@linux.intel.com \ --cc=andrei-tiberiu.breana@nxp.com \ --cc=frank.li@nxp.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=mingo@redhat.com \ --cc=peterz@infradead.org \ --cc=shawnguo@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.