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From: Tim Harvey <tharvey@gateworks.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Adam Ford <aford173@gmail.com>,
	Frieder Schrempf <frieder.schrempf@kontron.de>,
	Marek Vasut <marex@denx.de>,
	Device Tree Mailing List <devicetree@vger.kernel.org>,
	Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	patchwork-lst@pengutronix.de
Subject: Re: [PATCH v4 14/18] arm64: dts: imx8mm: add GPC node
Date: Sun, 3 Oct 2021 10:17:11 -0700	[thread overview]
Message-ID: <CAJ+vNU2MY9GYgEE9zgFHRKeyoc2a7G0AU9yu5xrbU2wO9Cx3DQ@mail.gmail.com> (raw)
In-Reply-To: <fde6a0f40aa3ba41b054bcbc4c50a05e77a431cd.camel@pengutronix.de>

On Sat, Oct 2, 2021 at 5:51 AM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Hi Tim,
>
> Am Freitag, dem 01.10.2021 um 19:43 -0700 schrieb Tim Harvey:
> > > > > >
> [...]
> > > > > > > Lucas,
> > > > > > >
> > > > > > > I've been using your 'i.MX8MM GPC improvements and BLK_CTRL driver'
> > > > > > > series for imx8mm-venice* and imx8mn-venice* boards. Thank you for
> > > > > > > this work and I hope to see it merged soon!
> > > > > > >
> > > > > > > I have found that on the imx8mm-venice-gw7901 board which does not use
> > > > > > > MIPI and thus does not connect VDD_MIPI_1P8, VDD_MIPI_1P2,
> > > > > > > VDD_MIPI_0P9, MIPI_VREG_CAP pins on the IMX8MM hangs with this
> > > > > > > particular patch. If I comment out the pgc_mipi domain and subsequent
> > > > > > > disp_blk_ctrl node from a later patch it resolves the hang. Is this
> > > > > > > behavior expected and what would your recommendation be to work around
> > > > > > > it?
> > > > > >
> > > > > > No, this isn't expected. If there are no active devices in the MIPI
> > > > > > domain, the power domain should not be touched, as we treat all of them
> > > > > > as disabled initially. If we don't touch the domain I would expect that
> > > > > > the power supply not being present shouldn't be an issue.
> > > > > >
> > > > > > Can you check if something in your system causes this power domain to
> > > > > > be powered up? Easiest way is probably to sprinkle a
> > > > > > printk("%s\n, genpd->name) in both imx8m_blk_ctrl_power_on() and
> > > > > > imx_gpc_power_on().
> > > > > >
> > > > >
> > > > > Lucas,
> > > > >
> > > > > Here's what I see before I hang (debug print on both power on/off
> > > > > followed by a msleep(1000) to make sure I see it before I hang):
> > > > > [    0.518319] imx_pgc_power_up hsiomix
> > > > > [    0.624031] imx_pgc_power_down hsiomix
> > > > > [    0.731879] imx_pgc_power_up hsiomix
> > > > > [    0.839906] imx_pgc_power_down hsiomix
> > > > > [    0.947875] imx_pgc_power_up hsiomix
> > > > > [    1.055859] imx_pgc_power_down hsiomix
> > > > > [    1.057296] imx_pgc_power_up gpumix
> > > > > [    1.167884] imx_pgc_power_down gpumix
> > > > > [    0.518513] imx_pgc_power_up hsiomix
> > > > > [    0.519933] imx_pgc_power_up gpumix
> > > > >
> > > >
> > > > The board also has IMX8MM VDD_GPU pins not connected so it makes sense
> > > > that we hang here I suppose. Yet if I add the folloiwng to
> > > > imx8mm-venice-gw7901.dts it still tries to enable them and hangs:
> > > > &gpu_2d {
> > > >         status = "disabled";
> > > > };
> > > >
> > > > &gpu_3d {
> > > >         status = "disabled";
> > > > };
> > > >
> > > > &vpu_blk_ctrl {
> > > >         status = "disabled";
> > > > };
> > >
> > > The pgc_gpu is a "active" consumer of the pgc_gpumix domain while the
> > > driver gets probed, so the driver core will power up the gpumix domain
> > > for a moment during kernel init. To avoid this you must at least set
> > > the status of the pgc_gpu node to disabled.
> > >
> >
> > I've tried that and it doesn't work either.
> >
> > &gpu_2d {
> >         status = "disabled";
> > };
> >
> > &gpu_3d {
> >         status = "disabled";
> > };
> >
> > &vpu_blk_ctrl {
> >         status = "disabled";
> > };
> >
> > &pgc_gpumix {
> >         status = "disabled";
> > };
> >
> > &pgc_gpu {
> >         status = "disabled";
> > };
> >
> > The interesting thing is that the first patch that causes this is
> > 'arm64: dts: imx8mm: add GPC node' which just adds the gpc node and is
> > before the addition of the other nodes. Therefore these are being
> > enabled by default regardless of the above nodes being disabled (or
> > not even added yet to imx8mm.dtsi).
>
> My bad, I didn't think about the fact that the power domain devices are
> not instantiated via the common OF populate code. For the status
> property to work as expected the GPCv2 code needs to check this
> property. I've just sent a patch to make this happen. Can you give it
> another try with your DT changes and this patch applied?
>

Yes, this makes sense and resolves it with only disabling pgc_gpumix in my dts.

I believe it is fine for me to not specifically disable gpu_2d and
gpu_3d as they are not enabled by default in imx8mm.dtsi and I don't
believe that will change and I don't 'currently' need to disable
disp_blk_ctrl or pgc_mipi but wondering if I should as the MIPI rails
are not hooked up either? (ie will something added in the future try
to use them?)

What needs to be done to get this series merged? I suppose it's too
late to get it into 5.13?

Best regards,

Tim

WARNING: multiple messages have this Message-ID (diff)
From: Tim Harvey <tharvey@gateworks.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	 Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Adam Ford <aford173@gmail.com>,
	 Frieder Schrempf <frieder.schrempf@kontron.de>,
	Marek Vasut <marex@denx.de>,
	 Device Tree Mailing List <devicetree@vger.kernel.org>,
	 Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	patchwork-lst@pengutronix.de
Subject: Re: [PATCH v4 14/18] arm64: dts: imx8mm: add GPC node
Date: Sun, 3 Oct 2021 10:17:11 -0700	[thread overview]
Message-ID: <CAJ+vNU2MY9GYgEE9zgFHRKeyoc2a7G0AU9yu5xrbU2wO9Cx3DQ@mail.gmail.com> (raw)
In-Reply-To: <fde6a0f40aa3ba41b054bcbc4c50a05e77a431cd.camel@pengutronix.de>

On Sat, Oct 2, 2021 at 5:51 AM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Hi Tim,
>
> Am Freitag, dem 01.10.2021 um 19:43 -0700 schrieb Tim Harvey:
> > > > > >
> [...]
> > > > > > > Lucas,
> > > > > > >
> > > > > > > I've been using your 'i.MX8MM GPC improvements and BLK_CTRL driver'
> > > > > > > series for imx8mm-venice* and imx8mn-venice* boards. Thank you for
> > > > > > > this work and I hope to see it merged soon!
> > > > > > >
> > > > > > > I have found that on the imx8mm-venice-gw7901 board which does not use
> > > > > > > MIPI and thus does not connect VDD_MIPI_1P8, VDD_MIPI_1P2,
> > > > > > > VDD_MIPI_0P9, MIPI_VREG_CAP pins on the IMX8MM hangs with this
> > > > > > > particular patch. If I comment out the pgc_mipi domain and subsequent
> > > > > > > disp_blk_ctrl node from a later patch it resolves the hang. Is this
> > > > > > > behavior expected and what would your recommendation be to work around
> > > > > > > it?
> > > > > >
> > > > > > No, this isn't expected. If there are no active devices in the MIPI
> > > > > > domain, the power domain should not be touched, as we treat all of them
> > > > > > as disabled initially. If we don't touch the domain I would expect that
> > > > > > the power supply not being present shouldn't be an issue.
> > > > > >
> > > > > > Can you check if something in your system causes this power domain to
> > > > > > be powered up? Easiest way is probably to sprinkle a
> > > > > > printk("%s\n, genpd->name) in both imx8m_blk_ctrl_power_on() and
> > > > > > imx_gpc_power_on().
> > > > > >
> > > > >
> > > > > Lucas,
> > > > >
> > > > > Here's what I see before I hang (debug print on both power on/off
> > > > > followed by a msleep(1000) to make sure I see it before I hang):
> > > > > [    0.518319] imx_pgc_power_up hsiomix
> > > > > [    0.624031] imx_pgc_power_down hsiomix
> > > > > [    0.731879] imx_pgc_power_up hsiomix
> > > > > [    0.839906] imx_pgc_power_down hsiomix
> > > > > [    0.947875] imx_pgc_power_up hsiomix
> > > > > [    1.055859] imx_pgc_power_down hsiomix
> > > > > [    1.057296] imx_pgc_power_up gpumix
> > > > > [    1.167884] imx_pgc_power_down gpumix
> > > > > [    0.518513] imx_pgc_power_up hsiomix
> > > > > [    0.519933] imx_pgc_power_up gpumix
> > > > >
> > > >
> > > > The board also has IMX8MM VDD_GPU pins not connected so it makes sense
> > > > that we hang here I suppose. Yet if I add the folloiwng to
> > > > imx8mm-venice-gw7901.dts it still tries to enable them and hangs:
> > > > &gpu_2d {
> > > >         status = "disabled";
> > > > };
> > > >
> > > > &gpu_3d {
> > > >         status = "disabled";
> > > > };
> > > >
> > > > &vpu_blk_ctrl {
> > > >         status = "disabled";
> > > > };
> > >
> > > The pgc_gpu is a "active" consumer of the pgc_gpumix domain while the
> > > driver gets probed, so the driver core will power up the gpumix domain
> > > for a moment during kernel init. To avoid this you must at least set
> > > the status of the pgc_gpu node to disabled.
> > >
> >
> > I've tried that and it doesn't work either.
> >
> > &gpu_2d {
> >         status = "disabled";
> > };
> >
> > &gpu_3d {
> >         status = "disabled";
> > };
> >
> > &vpu_blk_ctrl {
> >         status = "disabled";
> > };
> >
> > &pgc_gpumix {
> >         status = "disabled";
> > };
> >
> > &pgc_gpu {
> >         status = "disabled";
> > };
> >
> > The interesting thing is that the first patch that causes this is
> > 'arm64: dts: imx8mm: add GPC node' which just adds the gpc node and is
> > before the addition of the other nodes. Therefore these are being
> > enabled by default regardless of the above nodes being disabled (or
> > not even added yet to imx8mm.dtsi).
>
> My bad, I didn't think about the fact that the power domain devices are
> not instantiated via the common OF populate code. For the status
> property to work as expected the GPCv2 code needs to check this
> property. I've just sent a patch to make this happen. Can you give it
> another try with your DT changes and this patch applied?
>

Yes, this makes sense and resolves it with only disabling pgc_gpumix in my dts.

I believe it is fine for me to not specifically disable gpu_2d and
gpu_3d as they are not enabled by default in imx8mm.dtsi and I don't
believe that will change and I don't 'currently' need to disable
disp_blk_ctrl or pgc_mipi but wondering if I should as the MIPI rails
are not hooked up either? (ie will something added in the future try
to use them?)

What needs to be done to get this series merged? I suppose it's too
late to get it into 5.13?

Best regards,

Tim

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-10-03 17:17 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-10 20:26 [PATCH v4 00/18] i.MX8MM GPC improvements and BLK_CTRL driver Lucas Stach
2021-09-10 20:26 ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 01/18] Revert "soc: imx: gpcv2: move reset assert after requesting domain power up" Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 02/18] soc: imx: gpcv2: Turn domain->pgc into bitfield Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 03/18] soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 04/18] soc: imx: gpcv2: add lockdep annotation Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 05/18] soc: imx: gpcv2: add domain option to keep domain clocks enabled Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 06/18] soc: imx: gpcv2: keep i.MX8M* bus " Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 07/18] soc: imx: gpcv2: support system suspend/resume Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 08/18] dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-16 20:23   ` Rob Herring
2021-09-16 20:23     ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 09/18] dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-16 20:25   ` Rob Herring
2021-09-16 20:25     ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 10/18] soc: imx: add i.MX8M blk-ctrl driver Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-14 15:46   ` Benjamin Gaignard
2021-09-14 15:46     ` Benjamin Gaignard
2021-10-02  1:07     ` Lucas Stach
2021-10-02  1:07       ` Lucas Stach
2021-10-04 14:27       ` Benjamin Gaignard
2021-10-04 14:27         ` Benjamin Gaignard
2021-10-05 10:03         ` Lucas Stach
2021-10-05 10:03           ` Lucas Stach
2021-10-05 12:36           ` Benjamin Gaignard
2021-10-05 12:36             ` Benjamin Gaignard
2021-10-13 12:12             ` Benjamin Gaignard
2021-10-13 12:12               ` Benjamin Gaignard
2021-11-07 21:08   ` Adam Ford
2021-11-07 21:08     ` Adam Ford
2021-11-08  8:35     ` Lucas Stach
2021-11-08  8:35       ` Lucas Stach
2021-11-08 13:13       ` Adam Ford
2021-11-08 13:13         ` Adam Ford
2021-09-10 20:26 ` [PATCH v4 11/18] dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-16 20:28   ` Rob Herring
2021-09-16 20:28     ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 12/18] dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-16 20:29   ` Rob Herring
2021-09-16 20:29     ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 13/18] soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-12 14:40   ` Adam Ford
2021-09-12 14:40     ` Adam Ford
2021-09-10 20:26 ` [PATCH v4 14/18] arm64: dts: imx8mm: add GPC node Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-10-01 23:07   ` Tim Harvey
2021-10-01 23:07     ` Tim Harvey
2021-10-01 23:20     ` Lucas Stach
2021-10-01 23:20       ` Lucas Stach
2021-10-02  0:06       ` Tim Harvey
2021-10-02  0:06         ` Tim Harvey
2021-10-02  0:15         ` Tim Harvey
2021-10-02  0:15           ` Tim Harvey
2021-10-02  0:25           ` Lucas Stach
2021-10-02  0:25             ` Lucas Stach
2021-10-02  2:43             ` Tim Harvey
2021-10-02  2:43               ` Tim Harvey
2021-10-02 12:51               ` Lucas Stach
2021-10-02 12:51                 ` Lucas Stach
2021-10-03 17:17                 ` Tim Harvey [this message]
2021-10-03 17:17                   ` Tim Harvey
2021-10-03 19:44                   ` Lucas Stach
2021-10-03 19:44                     ` Lucas Stach
2021-10-03 21:21                     ` Tim Harvey
2021-10-03 21:21                       ` Tim Harvey
2021-10-04  7:44                       ` Lucas Stach
2021-10-04  7:44                         ` Lucas Stach
2021-10-04  7:47                       ` Lucas Stach
2021-10-04  7:47                         ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 15/18] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 16/18] arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 17/18] arm64: dts: imx8mm: add VPU blk-ctrl Lucas Stach
2021-09-10 20:26   ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 18/18] arm64: dts: imx8mm: add DISP blk-ctrl Lucas Stach
2021-09-10 20:26   ` Lucas Stach

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